1*29949e86Sstevel /* 2*29949e86Sstevel * CDDL HEADER START 3*29949e86Sstevel * 4*29949e86Sstevel * The contents of this file are subject to the terms of the 5*29949e86Sstevel * Common Development and Distribution License (the "License"). 6*29949e86Sstevel * You may not use this file except in compliance with the License. 7*29949e86Sstevel * 8*29949e86Sstevel * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9*29949e86Sstevel * or http://www.opensolaris.org/os/licensing. 10*29949e86Sstevel * See the License for the specific language governing permissions 11*29949e86Sstevel * and limitations under the License. 12*29949e86Sstevel * 13*29949e86Sstevel * When distributing Covered Code, include this CDDL HEADER in each 14*29949e86Sstevel * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15*29949e86Sstevel * If applicable, add the following below this CDDL HEADER, with the 16*29949e86Sstevel * fields enclosed by brackets "[]" replaced with your own identifying 17*29949e86Sstevel * information: Portions Copyright [yyyy] [name of copyright owner] 18*29949e86Sstevel * 19*29949e86Sstevel * CDDL HEADER END 20*29949e86Sstevel */ 21*29949e86Sstevel 22*29949e86Sstevel /* 23*29949e86Sstevel * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 24*29949e86Sstevel * Use is subject to license terms. 25*29949e86Sstevel */ 26*29949e86Sstevel 27*29949e86Sstevel #ifndef _SYS_AC_H 28*29949e86Sstevel #define _SYS_AC_H 29*29949e86Sstevel 30*29949e86Sstevel #pragma ident "%Z%%M% %I% %E% SMI" 31*29949e86Sstevel 32*29949e86Sstevel #ifdef __cplusplus 33*29949e86Sstevel extern "C" { 34*29949e86Sstevel #endif 35*29949e86Sstevel 36*29949e86Sstevel /* useful debugging stuff */ 37*29949e86Sstevel #define AC_ATTACH_DEBUG 0x1 38*29949e86Sstevel #define AC_REGISTERS_DEBUG 0x2 39*29949e86Sstevel 40*29949e86Sstevel /* 41*29949e86Sstevel * OBP supplies us with two register sets for the AC nodes. They are: 42*29949e86Sstevel * 43*29949e86Sstevel * 0 miscellaneous regs 44*29949e86Sstevel * 1 Cache tags 45*29949e86Sstevel * 46*29949e86Sstevel * We do not use the cache tags for anything in the kernel, so we 47*29949e86Sstevel * do not map them in. 48*29949e86Sstevel */ 49*29949e86Sstevel 50*29949e86Sstevel /* Macros for physical acccess, fhc.h has to be present */ 51*29949e86Sstevel #define AC_OFFSET 0x00001000000ull 52*29949e86Sstevel #define AC_CENTRAL 0x80000000 53*29949e86Sstevel #define AC_ARB_FAST 0x00002000 54*29949e86Sstevel #define AC_BCSR(board) (FHC_BOARD_BASE(2*(board)) + FHC_OFFSET + \ 55*29949e86Sstevel AC_OFFSET + AC_OFF_BCSR) 56*29949e86Sstevel 57*29949e86Sstevel /* Register set 0 Offsets */ 58*29949e86Sstevel #define AC_OFF_BRCS 0x10 59*29949e86Sstevel #define AC_OFF_BCSR 0x20 60*29949e86Sstevel #define AC_OFF_ESR 0x30 61*29949e86Sstevel #define AC_OFF_EMR 0x40 62*29949e86Sstevel #define AC_OFF_MEMCTL 0x60 63*29949e86Sstevel #define AC_OFF_MEMDEC0 0x70 64*29949e86Sstevel #define AC_OFF_MEMDEC1 0x80 65*29949e86Sstevel #define AC_OFF_UPA0 0x2000 66*29949e86Sstevel #define AC_OFF_UPA1 0x4000 67*29949e86Sstevel #define AC_OFF_CNTR 0x6000 68*29949e86Sstevel #define AC_OFF_MCCR 0x6020 69*29949e86Sstevel 70*29949e86Sstevel /* Use predefined strings to name the kstats from this driver. */ 71*29949e86Sstevel #define AC_KSTAT_NAME "address_controller" 72*29949e86Sstevel #define MEMCTL_KSTAT_NAMED "acmemctl" 73*29949e86Sstevel #define MEMDECODE0_KSTAT_NAMED "acmemdecode0" 74*29949e86Sstevel #define MEMDECODE1_KSTAT_NAMED "acmemdecode1" 75*29949e86Sstevel #define CNTR_KSTAT_NAMED "accounter" 76*29949e86Sstevel #define MCCR_KSTAT_NAMED "acmccr" 77*29949e86Sstevel #define BANK_0_KSTAT_NAMED "acbank0" 78*29949e86Sstevel #define BANK_1_KSTAT_NAMED "acbank1" 79*29949e86Sstevel 80*29949e86Sstevel /* used for the picN kstats */ 81*29949e86Sstevel #define AC_NUM_PICS 2 82*29949e86Sstevel #define AC_COUNTER_TO_PIC0(CNTR) ((CNTR) & 0xFFFFFFFFULL) 83*29949e86Sstevel #define AC_COUNTER_TO_PIC1(CNTR) ((CNTR) >> 32) 84*29949e86Sstevel 85*29949e86Sstevel /* used to clear/set the pcr */ 86*29949e86Sstevel #define AC_CLEAR_PCR(PCR) ((PCR) & ~(0x3F3F)) 87*29949e86Sstevel #define AC_SET_HOT_PLUG(PCR) ((PCR) | (0x3F3F)) 88*29949e86Sstevel 89*29949e86Sstevel /* used for programming the pic */ 90*29949e86Sstevel #define AC_SET_PIC_BUS_PAUSE(BRD) (0x80000000LL - 0x9ac4 - ((BRD) << 3)) 91*29949e86Sstevel 92*29949e86Sstevel /* defines for AC Board Configuration and Status Register */ 93*29949e86Sstevel #define NO_CACHE 0 94*29949e86Sstevel #define CACHE_512K 2 95*29949e86Sstevel #define CACHE_1M 3 96*29949e86Sstevel #define CACHE_2M 4 97*29949e86Sstevel #define CACHE_4M 5 98*29949e86Sstevel #define CACHE_8M 6 99*29949e86Sstevel #define CACHE_16M 7 100*29949e86Sstevel 101*29949e86Sstevel #define ARB_MASTER 0x8000 102*29949e86Sstevel #define ARB_INIT 0x4000 103*29949e86Sstevel #define ARB_FAST 0x2000 104*29949e86Sstevel #define FTC_CPAR 0x0200 105*29949e86Sstevel 106*29949e86Sstevel #define AC_CSR_REFEN (1ULL << 27) 107*29949e86Sstevel 108*29949e86Sstevel /* defines for Memory decode registers */ 109*29949e86Sstevel #define AC_MEM_VALID 0x8000000000000000ULL 110*29949e86Sstevel 111*29949e86Sstevel /* size of a memory SIMM group */ 112*29949e86Sstevel #define RASIZE0(memctl) (8 << ((((memctl) >> 8) & 0x7) << 1)) 113*29949e86Sstevel #define RASIZE1(memctl) (8 << ((((memctl) >> 11) & 0x7) << 1)) 114*29949e86Sstevel #define RATBL0(memctl) (((memctl) >> 8) & 0x7) 115*29949e86Sstevel #define RATBL1(memctl) (((memctl) >> 11) & 0x7) 116*29949e86Sstevel 117*29949e86Sstevel /* 118*29949e86Sstevel * Interleave factor of a memory SIMM group. 119*29949e86Sstevel * Possible values are 1, 2, 4, 8, and 16. 1 means not interleaved. 120*29949e86Sstevel * Larger groups can be interleaved with smaller groups. Groups 121*29949e86Sstevel * on the same board can be interleaved as well. 122*29949e86Sstevel */ 123*29949e86Sstevel #define INTLV0(memctl) (1 << ((memctl) & 0x7)) 124*29949e86Sstevel #define INTLV1(memctl) (1 << (((memctl) >> 3) & 0x7)) 125*29949e86Sstevel #define INTVAL0(memctl) ((memctl) & 0x7) 126*29949e86Sstevel #define INTVAL1(memctl) (((memctl) >> 3) & 0x7) 127*29949e86Sstevel 128*29949e86Sstevel /* 129*29949e86Sstevel * Physical base mask of a memory SIMM group. Note that this is 130*29949e86Sstevel * not the real physical base, and is just used to match up the 131*29949e86Sstevel * interleaving of groups. The mask bits (UK) are used to mask 132*29949e86Sstevel * out the match (UM) field so that the bases can be compared. 133*29949e86Sstevel */ 134*29949e86Sstevel #define GRP_UK(memdec) (((memdec) >> 39) & 0xFFF) 135*29949e86Sstevel #define GRP_UM(memdec) (((memdec) >> 12) & 0x7FFF) 136*29949e86Sstevel #define GRP_BASE(memdec) (GRP_UM(memdec) & ~(GRP_UK(memdec))) 137*29949e86Sstevel #define GRP_LK(memdec) (((memdec) >> 6) & 0xf) 138*29949e86Sstevel #define GRP_LM(memdec) ((memdec) & 0xf) 139*29949e86Sstevel #define GRP_LBASE(memdec) (GRP_LM(memdec) & ~(GRP_LK(memdec))) 140*29949e86Sstevel #define GRP_REALBASE(m) ((GRP_BASE(m) << 26) | (GRP_LBASE(m) << 6)) 141*29949e86Sstevel #define GRP_UK2SPAN(memdec) ((GRP_UK(memdec) + 1) << 26) 142*29949e86Sstevel #define GRP_SPANMB(memdec) (GRP_UK2SPAN(memdec) >> 20) 143*29949e86Sstevel 144*29949e86Sstevel /* 145*29949e86Sstevel * memory states and conditions for sunfire memory system 146*29949e86Sstevel */ 147*29949e86Sstevel enum ac_bank_id { Bank0 = 0, Bank1 = 1 }; 148*29949e86Sstevel enum ac_bank_status { StUnknown = 0, StNoMem, StBad, StActive, StSpare }; 149*29949e86Sstevel enum ac_bank_condition { ConUnknown = 0, ConOK, ConFailing, ConFailed, 150*29949e86Sstevel ConTest, ConBad }; 151*29949e86Sstevel 152*29949e86Sstevel /* 153*29949e86Sstevel * AC memory bank ioctl interface. 154*29949e86Sstevel */ 155*29949e86Sstevel 156*29949e86Sstevel /* 'G' (for gigabytes!) does not appear to be used elsewhere in the kernel */ 157*29949e86Sstevel #define AC_IOC ('G'<<8) 158*29949e86Sstevel 159*29949e86Sstevel /* 160*29949e86Sstevel * For all AC_MEM_ ioctls the arg pointer points to a sysc_cfga_cmd_t 161*29949e86Sstevel * except for AC_MEM_ADMIN_VER. The private pointer then points to a 162*29949e86Sstevel * structure of the appropriate type, if required. 163*29949e86Sstevel */ 164*29949e86Sstevel #define AC_MEM_ADMIN_VER (AC_IOC|0) /* arg is &ac_mem_version_t */ 165*29949e86Sstevel #define AC_MEM_CONFIGURE (AC_IOC|1) /* private == NULL */ 166*29949e86Sstevel #define AC_MEM_UNCONFIGURE (AC_IOC|2) /* private == NULL */ 167*29949e86Sstevel #define AC_MEM_STAT (AC_IOC|3) /* ac_stat_t */ 168*29949e86Sstevel #define AC_MEM_TEST_START (AC_IOC|4) /* ac_mem_test_start_t */ 169*29949e86Sstevel #define AC_MEM_TEST_STOP (AC_IOC|5) /* ac_mem_test_stop_t */ 170*29949e86Sstevel #define AC_MEM_TEST_READ (AC_IOC|6) /* ac_mem_test_read_t */ 171*29949e86Sstevel #define AC_MEM_TEST_WRITE (AC_IOC|7) /* ac_mem_test_write_t */ 172*29949e86Sstevel #define AC_MEM_EXERCISE (AC_IOC|128) /* various */ 173*29949e86Sstevel 174*29949e86Sstevel #define AC_OUTPUT_LEN MAXPATHLEN /* output str len */ 175*29949e86Sstevel 176*29949e86Sstevel typedef enum { 177*29949e86Sstevel AC_ERR_DEFAULT = 0, /* generic errors */ 178*29949e86Sstevel AC_ERR_INTRANS, /* hardware in transition */ 179*29949e86Sstevel AC_ERR_UTHREAD, /* can't stop user thread */ 180*29949e86Sstevel AC_ERR_KTHREAD, /* can't stop kernel thread */ 181*29949e86Sstevel AC_ERR_SUSPEND, /* can't suspend a device */ 182*29949e86Sstevel AC_ERR_RESUME, /* can't resume a device */ 183*29949e86Sstevel AC_ERR_POWER, /* not enough power for slot */ 184*29949e86Sstevel AC_ERR_COOLING, /* not enough cooling for slot */ 185*29949e86Sstevel AC_ERR_PRECHARGE, /* not enough precharge for slot */ 186*29949e86Sstevel AC_ERR_HOTPLUG, /* Hot Plug Unavailable */ 187*29949e86Sstevel AC_ERR_HW_COMPAT, /* incompatible hardware found during dr */ 188*29949e86Sstevel AC_ERR_NON_DR_PROM, /* prom not support Dynamic Reconfiguration */ 189*29949e86Sstevel AC_ERR_CORE_RESOURCE, /* core resource cannot be removed */ 190*29949e86Sstevel AC_ERR_PROM, /* error encountered in OBP/POST */ 191*29949e86Sstevel AC_ERR_DR_INIT, /* error encountered in sysc_dr_init op */ 192*29949e86Sstevel AC_ERR_NDI_ATTACH, /* error encountered in NDI attach operations */ 193*29949e86Sstevel AC_ERR_NDI_DETACH, /* error encountered in NDI detach operations */ 194*29949e86Sstevel AC_ERR_RSTATE, /* wrong receptacle state */ 195*29949e86Sstevel AC_ERR_OSTATE, /* wrong occupant state */ 196*29949e86Sstevel AC_ERR_COND, /* invalid condition */ 197*29949e86Sstevel AC_ERR_BD, /* invalid board id */ 198*29949e86Sstevel AC_ERR_BD_TYPE, /* invalid board type */ 199*29949e86Sstevel AC_ERR_BD_STATE, /* invalid board state */ 200*29949e86Sstevel AC_ERR_MEM_PERM, /* no write permission */ 201*29949e86Sstevel AC_ERR_MEM_BK, /* invalid memory bank */ 202*29949e86Sstevel AC_ERR_MEM_TEST, /* invalid memory test id */ 203*29949e86Sstevel AC_ERR_MEM_TEST_PAR, /* invalid memory test parameter(s) */ 204*29949e86Sstevel AC_ERR_KPM_CANCELLED, /* kphysm_del_cancel (for complete) */ 205*29949e86Sstevel AC_ERR_KPM_REFUSED, /* kphysm_pre_del failed (for complete) */ 206*29949e86Sstevel AC_ERR_KPM_SPAN, /* memory already in use (add) */ 207*29949e86Sstevel AC_ERR_KPM_DUP, /* memory span duplicate (delete) */ 208*29949e86Sstevel AC_ERR_KPM_FAULT, /* memory access test failed (add) */ 209*29949e86Sstevel AC_ERR_KPM_RESOURCE, /* some resource was not available */ 210*29949e86Sstevel AC_ERR_KPM_NOTSUP, /* operation not supported */ 211*29949e86Sstevel AC_ERR_KPM_NOHANDLES, /* cannot allocate any more handles */ 212*29949e86Sstevel AC_ERR_KPM_NONRELOC, /* non-relocatable pages in span */ 213*29949e86Sstevel AC_ERR_KPM_HANDLE, /* bad handle supplied */ 214*29949e86Sstevel AC_ERR_KPM_BUSY, /* memory in span is being deleted */ 215*29949e86Sstevel AC_ERR_KPM_NOTVIABLE, /* vM viability test failed */ 216*29949e86Sstevel AC_ERR_KPM_SEQUENCE, /* function called out of sequence */ 217*29949e86Sstevel AC_ERR_KPM_NOWORK, /* no pages to delete */ 218*29949e86Sstevel AC_ERR_KPM_NOTFINISHED, /* thread not finished */ 219*29949e86Sstevel AC_ERR_KPM_NOTRUNNING, /* thread not running */ 220*29949e86Sstevel AC_ERR_VMEM, /* insufficient virtual memory */ 221*29949e86Sstevel AC_ERR_INTR, /* delete interrupt by user */ 222*29949e86Sstevel AC_ERR_TIMEOUT, /* delete timed out */ 223*29949e86Sstevel AC_ERR_MEM_DEINTLV /* could not de-interleave memory */ 224*29949e86Sstevel } ac_err_t; 225*29949e86Sstevel 226*29949e86Sstevel /* 227*29949e86Sstevel * Config admin command structure for AC_MEM ioctls. 228*29949e86Sstevel */ 229*29949e86Sstevel typedef struct ac_cfga_cmd { 230*29949e86Sstevel uint_t force:1; /* force this state transition */ 231*29949e86Sstevel uint_t test:1; /* Need to test hardware */ 232*29949e86Sstevel int arg; /* generic data for test */ 233*29949e86Sstevel ac_err_t errtype; /* error code returned */ 234*29949e86Sstevel char *outputstr; /* output returned from ioctl */ 235*29949e86Sstevel void *private; /* command private data */ 236*29949e86Sstevel } ac_cfga_cmd_t; 237*29949e86Sstevel 238*29949e86Sstevel typedef struct ac_cfga_cmd32 { 239*29949e86Sstevel uint_t force:1; /* force this state transition */ 240*29949e86Sstevel uint_t test:1; /* Need to test hardware */ 241*29949e86Sstevel int arg; /* generic data for test */ 242*29949e86Sstevel ac_err_t errtype; /* error code returned */ 243*29949e86Sstevel caddr32_t outputstr; /* output returned from ioctl */ 244*29949e86Sstevel caddr32_t private; /* command private data */ 245*29949e86Sstevel } ac_cfga_cmd32_t; 246*29949e86Sstevel 247*29949e86Sstevel typedef uint_t ac_mem_version_t; /* platform interface rev */ 248*29949e86Sstevel #define AC_MEM_ADMIN_VERSION 1 249*29949e86Sstevel 250*29949e86Sstevel typedef uint_t mem_test_handle_t; 251*29949e86Sstevel 252*29949e86Sstevel typedef struct { 253*29949e86Sstevel uint64_t module_id; 254*29949e86Sstevel uint64_t afsr; 255*29949e86Sstevel uint64_t afar; 256*29949e86Sstevel uint64_t udbh_error_reg; 257*29949e86Sstevel uint64_t udbl_error_reg; 258*29949e86Sstevel } sunfire_processor_error_regs_t; 259*29949e86Sstevel 260*29949e86Sstevel /* 261*29949e86Sstevel * page_size gives the requires size for the read or write buffer. 262*29949e86Sstevel * A read can be restricted to one or more line_size units starting 263*29949e86Sstevel * at a multiple of line_size units from the start of the page. 264*29949e86Sstevel * afar_base is the physical base of the bank being tested so 265*29949e86Sstevel * that the afar value can be translated to an offset into the bank. 266*29949e86Sstevel */ 267*29949e86Sstevel typedef struct { 268*29949e86Sstevel mem_test_handle_t handle; 269*29949e86Sstevel pid_t tester_pid; /* PID of test starter */ 270*29949e86Sstevel sysc_cfga_cond_t prev_condition; 271*29949e86Sstevel u_longlong_t bank_size; /* bytes */ 272*29949e86Sstevel uint_t page_size; /* bytes */ 273*29949e86Sstevel uint_t line_size; /* bytes */ 274*29949e86Sstevel u_longlong_t afar_base; 275*29949e86Sstevel } ac_mem_test_start_t; 276*29949e86Sstevel 277*29949e86Sstevel typedef struct { 278*29949e86Sstevel mem_test_handle_t handle; 279*29949e86Sstevel sysc_cfga_cond_t condition; 280*29949e86Sstevel } ac_mem_test_stop_t; 281*29949e86Sstevel 282*29949e86Sstevel /* 283*29949e86Sstevel * line_offset is in the range 0 - (page_size/line_size)-1 284*29949e86Sstevel * line_count is in the range 1 - (page_size/line_size) 285*29949e86Sstevel */ 286*29949e86Sstevel typedef struct { 287*29949e86Sstevel u_longlong_t page_num; 288*29949e86Sstevel uint_t line_offset; 289*29949e86Sstevel uint_t line_count; 290*29949e86Sstevel } ac_test_addr_t; 291*29949e86Sstevel 292*29949e86Sstevel /* 293*29949e86Sstevel * Data will be transferred in/out of the buffer at: 294*29949e86Sstevel * (page_buf + (line_offset*line_size)) 295*29949e86Sstevel */ 296*29949e86Sstevel typedef struct { 297*29949e86Sstevel mem_test_handle_t handle; 298*29949e86Sstevel void *page_buf; 299*29949e86Sstevel ac_test_addr_t address; 300*29949e86Sstevel sunfire_processor_error_regs_t *error_buf; 301*29949e86Sstevel } ac_mem_test_read_t; 302*29949e86Sstevel 303*29949e86Sstevel typedef struct { 304*29949e86Sstevel mem_test_handle_t handle; 305*29949e86Sstevel void *page_buf; 306*29949e86Sstevel ac_test_addr_t address; 307*29949e86Sstevel } ac_mem_test_write_t; 308*29949e86Sstevel 309*29949e86Sstevel #ifdef _SYSCALL32 310*29949e86Sstevel 311*29949e86Sstevel /* Kernel's view of ILP32 structure version. */ 312*29949e86Sstevel 313*29949e86Sstevel typedef struct { 314*29949e86Sstevel mem_test_handle_t handle; 315*29949e86Sstevel caddr32_t page_buf; /* void * */ 316*29949e86Sstevel ac_test_addr_t address; 317*29949e86Sstevel caddr32_t error_buf; /* sunfire_processor_error_regs_t */ 318*29949e86Sstevel } ac_mem_test_read32_t; 319*29949e86Sstevel 320*29949e86Sstevel typedef struct { 321*29949e86Sstevel mem_test_handle_t handle; 322*29949e86Sstevel caddr32_t page_buf; /* void * */ 323*29949e86Sstevel ac_test_addr_t address; 324*29949e86Sstevel } ac_mem_test_write32_t; 325*29949e86Sstevel 326*29949e86Sstevel #endif /* _SYSCALL32 */ 327*29949e86Sstevel 328*29949e86Sstevel /* structure returned from AC_MEM_STAT ioctl */ 329*29949e86Sstevel typedef struct { 330*29949e86Sstevel sysc_cfga_rstate_t rstate; 331*29949e86Sstevel sysc_cfga_ostate_t ostate; 332*29949e86Sstevel sysc_cfga_cond_t condition; 333*29949e86Sstevel time_t status_time; 334*29949e86Sstevel uint_t board; 335*29949e86Sstevel uint_t real_size; 336*29949e86Sstevel uint_t use_size; 337*29949e86Sstevel uint_t busy; /* add/delete in progress */ 338*29949e86Sstevel uint_t page_size; /* bytes */ 339*29949e86Sstevel uint64_t phys_pages; 340*29949e86Sstevel uint64_t managed; 341*29949e86Sstevel uint64_t nonrelocatable; 342*29949e86Sstevel /* to supply address, group, info */ 343*29949e86Sstevel uint64_t ac_memctl; 344*29949e86Sstevel uint64_t ac_decode0; 345*29949e86Sstevel uint64_t ac_decode1; 346*29949e86Sstevel } ac_stat_t; 347*29949e86Sstevel 348*29949e86Sstevel #ifdef _SYSCALL32 349*29949e86Sstevel 350*29949e86Sstevel /* Kernel's view of ILP32 structure version. */ 351*29949e86Sstevel 352*29949e86Sstevel typedef struct { 353*29949e86Sstevel sysc_cfga_rstate_t rstate; 354*29949e86Sstevel sysc_cfga_ostate_t ostate; 355*29949e86Sstevel sysc_cfga_cond_t condition; 356*29949e86Sstevel time32_t status_time; 357*29949e86Sstevel uint_t board; 358*29949e86Sstevel uint_t real_size; 359*29949e86Sstevel uint_t use_size; 360*29949e86Sstevel uint_t busy; /* add/delete in progress */ 361*29949e86Sstevel uint_t page_size; /* bytes */ 362*29949e86Sstevel uint64_t phys_pages; 363*29949e86Sstevel uint64_t managed; 364*29949e86Sstevel uint64_t nonrelocatable; 365*29949e86Sstevel /* to supply address, group, info */ 366*29949e86Sstevel uint64_t ac_memctl; 367*29949e86Sstevel uint64_t ac_decode0; 368*29949e86Sstevel uint64_t ac_decode1; 369*29949e86Sstevel } ac_stat32_t; 370*29949e86Sstevel 371*29949e86Sstevel #endif /* _SYSCALL32 */ 372*29949e86Sstevel 373*29949e86Sstevel /* Command values in cmd_cfga.arg for the AC_MEM_EXERCISE ioctl. */ 374*29949e86Sstevel #define AC_MEMX_RELOCATE_ALL 0 375*29949e86Sstevel 376*29949e86Sstevel /* Stats structure for AC_MEMX_RELOCATE_ALL (cmd_cfga.private != NULL). */ 377*29949e86Sstevel struct ac_memx_relocate_stats { 378*29949e86Sstevel uint_t base; 379*29949e86Sstevel uint_t npgs; 380*29949e86Sstevel uint_t nopaget; 381*29949e86Sstevel uint_t nolock; 382*29949e86Sstevel uint_t isfree; 383*29949e86Sstevel uint_t reloc; 384*29949e86Sstevel uint_t noreloc; 385*29949e86Sstevel }; 386*29949e86Sstevel 387*29949e86Sstevel /* End of ioctl interface. */ 388*29949e86Sstevel 389*29949e86Sstevel #if defined(_KERNEL) 390*29949e86Sstevel 391*29949e86Sstevel typedef struct { 392*29949e86Sstevel ac_cfga_cmd_t cmd_cfga; 393*29949e86Sstevel char *errbuf; /* internal error buffer */ 394*29949e86Sstevel struct ac_soft_state *softsp; 395*29949e86Sstevel uint_t bank; /* Decoded bank number. */ 396*29949e86Sstevel } ac_cfga_pkt_t; 397*29949e86Sstevel 398*29949e86Sstevel #define AC_ERR_SET(pkt, err) (pkt)->cmd_cfga.errtype = (err) 399*29949e86Sstevel 400*29949e86Sstevel #define MEM_BOARD_VISIBLE(BD) \ 401*29949e86Sstevel ((BD)->sc.rstate == SYSC_CFGA_RSTATE_CONNECTED && \ 402*29949e86Sstevel (BD)->sc.ostate == SYSC_CFGA_OSTATE_CONFIGURED) 403*29949e86Sstevel 404*29949e86Sstevel #ifndef TRUE 405*29949e86Sstevel #define TRUE (1) 406*29949e86Sstevel #endif 407*29949e86Sstevel #ifndef FALSE 408*29949e86Sstevel #define FALSE (0) 409*29949e86Sstevel #endif 410*29949e86Sstevel 411*29949e86Sstevel #define AC_BANK0_STATUS "bank-0-status" 412*29949e86Sstevel #define AC_BANK1_STATUS "bank-1-status" 413*29949e86Sstevel #define AC_BANK_NOMEM "nomem" 414*29949e86Sstevel #define AC_BANK_OK "ok" 415*29949e86Sstevel #define AC_BANK_SPARE "spare" 416*29949e86Sstevel #define AC_BANK_FAILED "failed" 417*29949e86Sstevel 418*29949e86Sstevel /* 419*29949e86Sstevel * Test for a valid size setting. The size must be set as 420*29949e86Sstevel * a contiguous number of bits starting at the least significant bit. 421*29949e86Sstevel * Adding one to such a number causes a carry to be propagated to 422*29949e86Sstevel * the first zero bit, eg 00111 -> 01000. Thus for a correctly 423*29949e86Sstevel * formed value, the AND of the two numbers is 0. 424*29949e86Sstevel */ 425*29949e86Sstevel #define GRP_SIZE_IS_SET(memdec) ((GRP_UK(memdec) & (GRP_UK(memdec) + 1)) == 0) 426*29949e86Sstevel 427*29949e86Sstevel /* set the decode register bits according to the desired bank layout */ 428*29949e86Sstevel #define SETUP_DECODE(addr, mb, intlv, group) \ 429*29949e86Sstevel ((((addr) >> 26) & 0x7fffULL) << 12) | /* UM */ \ 430*29949e86Sstevel ((((mb) >> 6) - 1ULL) << 39) | /* UK */ \ 431*29949e86Sstevel ((group) & 0xfULL) | /* LM */ \ 432*29949e86Sstevel ((0xfULL << (intlv) & 0xfULL) << 6) /* LK */ 433*29949e86Sstevel 434*29949e86Sstevel /* 435*29949e86Sstevel * Driver minor number macros. 436*29949e86Sstevel */ 437*29949e86Sstevel #define AC_GETINSTANCE(M) ((M) >> 1) 438*29949e86Sstevel #define AC_GETBANK(M) ((M) & 1) 439*29949e86Sstevel #define AC_PUTINSTANCE(I) ((I) << 1) 440*29949e86Sstevel 441*29949e86Sstevel /* 442*29949e86Sstevel * Attachment point names. 443*29949e86Sstevel */ 444*29949e86Sstevel #define NAME_BANK0 "bank0" 445*29949e86Sstevel #define NAME_BANK1 "bank1" 446*29949e86Sstevel 447*29949e86Sstevel /* 448*29949e86Sstevel * Memory Database 449*29949e86Sstevel * This information is generally accessed through the bd_list so we will 450*29949e86Sstevel * just protect it by that for now. 451*29949e86Sstevel */ 452*29949e86Sstevel struct ac_mem_info { 453*29949e86Sstevel int busy; /* A bank is in transition */ 454*29949e86Sstevel time_t status_change; /* Time of last change */ 455*29949e86Sstevel 456*29949e86Sstevel sysc_cfga_rstate_t rstate; 457*29949e86Sstevel sysc_cfga_ostate_t ostate; 458*29949e86Sstevel sysc_cfga_cond_t condition; 459*29949e86Sstevel uint_t real_size; /* Real size in MB of bank */ 460*29949e86Sstevel uint_t use_size; /* In use size in MB */ 461*29949e86Sstevel }; 462*29949e86Sstevel 463*29949e86Sstevel /* Structures used in the driver to manage the hardware */ 464*29949e86Sstevel struct ac_soft_state { 465*29949e86Sstevel dev_info_t *dip; /* dev info of myself */ 466*29949e86Sstevel dev_info_t *pdip; /* dev info of my parent */ 467*29949e86Sstevel int board; /* Board number for this AC */ 468*29949e86Sstevel 469*29949e86Sstevel /* fields protected by bd_list lock */ 470*29949e86Sstevel struct ac_mem_info bank[2]; /* memory bank information */ 471*29949e86Sstevel 472*29949e86Sstevel /* Mapped addresses of registers */ 473*29949e86Sstevel void *ac_base; /* Base address of Address Controller */ 474*29949e86Sstevel volatile uint32_t *ac_id; /* ID register */ 475*29949e86Sstevel volatile uint64_t *ac_memctl; /* Memory Control */ 476*29949e86Sstevel volatile uint64_t *ac_memdecode0; /* Memory Decode 0 */ 477*29949e86Sstevel volatile uint64_t *ac_memdecode1; /* Memory Decode 1 */ 478*29949e86Sstevel volatile uint64_t *ac_counter; /* AC counter register */ 479*29949e86Sstevel volatile uint32_t *ac_mccr; /* AC Counter control */ 480*29949e86Sstevel kstat_t *ac_ksp; 481*29949e86Sstevel kstat_t *ac_counters_ksp; /* performance counter kstat */ 482*29949e86Sstevel }; 483*29949e86Sstevel 484*29949e86Sstevel extern void ac_blkcopy(caddr_t, caddr_t, uint_t, uint_t); 485*29949e86Sstevel extern void ac_mapin(uint64_t, caddr_t); 486*29949e86Sstevel extern void ac_unmap(caddr_t); 487*29949e86Sstevel 488*29949e86Sstevel /* kstat structure used by ac to pass data to user programs. */ 489*29949e86Sstevel struct ac_kstat { 490*29949e86Sstevel struct kstat_named ac_memctl; /* AC Memory control */ 491*29949e86Sstevel struct kstat_named ac_memdecode0; /* AC Memory Decode Bank 0 */ 492*29949e86Sstevel struct kstat_named ac_memdecode1; /* AC Memory Decode Bank 1 */ 493*29949e86Sstevel struct kstat_named ac_mccr; /* AC Mem Counter Control */ 494*29949e86Sstevel struct kstat_named ac_counter; /* AC Counter */ 495*29949e86Sstevel struct kstat_named ac_bank0_status; 496*29949e86Sstevel struct kstat_named ac_bank1_status; 497*29949e86Sstevel }; 498*29949e86Sstevel 499*29949e86Sstevel #endif /* _KERNEL */ 500*29949e86Sstevel 501*29949e86Sstevel #ifdef __cplusplus 502*29949e86Sstevel } 503*29949e86Sstevel #endif 504*29949e86Sstevel 505*29949e86Sstevel #endif /* _SYS_AC_H */ 506