17c478bd9Sstevel@tonic-gate /* 27c478bd9Sstevel@tonic-gate * CDDL HEADER START 37c478bd9Sstevel@tonic-gate * 47c478bd9Sstevel@tonic-gate * The contents of this file are subject to the terms of the 5*c56c1e58Sgirish * Common Development and Distribution License (the "License"). 6*c56c1e58Sgirish * You may not use this file except in compliance with the License. 77c478bd9Sstevel@tonic-gate * 87c478bd9Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 97c478bd9Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 107c478bd9Sstevel@tonic-gate * See the License for the specific language governing permissions 117c478bd9Sstevel@tonic-gate * and limitations under the License. 127c478bd9Sstevel@tonic-gate * 137c478bd9Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 147c478bd9Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 157c478bd9Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 167c478bd9Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 177c478bd9Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 187c478bd9Sstevel@tonic-gate * 197c478bd9Sstevel@tonic-gate * CDDL HEADER END 207c478bd9Sstevel@tonic-gate */ 217c478bd9Sstevel@tonic-gate /* 22*c56c1e58Sgirish * Copyright 2006 Sun Microsystems, Inc. All rights reserved. 237c478bd9Sstevel@tonic-gate * Use is subject to license terms. 247c478bd9Sstevel@tonic-gate */ 257c478bd9Sstevel@tonic-gate 267c478bd9Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 277c478bd9Sstevel@tonic-gate 287c478bd9Sstevel@tonic-gate #include <sys/machsystm.h> 297c478bd9Sstevel@tonic-gate #include <sys/archsystm.h> 307c478bd9Sstevel@tonic-gate #include <sys/vm.h> 317c478bd9Sstevel@tonic-gate #include <sys/cpu.h> 327c478bd9Sstevel@tonic-gate #include <sys/atomic.h> 337c478bd9Sstevel@tonic-gate #include <sys/reboot.h> 347c478bd9Sstevel@tonic-gate #include <sys/kdi.h> 357c478bd9Sstevel@tonic-gate #include <sys/bootconf.h> 367c478bd9Sstevel@tonic-gate #include <sys/memlist_plat.h> 377c478bd9Sstevel@tonic-gate #include <sys/memlist_impl.h> 387c478bd9Sstevel@tonic-gate #include <sys/prom_plat.h> 397c478bd9Sstevel@tonic-gate #include <sys/prom_isa.h> 407c478bd9Sstevel@tonic-gate #include <sys/autoconf.h> 417c478bd9Sstevel@tonic-gate #include <sys/intreg.h> 427c478bd9Sstevel@tonic-gate #include <sys/ivintr.h> 437c478bd9Sstevel@tonic-gate #include <sys/fpu/fpusystm.h> 447c478bd9Sstevel@tonic-gate #include <sys/iommutsb.h> 457c478bd9Sstevel@tonic-gate #include <vm/vm_dep.h> 467c478bd9Sstevel@tonic-gate #include <vm/seg_kmem.h> 477c478bd9Sstevel@tonic-gate #include <vm/seg_kpm.h> 487c478bd9Sstevel@tonic-gate #include <vm/seg_map.h> 497c478bd9Sstevel@tonic-gate #include <vm/seg_kp.h> 507c478bd9Sstevel@tonic-gate #include <sys/sysconf.h> 517c478bd9Sstevel@tonic-gate #include <vm/hat_sfmmu.h> 527c478bd9Sstevel@tonic-gate #include <sys/kobj.h> 537c478bd9Sstevel@tonic-gate #include <sys/sun4asi.h> 547c478bd9Sstevel@tonic-gate #include <sys/clconf.h> 557c478bd9Sstevel@tonic-gate #include <sys/platform_module.h> 567c478bd9Sstevel@tonic-gate #include <sys/panic.h> 577c478bd9Sstevel@tonic-gate #include <sys/cpu_sgnblk_defs.h> 587c478bd9Sstevel@tonic-gate #include <sys/clock.h> 597c478bd9Sstevel@tonic-gate #include <sys/fpras_impl.h> 607c478bd9Sstevel@tonic-gate #include <sys/prom_debug.h> 617c478bd9Sstevel@tonic-gate #include <sys/traptrace.h> 627c478bd9Sstevel@tonic-gate #include <sys/memnode.h> 637c478bd9Sstevel@tonic-gate #include <sys/mem_cage.h> 647c478bd9Sstevel@tonic-gate 657c478bd9Sstevel@tonic-gate /* 667c478bd9Sstevel@tonic-gate * fpRAS implementation structures. 677c478bd9Sstevel@tonic-gate */ 687c478bd9Sstevel@tonic-gate struct fpras_chkfn *fpras_chkfnaddrs[FPRAS_NCOPYOPS]; 697c478bd9Sstevel@tonic-gate struct fpras_chkfngrp *fpras_chkfngrps; 707c478bd9Sstevel@tonic-gate struct fpras_chkfngrp *fpras_chkfngrps_base; 717c478bd9Sstevel@tonic-gate int fpras_frequency = -1; 727c478bd9Sstevel@tonic-gate int64_t fpras_interval = -1; 737c478bd9Sstevel@tonic-gate 747c478bd9Sstevel@tonic-gate void 757c478bd9Sstevel@tonic-gate setup_trap_table(void) 767c478bd9Sstevel@tonic-gate { 777c478bd9Sstevel@tonic-gate intr_init(CPU); /* init interrupt request free list */ 787c478bd9Sstevel@tonic-gate setwstate(WSTATE_KERN); 797c478bd9Sstevel@tonic-gate prom_set_traptable(&trap_table); 807c478bd9Sstevel@tonic-gate } 817c478bd9Sstevel@tonic-gate 827c478bd9Sstevel@tonic-gate void 837c478bd9Sstevel@tonic-gate mach_fpras() 847c478bd9Sstevel@tonic-gate { 857c478bd9Sstevel@tonic-gate if (fpras_implemented && !fpras_disable) { 867c478bd9Sstevel@tonic-gate int i; 877c478bd9Sstevel@tonic-gate struct fpras_chkfngrp *fcgp; 887c478bd9Sstevel@tonic-gate size_t chkfngrpsallocsz; 897c478bd9Sstevel@tonic-gate 907c478bd9Sstevel@tonic-gate /* 917c478bd9Sstevel@tonic-gate * Note that we size off of NCPU and setup for 927c478bd9Sstevel@tonic-gate * all those possibilities regardless of whether 937c478bd9Sstevel@tonic-gate * the cpu id is present or not. We do this so that 947c478bd9Sstevel@tonic-gate * we don't have any construction or destruction 957c478bd9Sstevel@tonic-gate * activity to perform at DR time, and it's not 967c478bd9Sstevel@tonic-gate * costly in memory. We require block alignment. 977c478bd9Sstevel@tonic-gate */ 987c478bd9Sstevel@tonic-gate chkfngrpsallocsz = NCPU * sizeof (struct fpras_chkfngrp); 997c478bd9Sstevel@tonic-gate fpras_chkfngrps_base = kmem_alloc(chkfngrpsallocsz, KM_SLEEP); 1007c478bd9Sstevel@tonic-gate if (IS_P2ALIGNED((uintptr_t)fpras_chkfngrps_base, 64)) { 1017c478bd9Sstevel@tonic-gate fpras_chkfngrps = fpras_chkfngrps_base; 1027c478bd9Sstevel@tonic-gate } else { 1037c478bd9Sstevel@tonic-gate kmem_free(fpras_chkfngrps_base, chkfngrpsallocsz); 1047c478bd9Sstevel@tonic-gate chkfngrpsallocsz += 64; 1057c478bd9Sstevel@tonic-gate fpras_chkfngrps_base = kmem_alloc(chkfngrpsallocsz, 1067c478bd9Sstevel@tonic-gate KM_SLEEP); 1077c478bd9Sstevel@tonic-gate fpras_chkfngrps = (struct fpras_chkfngrp *) 1087c478bd9Sstevel@tonic-gate P2ROUNDUP((uintptr_t)fpras_chkfngrps_base, 64); 1097c478bd9Sstevel@tonic-gate } 1107c478bd9Sstevel@tonic-gate 1117c478bd9Sstevel@tonic-gate /* 1127c478bd9Sstevel@tonic-gate * Copy our check function into place for each copy operation 1137c478bd9Sstevel@tonic-gate * and each cpu id. 1147c478bd9Sstevel@tonic-gate */ 1157c478bd9Sstevel@tonic-gate fcgp = &fpras_chkfngrps[0]; 1167c478bd9Sstevel@tonic-gate for (i = 0; i < FPRAS_NCOPYOPS; ++i) 1177c478bd9Sstevel@tonic-gate bcopy((void *)fpras_chkfn_type1, &fcgp->fpras_fn[i], 1187c478bd9Sstevel@tonic-gate sizeof (struct fpras_chkfn)); 1197c478bd9Sstevel@tonic-gate for (i = 1; i < NCPU; ++i) 1207c478bd9Sstevel@tonic-gate *(&fpras_chkfngrps[i]) = *fcgp; 1217c478bd9Sstevel@tonic-gate 1227c478bd9Sstevel@tonic-gate /* 1237c478bd9Sstevel@tonic-gate * At definition fpras_frequency is set to -1, and it will 1247c478bd9Sstevel@tonic-gate * still have that value unless changed in /etc/system (not 1257c478bd9Sstevel@tonic-gate * strictly supported, but not preventable). The following 1267c478bd9Sstevel@tonic-gate * both sets the default and sanity checks anything from 1277c478bd9Sstevel@tonic-gate * /etc/system. 1287c478bd9Sstevel@tonic-gate */ 1297c478bd9Sstevel@tonic-gate if (fpras_frequency < 0) 1307c478bd9Sstevel@tonic-gate fpras_frequency = FPRAS_DEFAULT_FREQUENCY; 1317c478bd9Sstevel@tonic-gate 1327c478bd9Sstevel@tonic-gate /* 1337c478bd9Sstevel@tonic-gate * Now calculate fpras_interval. When fpras_interval 1347c478bd9Sstevel@tonic-gate * becomes non-negative fpras checks will commence 1357c478bd9Sstevel@tonic-gate * (copies before this point in boot will bypass fpras). 1367c478bd9Sstevel@tonic-gate * Our stores of instructions must be visible; no need 1377c478bd9Sstevel@tonic-gate * to flush as they're never been executed before. 1387c478bd9Sstevel@tonic-gate */ 1397c478bd9Sstevel@tonic-gate membar_producer(); 1407c478bd9Sstevel@tonic-gate fpras_interval = (fpras_frequency == 0) ? 1417c478bd9Sstevel@tonic-gate 0 : sys_tick_freq / fpras_frequency; 1427c478bd9Sstevel@tonic-gate } 1437c478bd9Sstevel@tonic-gate } 1447c478bd9Sstevel@tonic-gate 1457c478bd9Sstevel@tonic-gate void 1467c478bd9Sstevel@tonic-gate mach_hw_copy_limit(void) 1477c478bd9Sstevel@tonic-gate { 1487c478bd9Sstevel@tonic-gate if (!fpu_exists) { 1497c478bd9Sstevel@tonic-gate use_hw_bcopy = 0; 1507c478bd9Sstevel@tonic-gate hw_copy_limit_1 = 0; 1517c478bd9Sstevel@tonic-gate hw_copy_limit_2 = 0; 1527c478bd9Sstevel@tonic-gate hw_copy_limit_4 = 0; 1537c478bd9Sstevel@tonic-gate hw_copy_limit_8 = 0; 1547c478bd9Sstevel@tonic-gate use_hw_bzero = 0; 1557c478bd9Sstevel@tonic-gate } 1567c478bd9Sstevel@tonic-gate } 1577c478bd9Sstevel@tonic-gate 1587c478bd9Sstevel@tonic-gate void 1597c478bd9Sstevel@tonic-gate load_tod_module() 1607c478bd9Sstevel@tonic-gate { 1617c478bd9Sstevel@tonic-gate /* 1627c478bd9Sstevel@tonic-gate * Load tod driver module for the tod part found on this system. 1637c478bd9Sstevel@tonic-gate * Recompute the cpu frequency/delays based on tod as tod part 1647c478bd9Sstevel@tonic-gate * tends to keep time more accurately. 1657c478bd9Sstevel@tonic-gate */ 1667c478bd9Sstevel@tonic-gate if (tod_module_name == NULL || modload("tod", tod_module_name) == -1) 1677c478bd9Sstevel@tonic-gate halt("Can't load tod module"); 1687c478bd9Sstevel@tonic-gate } 1697c478bd9Sstevel@tonic-gate 1707c478bd9Sstevel@tonic-gate void 1717c478bd9Sstevel@tonic-gate mach_memscrub(void) 1727c478bd9Sstevel@tonic-gate { 1737c478bd9Sstevel@tonic-gate /* 1747c478bd9Sstevel@tonic-gate * Startup memory scrubber, if not running fpu emulation code. 1757c478bd9Sstevel@tonic-gate */ 1767c478bd9Sstevel@tonic-gate 1777c478bd9Sstevel@tonic-gate if (fpu_exists) { 1787c478bd9Sstevel@tonic-gate if (memscrub_init()) { 1797c478bd9Sstevel@tonic-gate cmn_err(CE_WARN, 1807c478bd9Sstevel@tonic-gate "Memory scrubber failed to initialize"); 1817c478bd9Sstevel@tonic-gate } 1827c478bd9Sstevel@tonic-gate } 1837c478bd9Sstevel@tonic-gate } 1847c478bd9Sstevel@tonic-gate 1857c478bd9Sstevel@tonic-gate void 1867c478bd9Sstevel@tonic-gate mach_cpu_halt_idle() 1877c478bd9Sstevel@tonic-gate { 1887c478bd9Sstevel@tonic-gate /* no suport for halting idle CPU */ 1897c478bd9Sstevel@tonic-gate } 1907c478bd9Sstevel@tonic-gate 1917c478bd9Sstevel@tonic-gate /*ARGSUSED*/ 1927c478bd9Sstevel@tonic-gate void 1937c478bd9Sstevel@tonic-gate cpu_intrq_setup(struct cpu *cp) 1947c478bd9Sstevel@tonic-gate { 1957c478bd9Sstevel@tonic-gate /* Interrupt mondo queues not applicable to sun4u */ 1967c478bd9Sstevel@tonic-gate } 1977c478bd9Sstevel@tonic-gate 1987c478bd9Sstevel@tonic-gate /*ARGSUSED*/ 1997c478bd9Sstevel@tonic-gate void 2007c478bd9Sstevel@tonic-gate cpu_intrq_register(struct cpu *cp) 2017c478bd9Sstevel@tonic-gate { 2027c478bd9Sstevel@tonic-gate /* Interrupt/error queues not applicable to sun4u */ 2037c478bd9Sstevel@tonic-gate } 2047c478bd9Sstevel@tonic-gate 2057c478bd9Sstevel@tonic-gate /*ARGSUSED*/ 2067c478bd9Sstevel@tonic-gate void 207db6d2ee3Ssvemuri mach_htraptrace_setup(int cpuid) 2087c478bd9Sstevel@tonic-gate { 2097c478bd9Sstevel@tonic-gate /* Setup hypervisor traptrace buffer, not applicable to sun4u */ 2107c478bd9Sstevel@tonic-gate } 2117c478bd9Sstevel@tonic-gate 2127c478bd9Sstevel@tonic-gate /*ARGSUSED*/ 2137c478bd9Sstevel@tonic-gate void 214db6d2ee3Ssvemuri mach_htraptrace_configure(int cpuid) 2157c478bd9Sstevel@tonic-gate { 216db6d2ee3Ssvemuri /* enable/ disable hypervisor traptracing, not applicable to sun4u */ 217db6d2ee3Ssvemuri } 218db6d2ee3Ssvemuri 219db6d2ee3Ssvemuri /*ARGSUSED*/ 220db6d2ee3Ssvemuri void 221db6d2ee3Ssvemuri mach_htraptrace_init(void) 222db6d2ee3Ssvemuri { 223db6d2ee3Ssvemuri /* allocate hypervisor traptrace buffer, not applicable to sun4u */ 224db6d2ee3Ssvemuri } 225db6d2ee3Ssvemuri 226db6d2ee3Ssvemuri /*ARGSUSED*/ 227db6d2ee3Ssvemuri void 228db6d2ee3Ssvemuri mach_htraptrace_cleanup(int cpuid) 229db6d2ee3Ssvemuri { 230db6d2ee3Ssvemuri /* cleanup hypervisor traptrace buffer, not applicable to sun4u */ 2317c478bd9Sstevel@tonic-gate } 2327c478bd9Sstevel@tonic-gate 2337c478bd9Sstevel@tonic-gate void 2347c478bd9Sstevel@tonic-gate mach_descrip_init(void) 2357c478bd9Sstevel@tonic-gate { 2367c478bd9Sstevel@tonic-gate /* Obtain Machine description - only for sun4v */ 2377c478bd9Sstevel@tonic-gate } 2387c478bd9Sstevel@tonic-gate 239*c56c1e58Sgirish void 240*c56c1e58Sgirish hsvc_setup(void) 241*c56c1e58Sgirish { 242*c56c1e58Sgirish /* Setup hypervisor services, not applicable to sun4u */ 243*c56c1e58Sgirish } 244*c56c1e58Sgirish 2457c478bd9Sstevel@tonic-gate /* 2467c478bd9Sstevel@tonic-gate * Return true if the machine we're running on is a Positron. 2477c478bd9Sstevel@tonic-gate * (Positron is an unsupported developers platform.) 2487c478bd9Sstevel@tonic-gate */ 2497c478bd9Sstevel@tonic-gate int 2507c478bd9Sstevel@tonic-gate iam_positron(void) 2517c478bd9Sstevel@tonic-gate { 2527c478bd9Sstevel@tonic-gate char model[32]; 2537c478bd9Sstevel@tonic-gate const char proto_model[] = "SUNW,501-2732"; 254fa9e4066Sahrens pnode_t root = prom_rootnode(); 2557c478bd9Sstevel@tonic-gate 2567c478bd9Sstevel@tonic-gate if (prom_getproplen(root, "model") != sizeof (proto_model)) 2577c478bd9Sstevel@tonic-gate return (0); 2587c478bd9Sstevel@tonic-gate 2597c478bd9Sstevel@tonic-gate (void) prom_getprop(root, "model", model); 2607c478bd9Sstevel@tonic-gate if (strcmp(model, proto_model) == 0) 2617c478bd9Sstevel@tonic-gate return (1); 2627c478bd9Sstevel@tonic-gate return (0); 2637c478bd9Sstevel@tonic-gate } 2647c478bd9Sstevel@tonic-gate 2657c478bd9Sstevel@tonic-gate /* 2667c478bd9Sstevel@tonic-gate * Find a physically contiguous area of twice the largest ecache size 2677c478bd9Sstevel@tonic-gate * to be used while doing displacement flush of ecaches. 2687c478bd9Sstevel@tonic-gate */ 2697c478bd9Sstevel@tonic-gate uint64_t 2707c478bd9Sstevel@tonic-gate ecache_flush_address(void) 2717c478bd9Sstevel@tonic-gate { 2727c478bd9Sstevel@tonic-gate struct memlist *pmem; 2737c478bd9Sstevel@tonic-gate uint64_t flush_size; 2747c478bd9Sstevel@tonic-gate uint64_t ret_val; 2757c478bd9Sstevel@tonic-gate 2767c478bd9Sstevel@tonic-gate flush_size = ecache_size * 2; 2777c478bd9Sstevel@tonic-gate for (pmem = phys_install; pmem; pmem = pmem->next) { 2787c478bd9Sstevel@tonic-gate ret_val = P2ROUNDUP(pmem->address, ecache_size); 2797c478bd9Sstevel@tonic-gate if (ret_val + flush_size <= pmem->address + pmem->size) 2807c478bd9Sstevel@tonic-gate return (ret_val); 2817c478bd9Sstevel@tonic-gate } 2827c478bd9Sstevel@tonic-gate return ((uint64_t)-1); 2837c478bd9Sstevel@tonic-gate } 2847c478bd9Sstevel@tonic-gate 2857c478bd9Sstevel@tonic-gate /* 2867c478bd9Sstevel@tonic-gate * Called with the memlist lock held to say that phys_install has 2877c478bd9Sstevel@tonic-gate * changed. 2887c478bd9Sstevel@tonic-gate */ 2897c478bd9Sstevel@tonic-gate void 2907c478bd9Sstevel@tonic-gate phys_install_has_changed(void) 2917c478bd9Sstevel@tonic-gate { 2927c478bd9Sstevel@tonic-gate /* 2937c478bd9Sstevel@tonic-gate * Get the new address into a temporary just in case panicking 2947c478bd9Sstevel@tonic-gate * involves use of ecache_flushaddr. 2957c478bd9Sstevel@tonic-gate */ 2967c478bd9Sstevel@tonic-gate uint64_t new_addr; 2977c478bd9Sstevel@tonic-gate 2987c478bd9Sstevel@tonic-gate new_addr = ecache_flush_address(); 2997c478bd9Sstevel@tonic-gate if (new_addr == (uint64_t)-1) { 3007c478bd9Sstevel@tonic-gate cmn_err(CE_PANIC, 3017c478bd9Sstevel@tonic-gate "ecache_flush_address(): failed, ecache_size=%x", 3027c478bd9Sstevel@tonic-gate ecache_size); 3037c478bd9Sstevel@tonic-gate /*NOTREACHED*/ 3047c478bd9Sstevel@tonic-gate } 3057c478bd9Sstevel@tonic-gate ecache_flushaddr = new_addr; 3067c478bd9Sstevel@tonic-gate membar_producer(); 3077c478bd9Sstevel@tonic-gate } 308