1*25cf1a30Sjl /* 2*25cf1a30Sjl * CDDL HEADER START 3*25cf1a30Sjl * 4*25cf1a30Sjl * The contents of this file are subject to the terms of the 5*25cf1a30Sjl * Common Development and Distribution License (the "License"). 6*25cf1a30Sjl * You may not use this file except in compliance with the License. 7*25cf1a30Sjl * 8*25cf1a30Sjl * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9*25cf1a30Sjl * or http://www.opensolaris.org/os/licensing. 10*25cf1a30Sjl * See the License for the specific language governing permissions 11*25cf1a30Sjl * and limitations under the License. 12*25cf1a30Sjl * 13*25cf1a30Sjl * When distributing Covered Code, include this CDDL HEADER in each 14*25cf1a30Sjl * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15*25cf1a30Sjl * If applicable, add the following below this CDDL HEADER, with the 16*25cf1a30Sjl * fields enclosed by brackets "[]" replaced with your own identifying 17*25cf1a30Sjl * information: Portions Copyright [yyyy] [name of copyright owner] 18*25cf1a30Sjl * 19*25cf1a30Sjl * CDDL HEADER END 20*25cf1a30Sjl */ 21*25cf1a30Sjl /* 22*25cf1a30Sjl * All Rights Reserved, Copyright (c) FUJITSU LIMITED 2006 23*25cf1a30Sjl */ 24*25cf1a30Sjl 25*25cf1a30Sjl #ifndef _OPLMSU_H 26*25cf1a30Sjl #define _OPLMSU_H 27*25cf1a30Sjl 28*25cf1a30Sjl #pragma ident "%Z%%M% %I% %E% SMI" 29*25cf1a30Sjl 30*25cf1a30Sjl #ifdef __cplusplus 31*25cf1a30Sjl extern "C" { 32*25cf1a30Sjl #endif 33*25cf1a30Sjl 34*25cf1a30Sjl /* ack_flag */ 35*25cf1a30Sjl #define ACK_RES 0 36*25cf1a30Sjl #define NAK_RES -1 37*25cf1a30Sjl 38*25cf1a30Sjl /* active_flag */ 39*25cf1a30Sjl #define ACTIVE_RES 0 40*25cf1a30Sjl #define NOT_ACTIVE_RES -1 41*25cf1a30Sjl 42*25cf1a30Sjl /* undefined path number */ 43*25cf1a30Sjl #define UNDEFINED -1 44*25cf1a30Sjl 45*25cf1a30Sjl /* sleep and wakeup control flag */ 46*25cf1a30Sjl #define CV_WAKEUP 0 47*25cf1a30Sjl #define CV_SLEEP 1 48*25cf1a30Sjl 49*25cf1a30Sjl /* write/read control flag */ 50*25cf1a30Sjl #define MSU_WRITE_SIDE 0 51*25cf1a30Sjl #define MSU_READ_SIDE 1 52*25cf1a30Sjl 53*25cf1a30Sjl /* message priority */ 54*25cf1a30Sjl #define MSU_HIGH 1 55*25cf1a30Sjl #define MSU_NORM 0 56*25cf1a30Sjl 57*25cf1a30Sjl /* miscellaneous */ 58*25cf1a30Sjl #define SUCCESS 0 59*25cf1a30Sjl #define FAILURE -1 60*25cf1a30Sjl #if !defined(BUSY) /* warning: macro redefined */ 61*25cf1a30Sjl #define BUSY -2 62*25cf1a30Sjl #endif 63*25cf1a30Sjl 64*25cf1a30Sjl /* timeout interval */ 65*25cf1a30Sjl #define MSU_TM_500MS 500000 /* 500ms */ 66*25cf1a30Sjl 67*25cf1a30Sjl /* XON/XOFF code */ 68*25cf1a30Sjl #define MSU_XON 0x11 69*25cf1a30Sjl #define MSU_XOFF 0x13 70*25cf1a30Sjl #define MSU_XON_4 (MSU_XON << 24|MSU_XON << 16|MSU_XON << 8|MSU_XON) 71*25cf1a30Sjl #define MSU_XOFF_4 (MSU_XOFF << 24|MSU_XOFF << 16|MSU_XOFF << 8|MSU_XOFF) 72*25cf1a30Sjl 73*25cf1a30Sjl /* main path code used by MSU_CMD_START ioctl */ 74*25cf1a30Sjl #define MAINPATHCODE 0x1000 75*25cf1a30Sjl #define MSU_OBP_CONSOLE -2 76*25cf1a30Sjl 77*25cf1a30Sjl /* maximum number of minor device number */ 78*25cf1a30Sjl #define MAXDEVMINOR 256 79*25cf1a30Sjl 80*25cf1a30Sjl /* node mask */ 81*25cf1a30Sjl #define USER_NODE_MASK 0x00000000 /* user control node */ 82*25cf1a30Sjl #define META_NODE_MASK 0x00010000 /* meta control node */ 83*25cf1a30Sjl 84*25cf1a30Sjl /* node_flag */ 85*25cf1a30Sjl #define MSU_NODE_USER 0 /* user control node */ 86*25cf1a30Sjl #define MSU_NODE_META 1 /* meta control node */ 87*25cf1a30Sjl 88*25cf1a30Sjl /* node_flag check macro */ 89*25cf1a30Sjl #define MSU_NODE_TYPE(dev) \ 90*25cf1a30Sjl (((dev) & (META_NODE_MASK|USER_NODE_MASK)) >> 16) 91*25cf1a30Sjl 92*25cf1a30Sjl /* termio_flag */ 93*25cf1a30Sjl #define MSU_TIOS_TCSETS 1 /* TCSETS */ 94*25cf1a30Sjl #define MSU_TIOS_MSET 2 /* TIOCMSET */ 95*25cf1a30Sjl #define MSU_TIOS_PPS 3 /* TIOCSPPS */ 96*25cf1a30Sjl #define MSU_TIOS_WINSZP 4 /* TIOCSWINSZ */ 97*25cf1a30Sjl #define MSU_TIOS_SOFTCAR 5 /* TIOCSSOFTCAR */ 98*25cf1a30Sjl #define MSU_TIOS_END 6 /* termios end */ 99*25cf1a30Sjl 100*25cf1a30Sjl /* binding name */ 101*25cf1a30Sjl #define MSU_CMUCH_FF "pci10cf,138f" 102*25cf1a30Sjl #define MSU_CMUCH_DC "pci10cf,1390" 103*25cf1a30Sjl #ifdef DEBUG 104*25cf1a30Sjl #define MSU_CMUCH_DBG "pci108e,8000" 105*25cf1a30Sjl #endif 106*25cf1a30Sjl 107*25cf1a30Sjl /* tty-port# properties */ 108*25cf1a30Sjl #define MSU_TTY_PORT_PROP "tty-port#" 109*25cf1a30Sjl 110*25cf1a30Sjl /* board# properties */ 111*25cf1a30Sjl #define MSU_BOARD_PROP "board#" 112*25cf1a30Sjl 113*25cf1a30Sjl /* 114*25cf1a30Sjl * oplmsu command code 115*25cf1a30Sjl */ 116*25cf1a30Sjl #define MSU_CMD ('f' << 8) 117*25cf1a30Sjl #define MSU_CMD_STOP (MSU_CMD|0x14) 118*25cf1a30Sjl #define MSU_CMD_START (MSU_CMD|0x15) 119*25cf1a30Sjl #define MSU_CMD_ACTIVE (MSU_CMD|0x1a) 120*25cf1a30Sjl 121*25cf1a30Sjl #define MSU_PATH_ALL (-1) /* path all instruction */ 122*25cf1a30Sjl 123*25cf1a30Sjl /* 124*25cf1a30Sjl * oplmsu path status for status member on upper path info table 125*25cf1a30Sjl */ 126*25cf1a30Sjl #define MSU_PSTAT_EMPTY 0 127*25cf1a30Sjl #define MSU_PSTAT_ACTIVE 1 128*25cf1a30Sjl #define MSU_PSTAT_STANDBY 2 129*25cf1a30Sjl #define MSU_PSTAT_STOP 3 130*25cf1a30Sjl #define MSU_PSTAT_FAIL 4 131*25cf1a30Sjl #define MSU_PSTAT_DISCON 5 132*25cf1a30Sjl #define MSU_PSTAT_ENCAP 6 133*25cf1a30Sjl 134*25cf1a30Sjl /* 135*25cf1a30Sjl * oplmsu additional status for traditional_status member on 136*25cf1a30Sjl * upper path info table 137*25cf1a30Sjl */ 138*25cf1a30Sjl #define MSU_UNLINK 0 /* initial state */ 139*25cf1a30Sjl #define MSU_EMPTY 1 /* MSU_STAT_EMPTY(00) state */ 140*25cf1a30Sjl #define MSU_LINK_NU 2 /* link state(no link ID, no upper path info) */ 141*25cf1a30Sjl #define MSU_SETID_NU 3 /* set ID state(link ID, no upper path info) */ 142*25cf1a30Sjl #define MSU_MAKE_INST 4 /* create instance node state */ 143*25cf1a30Sjl #define MSU_STOP 5 /* MSU_STAT_STOP(03) state */ 144*25cf1a30Sjl #define MSU_WSTR_ACK 6 /* wait ack/nak of MSU_CMD_START state */ 145*25cf1a30Sjl #define MSU_STANDBY 7 /* MSU_STAT_STANDBY(02) state */ 146*25cf1a30Sjl #define MSU_WTCS_ACK 8 /* wait ack/nak of TCSETS state */ 147*25cf1a30Sjl #define MSU_WTMS_ACK 9 /* wait ack/nak of TIOCMSET state */ 148*25cf1a30Sjl #define MSU_WPPS_ACK 10 /* wait ack/nak of TIOCSPPS state */ 149*25cf1a30Sjl #define MSU_WWSZ_ACK 11 /* wait ack/nak of TIOCSWINSZ state */ 150*25cf1a30Sjl #define MSU_WCAR_ACK 12 /* wait ack/nak of TIOCSSOFTCAR state */ 151*25cf1a30Sjl #define MSU_ACTIVE 13 /* MSU_STAT_ACTIVE(01) state */ 152*25cf1a30Sjl #define MSU_WSTP_ACK 14 /* wait ack/nak of MSU_CMD_STOP state */ 153*25cf1a30Sjl #define MSU_FAIL 15 /* MSU_STAT_FAIL(04) state */ 154*25cf1a30Sjl #define MSU_WCHK_ACK 16 /* wait ack/nak of OPLMSUSELFTEST */ 155*25cf1a30Sjl #define MSU_SETID 17 /* set ID state(link ID, upper path info) */ 156*25cf1a30Sjl #define MSU_DISCON 18 /* MSU_STAT_DISCON(05) state */ 157*25cf1a30Sjl #define MSU_LINK 19 /* link state(no link ID, upper path info) */ 158*25cf1a30Sjl #define MSU_WPTH_CHG 20 /* wait ack/nak of OPLMSUPATHCHG state */ 159*25cf1a30Sjl 160*25cf1a30Sjl /* 161*25cf1a30Sjl * oplmsu instance status for inst_status member on 162*25cf1a30Sjl * upper instance info talbe 163*25cf1a30Sjl */ 164*25cf1a30Sjl #define INST_STAT_BUSY -1 /* busy */ 165*25cf1a30Sjl #define INST_STAT_ONLINE 10 /* online */ 166*25cf1a30Sjl #define INST_STAT_OFFLINE 11 /* offline */ 167*25cf1a30Sjl #define INST_STAT_UNCONFIGURED 12 /* unconfigured */ 168*25cf1a30Sjl 169*25cf1a30Sjl /* 170*25cf1a30Sjl * oplmsu lower path Info table ext status for ext member on 171*25cf1a30Sjl * lower path info table 172*25cf1a30Sjl */ 173*25cf1a30Sjl #define MSU_EXT_NOTUSED -1 /* not used (default) */ 174*25cf1a30Sjl #define MSU_EXT_ACTIVE_CANDIDATE -2 /* active path candidate by */ 175*25cf1a30Sjl /* MSU_CMD_START */ 176*25cf1a30Sjl #define MSU_EXT_VOID -3 /* void status */ 177*25cf1a30Sjl 178*25cf1a30Sjl /* oplmsu/su pathname size */ 179*25cf1a30Sjl #define MSU_PATHNAME_SIZE 128 180*25cf1a30Sjl 181*25cf1a30Sjl /* control block(path parameter) */ 182*25cf1a30Sjl struct msu_path { 183*25cf1a30Sjl int num; /* total number of paths */ 184*25cf1a30Sjl int reserved; /* reserved */ 185*25cf1a30Sjl }; 186*25cf1a30Sjl 187*25cf1a30Sjl /* control block(device parameter) */ 188*25cf1a30Sjl struct msu_dev { 189*25cf1a30Sjl dev_info_t *dip; /* pointer to dev_info_t */ 190*25cf1a30Sjl }; 191*25cf1a30Sjl 192*25cf1a30Sjl /* serial device control block */ 193*25cf1a30Sjl typedef struct serial_devcb { 194*25cf1a30Sjl dev_info_t *dip; /* pointer to dev_info_t */ 195*25cf1a30Sjl int lsb; /* LSB number */ 196*25cf1a30Sjl } ser_devcb_t; 197*25cf1a30Sjl 198*25cf1a30Sjl /* serial device countrl block list */ 199*25cf1a30Sjl typedef struct serial_devlist { 200*25cf1a30Sjl struct serial_devlist *next; 201*25cf1a30Sjl dev_info_t *dip; /* pointer to dev_info_t */ 202*25cf1a30Sjl } ser_devl_t; 203*25cf1a30Sjl 204*25cf1a30Sjl /* upper path table */ 205*25cf1a30Sjl typedef struct upper_path_table { 206*25cf1a30Sjl struct upper_path_table *u_next; 207*25cf1a30Sjl struct upper_path_table *u_prev; 208*25cf1a30Sjl struct lower_path_table *lpath; 209*25cf1a30Sjl int path_no; 210*25cf1a30Sjl int reserved; 211*25cf1a30Sjl int status; 212*25cf1a30Sjl int prev_status; 213*25cf1a30Sjl ulong_t traditional_status; 214*25cf1a30Sjl ser_devcb_t ser_devcb; 215*25cf1a30Sjl } upath_t; 216*25cf1a30Sjl 217*25cf1a30Sjl /* lower path table */ 218*25cf1a30Sjl typedef struct lower_path_table { 219*25cf1a30Sjl struct lower_path_table *l_next; 220*25cf1a30Sjl struct lower_path_table *l_prev; 221*25cf1a30Sjl mblk_t *first_lpri_hi; 222*25cf1a30Sjl mblk_t *last_lpri_hi; 223*25cf1a30Sjl mblk_t *hndl_mp; 224*25cf1a30Sjl queue_t *hndl_uqueue; 225*25cf1a30Sjl queue_t *lower_queue; 226*25cf1a30Sjl queue_t *uwq_queue; 227*25cf1a30Sjl struct upper_instance_table *uinst; 228*25cf1a30Sjl char *abt_char; 229*25cf1a30Sjl struct buf_tbl *rbuftbl; 230*25cf1a30Sjl bufcall_id_t rbuf_id; 231*25cf1a30Sjl timeout_id_t rtout_id; 232*25cf1a30Sjl upath_t *src_upath; 233*25cf1a30Sjl long status; 234*25cf1a30Sjl int path_no; 235*25cf1a30Sjl int link_id; 236*25cf1a30Sjl int uwq_flag; 237*25cf1a30Sjl int sw_flag; 238*25cf1a30Sjl kcondvar_t sw_cv; 239*25cf1a30Sjl } lpath_t; 240*25cf1a30Sjl 241*25cf1a30Sjl /* control table */ 242*25cf1a30Sjl typedef struct control_table { 243*25cf1a30Sjl struct control_table *c_next; 244*25cf1a30Sjl struct control_table *c_prev; 245*25cf1a30Sjl mblk_t *first_upri_hi; 246*25cf1a30Sjl mblk_t *last_upri_hi; 247*25cf1a30Sjl queue_t *queue; 248*25cf1a30Sjl queue_t *lrq_queue; 249*25cf1a30Sjl queue_t *wait_queue; 250*25cf1a30Sjl minor_t minor; 251*25cf1a30Sjl int node_type; 252*25cf1a30Sjl struct buf_tbl *wbuftbl; 253*25cf1a30Sjl bufcall_id_t wbuf_id; 254*25cf1a30Sjl timeout_id_t wtout_id; 255*25cf1a30Sjl int lrq_flag; 256*25cf1a30Sjl int sleep_flag; 257*25cf1a30Sjl kcondvar_t cvp; 258*25cf1a30Sjl } ctrl_t; 259*25cf1a30Sjl 260*25cf1a30Sjl #define MSU_MAX_ABTSLEN 24 /* maximum length for abort sequence */ 261*25cf1a30Sjl 262*25cf1a30Sjl /* upper instance table */ 263*25cf1a30Sjl typedef struct upper_instance_table { 264*25cf1a30Sjl upath_t *first_upath; 265*25cf1a30Sjl upath_t *last_upath; 266*25cf1a30Sjl lpath_t *first_lpath; 267*25cf1a30Sjl lpath_t *last_lpath; 268*25cf1a30Sjl ctrl_t *meta_ctrl; 269*25cf1a30Sjl ctrl_t *user_ctrl; 270*25cf1a30Sjl queue_t *lower_queue; 271*25cf1a30Sjl dev_info_t *msu_dip; 272*25cf1a30Sjl int inst_status; 273*25cf1a30Sjl int path_num; 274*25cf1a30Sjl int reserved[2]; 275*25cf1a30Sjl krwlock_t lock; 276*25cf1a30Sjl kmutex_t u_lock; 277*25cf1a30Sjl kmutex_t l_lock; 278*25cf1a30Sjl kmutex_t c_lock; 279*25cf1a30Sjl mblk_t *tcsets_p; 280*25cf1a30Sjl mblk_t *tiocmset_p; 281*25cf1a30Sjl mblk_t *tiocspps_p; 282*25cf1a30Sjl mblk_t *tiocswinsz_p; 283*25cf1a30Sjl mblk_t *tiocssoftcar_p; 284*25cf1a30Sjl char abts[MSU_MAX_ABTSLEN]; 285*25cf1a30Sjl } uinst_t; 286*25cf1a30Sjl 287*25cf1a30Sjl /* queue table for bufcall() and timeout() */ 288*25cf1a30Sjl struct buf_tbl { 289*25cf1a30Sjl queue_t *q; 290*25cf1a30Sjl int rw_flag; 291*25cf1a30Sjl }; 292*25cf1a30Sjl 293*25cf1a30Sjl 294*25cf1a30Sjl /* rwlock macro */ 295*25cf1a30Sjl #define OPLMSU_RWLOCK_UPGRADE() { \ 296*25cf1a30Sjl if (rw_tryupgrade(&oplmsu_uinst->lock) == 0) { \ 297*25cf1a30Sjl rw_exit(&oplmsu_uinst->lock); \ 298*25cf1a30Sjl rw_enter(&oplmsu_uinst->lock, RW_WRITER); \ 299*25cf1a30Sjl } \ 300*25cf1a30Sjl } 301*25cf1a30Sjl 302*25cf1a30Sjl #ifdef DEBUG 303*25cf1a30Sjl typedef struct tracedata { 304*25cf1a30Sjl queue_t *q; 305*25cf1a30Sjl mblk_t *mp; 306*25cf1a30Sjl char op[3]; 307*25cf1a30Sjl uchar_t msg_type; 308*25cf1a30Sjl int pathno; 309*25cf1a30Sjl int msg_cmd; 310*25cf1a30Sjl ulong_t data; 311*25cf1a30Sjl } msu_trc_t; 312*25cf1a30Sjl 313*25cf1a30Sjl #define MSU_TRC_USER ('u' << 24|'s' << 16|'e' << 8|'r') 314*25cf1a30Sjl #define MSU_TRC_META ('m' << 24|'e' << 16|'t' << 8|'a') 315*25cf1a30Sjl 316*25cf1a30Sjl /* oplmsu_trace_on */ 317*25cf1a30Sjl #define MSU_TRACE_OFF 0 318*25cf1a30Sjl #define MSU_TRACE_ON 1 319*25cf1a30Sjl 320*25cf1a30Sjl /* oplmsu_debug_mode */ 321*25cf1a30Sjl #define MSU_DPRINT_ON 1 /* enable print log */ 322*25cf1a30Sjl 323*25cf1a30Sjl /* op type */ 324*25cf1a30Sjl #define MSU_TRC_UI 0 /* upper input */ 325*25cf1a30Sjl #define MSU_TRC_UO 1 /* upper output */ 326*25cf1a30Sjl #define MSU_TRC_LI 2 /* lower input */ 327*25cf1a30Sjl #define MSU_TRC_LO 3 /* lower output */ 328*25cf1a30Sjl #define MSU_TRC_OPN 4 /* open */ 329*25cf1a30Sjl #define MSU_TRC_CLS 5 /* close */ 330*25cf1a30Sjl 331*25cf1a30Sjl /* trace macro */ 332*25cf1a30Sjl #define OPLMSU_TRACE(q, mp, op) { \ 333*25cf1a30Sjl if (oplmsu_trace_on == MSU_TRACE_ON) { \ 334*25cf1a30Sjl oplmsu_cmn_trace(q, mp, op); \ 335*25cf1a30Sjl } \ 336*25cf1a30Sjl } 337*25cf1a30Sjl 338*25cf1a30Sjl /* debug print macro */ 339*25cf1a30Sjl #define DBG_PRINT(args) { \ 340*25cf1a30Sjl if (oplmsu_debug_mode & MSU_DPRINT_ON) { \ 341*25cf1a30Sjl cmn_err args; \ 342*25cf1a30Sjl } \ 343*25cf1a30Sjl } 344*25cf1a30Sjl 345*25cf1a30Sjl #else /* ! DEBUG */ 346*25cf1a30Sjl 347*25cf1a30Sjl /* trace macro */ 348*25cf1a30Sjl #define OPLMSU_TRACE(q, mp, op) 349*25cf1a30Sjl 350*25cf1a30Sjl /* debug print macro */ 351*25cf1a30Sjl #define DBG_PRINT(args) 352*25cf1a30Sjl #endif 353*25cf1a30Sjl 354*25cf1a30Sjl #ifdef __cplusplus 355*25cf1a30Sjl } 356*25cf1a30Sjl #endif 357*25cf1a30Sjl 358*25cf1a30Sjl #endif /* _OPLMSU_H */ 359