1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22 /* 23 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _SYS_PX_ERR_IMPL_H 28 #define _SYS_PX_ERR_IMPL_H 29 30 #pragma ident "%Z%%M% %I% %E% SMI" 31 32 #ifdef __cplusplus 33 extern "C" { 34 #endif 35 36 /* 37 * Bit Error handling tables: 38 * bit Bit Number 39 * counter Counter for number of errors countered for this bit 40 * err_handler Error Handler Function 41 * erpt_handler Ereport Handler Function 42 * class_name Class Name used for sending ereports for this bit. 43 */ 44 typedef struct px_err_bit_desc { 45 uint_t bit; 46 uint_t counter; 47 int (*err_handler)(); 48 int (*erpt_handler)(); 49 char *class_name; 50 } px_err_bit_desc_t; 51 52 /* 53 * Reg Error handling tables: 54 * 55 * enabled enable this register error handler 56 * 57 * *intr_mask_p bitmask for enabled interrupts 58 * *log_mask_p bitmask for logged interrupts 59 * *count_mask_p bitmask for counted interrupts 60 * 61 * *err_bit_tbl error bit table 62 * err_bit_keys number of entries in the error bit table. 63 * 64 * last_reg last captured register 65 * log_addr interrupt log register offset 66 * enable_addr interrupt enable register offset 67 * status_addr interrupt status register offset 68 * clear_addr interrupt clear register offset 69 * 70 * *msg error messages table 71 */ 72 typedef struct px_err_reg_desc { 73 boolean_t enabled; 74 uint64_t *intr_mask_p; 75 uint64_t *log_mask_p; 76 uint64_t *count_mask_p; 77 px_err_bit_desc_t *err_bit_tbl; 78 uint_t err_bit_keys; 79 uint64_t last_reg; 80 uint32_t log_addr; 81 uint32_t enable_addr; 82 uint32_t status_addr; 83 uint32_t clear_addr; 84 char *msg; 85 } px_err_reg_desc_t; 86 87 /* 88 * Macro to create the error handling forward declaration 89 * 90 * The error handlers examines error, determine the nature of the error 91 * and return error status in terms of PX_FATAL_HW | PX_FATAL_GOS | ... 92 * terminology. 93 */ 94 #define PX_ERR_BIT_HANDLE_DEC(n) int px_err_ ## n ## _handle\ 95 (dev_info_t *rpdip, caddr_t csr_base, ddi_fm_error_t *derr, \ 96 px_err_reg_desc_t *err_reg_descr, px_err_bit_desc_t *err_bit_descr) 97 #define PX_ERR_BIT_HANDLE(n) px_err_ ## n ## _handle 98 99 /* 100 * Predefined error handling functions. 101 */ 102 int px_err_fatal_hw_handle(dev_info_t *rpdip, caddr_t csr_base, 103 ddi_fm_error_t *derr, px_err_reg_desc_t *err_reg_descr, 104 px_err_bit_desc_t *err_bit_descr); 105 int px_err_fatal_gos_handle(dev_info_t *rpdip, caddr_t csr_base, 106 ddi_fm_error_t *derr, px_err_reg_desc_t *err_reg_descr, 107 px_err_bit_desc_t *err_bit_descr); 108 int px_err_fatal_stuck_handle(dev_info_t *rpdip, caddr_t csr_base, 109 ddi_fm_error_t *derr, px_err_reg_desc_t *err_reg_descr, 110 px_err_bit_desc_t *err_bit_descr); 111 int px_err_fatal_sw_handle(dev_info_t *rpdip, caddr_t csr_base, 112 ddi_fm_error_t *derr, px_err_reg_desc_t *err_reg_descr, 113 px_err_bit_desc_t *err_bit_descr); 114 int px_err_non_fatal_handle(dev_info_t *rpdip, caddr_t csr_base, 115 ddi_fm_error_t *derr, px_err_reg_desc_t *err_reg_descr, 116 px_err_bit_desc_t *err_bit_descr); 117 int px_err_ok_handle(dev_info_t *rpdip, caddr_t csr_base, 118 ddi_fm_error_t *derr, px_err_reg_desc_t *err_reg_descr, 119 px_err_bit_desc_t *err_bit_descr); 120 int px_err_unknown_handle(dev_info_t *rpdip, caddr_t csr_base, 121 ddi_fm_error_t *derr, px_err_reg_desc_t *err_reg_descr, 122 px_err_bit_desc_t *err_bit_descr); 123 124 /* 125 * Macro to create the ereport forward declaration 126 */ 127 #define PX_ERPT_SEND_DEC(n) int px_err_ ## n ## _send_ereport\ 128 (dev_info_t *rpdip, caddr_t csr_base, uint64_t ss_reg, \ 129 ddi_fm_error_t *derr, char *class_name) 130 #define PX_ERPT_SEND(n) px_err_ ## n ## _send_ereport 131 132 133 /* 134 * JBC error handling and ereport forward declarations 135 */ 136 137 #define PX_ERR_JBC_CLASS(n) PCIEX_FIRE "." FIRE_JBC_ ## n 138 139 /* 140 * Fire JBC error Handling Forward Declarations 141 * the must-panic type errors such as PX_FATAL_GOS or 142 * post-reset-diagnosed type error such as PX_FATAL_HW 143 * are not furthur diagnosed here because there is no 144 * justification to find out more as immediate error 145 * handling. FMA DE will do the post analysis. 146 */ 147 int px_err_jbc_merge_handle(dev_info_t *rpdip, caddr_t csr_base, 148 ddi_fm_error_t *derr, px_err_reg_desc_t *err_reg_descr, 149 px_err_bit_desc_t *err_bit_descr); 150 int px_err_jbc_jbusint_in_handle(dev_info_t *rpdip, caddr_t csr_base, 151 ddi_fm_error_t *derr, px_err_reg_desc_t *err_reg_descr, 152 px_err_bit_desc_t *err_bit_descr); 153 int px_err_jbc_dmcint_odcd_handle(dev_info_t *rpdip, caddr_t csr_base, 154 ddi_fm_error_t *derr, px_err_reg_desc_t *err_reg_descr, 155 px_err_bit_desc_t *err_bit_descr); 156 int px_err_jbc_csr_handle(dev_info_t *rpdip, caddr_t csr_base, 157 ddi_fm_error_t *derr, px_err_reg_desc_t *err_reg_descr, 158 px_err_bit_desc_t *err_bit_descr); 159 160 /* Fire JBC error ereport Forward Declarations */ 161 PX_ERPT_SEND_DEC(jbc_fatal); 162 PX_ERPT_SEND_DEC(jbc_merge); 163 PX_ERPT_SEND_DEC(jbc_in); 164 PX_ERPT_SEND_DEC(jbc_out); 165 PX_ERPT_SEND_DEC(jbc_odcd); 166 PX_ERPT_SEND_DEC(jbc_idc); 167 PX_ERPT_SEND_DEC(jbc_csr); 168 169 170 /* 171 * DMC error handling and ereport forward declarations 172 */ 173 174 #define PX_ERR_DMC_CLASS(n) PCIEX_FIRE "." FIRE_DMC_ ## n 175 176 /* Fire Bit Error Handling Forward Declarations */ 177 int px_err_imu_rbne_handle(dev_info_t *rpdip, caddr_t csr_base, 178 ddi_fm_error_t *derr, px_err_reg_desc_t *err_reg_descr, 179 px_err_bit_desc_t *err_bit_descr); 180 int px_err_imu_pme_handle(dev_info_t *rpdip, caddr_t csr_base, 181 ddi_fm_error_t *derr, px_err_reg_desc_t *err_reg_descr, 182 px_err_bit_desc_t *err_bit_descr); 183 int px_err_imu_eq_ovfl_handle(dev_info_t *rpdip, caddr_t csr_base, 184 ddi_fm_error_t *derr, px_err_reg_desc_t *err_reg_descr, 185 px_err_bit_desc_t *err_bit_descr); 186 int px_err_mmu_rbne_handle(dev_info_t *rpdip, caddr_t csr_base, 187 ddi_fm_error_t *derr, px_err_reg_desc_t *err_reg_descr, 188 px_err_bit_desc_t *err_bit_descr); 189 int px_err_mmu_tfa_handle(dev_info_t *rpdip, caddr_t csr_base, 190 ddi_fm_error_t *derr, px_err_reg_desc_t *err_reg_descr, 191 px_err_bit_desc_t *err_bit_descr); 192 int px_err_mmu_tte_cae_handle(dev_info_t *rpdip, caddr_t csr_base, 193 ddi_fm_error_t *derr, px_err_reg_desc_t *err_reg_descr, 194 px_err_bit_desc_t *err_bit_descr); 195 int px_err_mmu_tblwlk_handle(dev_info_t *rpdip, caddr_t csr_base, 196 ddi_fm_error_t *derr, px_err_reg_desc_t *err_reg_descr, 197 px_err_bit_desc_t *err_bit_descr); 198 199 /* Fire Ereport Handling Forward Declarations */ 200 PX_ERPT_SEND_DEC(imu_rds); 201 PX_ERPT_SEND_DEC(imu_scs); 202 PX_ERPT_SEND_DEC(imu); 203 PX_ERPT_SEND_DEC(mmu_tfar_tfsr); 204 PX_ERPT_SEND_DEC(mmu); 205 206 /* 207 * PEC error handling and ereport forward declarations 208 */ 209 210 #define PX_ERR_PEC_CLASS(n) PCIEX_FIRE "." FIRE_PEC_ ## n 211 212 int px_err_tlu_lup_handle(dev_info_t *rpdip, caddr_t csr_base, 213 ddi_fm_error_t *derr, px_err_reg_desc_t *err_reg_descr, 214 px_err_bit_desc_t *err_bit_descr); 215 216 /* Fire Ereport Handling Forward Declarations */ 217 PX_ERPT_SEND_DEC(pec_ilu); 218 PX_ERPT_SEND_DEC(pciex_rx_ue); 219 PX_ERPT_SEND_DEC(pciex_tx_ue); 220 PX_ERPT_SEND_DEC(pciex_rx_tx_ue); 221 PX_ERPT_SEND_DEC(pciex_ue); 222 PX_ERPT_SEND_DEC(pciex_ce); 223 PX_ERPT_SEND_DEC(pciex_rx_oe); 224 PX_ERPT_SEND_DEC(pciex_rx_tx_oe); 225 PX_ERPT_SEND_DEC(pciex_oe); 226 227 #ifdef __cplusplus 228 } 229 #endif 230 231 #endif /* _SYS_PX_ERR_IMPL_H */ 232