120c794b3Sgavinm /*
220c794b3Sgavinm  * CDDL HEADER START
320c794b3Sgavinm  *
420c794b3Sgavinm  * The contents of this file are subject to the terms of the
520c794b3Sgavinm  * Common Development and Distribution License (the "License").
620c794b3Sgavinm  * You may not use this file except in compliance with the License.
720c794b3Sgavinm  *
820c794b3Sgavinm  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
920c794b3Sgavinm  * or http://www.opensolaris.org/os/licensing.
1020c794b3Sgavinm  * See the License for the specific language governing permissions
1120c794b3Sgavinm  * and limitations under the License.
1220c794b3Sgavinm  *
1320c794b3Sgavinm  * When distributing Covered Code, include this CDDL HEADER in each
1420c794b3Sgavinm  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
1520c794b3Sgavinm  * If applicable, add the following below this CDDL HEADER, with the
1620c794b3Sgavinm  * fields enclosed by brackets "[]" replaced with your own identifying
1720c794b3Sgavinm  * information: Portions Copyright [yyyy] [name of copyright owner]
1820c794b3Sgavinm  *
1920c794b3Sgavinm  * CDDL HEADER END
2020c794b3Sgavinm  */
2120c794b3Sgavinm 
2220c794b3Sgavinm /*
2372b70389SJakub Jermar  * Copyright (c) 2008, 2010, Oracle and/or its affiliates. All rights reserved.
2420c794b3Sgavinm  */
2520c794b3Sgavinm 
2620c794b3Sgavinm #include <sys/types.h>
2720c794b3Sgavinm #include <sys/cmn_err.h>
2820c794b3Sgavinm #include <sys/errno.h>
2920c794b3Sgavinm #include <sys/log.h>
3020c794b3Sgavinm #include <sys/systm.h>
3120c794b3Sgavinm #include <sys/modctl.h>
3220c794b3Sgavinm #include <sys/errorq.h>
3320c794b3Sgavinm #include <sys/controlregs.h>
3420c794b3Sgavinm #include <sys/fm/util.h>
3520c794b3Sgavinm #include <sys/fm/protocol.h>
3620c794b3Sgavinm #include <sys/sysevent.h>
3720c794b3Sgavinm #include <sys/pghw.h>
3820c794b3Sgavinm #include <sys/cyclic.h>
3920c794b3Sgavinm #include <sys/pci_cfgspace.h>
4020c794b3Sgavinm #include <sys/mc_intel.h>
4120c794b3Sgavinm #include <sys/smbios.h>
4220c794b3Sgavinm #include <sys/pci.h>
439a12e1bdSjveta #include <sys/pcie.h>
4420c794b3Sgavinm #include "nb5000.h"
4520c794b3Sgavinm #include "nb_log.h"
4620c794b3Sgavinm #include "dimm_phys.h"
4720c794b3Sgavinm #include "rank.h"
4820c794b3Sgavinm 
4920c794b3Sgavinm int nb_hw_memory_scrub_enable = 1;
5020c794b3Sgavinm static int nb_sw_scrub_disabled = 0;
5120c794b3Sgavinm 
5220c794b3Sgavinm int nb_5000_memory_controller = 0;
5320c794b3Sgavinm int nb_number_memory_controllers = NB_5000_MAX_MEM_CONTROLLERS;
5485738508SVuong Nguyen int nb_channels_per_branch = NB_MAX_CHANNELS_PER_BRANCH;
5520c794b3Sgavinm int nb_dimms_per_channel = 0;
5620c794b3Sgavinm 
5720c794b3Sgavinm nb_dimm_t **nb_dimms;
5820c794b3Sgavinm int nb_ndimm;
5920c794b3Sgavinm uint32_t nb_chipset;
6020c794b3Sgavinm enum nb_memory_mode nb_mode;
615de8e333Saf bank_select_t nb_banks[NB_MAX_MEM_BRANCH_SELECT];
625de8e333Saf rank_select_t nb_ranks[NB_5000_MAX_MEM_CONTROLLERS][NB_MAX_MEM_RANK_SELECT];
6320c794b3Sgavinm uint32_t top_of_low_memory;
6420c794b3Sgavinm uint8_t spare_rank[NB_5000_MAX_MEM_CONTROLLERS];
6520c794b3Sgavinm 
6630cfc677SAdrian Frost extern int nb_no_smbios;
6730cfc677SAdrian Frost 
6820c794b3Sgavinm errorq_t *nb_queue;
6920c794b3Sgavinm kmutex_t nb_mutex;
7020c794b3Sgavinm 
7130cfc677SAdrian Frost static int nb_dimm_slots;
7230cfc677SAdrian Frost 
739ff4cbe7SAdrian Frost static uint32_t nb_err0_int;
749ff4cbe7SAdrian Frost static uint32_t nb_err1_int;
759ff4cbe7SAdrian Frost static uint32_t nb_err2_int;
769ff4cbe7SAdrian Frost static uint32_t nb_mcerr_int;
775f28a827Saf static uint32_t nb_emask_int;
7820c794b3Sgavinm 
7920c794b3Sgavinm static uint32_t nb_err0_fbd;
8020c794b3Sgavinm static uint32_t nb_err1_fbd;
8120c794b3Sgavinm static uint32_t nb_err2_fbd;
8220c794b3Sgavinm static uint32_t nb_mcerr_fbd;
8320c794b3Sgavinm static uint32_t nb_emask_fbd;
8420c794b3Sgavinm 
8585738508SVuong Nguyen static uint32_t nb_err0_mem;
8685738508SVuong Nguyen static uint32_t nb_err1_mem;
8785738508SVuong Nguyen static uint32_t nb_err2_mem;
8885738508SVuong Nguyen static uint32_t nb_mcerr_mem;
8985738508SVuong Nguyen static uint32_t nb_emask_mem;
9085738508SVuong Nguyen 
9120c794b3Sgavinm static uint16_t nb_err0_fsb;
9220c794b3Sgavinm static uint16_t nb_err1_fsb;
9320c794b3Sgavinm static uint16_t nb_err2_fsb;
9420c794b3Sgavinm static uint16_t nb_mcerr_fsb;
9520c794b3Sgavinm static uint16_t nb_emask_fsb;
9620c794b3Sgavinm 
975f28a827Saf static uint16_t nb_err0_thr;
985f28a827Saf static uint16_t nb_err1_thr;
995f28a827Saf static uint16_t nb_err2_thr;
1005f28a827Saf static uint16_t nb_mcerr_thr;
1015f28a827Saf static uint16_t nb_emask_thr;
1025f28a827Saf 
10320c794b3Sgavinm static uint32_t	emask_uncor_pex[NB_PCI_DEV];
10420c794b3Sgavinm static uint32_t emask_cor_pex[NB_PCI_DEV];
10520c794b3Sgavinm static uint32_t emask_rp_pex[NB_PCI_DEV];
10620c794b3Sgavinm static uint32_t docmd_pex[NB_PCI_DEV];
10720c794b3Sgavinm static uint32_t uncerrsev[NB_PCI_DEV];
10820c794b3Sgavinm 
1099ff4cbe7SAdrian Frost static uint32_t l_mcerr_int;
11020c794b3Sgavinm static uint32_t l_mcerr_fbd;
11185738508SVuong Nguyen static uint32_t l_mcerr_mem;
11220c794b3Sgavinm static uint16_t l_mcerr_fsb;
1135f28a827Saf static uint16_t l_mcerr_thr;
11420c794b3Sgavinm 
1155f28a827Saf uint_t nb5000_emask_fbd = EMASK_5000_FBD_RES;
1165f28a827Saf uint_t nb5400_emask_fbd = 0;
11720c794b3Sgavinm int nb5000_reset_emask_fbd = 1;
11820c794b3Sgavinm uint_t nb5000_mask_poll_fbd = EMASK_FBD_NF;
11920c794b3Sgavinm uint_t nb5000_mask_bios_fbd = EMASK_FBD_FATAL;
1205f28a827Saf uint_t nb5400_mask_poll_fbd = EMASK_5400_FBD_NF;
1215f28a827Saf uint_t nb5400_mask_bios_fbd = EMASK_5400_FBD_FATAL;
122f8e921e3SVuong Nguyen uint_t nb7300_mask_poll_fbd = EMASK_7300_FBD_NF;
123f8e921e3SVuong Nguyen uint_t nb7300_mask_bios_fbd = EMASK_7300_FBD_FATAL;
12420c794b3Sgavinm 
12585738508SVuong Nguyen int nb5100_reset_emask_mem = 1;
12685738508SVuong Nguyen uint_t nb5100_mask_poll_mem = EMASK_MEM_NF;
12785738508SVuong Nguyen 
12820c794b3Sgavinm uint_t nb5000_emask_fsb = 0;
12920c794b3Sgavinm int nb5000_reset_emask_fsb = 1;
13020c794b3Sgavinm uint_t nb5000_mask_poll_fsb = EMASK_FSB_NF;
13120c794b3Sgavinm uint_t nb5000_mask_bios_fsb = EMASK_FSB_FATAL;
13220c794b3Sgavinm 
133f8e921e3SVuong Nguyen uint_t nb5100_emask_int = EMASK_INT_5100;
1349ff4cbe7SAdrian Frost uint_t nb5400_emask_int = EMASK_INT_5400;
1355f28a827Saf 
13620c794b3Sgavinm uint_t nb7300_emask_int = EMASK_INT_7300;
13720c794b3Sgavinm uint_t nb7300_emask_int_step0 = EMASK_INT_7300_STEP_0;
13820c794b3Sgavinm uint_t nb5000_emask_int = EMASK_INT_5000;
13920c794b3Sgavinm int nb5000_reset_emask_int = 1;
14020c794b3Sgavinm uint_t nb5000_mask_poll_int = EMASK_INT_NF;
14120c794b3Sgavinm uint_t nb5000_mask_bios_int = EMASK_INT_FATAL;
142f8e921e3SVuong Nguyen uint_t nb5100_mask_poll_int = EMASK_INT_5100_NF;
143f8e921e3SVuong Nguyen uint_t nb5100_mask_bios_int = EMASK_INT_5100_FATAL;
14420c794b3Sgavinm 
1455f28a827Saf uint_t nb_mask_poll_thr = EMASK_THR_NF;
1465f28a827Saf uint_t nb_mask_bios_thr = EMASK_THR_FATAL;
1475f28a827Saf 
14820c794b3Sgavinm int nb5000_reset_uncor_pex = 0;
14920c794b3Sgavinm uint_t nb5000_mask_uncor_pex = 0;
1505f28a827Saf int nb5000_reset_cor_pex = 0;
15120c794b3Sgavinm uint_t nb5000_mask_cor_pex = 0xffffffff;
1529a12e1bdSjveta uint32_t nb5000_rp_pex = 0x1;
15320c794b3Sgavinm 
15420c794b3Sgavinm int nb_mask_mc_set;
15520c794b3Sgavinm 
1569d6aa643Saf typedef struct find_dimm_label {
1579d6aa643Saf 	void (*label_function)(int, char *, int);
1589d6aa643Saf } find_dimm_label_t;
1599d6aa643Saf 
1609d6aa643Saf static void x8450_dimm_label(int, char *, int);
16185738508SVuong Nguyen static void cp3250_dimm_label(int, char *, int);
1629d6aa643Saf 
1639d6aa643Saf static struct platform_label {
1649d6aa643Saf 	const char *sys_vendor;		/* SMB_TYPE_SYSTEM vendor prefix */
1659d6aa643Saf 	const char *sys_product;	/* SMB_TYPE_SYSTEM product prefix */
1669d6aa643Saf 	find_dimm_label_t dimm_label;
1679d6aa643Saf 	int dimms_per_channel;
1689d6aa643Saf } platform_label[] = {
1699d6aa643Saf 	{ "SUN MICROSYSTEMS", "SUN BLADE X8450 SERVER MODULE",
1709d6aa643Saf 	    x8450_dimm_label, 8 },
17185738508SVuong Nguyen 	{ "MiTAC,Shunde", "CP3250", cp3250_dimm_label, 0 },
1729d6aa643Saf 	{ NULL, NULL, NULL, 0 }
1739d6aa643Saf };
1749d6aa643Saf 
17520c794b3Sgavinm static unsigned short
read_spd(int bus)17620c794b3Sgavinm read_spd(int bus)
17720c794b3Sgavinm {
17820c794b3Sgavinm 	unsigned short rt = 0;
17920c794b3Sgavinm 	int branch = bus >> 1;
18020c794b3Sgavinm 	int channel = bus & 1;
18120c794b3Sgavinm 
18220c794b3Sgavinm 	rt = SPD_RD(branch, channel);
18320c794b3Sgavinm 
18420c794b3Sgavinm 	return (rt);
18520c794b3Sgavinm }
18620c794b3Sgavinm 
18720c794b3Sgavinm static void
write_spdcmd(int bus,uint32_t val)18820c794b3Sgavinm write_spdcmd(int bus, uint32_t val)
18920c794b3Sgavinm {
19020c794b3Sgavinm 	int branch = bus >> 1;
19120c794b3Sgavinm 	int channel = bus & 1;
19220c794b3Sgavinm 	SPDCMD_WR(branch, channel, val);
19320c794b3Sgavinm }
19420c794b3Sgavinm 
19520c794b3Sgavinm static int
read_spd_eeprom(int bus,int slave,int addr)19620c794b3Sgavinm read_spd_eeprom(int bus, int slave, int addr)
19720c794b3Sgavinm {
19820c794b3Sgavinm 	int retry = 4;
19920c794b3Sgavinm 	int wait;
20020c794b3Sgavinm 	int spd;
20120c794b3Sgavinm 	uint32_t cmd;
20220c794b3Sgavinm 
20320c794b3Sgavinm 	for (;;) {
20420c794b3Sgavinm 		wait = 1000;
20520c794b3Sgavinm 		for (;;) {
20620c794b3Sgavinm 			spd = read_spd(bus);
20720c794b3Sgavinm 			if ((spd & SPD_BUSY) == 0)
20820c794b3Sgavinm 				break;
20920c794b3Sgavinm 			if (--wait == 0)
21020c794b3Sgavinm 				return (-1);
21120c794b3Sgavinm 			drv_usecwait(10);
21220c794b3Sgavinm 		}
21320c794b3Sgavinm 		cmd = SPD_EEPROM_WRITE | SPD_ADDR(slave, addr);
21420c794b3Sgavinm 		write_spdcmd(bus, cmd);
21520c794b3Sgavinm 		wait = 1000;
21620c794b3Sgavinm 		for (;;) {
21720c794b3Sgavinm 			spd = read_spd(bus);
21820c794b3Sgavinm 			if ((spd & SPD_BUSY) == 0)
21920c794b3Sgavinm 				break;
22020c794b3Sgavinm 			if (--wait == 0) {
22120c794b3Sgavinm 				spd = SPD_BUS_ERROR;
22220c794b3Sgavinm 				break;
22320c794b3Sgavinm 			}
22420c794b3Sgavinm 			drv_usecwait(10);
22520c794b3Sgavinm 		}
22620c794b3Sgavinm 		while ((spd & SPD_BUS_ERROR) == 0 &&
22720c794b3Sgavinm 		    (spd & (SPD_READ_DATA_VALID|SPD_BUSY)) !=
22820c794b3Sgavinm 		    SPD_READ_DATA_VALID) {
22920c794b3Sgavinm 			spd = read_spd(bus);
23020c794b3Sgavinm 			if (--wait == 0)
23120c794b3Sgavinm 				return (-1);
23220c794b3Sgavinm 		}
23320c794b3Sgavinm 		if ((spd & SPD_BUS_ERROR) == 0)
23420c794b3Sgavinm 			break;
23520c794b3Sgavinm 		if (--retry == 0)
23620c794b3Sgavinm 			return (-1);
23720c794b3Sgavinm 	}
23820c794b3Sgavinm 	return (spd & 0xff);
23920c794b3Sgavinm }
24020c794b3Sgavinm 
24120c794b3Sgavinm static void
nb_fini()24220c794b3Sgavinm nb_fini()
24320c794b3Sgavinm {
24420c794b3Sgavinm 	int i, j;
24585738508SVuong Nguyen 	int nchannels = nb_number_memory_controllers * nb_channels_per_branch;
24620c794b3Sgavinm 	nb_dimm_t **dimmpp;
24720c794b3Sgavinm 	nb_dimm_t *dimmp;
24820c794b3Sgavinm 
24920c794b3Sgavinm 	dimmpp = nb_dimms;
25020c794b3Sgavinm 	for (i = 0; i < nchannels; i++) {
25120c794b3Sgavinm 		for (j = 0; j < nb_dimms_per_channel; j++) {
25220c794b3Sgavinm 			dimmp = *dimmpp;
25320c794b3Sgavinm 			if (dimmp) {
25420c794b3Sgavinm 				kmem_free(dimmp, sizeof (nb_dimm_t));
25520c794b3Sgavinm 				*dimmpp = NULL;
25620c794b3Sgavinm 			}
25772b70389SJakub Jermar 			dimmpp++;
25820c794b3Sgavinm 		}
25920c794b3Sgavinm 	}
26030cfc677SAdrian Frost 	kmem_free(nb_dimms, sizeof (nb_dimm_t *) * nb_dimm_slots);
26120c794b3Sgavinm 	nb_dimms = NULL;
26220c794b3Sgavinm 	dimm_fini();
26320c794b3Sgavinm }
26420c794b3Sgavinm 
26520c794b3Sgavinm void
nb_scrubber_enable()26620c794b3Sgavinm nb_scrubber_enable()
26720c794b3Sgavinm {
26820c794b3Sgavinm 	uint32_t mc;
26920c794b3Sgavinm 
27020c794b3Sgavinm 	if (!nb_hw_memory_scrub_enable)
27120c794b3Sgavinm 		return;
27220c794b3Sgavinm 
27320c794b3Sgavinm 	mc = MC_RD();
27420c794b3Sgavinm 	if ((mc & MC_MIRROR) != 0) /* mirror mode */
27520c794b3Sgavinm 		mc |= MC_PATROL_SCRUB;
27620c794b3Sgavinm 	else
27720c794b3Sgavinm 		mc |= MC_PATROL_SCRUB|MC_DEMAND_SCRUB;
27820c794b3Sgavinm 	MC_WR(mc);
27920c794b3Sgavinm 
28020c794b3Sgavinm 	if (nb_sw_scrub_disabled++)
281e4b86885SCheng Sean Ye 		cmi_mc_sw_memscrub_disable();
28220c794b3Sgavinm }
28320c794b3Sgavinm 
28485738508SVuong Nguyen static void
fbd_eeprom(int channel,int dimm,nb_dimm_t * dp)28585738508SVuong Nguyen fbd_eeprom(int channel, int dimm, nb_dimm_t *dp)
28620c794b3Sgavinm {
28720c794b3Sgavinm 	int i, t;
28820c794b3Sgavinm 	int spd_sz;
28920c794b3Sgavinm 
29020c794b3Sgavinm 	t = read_spd_eeprom(channel, dimm, 0) & 0xf;
29120c794b3Sgavinm 	if (t == 1)
29220c794b3Sgavinm 		spd_sz = 128;
29320c794b3Sgavinm 	else if (t == 2)
29420c794b3Sgavinm 		spd_sz = 176;
29520c794b3Sgavinm 	else
29620c794b3Sgavinm 		spd_sz = 256;
29720c794b3Sgavinm 	dp->manufacture_id = read_spd_eeprom(channel, dimm, 117) |
29820c794b3Sgavinm 	    (read_spd_eeprom(channel, dimm, 118) << 8);
29920c794b3Sgavinm 	dp->manufacture_location = read_spd_eeprom(channel, dimm, 119);
30020c794b3Sgavinm 	dp->serial_number =
30120c794b3Sgavinm 	    (read_spd_eeprom(channel, dimm, 122) << 24) |
30220c794b3Sgavinm 	    (read_spd_eeprom(channel, dimm, 123) << 16) |
30320c794b3Sgavinm 	    (read_spd_eeprom(channel, dimm, 124) << 8) |
30420c794b3Sgavinm 	    read_spd_eeprom(channel, dimm, 125);
30520c794b3Sgavinm 	t = read_spd_eeprom(channel, dimm, 121);
30620c794b3Sgavinm 	dp->manufacture_week = (t >> 4) * 10 + (t & 0xf);
30720c794b3Sgavinm 	dp->manufacture_year = read_spd_eeprom(channel, dimm, 120);
30820c794b3Sgavinm 	if (spd_sz > 128) {
30920c794b3Sgavinm 		for (i = 0; i < sizeof (dp->part_number); i++) {
31020c794b3Sgavinm 			dp->part_number[i] =
31120c794b3Sgavinm 			    read_spd_eeprom(channel, dimm, 128 + i);
31220c794b3Sgavinm 		}
31320c794b3Sgavinm 		for (i = 0; i < sizeof (dp->revision); i++) {
31420c794b3Sgavinm 			dp->revision[i] =
31520c794b3Sgavinm 			    read_spd_eeprom(channel, dimm, 146 + i);
31620c794b3Sgavinm 		}
31720c794b3Sgavinm 	}
31885738508SVuong Nguyen }
31985738508SVuong Nguyen 
32085738508SVuong Nguyen /* read the manR of the DDR2 dimm */
32185738508SVuong Nguyen static void
ddr2_eeprom(int channel,int dimm,nb_dimm_t * dp)32285738508SVuong Nguyen ddr2_eeprom(int channel, int dimm, nb_dimm_t *dp)
32385738508SVuong Nguyen {
32485738508SVuong Nguyen 	int i, t;
32585738508SVuong Nguyen 	int slave;
32685738508SVuong Nguyen 
32785738508SVuong Nguyen 	slave = channel & 0x1 ? dimm + 4 : dimm;
32885738508SVuong Nguyen 
32985738508SVuong Nguyen 	/* byte[3]: number of row addresses */
33085738508SVuong Nguyen 	dp->nrow = read_spd_eeprom(channel, slave, 3) & 0x1f;
33185738508SVuong Nguyen 
33285738508SVuong Nguyen 	/* byte[4]: number of column addresses */
33385738508SVuong Nguyen 	dp->ncolumn = read_spd_eeprom(channel, slave, 4) & 0xf;
33485738508SVuong Nguyen 
33585738508SVuong Nguyen 	/* byte[5]: numranks; 0 means one rank */
33685738508SVuong Nguyen 	dp->nranks = (read_spd_eeprom(channel, slave, 5) & 0x3) + 1;
33785738508SVuong Nguyen 
33885738508SVuong Nguyen 	/* byte[6]: data width */
33985738508SVuong Nguyen 	dp->width = (read_spd_eeprom(channel, slave, 6) >> 5) << 2;
34085738508SVuong Nguyen 
34185738508SVuong Nguyen 	/* byte[17]: number of banks */
34285738508SVuong Nguyen 	dp->nbanks = read_spd_eeprom(channel, slave, 17);
34385738508SVuong Nguyen 
34485738508SVuong Nguyen 	dp->dimm_size = DIMMSIZE(dp->nrow, dp->ncolumn, dp->nranks, dp->nbanks,
34585738508SVuong Nguyen 	    dp->width);
34685738508SVuong Nguyen 
34785738508SVuong Nguyen 	/* manufacture-id - byte[64-65] */
34885738508SVuong Nguyen 	dp->manufacture_id = read_spd_eeprom(channel, slave, 64) |
34985738508SVuong Nguyen 	    (read_spd_eeprom(channel, dimm, 65) << 8);
35085738508SVuong Nguyen 
35185738508SVuong Nguyen 	/* location - byte[72] */
35285738508SVuong Nguyen 	dp->manufacture_location = read_spd_eeprom(channel, slave, 72);
35385738508SVuong Nguyen 
35485738508SVuong Nguyen 	/* serial number - byte[95-98] */
35585738508SVuong Nguyen 	dp->serial_number =
35685738508SVuong Nguyen 	    (read_spd_eeprom(channel, slave, 98) << 24) |
35785738508SVuong Nguyen 	    (read_spd_eeprom(channel, slave, 97) << 16) |
35885738508SVuong Nguyen 	    (read_spd_eeprom(channel, slave, 96) << 8) |
35985738508SVuong Nguyen 	    read_spd_eeprom(channel, slave, 95);
36085738508SVuong Nguyen 
36185738508SVuong Nguyen 	/* week - byte[94] */
36285738508SVuong Nguyen 	t = read_spd_eeprom(channel, slave, 94);
36385738508SVuong Nguyen 	dp->manufacture_week = (t >> 4) * 10 + (t & 0xf);
36485738508SVuong Nguyen 	/* week - byte[93] */
36585738508SVuong Nguyen 	t = read_spd_eeprom(channel, slave, 93);
36685738508SVuong Nguyen 	dp->manufacture_year = (t >> 4) * 10 + (t & 0xf) + 2000;
36785738508SVuong Nguyen 
36885738508SVuong Nguyen 	/* part number - byte[73-81] */
36985738508SVuong Nguyen 	for (i = 0; i < 8; i++) {
37085738508SVuong Nguyen 		dp->part_number[i] = read_spd_eeprom(channel, slave, 73 + i);
37185738508SVuong Nguyen 	}
37285738508SVuong Nguyen 
37385738508SVuong Nguyen 	/* revision - byte[91-92] */
37485738508SVuong Nguyen 	for (i = 0; i < 2; i++) {
37585738508SVuong Nguyen 		dp->revision[i] = read_spd_eeprom(channel, slave, 91 + i);
37685738508SVuong Nguyen 	}
37785738508SVuong Nguyen }
37885738508SVuong Nguyen 
37985738508SVuong Nguyen static boolean_t
nb_dimm_present(int channel,int dimm)38085738508SVuong Nguyen nb_dimm_present(int channel, int dimm)
38185738508SVuong Nguyen {
38285738508SVuong Nguyen 	boolean_t rc = B_FALSE;
38385738508SVuong Nguyen 
38485738508SVuong Nguyen 	if (nb_chipset == INTEL_NB_5100) {
38585738508SVuong Nguyen 		int t, slave;
38685738508SVuong Nguyen 		slave = channel & 0x1 ? dimm + 4 : dimm;
38785738508SVuong Nguyen 		/* read the type field from the dimm and check for DDR2 type */
38885738508SVuong Nguyen 		if ((t = read_spd_eeprom(channel, slave, SPD_MEM_TYPE)) == -1)
38985738508SVuong Nguyen 			return (B_FALSE);
39085738508SVuong Nguyen 		rc = (t & 0xf) == SPD_DDR2;
39185738508SVuong Nguyen 	} else {
392*ee63a9c9SRichard Lowe 		rc = MTR_PRESENT(MTR_RD(channel, dimm));
39385738508SVuong Nguyen 	}
39485738508SVuong Nguyen 
39585738508SVuong Nguyen 	return (rc);
39685738508SVuong Nguyen }
39785738508SVuong Nguyen 
39885738508SVuong Nguyen static nb_dimm_t *
nb_ddr2_dimm_init(int channel,int dimm,int start_rank)39985738508SVuong Nguyen nb_ddr2_dimm_init(int channel, int dimm, int start_rank)
40085738508SVuong Nguyen {
40185738508SVuong Nguyen 	nb_dimm_t *dp;
40285738508SVuong Nguyen 
40385738508SVuong Nguyen 	if (nb_dimm_present(channel, dimm) == B_FALSE)
40485738508SVuong Nguyen 		return (NULL);
40585738508SVuong Nguyen 
40685738508SVuong Nguyen 	dp = kmem_zalloc(sizeof (nb_dimm_t), KM_SLEEP);
40785738508SVuong Nguyen 
40885738508SVuong Nguyen 	ddr2_eeprom(channel, dimm, dp);
40985738508SVuong Nguyen 
41085738508SVuong Nguyen 	/* The 1st rank of the dimm takes on this value */
41185738508SVuong Nguyen 	dp->start_rank = (uint8_t)start_rank;
41285738508SVuong Nguyen 
41385738508SVuong Nguyen 	dp->mtr_present = 1;
41485738508SVuong Nguyen 
41585738508SVuong Nguyen 	return (dp);
41685738508SVuong Nguyen }
41785738508SVuong Nguyen 
41885738508SVuong Nguyen static nb_dimm_t *
nb_fbd_dimm_init(int channel,int dimm,uint16_t mtr)41985738508SVuong Nguyen nb_fbd_dimm_init(int channel, int dimm, uint16_t mtr)
42085738508SVuong Nguyen {
42185738508SVuong Nguyen 	nb_dimm_t *dp;
42285738508SVuong Nguyen 	int t;
42385738508SVuong Nguyen 
42485738508SVuong Nguyen 	if (MTR_PRESENT(mtr) == 0)
42585738508SVuong Nguyen 		return (NULL);
42685738508SVuong Nguyen 	t = read_spd_eeprom(channel, dimm, SPD_MEM_TYPE) & 0xf;
42785738508SVuong Nguyen 
42885738508SVuong Nguyen 	/* check for the dimm type */
42985738508SVuong Nguyen 	if (t != SPD_FBDIMM)
43085738508SVuong Nguyen 		return (NULL);
43185738508SVuong Nguyen 
43285738508SVuong Nguyen 	dp = kmem_zalloc(sizeof (nb_dimm_t), KM_SLEEP);
43385738508SVuong Nguyen 
43485738508SVuong Nguyen 	fbd_eeprom(channel, dimm, dp);
43585738508SVuong Nguyen 
4365de8e333Saf 	dp->mtr_present = MTR_PRESENT(mtr);
43785738508SVuong Nguyen 	dp->start_rank = dimm << 1;
43820c794b3Sgavinm 	dp->nranks = MTR_NUMRANK(mtr);
43920c794b3Sgavinm 	dp->nbanks = MTR_NUMBANK(mtr);
44020c794b3Sgavinm 	dp->ncolumn = MTR_NUMCOL(mtr);
44120c794b3Sgavinm 	dp->nrow = MTR_NUMROW(mtr);
44220c794b3Sgavinm 	dp->width = MTR_WIDTH(mtr);
44320c794b3Sgavinm 	dp->dimm_size = MTR_DIMMSIZE(mtr);
44420c794b3Sgavinm 
44520c794b3Sgavinm 	return (dp);
44620c794b3Sgavinm }
44720c794b3Sgavinm 
44820c794b3Sgavinm static uint64_t
mc_range(int controller,uint64_t base)44920c794b3Sgavinm mc_range(int controller, uint64_t base)
45020c794b3Sgavinm {
45120c794b3Sgavinm 	int i;
45220c794b3Sgavinm 	uint64_t limit = 0;
45320c794b3Sgavinm 
45420c794b3Sgavinm 	for (i = 0; i < NB_MEM_BRANCH_SELECT; i++) {
45520c794b3Sgavinm 		if (nb_banks[i].way[controller] && base >= nb_banks[i].base &&
45620c794b3Sgavinm 		    base < nb_banks[i].limit) {
45720c794b3Sgavinm 			limit = nb_banks[i].limit;
45820c794b3Sgavinm 			if (base <= top_of_low_memory &&
45920c794b3Sgavinm 			    limit > top_of_low_memory) {
46020c794b3Sgavinm 				limit -= TLOW_MAX - top_of_low_memory;
46120c794b3Sgavinm 			}
46220c794b3Sgavinm 			if (nb_banks[i].way[0] && nb_banks[i].way[1] &&
46320c794b3Sgavinm 			    nb_mode != NB_MEMORY_MIRROR) {
46420c794b3Sgavinm 				limit = limit / 2;
46520c794b3Sgavinm 			}
46620c794b3Sgavinm 		}
46720c794b3Sgavinm 	}
46820c794b3Sgavinm 	return (limit);
46920c794b3Sgavinm }
47020c794b3Sgavinm 
47120c794b3Sgavinm void
nb_mc_init()47220c794b3Sgavinm nb_mc_init()
47320c794b3Sgavinm {
47420c794b3Sgavinm 	uint16_t tolm;
47520c794b3Sgavinm 	uint16_t mir;
47620c794b3Sgavinm 	uint32_t hole_base;
47720c794b3Sgavinm 	uint32_t hole_size;
47820c794b3Sgavinm 	uint32_t dmir;
47920c794b3Sgavinm 	uint64_t base;
48020c794b3Sgavinm 	uint64_t limit;
48120c794b3Sgavinm 	uint8_t way0, way1, rank0, rank1, rank2, rank3, branch_interleave;
48220c794b3Sgavinm 	int i, j, k;
48320c794b3Sgavinm 	uint8_t interleave;
48420c794b3Sgavinm 
48520c794b3Sgavinm 	base = 0;
48620c794b3Sgavinm 	tolm = TOLM_RD();
48720c794b3Sgavinm 	top_of_low_memory = ((uint32_t)(tolm >> 12) & 0xf) << 28;
48820c794b3Sgavinm 	for (i = 0; i < NB_MEM_BRANCH_SELECT; i++) {
48920c794b3Sgavinm 		mir = MIR_RD(i);
49020c794b3Sgavinm 		limit = (uint64_t)(mir >> 4) << 28;
49120c794b3Sgavinm 		way0 = mir & 1;
49220c794b3Sgavinm 		way1 = (mir >> 1) & 1;
49320c794b3Sgavinm 		if (way0 == 0 && way1 == 0) {
49420c794b3Sgavinm 			way0 = 1;
49520c794b3Sgavinm 			way1 = 1;
49620c794b3Sgavinm 		}
49720c794b3Sgavinm 		if (limit > top_of_low_memory)
49820c794b3Sgavinm 			limit += TLOW_MAX - top_of_low_memory;
49920c794b3Sgavinm 		nb_banks[i].base = base;
50020c794b3Sgavinm 		nb_banks[i].limit = limit;
50120c794b3Sgavinm 		nb_banks[i].way[0] = way0;
50220c794b3Sgavinm 		nb_banks[i].way[1] = way1;
50320c794b3Sgavinm 		base = limit;
50420c794b3Sgavinm 	}
50520c794b3Sgavinm 	for (i = 0; i < nb_number_memory_controllers; i++) {
50620c794b3Sgavinm 		base = 0;
50720c794b3Sgavinm 
50820c794b3Sgavinm 		for (j = 0; j < NB_MEM_RANK_SELECT; j++) {
50920c794b3Sgavinm 			dmir = DMIR_RD(i, j);
51020c794b3Sgavinm 			limit = ((uint64_t)(dmir >> 16) & 0xff) << 28;
51120c794b3Sgavinm 			if (limit == 0) {
51220c794b3Sgavinm 				limit = mc_range(i, base);
51320c794b3Sgavinm 			}
51420c794b3Sgavinm 			branch_interleave = 0;
51520c794b3Sgavinm 			hole_base = 0;
51620c794b3Sgavinm 			hole_size = 0;
5179d6aa643Saf 			DMIR_RANKS(dmir, rank0, rank1, rank2, rank3);
51820c794b3Sgavinm 			if (rank0 == rank1)
51920c794b3Sgavinm 				interleave = 1;
52020c794b3Sgavinm 			else if (rank0 == rank2)
52120c794b3Sgavinm 				interleave = 2;
52220c794b3Sgavinm 			else
52320c794b3Sgavinm 				interleave = 4;
52420c794b3Sgavinm 			if (nb_mode != NB_MEMORY_MIRROR &&
52520c794b3Sgavinm 			    nb_mode != NB_MEMORY_SINGLE_CHANNEL) {
52620c794b3Sgavinm 				for (k = 0; k < NB_MEM_BRANCH_SELECT; k++) {
52720c794b3Sgavinm 					if (base >= nb_banks[k].base &&
52820c794b3Sgavinm 					    base < nb_banks[k].limit) {
52920c794b3Sgavinm 						if (nb_banks[i].way[0] &&
53020c794b3Sgavinm 						    nb_banks[i].way[1]) {
53120c794b3Sgavinm 							interleave *= 2;
53220c794b3Sgavinm 							limit *= 2;
53320c794b3Sgavinm 							branch_interleave = 1;
53420c794b3Sgavinm 						}
53520c794b3Sgavinm 						break;
53620c794b3Sgavinm 					}
53720c794b3Sgavinm 				}
53820c794b3Sgavinm 			}
53920c794b3Sgavinm 			if (base < top_of_low_memory &&
54020c794b3Sgavinm 			    limit > top_of_low_memory) {
54120c794b3Sgavinm 				hole_base = top_of_low_memory;
54220c794b3Sgavinm 				hole_size = TLOW_MAX - top_of_low_memory;
54320c794b3Sgavinm 				limit += hole_size;
54420c794b3Sgavinm 			} else if (base > top_of_low_memory) {
54520c794b3Sgavinm 				limit += TLOW_MAX - top_of_low_memory;
54620c794b3Sgavinm 			}
54720c794b3Sgavinm 			nb_ranks[i][j].base = base;
54820c794b3Sgavinm 			nb_ranks[i][j].limit = limit;
54920c794b3Sgavinm 			nb_ranks[i][j].rank[0] = rank0;
55020c794b3Sgavinm 			nb_ranks[i][j].rank[1] = rank1;
55120c794b3Sgavinm 			nb_ranks[i][j].rank[2] = rank2;
55220c794b3Sgavinm 			nb_ranks[i][j].rank[3] = rank3;
55320c794b3Sgavinm 			nb_ranks[i][j].interleave = interleave;
55420c794b3Sgavinm 			nb_ranks[i][j].branch_interleave = branch_interleave;
55520c794b3Sgavinm 			nb_ranks[i][j].hole_base = hole_base;
55620c794b3Sgavinm 			nb_ranks[i][j].hole_size = hole_size;
55720c794b3Sgavinm 			if (limit > base) {
55820c794b3Sgavinm 				if (rank0 != rank1) {
55920c794b3Sgavinm 					dimm_add_rank(i, rank1,
56020c794b3Sgavinm 					    branch_interleave, 1, base,
56120c794b3Sgavinm 					    hole_base, hole_size, interleave,
56220c794b3Sgavinm 					    limit);
56320c794b3Sgavinm 					if (rank0 != rank2) {
56420c794b3Sgavinm 						dimm_add_rank(i, rank2,
56520c794b3Sgavinm 						    branch_interleave, 2, base,
56620c794b3Sgavinm 						    hole_base, hole_size,
56720c794b3Sgavinm 						    interleave, limit);
56820c794b3Sgavinm 						dimm_add_rank(i, rank3,
56920c794b3Sgavinm 						    branch_interleave, 3, base,
57020c794b3Sgavinm 						    hole_base, hole_size,
57120c794b3Sgavinm 						    interleave, limit);
57220c794b3Sgavinm 					}
57320c794b3Sgavinm 				}
57420c794b3Sgavinm 			}
57520c794b3Sgavinm 			base = limit;
57620c794b3Sgavinm 		}
57720c794b3Sgavinm 	}
57820c794b3Sgavinm }
57920c794b3Sgavinm 
58020c794b3Sgavinm void
nb_used_spare_rank(int branch,int bad_rank)58120c794b3Sgavinm nb_used_spare_rank(int branch, int bad_rank)
58220c794b3Sgavinm {
58320c794b3Sgavinm 	int i;
58420c794b3Sgavinm 	int j;
58520c794b3Sgavinm 
58620c794b3Sgavinm 	for (i = 0; i < NB_MEM_RANK_SELECT; i++) {
58720c794b3Sgavinm 		for (j = 0; j < NB_RANKS_IN_SELECT; j++) {
58820c794b3Sgavinm 			if (nb_ranks[branch][i].rank[j] == bad_rank) {
58920c794b3Sgavinm 				nb_ranks[branch][i].rank[j] =
59020c794b3Sgavinm 				    spare_rank[branch];
59120c794b3Sgavinm 				i = NB_MEM_RANK_SELECT;
59220c794b3Sgavinm 				break;
59320c794b3Sgavinm 			}
59420c794b3Sgavinm 		}
59520c794b3Sgavinm 	}
59620c794b3Sgavinm }
59720c794b3Sgavinm 
5989d6aa643Saf find_dimm_label_t *
find_dimms_per_channel()59920c794b3Sgavinm find_dimms_per_channel()
60020c794b3Sgavinm {
6019d6aa643Saf 	struct platform_label *pl;
6029d6aa643Saf 	smbios_info_t si;
6039d6aa643Saf 	smbios_system_t sy;
6049d6aa643Saf 	id_t id;
60530cfc677SAdrian Frost 	int i, j;
6069d6aa643Saf 	find_dimm_label_t *rt = NULL;
6079d6aa643Saf 
60830cfc677SAdrian Frost 	if (ksmbios != NULL && nb_no_smbios == 0) {
6099d6aa643Saf 		if ((id = smbios_info_system(ksmbios, &sy)) != SMB_ERR &&
6109d6aa643Saf 		    smbios_info_common(ksmbios, id, &si) != SMB_ERR) {
6119d6aa643Saf 			for (pl = platform_label; pl->sys_vendor; pl++) {
6129d6aa643Saf 				if (strncmp(pl->sys_vendor,
6139d6aa643Saf 				    si.smbi_manufacturer,
6149d6aa643Saf 				    strlen(pl->sys_vendor)) == 0 &&
6159d6aa643Saf 				    strncmp(pl->sys_product, si.smbi_product,
6169d6aa643Saf 				    strlen(pl->sys_product)) == 0) {
6179d6aa643Saf 					nb_dimms_per_channel =
6189d6aa643Saf 					    pl->dimms_per_channel;
6199d6aa643Saf 					rt = &pl->dimm_label;
6209d6aa643Saf 					break;
6219d6aa643Saf 				}
6229d6aa643Saf 			}
6239d6aa643Saf 		}
6249d6aa643Saf 	}
6259d6aa643Saf 	if (nb_dimms_per_channel == 0) {
62630cfc677SAdrian Frost 		/*
62730cfc677SAdrian Frost 		 * Scan all memory channels if we find a channel which has more
62830cfc677SAdrian Frost 		 * dimms then we have seen before set nb_dimms_per_channel to
62930cfc677SAdrian Frost 		 * the number of dimms on the channel
63030cfc677SAdrian Frost 		 */
63130cfc677SAdrian Frost 		for (i = 0; i < nb_number_memory_controllers; i++) {
63230cfc677SAdrian Frost 			for (j = nb_dimms_per_channel;
63330cfc677SAdrian Frost 			    j < NB_MAX_DIMMS_PER_CHANNEL; j++) {
63485738508SVuong Nguyen 				if (nb_dimm_present(i, j))
63530cfc677SAdrian Frost 					nb_dimms_per_channel = j + 1;
63630cfc677SAdrian Frost 			}
63720c794b3Sgavinm 		}
63820c794b3Sgavinm 	}
6399d6aa643Saf 	return (rt);
64020c794b3Sgavinm }
64120c794b3Sgavinm 
6429ff4cbe7SAdrian Frost struct smb_dimm_rec {
6439ff4cbe7SAdrian Frost 	int dimms;
6449ff4cbe7SAdrian Frost 	int slots;
6459ff4cbe7SAdrian Frost 	int populated;
6469ff4cbe7SAdrian Frost 	nb_dimm_t **dimmpp;
6479ff4cbe7SAdrian Frost };
6489ff4cbe7SAdrian Frost 
64920c794b3Sgavinm static int
dimm_label(smbios_hdl_t * shp,const smbios_struct_t * sp,void * arg)65020c794b3Sgavinm dimm_label(smbios_hdl_t *shp, const smbios_struct_t *sp, void *arg)
65120c794b3Sgavinm {
6529ff4cbe7SAdrian Frost 	struct smb_dimm_rec *rp = (struct smb_dimm_rec *)arg;
6539ff4cbe7SAdrian Frost 	nb_dimm_t ***dimmpp;
65420c794b3Sgavinm 	nb_dimm_t *dimmp;
65520c794b3Sgavinm 	smbios_memdevice_t md;
65620c794b3Sgavinm 
6579ff4cbe7SAdrian Frost 	dimmpp = &rp->dimmpp;
65820c794b3Sgavinm 	if (sp->smbstr_type == SMB_TYPE_MEMDEVICE) {
65930cfc677SAdrian Frost 		if (*dimmpp >= &nb_dimms[nb_dimm_slots])
66030cfc677SAdrian Frost 			return (-1);
66120c794b3Sgavinm 		dimmp = **dimmpp;
66230cfc677SAdrian Frost 		if (smbios_info_memdevice(shp, sp->smbstr_id, &md) == 0 &&
66330cfc677SAdrian Frost 		    md.smbmd_dloc != NULL) {
66430cfc677SAdrian Frost 			if (md.smbmd_size) {
6659ff4cbe7SAdrian Frost 				if (dimmp == NULL &&
6669ff4cbe7SAdrian Frost 				    (rp->slots == nb_dimm_slots ||
6679ff4cbe7SAdrian Frost 				    rp->dimms < rp->populated)) {
6689ff4cbe7SAdrian Frost 					(*dimmpp)++;
6699ff4cbe7SAdrian Frost 					return (0);
6709ff4cbe7SAdrian Frost 				}
67130cfc677SAdrian Frost 				/*
67230cfc677SAdrian Frost 				 * if there is no physical dimm for this smbios
67330cfc677SAdrian Frost 				 * record it is because this system has less
67430cfc677SAdrian Frost 				 * physical slots than the controller supports
67530cfc677SAdrian Frost 				 * so skip empty slots to find the slot this
67630cfc677SAdrian Frost 				 * smbios record belongs too
67730cfc677SAdrian Frost 				 */
67830cfc677SAdrian Frost 				while (dimmp == NULL) {
6799ff4cbe7SAdrian Frost 					(*dimmpp)++;
68030cfc677SAdrian Frost 					if (*dimmpp >= &nb_dimms[nb_dimm_slots])
68130cfc677SAdrian Frost 						return (-1);
6829ff4cbe7SAdrian Frost 					dimmp = **dimmpp;
68330cfc677SAdrian Frost 				}
68430cfc677SAdrian Frost 				(void) snprintf(dimmp->label,
68530cfc677SAdrian Frost 				    sizeof (dimmp->label), "%s", md.smbmd_dloc);
68630cfc677SAdrian Frost 				(*dimmpp)++;
68730cfc677SAdrian Frost 			}
68820c794b3Sgavinm 		}
68920c794b3Sgavinm 	}
69020c794b3Sgavinm 	return (0);
69120c794b3Sgavinm }
69220c794b3Sgavinm 
6939ff4cbe7SAdrian Frost static int
check_memdevice(smbios_hdl_t * shp,const smbios_struct_t * sp,void * arg)6949ff4cbe7SAdrian Frost check_memdevice(smbios_hdl_t *shp, const smbios_struct_t *sp, void *arg)
6959ff4cbe7SAdrian Frost {
6969ff4cbe7SAdrian Frost 	struct smb_dimm_rec *rp = (struct smb_dimm_rec *)arg;
6979ff4cbe7SAdrian Frost 	smbios_memdevice_t md;
6989ff4cbe7SAdrian Frost 
6999ff4cbe7SAdrian Frost 	if (sp->smbstr_type == SMB_TYPE_MEMDEVICE) {
7009ff4cbe7SAdrian Frost 		if (smbios_info_memdevice(shp, sp->smbstr_id, &md) == 0) {
7019ff4cbe7SAdrian Frost 			rp->slots++;
7029ff4cbe7SAdrian Frost 			if (md.smbmd_size) {
7039ff4cbe7SAdrian Frost 				rp->populated++;
7049ff4cbe7SAdrian Frost 			}
7059ff4cbe7SAdrian Frost 		}
7069ff4cbe7SAdrian Frost 	}
7079ff4cbe7SAdrian Frost 	return (0);
7089ff4cbe7SAdrian Frost }
7099ff4cbe7SAdrian Frost 
71020c794b3Sgavinm void
nb_smbios()71120c794b3Sgavinm nb_smbios()
71220c794b3Sgavinm {
7139ff4cbe7SAdrian Frost 	struct smb_dimm_rec r;
7149ff4cbe7SAdrian Frost 	int i;
71520c794b3Sgavinm 
71630cfc677SAdrian Frost 	if (ksmbios != NULL && nb_no_smbios == 0) {
7179ff4cbe7SAdrian Frost 		r.dimms = 0;
7189ff4cbe7SAdrian Frost 		r.slots = 0;
7199ff4cbe7SAdrian Frost 		r.populated = 0;
7209ff4cbe7SAdrian Frost 		r.dimmpp = nb_dimms;
7219ff4cbe7SAdrian Frost 		for (i = 0; i < nb_dimm_slots; i++) {
7229ff4cbe7SAdrian Frost 			if (nb_dimms[i] != NULL)
7239ff4cbe7SAdrian Frost 				r.dimms++;
7249ff4cbe7SAdrian Frost 		}
7259ff4cbe7SAdrian Frost 		(void) smbios_iter(ksmbios, check_memdevice, &r);
7269ff4cbe7SAdrian Frost 		(void) smbios_iter(ksmbios, dimm_label, &r);
72720c794b3Sgavinm 	}
72820c794b3Sgavinm }
72920c794b3Sgavinm 
73020c794b3Sgavinm static void
x8450_dimm_label(int dimm,char * label,int label_sz)7319d6aa643Saf x8450_dimm_label(int dimm, char *label, int label_sz)
73220c794b3Sgavinm {
7339d6aa643Saf 	int channel = dimm >> 3;
7349d6aa643Saf 
7359d6aa643Saf 	dimm = dimm & 0x7;
7369d6aa643Saf 	(void) snprintf(label, label_sz, "D%d", (dimm * 4) + channel);
7379d6aa643Saf }
7389d6aa643Saf 
73985738508SVuong Nguyen /*
74085738508SVuong Nguyen  * CP3250 DIMM labels
74185738508SVuong Nguyen  * Channel   Dimm   Label
74285738508SVuong Nguyen  *       0      0      A0
74385738508SVuong Nguyen  *       1      0      B0
74485738508SVuong Nguyen  *       0      1      A1
74585738508SVuong Nguyen  *       1      1      B1
74685738508SVuong Nguyen  *       0      2      A2
74785738508SVuong Nguyen  *       1      2      B2
74885738508SVuong Nguyen  */
7499d6aa643Saf static void
cp3250_dimm_label(int dimm,char * label,int label_sz)75085738508SVuong Nguyen cp3250_dimm_label(int dimm, char *label, int label_sz)
75185738508SVuong Nguyen {
75285738508SVuong Nguyen 	int channel = dimm / nb_dimms_per_channel;
75385738508SVuong Nguyen 
75485738508SVuong Nguyen 	dimm = dimm % nb_dimms_per_channel;
75585738508SVuong Nguyen 	(void) snprintf(label, label_sz, "%c%d", channel == 0 ? 'A' : 'B',
75685738508SVuong Nguyen 	    dimm);
75785738508SVuong Nguyen }
75885738508SVuong Nguyen 
75985738508SVuong Nguyen /*
76085738508SVuong Nguyen  * Map the rank id to dimm id of a channel
76185738508SVuong Nguyen  * For the 5100 chipset, walk through the dimm list of channel the check if
76285738508SVuong Nguyen  * the given rank id is within the rank range assigned to the dimm.
76385738508SVuong Nguyen  * For other chipsets, the dimm is rank/2.
76485738508SVuong Nguyen  */
76585738508SVuong Nguyen int
nb_rank2dimm(int channel,int rank)76685738508SVuong Nguyen nb_rank2dimm(int channel, int rank)
76785738508SVuong Nguyen {
76885738508SVuong Nguyen 	int i;
76985738508SVuong Nguyen 	nb_dimm_t **dimmpp = nb_dimms;
77085738508SVuong Nguyen 
77185738508SVuong Nguyen 	if (nb_chipset != INTEL_NB_5100)
77285738508SVuong Nguyen 		return (rank >> 1);
77385738508SVuong Nguyen 
77485738508SVuong Nguyen 	dimmpp += channel * nb_dimms_per_channel;
77585738508SVuong Nguyen 	for (i = 0; i < nb_dimms_per_channel; i++) {
77685738508SVuong Nguyen 		if ((rank >= dimmpp[i]->start_rank) &&
77785738508SVuong Nguyen 		    (rank < dimmpp[i]->start_rank + dimmpp[i]->nranks)) {
77885738508SVuong Nguyen 			return (i);
77985738508SVuong Nguyen 		}
78085738508SVuong Nguyen 	}
78185738508SVuong Nguyen 	return (-1);
78285738508SVuong Nguyen }
78385738508SVuong Nguyen 
78485738508SVuong Nguyen static void
nb_ddr2_dimms_init(find_dimm_label_t * label_function)78585738508SVuong Nguyen nb_ddr2_dimms_init(find_dimm_label_t *label_function)
78685738508SVuong Nguyen {
78785738508SVuong Nguyen 	int i, j;
78885738508SVuong Nguyen 	int start_rank;
78985738508SVuong Nguyen 	uint32_t spcpc;
79085738508SVuong Nguyen 	uint8_t spcps;
79185738508SVuong Nguyen 	nb_dimm_t **dimmpp;
79285738508SVuong Nguyen 
79385738508SVuong Nguyen 	nb_dimm_slots = nb_number_memory_controllers * nb_channels_per_branch *
79485738508SVuong Nguyen 	    nb_dimms_per_channel;
79585738508SVuong Nguyen 	nb_dimms = (nb_dimm_t **)kmem_zalloc(sizeof (nb_dimm_t *) *
79685738508SVuong Nguyen 	    nb_dimm_slots, KM_SLEEP);
79785738508SVuong Nguyen 	dimmpp = nb_dimms;
79885738508SVuong Nguyen 	nb_mode = NB_MEMORY_NORMAL;
79985738508SVuong Nguyen 	for (i = 0; i < nb_number_memory_controllers; i++) {
80085738508SVuong Nguyen 		if (nb_mode == NB_MEMORY_NORMAL) {
80185738508SVuong Nguyen 			spcpc = SPCPC_RD(i);
80285738508SVuong Nguyen 			spcps = SPCPS_RD(i);
80385738508SVuong Nguyen 			if ((spcpc & SPCPC_SPARE_ENABLE) != 0 &&
80485738508SVuong Nguyen 			    (spcps & SPCPS_SPARE_DEPLOYED) != 0)
80585738508SVuong Nguyen 				nb_mode = NB_MEMORY_SPARE_RANK;
80685738508SVuong Nguyen 			spare_rank[i] = SPCPC_SPRANK(spcpc);
80785738508SVuong Nguyen 		}
80885738508SVuong Nguyen 
80985738508SVuong Nguyen 		/* The 1st dimm of a channel starts at rank 0 */
81085738508SVuong Nguyen 		start_rank = 0;
81185738508SVuong Nguyen 
81285738508SVuong Nguyen 		for (j = 0; j < nb_dimms_per_channel; j++) {
81385738508SVuong Nguyen 			dimmpp[j] = nb_ddr2_dimm_init(i, j, start_rank);
81485738508SVuong Nguyen 			if (dimmpp[j]) {
81585738508SVuong Nguyen 				nb_ndimm ++;
81685738508SVuong Nguyen 				if (label_function) {
81785738508SVuong Nguyen 					label_function->label_function(
81885738508SVuong Nguyen 					    (i * nb_dimms_per_channel) + j,
81985738508SVuong Nguyen 					    dimmpp[j]->label,
82085738508SVuong Nguyen 					    sizeof (dimmpp[j]->label));
82185738508SVuong Nguyen 				}
82285738508SVuong Nguyen 				start_rank += dimmpp[j]->nranks;
82385738508SVuong Nguyen 				/*
82485738508SVuong Nguyen 				 * add an extra rank because
82585738508SVuong Nguyen 				 * single-ranked dimm still takes on two ranks.
82685738508SVuong Nguyen 				 */
82785738508SVuong Nguyen 				if (dimmpp[j]->nranks & 0x1)
82885738508SVuong Nguyen 					start_rank++;
82985738508SVuong Nguyen 				}
83085738508SVuong Nguyen 		}
83185738508SVuong Nguyen 		dimmpp += nb_dimms_per_channel;
83285738508SVuong Nguyen 	}
83385738508SVuong Nguyen 
83485738508SVuong Nguyen 	/*
83585738508SVuong Nguyen 	 * single channel is supported.
83685738508SVuong Nguyen 	 */
83785738508SVuong Nguyen 	if (nb_ndimm > 0 && nb_ndimm <= nb_dimms_per_channel) {
83885738508SVuong Nguyen 		nb_mode = NB_MEMORY_SINGLE_CHANNEL;
83985738508SVuong Nguyen 	}
84085738508SVuong Nguyen }
84185738508SVuong Nguyen 
84285738508SVuong Nguyen static void
nb_fbd_dimms_init(find_dimm_label_t * label_function)84385738508SVuong Nguyen nb_fbd_dimms_init(find_dimm_label_t *label_function)
8449d6aa643Saf {
8459d6aa643Saf 	int i, j, k, l;
84620c794b3Sgavinm 	uint16_t mtr;
84720c794b3Sgavinm 	uint32_t mc, mca;
84820c794b3Sgavinm 	uint32_t spcpc;
84920c794b3Sgavinm 	uint8_t spcps;
85020c794b3Sgavinm 	nb_dimm_t **dimmpp;
85120c794b3Sgavinm 
85220c794b3Sgavinm 	mca = MCA_RD();
85320c794b3Sgavinm 	mc = MC_RD();
85420c794b3Sgavinm 	if (mca & MCA_SCHDIMM)  /* single-channel mode */
85520c794b3Sgavinm 		nb_mode = NB_MEMORY_SINGLE_CHANNEL;
85620c794b3Sgavinm 	else if ((mc & MC_MIRROR) != 0) /* mirror mode */
85720c794b3Sgavinm 		nb_mode = NB_MEMORY_MIRROR;
85820c794b3Sgavinm 	else
85920c794b3Sgavinm 		nb_mode = NB_MEMORY_NORMAL;
86030cfc677SAdrian Frost 	nb_dimm_slots = nb_number_memory_controllers * 2 * nb_dimms_per_channel;
86120c794b3Sgavinm 	nb_dimms = (nb_dimm_t **)kmem_zalloc(sizeof (nb_dimm_t *) *
86230cfc677SAdrian Frost 	    nb_dimm_slots, KM_SLEEP);
86320c794b3Sgavinm 	dimmpp = nb_dimms;
86420c794b3Sgavinm 	for (i = 0; i < nb_number_memory_controllers; i++) {
86520c794b3Sgavinm 		if (nb_mode == NB_MEMORY_NORMAL) {
86620c794b3Sgavinm 			spcpc = SPCPC_RD(i);
86720c794b3Sgavinm 			spcps = SPCPS_RD(i);
86820c794b3Sgavinm 			if ((spcpc & SPCPC_SPARE_ENABLE) != 0 &&
86920c794b3Sgavinm 			    (spcps & SPCPS_SPARE_DEPLOYED) != 0)
87020c794b3Sgavinm 				nb_mode = NB_MEMORY_SPARE_RANK;
87120c794b3Sgavinm 			spare_rank[i] = SPCPC_SPRANK(spcpc);
87220c794b3Sgavinm 		}
87320c794b3Sgavinm 		for (j = 0; j < nb_dimms_per_channel; j++) {
87420c794b3Sgavinm 			mtr = MTR_RD(i, j);
87520c794b3Sgavinm 			k = i * 2;
87685738508SVuong Nguyen 			dimmpp[j] = nb_fbd_dimm_init(k, j, mtr);
87720c794b3Sgavinm 			if (dimmpp[j]) {
87820c794b3Sgavinm 				nb_ndimm ++;
8799d6aa643Saf 				if (label_function) {
8809d6aa643Saf 					label_function->label_function(
8819d6aa643Saf 					    (k * nb_dimms_per_channel) + j,
8829d6aa643Saf 					    dimmpp[j]->label,
8839d6aa643Saf 					    sizeof (dimmpp[j]->label));
8849d6aa643Saf 				}
88520c794b3Sgavinm 			}
88620c794b3Sgavinm 			dimmpp[j + nb_dimms_per_channel] =
88785738508SVuong Nguyen 			    nb_fbd_dimm_init(k + 1, j, mtr);
8889d6aa643Saf 			l = j + nb_dimms_per_channel;
8899d6aa643Saf 			if (dimmpp[l]) {
8909d6aa643Saf 				if (label_function) {
8919d6aa643Saf 					label_function->label_function(
8929d6aa643Saf 					    (k * nb_dimms_per_channel) + l,
8939d6aa643Saf 					    dimmpp[l]->label,
8949d6aa643Saf 					    sizeof (dimmpp[l]->label));
8959d6aa643Saf 				}
89620c794b3Sgavinm 				nb_ndimm ++;
8979d6aa643Saf 			}
89820c794b3Sgavinm 		}
89920c794b3Sgavinm 		dimmpp += nb_dimms_per_channel * 2;
90020c794b3Sgavinm 	}
90185738508SVuong Nguyen }
90285738508SVuong Nguyen 
90385738508SVuong Nguyen static void
nb_dimms_init(find_dimm_label_t * label_function)90485738508SVuong Nguyen nb_dimms_init(find_dimm_label_t *label_function)
90585738508SVuong Nguyen {
90685738508SVuong Nguyen 	if (nb_chipset == INTEL_NB_5100)
90785738508SVuong Nguyen 		nb_ddr2_dimms_init(label_function);
90885738508SVuong Nguyen 	else
90985738508SVuong Nguyen 		nb_fbd_dimms_init(label_function);
91085738508SVuong Nguyen 
9119d6aa643Saf 	if (label_function == NULL)
9129d6aa643Saf 		nb_smbios();
91320c794b3Sgavinm }
91420c794b3Sgavinm 
9153221df98SKrishna Elango /* Setup the ESI port registers to enable SERR for southbridge */
91620c794b3Sgavinm static void
nb_pex_init()91720c794b3Sgavinm nb_pex_init()
91820c794b3Sgavinm {
9193221df98SKrishna Elango 	int i = 0; /* ESI port */
9203221df98SKrishna Elango 	uint16_t regw;
9213221df98SKrishna Elango 
9223221df98SKrishna Elango 	emask_uncor_pex[i] = EMASK_UNCOR_PEX_RD(i);
9233221df98SKrishna Elango 	emask_cor_pex[i] = EMASK_COR_PEX_RD(i);
9243221df98SKrishna Elango 	emask_rp_pex[i] = EMASK_RP_PEX_RD(i);
9253221df98SKrishna Elango 	docmd_pex[i] = PEX_ERR_DOCMD_RD(i);
9263221df98SKrishna Elango 	uncerrsev[i] = UNCERRSEV_RD(i);
9273221df98SKrishna Elango 
9283221df98SKrishna Elango 	if (nb5000_reset_uncor_pex)
9293221df98SKrishna Elango 		EMASK_UNCOR_PEX_WR(i, nb5000_mask_uncor_pex);
9303221df98SKrishna Elango 	if (nb5000_reset_cor_pex)
9313221df98SKrishna Elango 		EMASK_COR_PEX_WR(i, nb5000_mask_cor_pex);
9329ff4cbe7SAdrian Frost 	if (nb_chipset == INTEL_NB_5400) {
9339ff4cbe7SAdrian Frost 		/* disable masking of ERR pins used by DOCMD */
9349ff4cbe7SAdrian Frost 		PEX_ERR_PIN_MASK_WR(i, 0x10);
9353221df98SKrishna Elango 	}
9369a12e1bdSjveta 
9373221df98SKrishna Elango 	/* RP error message (CE/NFE/FE) detect mask */
9383221df98SKrishna Elango 	EMASK_RP_PEX_WR(i, nb5000_rp_pex);
9399a12e1bdSjveta 
9403221df98SKrishna Elango 	/* Command Register - Enable SERR */
9413221df98SKrishna Elango 	regw = nb_pci_getw(0, i, 0, PCI_CONF_COMM, 0);
9423221df98SKrishna Elango 	nb_pci_putw(0, i, 0, PCI_CONF_COMM,
9433221df98SKrishna Elango 	    regw | PCI_COMM_SERR_ENABLE);
9449a12e1bdSjveta 
9453221df98SKrishna Elango 	/* Root Control Register - SERR on NFE/FE */
9463221df98SKrishna Elango 	PEXROOTCTL_WR(i, PCIE_ROOTCTL_SYS_ERR_ON_NFE_EN |
9473221df98SKrishna Elango 	    PCIE_ROOTCTL_SYS_ERR_ON_FE_EN);
9489a12e1bdSjveta 
9493221df98SKrishna Elango 	/* AER UE Mask - Mask UR */
9503221df98SKrishna Elango 	UNCERRMSK_WR(i, PCIE_AER_UCE_UR);
95120c794b3Sgavinm }
95220c794b3Sgavinm 
95320c794b3Sgavinm static void
nb_pex_fini()95420c794b3Sgavinm nb_pex_fini()
95520c794b3Sgavinm {
9563221df98SKrishna Elango 	int i = 0; /* ESI port */
95720c794b3Sgavinm 
9583221df98SKrishna Elango 	EMASK_UNCOR_PEX_WR(i, emask_uncor_pex[i]);
9593221df98SKrishna Elango 	EMASK_COR_PEX_WR(i, emask_cor_pex[i]);
9603221df98SKrishna Elango 	EMASK_RP_PEX_WR(i, emask_rp_pex[i]);
9613221df98SKrishna Elango 	PEX_ERR_DOCMD_WR(i, docmd_pex[i]);
9623221df98SKrishna Elango 
9633221df98SKrishna Elango 	if (nb5000_reset_uncor_pex)
9643221df98SKrishna Elango 		EMASK_UNCOR_PEX_WR(i, nb5000_mask_uncor_pex);
9653221df98SKrishna Elango 	if (nb5000_reset_cor_pex)
9663221df98SKrishna Elango 		EMASK_COR_PEX_WR(i, nb5000_mask_cor_pex);
96720c794b3Sgavinm }
96820c794b3Sgavinm 
96920c794b3Sgavinm void
nb_int_init()97020c794b3Sgavinm nb_int_init()
97120c794b3Sgavinm {
9729ff4cbe7SAdrian Frost 	uint32_t err0_int;
9739ff4cbe7SAdrian Frost 	uint32_t err1_int;
9749ff4cbe7SAdrian Frost 	uint32_t err2_int;
9759ff4cbe7SAdrian Frost 	uint32_t mcerr_int;
9765f28a827Saf 	uint32_t emask_int;
977f8e921e3SVuong Nguyen 	uint32_t nb_mask_bios_int;
978f8e921e3SVuong Nguyen 	uint32_t nb_mask_poll_int;
97920c794b3Sgavinm 	uint16_t stepping;
98020c794b3Sgavinm 
981f8e921e3SVuong Nguyen 	if (nb_chipset == INTEL_NB_5100) {
982f8e921e3SVuong Nguyen 		nb_mask_bios_int = nb5100_mask_bios_int;
983f8e921e3SVuong Nguyen 		nb_mask_poll_int = nb5100_mask_poll_int;
984f8e921e3SVuong Nguyen 	} else {
985f8e921e3SVuong Nguyen 		nb_mask_bios_int = nb5000_mask_bios_int;
986f8e921e3SVuong Nguyen 		nb_mask_poll_int = nb5000_mask_poll_int;
987f8e921e3SVuong Nguyen 	}
98820c794b3Sgavinm 	err0_int = ERR0_INT_RD();
98920c794b3Sgavinm 	err1_int = ERR1_INT_RD();
99020c794b3Sgavinm 	err2_int = ERR2_INT_RD();
99120c794b3Sgavinm 	mcerr_int = MCERR_INT_RD();
99220c794b3Sgavinm 	emask_int = EMASK_INT_RD();
99320c794b3Sgavinm 
99420c794b3Sgavinm 	nb_err0_int = err0_int;
99520c794b3Sgavinm 	nb_err1_int = err1_int;
99620c794b3Sgavinm 	nb_err2_int = err2_int;
99720c794b3Sgavinm 	nb_mcerr_int = mcerr_int;
99820c794b3Sgavinm 	nb_emask_int = emask_int;
99920c794b3Sgavinm 
10009ff4cbe7SAdrian Frost 	ERR0_INT_WR(ERR_INT_ALL);
10019ff4cbe7SAdrian Frost 	ERR1_INT_WR(ERR_INT_ALL);
10029ff4cbe7SAdrian Frost 	ERR2_INT_WR(ERR_INT_ALL);
10039ff4cbe7SAdrian Frost 	MCERR_INT_WR(ERR_INT_ALL);
10049ff4cbe7SAdrian Frost 	EMASK_INT_WR(ERR_INT_ALL);
100520c794b3Sgavinm 
1006f8e921e3SVuong Nguyen 	mcerr_int &= ~nb_mask_bios_int;
1007f8e921e3SVuong Nguyen 	mcerr_int |= nb_mask_bios_int & (~err0_int | ~err1_int | ~err2_int);
1008f8e921e3SVuong Nguyen 	mcerr_int |= nb_mask_poll_int;
1009f8e921e3SVuong Nguyen 	err0_int |= nb_mask_poll_int;
1010f8e921e3SVuong Nguyen 	err1_int |= nb_mask_poll_int;
1011f8e921e3SVuong Nguyen 	err2_int |= nb_mask_poll_int;
101220c794b3Sgavinm 
101320c794b3Sgavinm 	l_mcerr_int = mcerr_int;
101420c794b3Sgavinm 	ERR0_INT_WR(err0_int);
101520c794b3Sgavinm 	ERR1_INT_WR(err1_int);
101620c794b3Sgavinm 	ERR2_INT_WR(err2_int);
101720c794b3Sgavinm 	MCERR_INT_WR(mcerr_int);
101820c794b3Sgavinm 	if (nb5000_reset_emask_int) {
101920c794b3Sgavinm 		if (nb_chipset == INTEL_NB_7300) {
102020c794b3Sgavinm 			stepping = NB5000_STEPPING();
102120c794b3Sgavinm 			if (stepping == 0)
10225f28a827Saf 				EMASK_5000_INT_WR(nb7300_emask_int_step0);
102320c794b3Sgavinm 			else
10245f28a827Saf 				EMASK_5000_INT_WR(nb7300_emask_int);
10255f28a827Saf 		} else if (nb_chipset == INTEL_NB_5400) {
10265f28a827Saf 			EMASK_5400_INT_WR(nb5400_emask_int |
10275f28a827Saf 			    (emask_int & EMASK_INT_RES));
1028f8e921e3SVuong Nguyen 		} else if (nb_chipset == INTEL_NB_5100) {
1029f8e921e3SVuong Nguyen 			EMASK_5000_INT_WR(nb5100_emask_int);
103020c794b3Sgavinm 		} else {
10315f28a827Saf 			EMASK_5000_INT_WR(nb5000_emask_int);
103220c794b3Sgavinm 		}
103320c794b3Sgavinm 	} else {
103420c794b3Sgavinm 		EMASK_INT_WR(nb_emask_int);
103520c794b3Sgavinm 	}
103620c794b3Sgavinm }
103720c794b3Sgavinm 
103820c794b3Sgavinm void
nb_int_fini()103920c794b3Sgavinm nb_int_fini()
104020c794b3Sgavinm {
10419ff4cbe7SAdrian Frost 	ERR0_INT_WR(ERR_INT_ALL);
10429ff4cbe7SAdrian Frost 	ERR1_INT_WR(ERR_INT_ALL);
10439ff4cbe7SAdrian Frost 	ERR2_INT_WR(ERR_INT_ALL);
10449ff4cbe7SAdrian Frost 	MCERR_INT_WR(ERR_INT_ALL);
10459ff4cbe7SAdrian Frost 	EMASK_INT_WR(ERR_INT_ALL);
104620c794b3Sgavinm 
104720c794b3Sgavinm 	ERR0_INT_WR(nb_err0_int);
104820c794b3Sgavinm 	ERR1_INT_WR(nb_err1_int);
104920c794b3Sgavinm 	ERR2_INT_WR(nb_err2_int);
105020c794b3Sgavinm 	MCERR_INT_WR(nb_mcerr_int);
105120c794b3Sgavinm 	EMASK_INT_WR(nb_emask_int);
105220c794b3Sgavinm }
105320c794b3Sgavinm 
105420c794b3Sgavinm void
nb_int_mask_mc(uint32_t mc_mask_int)10555f28a827Saf nb_int_mask_mc(uint32_t mc_mask_int)
105620c794b3Sgavinm {
10575f28a827Saf 	uint32_t emask_int;
105820c794b3Sgavinm 
105920c794b3Sgavinm 	emask_int = MCERR_INT_RD();
106020c794b3Sgavinm 	if ((emask_int & mc_mask_int) != mc_mask_int) {
106120c794b3Sgavinm 		MCERR_INT_WR(emask_int|mc_mask_int);
106220c794b3Sgavinm 		nb_mask_mc_set = 1;
106320c794b3Sgavinm 	}
106420c794b3Sgavinm }
106520c794b3Sgavinm 
106685738508SVuong Nguyen static void
nb_fbd_init()106720c794b3Sgavinm nb_fbd_init()
106820c794b3Sgavinm {
106920c794b3Sgavinm 	uint32_t err0_fbd;
107020c794b3Sgavinm 	uint32_t err1_fbd;
107120c794b3Sgavinm 	uint32_t err2_fbd;
107220c794b3Sgavinm 	uint32_t mcerr_fbd;
107320c794b3Sgavinm 	uint32_t emask_fbd;
10745f28a827Saf 	uint32_t emask_bios_fbd;
10755f28a827Saf 	uint32_t emask_poll_fbd;
107620c794b3Sgavinm 
107720c794b3Sgavinm 	err0_fbd = ERR0_FBD_RD();
107820c794b3Sgavinm 	err1_fbd = ERR1_FBD_RD();
107920c794b3Sgavinm 	err2_fbd = ERR2_FBD_RD();
108020c794b3Sgavinm 	mcerr_fbd = MCERR_FBD_RD();
108120c794b3Sgavinm 	emask_fbd = EMASK_FBD_RD();
108220c794b3Sgavinm 
108320c794b3Sgavinm 	nb_err0_fbd = err0_fbd;
108420c794b3Sgavinm 	nb_err1_fbd = err1_fbd;
108520c794b3Sgavinm 	nb_err2_fbd = err2_fbd;
108620c794b3Sgavinm 	nb_mcerr_fbd = mcerr_fbd;
108720c794b3Sgavinm 	nb_emask_fbd = emask_fbd;
108820c794b3Sgavinm 
108920c794b3Sgavinm 	ERR0_FBD_WR(0xffffffff);
109020c794b3Sgavinm 	ERR1_FBD_WR(0xffffffff);
109120c794b3Sgavinm 	ERR2_FBD_WR(0xffffffff);
109220c794b3Sgavinm 	MCERR_FBD_WR(0xffffffff);
109320c794b3Sgavinm 	EMASK_FBD_WR(0xffffffff);
109420c794b3Sgavinm 
1095f8e921e3SVuong Nguyen 	if (nb_chipset == INTEL_NB_7300) {
1096f8e921e3SVuong Nguyen 		if (nb_mode == NB_MEMORY_MIRROR) {
1097f8e921e3SVuong Nguyen 			/* MCH 7300 errata 34 */
1098f8e921e3SVuong Nguyen 			emask_bios_fbd = nb7300_mask_bios_fbd & ~EMASK_FBD_M23;
1099f8e921e3SVuong Nguyen 			emask_poll_fbd = nb7300_mask_poll_fbd;
1100f8e921e3SVuong Nguyen 			mcerr_fbd |= EMASK_FBD_M23;
1101f8e921e3SVuong Nguyen 		} else {
1102f8e921e3SVuong Nguyen 			emask_bios_fbd = nb7300_mask_bios_fbd;
1103f8e921e3SVuong Nguyen 			emask_poll_fbd = nb7300_mask_poll_fbd;
1104f8e921e3SVuong Nguyen 		}
11055f28a827Saf 	} else if (nb_chipset == INTEL_NB_5400) {
11065f28a827Saf 		emask_bios_fbd = nb5400_mask_bios_fbd;
11075f28a827Saf 		emask_poll_fbd = nb5400_mask_poll_fbd;
11085f28a827Saf 	} else {
11095f28a827Saf 		emask_bios_fbd = nb5000_mask_bios_fbd;
11105f28a827Saf 		emask_poll_fbd = nb5000_mask_poll_fbd;
111120c794b3Sgavinm 	}
11125f28a827Saf 	mcerr_fbd &= ~emask_bios_fbd;
11135f28a827Saf 	mcerr_fbd |= emask_bios_fbd & (~err0_fbd | ~err1_fbd | ~err2_fbd);
11145f28a827Saf 	mcerr_fbd |= emask_poll_fbd;
11155f28a827Saf 	err0_fbd |= emask_poll_fbd;
11165f28a827Saf 	err1_fbd |= emask_poll_fbd;
11175f28a827Saf 	err2_fbd |= emask_poll_fbd;
111820c794b3Sgavinm 
111920c794b3Sgavinm 	l_mcerr_fbd = mcerr_fbd;
112020c794b3Sgavinm 	ERR0_FBD_WR(err0_fbd);
112120c794b3Sgavinm 	ERR1_FBD_WR(err1_fbd);
112220c794b3Sgavinm 	ERR2_FBD_WR(err2_fbd);
112320c794b3Sgavinm 	MCERR_FBD_WR(mcerr_fbd);
11245f28a827Saf 	if (nb5000_reset_emask_fbd) {
11255f28a827Saf 		if (nb_chipset == INTEL_NB_5400)
11265f28a827Saf 			EMASK_FBD_WR(nb5400_emask_fbd);
11275f28a827Saf 		else
11285f28a827Saf 			EMASK_FBD_WR(nb5000_emask_fbd);
11295f28a827Saf 	} else {
113020c794b3Sgavinm 		EMASK_FBD_WR(nb_emask_fbd);
11315f28a827Saf 	}
113220c794b3Sgavinm }
113320c794b3Sgavinm 
113420c794b3Sgavinm void
nb_fbd_mask_mc(uint32_t mc_mask_fbd)113520c794b3Sgavinm nb_fbd_mask_mc(uint32_t mc_mask_fbd)
113620c794b3Sgavinm {
113720c794b3Sgavinm 	uint32_t emask_fbd;
113820c794b3Sgavinm 
113920c794b3Sgavinm 	emask_fbd = MCERR_FBD_RD();
114020c794b3Sgavinm 	if ((emask_fbd & mc_mask_fbd) != mc_mask_fbd) {
114120c794b3Sgavinm 		MCERR_FBD_WR(emask_fbd|mc_mask_fbd);
114220c794b3Sgavinm 		nb_mask_mc_set = 1;
114320c794b3Sgavinm 	}
114420c794b3Sgavinm }
114520c794b3Sgavinm 
114685738508SVuong Nguyen static void
nb_fbd_fini()114720c794b3Sgavinm nb_fbd_fini()
114820c794b3Sgavinm {
114920c794b3Sgavinm 	ERR0_FBD_WR(0xffffffff);
115020c794b3Sgavinm 	ERR1_FBD_WR(0xffffffff);
115120c794b3Sgavinm 	ERR2_FBD_WR(0xffffffff);
115220c794b3Sgavinm 	MCERR_FBD_WR(0xffffffff);
115320c794b3Sgavinm 	EMASK_FBD_WR(0xffffffff);
115420c794b3Sgavinm 
115520c794b3Sgavinm 	ERR0_FBD_WR(nb_err0_fbd);
115620c794b3Sgavinm 	ERR1_FBD_WR(nb_err1_fbd);
115720c794b3Sgavinm 	ERR2_FBD_WR(nb_err2_fbd);
115820c794b3Sgavinm 	MCERR_FBD_WR(nb_mcerr_fbd);
115920c794b3Sgavinm 	EMASK_FBD_WR(nb_emask_fbd);
116020c794b3Sgavinm }
116120c794b3Sgavinm 
116285738508SVuong Nguyen static void
nb_mem_init()116385738508SVuong Nguyen nb_mem_init()
116485738508SVuong Nguyen {
116585738508SVuong Nguyen 	uint32_t err0_mem;
116685738508SVuong Nguyen 	uint32_t err1_mem;
116785738508SVuong Nguyen 	uint32_t err2_mem;
116885738508SVuong Nguyen 	uint32_t mcerr_mem;
116985738508SVuong Nguyen 	uint32_t emask_mem;
117085738508SVuong Nguyen 	uint32_t emask_poll_mem;
117185738508SVuong Nguyen 
117285738508SVuong Nguyen 	err0_mem = ERR0_MEM_RD();
117385738508SVuong Nguyen 	err1_mem = ERR1_MEM_RD();
117485738508SVuong Nguyen 	err2_mem = ERR2_MEM_RD();
117585738508SVuong Nguyen 	mcerr_mem = MCERR_MEM_RD();
117685738508SVuong Nguyen 	emask_mem = EMASK_MEM_RD();
117785738508SVuong Nguyen 
117885738508SVuong Nguyen 	nb_err0_mem = err0_mem;
117985738508SVuong Nguyen 	nb_err1_mem = err1_mem;
118085738508SVuong Nguyen 	nb_err2_mem = err2_mem;
118185738508SVuong Nguyen 	nb_mcerr_mem = mcerr_mem;
118285738508SVuong Nguyen 	nb_emask_mem = emask_mem;
118385738508SVuong Nguyen 
118485738508SVuong Nguyen 	ERR0_MEM_WR(0xffffffff);
118585738508SVuong Nguyen 	ERR1_MEM_WR(0xffffffff);
118685738508SVuong Nguyen 	ERR2_MEM_WR(0xffffffff);
118785738508SVuong Nguyen 	MCERR_MEM_WR(0xffffffff);
118885738508SVuong Nguyen 	EMASK_MEM_WR(0xffffffff);
118985738508SVuong Nguyen 
119085738508SVuong Nguyen 	emask_poll_mem = nb5100_mask_poll_mem;
119185738508SVuong Nguyen 	mcerr_mem |= emask_poll_mem;
119285738508SVuong Nguyen 	err0_mem |= emask_poll_mem;
119385738508SVuong Nguyen 	err1_mem |= emask_poll_mem;
119485738508SVuong Nguyen 	err2_mem |= emask_poll_mem;
119585738508SVuong Nguyen 
119685738508SVuong Nguyen 	l_mcerr_mem = mcerr_mem;
119785738508SVuong Nguyen 	ERR0_MEM_WR(err0_mem);
119885738508SVuong Nguyen 	ERR1_MEM_WR(err1_mem);
119985738508SVuong Nguyen 	ERR2_MEM_WR(err2_mem);
120085738508SVuong Nguyen 	MCERR_MEM_WR(mcerr_mem);
120185738508SVuong Nguyen 	if (nb5100_reset_emask_mem) {
120285738508SVuong Nguyen 		EMASK_MEM_WR(~nb5100_mask_poll_mem);
120385738508SVuong Nguyen 	} else {
120485738508SVuong Nguyen 		EMASK_MEM_WR(nb_emask_mem);
120585738508SVuong Nguyen 	}
120685738508SVuong Nguyen }
120785738508SVuong Nguyen 
120885738508SVuong Nguyen void
nb_mem_mask_mc(uint32_t mc_mask_mem)120985738508SVuong Nguyen nb_mem_mask_mc(uint32_t mc_mask_mem)
121085738508SVuong Nguyen {
121185738508SVuong Nguyen 	uint32_t emask_mem;
121285738508SVuong Nguyen 
121385738508SVuong Nguyen 	emask_mem = MCERR_MEM_RD();
121485738508SVuong Nguyen 	if ((emask_mem & mc_mask_mem) != mc_mask_mem) {
121585738508SVuong Nguyen 		MCERR_MEM_WR(emask_mem|mc_mask_mem);
121685738508SVuong Nguyen 		nb_mask_mc_set = 1;
121785738508SVuong Nguyen 	}
121885738508SVuong Nguyen }
121985738508SVuong Nguyen 
122085738508SVuong Nguyen static void
nb_mem_fini()122185738508SVuong Nguyen nb_mem_fini()
122285738508SVuong Nguyen {
122385738508SVuong Nguyen 	ERR0_MEM_WR(0xffffffff);
122485738508