1507c3241Smlf /* 2507c3241Smlf * CDDL HEADER START 3507c3241Smlf * 4507c3241Smlf * The contents of this file are subject to the terms of the 5507c3241Smlf * Common Development and Distribution License (the "License"). 6507c3241Smlf * You may not use this file except in compliance with the License. 7507c3241Smlf * 8507c3241Smlf * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9507c3241Smlf * or http://www.opensolaris.org/os/licensing. 10507c3241Smlf * See the License for the specific language governing permissions 11507c3241Smlf * and limitations under the License. 12507c3241Smlf * 13507c3241Smlf * When distributing Covered Code, include this CDDL HEADER in each 14507c3241Smlf * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15507c3241Smlf * If applicable, add the following below this CDDL HEADER, with the 16507c3241Smlf * fields enclosed by brackets "[]" replaced with your own identifying 17507c3241Smlf * information: Portions Copyright [yyyy] [name of copyright owner] 18507c3241Smlf * 19507c3241Smlf * CDDL HEADER END 20507c3241Smlf */ 21507c3241Smlf 22507c3241Smlf /* 23c8531848Syt * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 24507c3241Smlf * Use is subject to license terms. 25507c3241Smlf */ 26507c3241Smlf 27507c3241Smlf #ifndef _ATA_COMMON_H 28507c3241Smlf #define _ATA_COMMON_H 29507c3241Smlf 30507c3241Smlf #ifdef __cplusplus 31507c3241Smlf extern "C" { 32507c3241Smlf #endif 33507c3241Smlf 34507c3241Smlf #include <sys/varargs.h> 35507c3241Smlf 36507c3241Smlf #include <sys/scsi/scsi.h> 37507c3241Smlf #include <sys/dktp/dadkio.h> 38507c3241Smlf #include <sys/dktp/dadev.h> 39507c3241Smlf #include <sys/dkio.h> 40507c3241Smlf #include <sys/dktp/tgdk.h> 41507c3241Smlf 42507c3241Smlf #include <sys/ddi.h> 43507c3241Smlf #include <sys/sunddi.h> 44507c3241Smlf 45507c3241Smlf #include "ghd.h" 46507c3241Smlf 47507c3241Smlf #include "pciide.h" 48507c3241Smlf #include "ata_cmd.h" 49507c3241Smlf #include "ata_fsm.h" 50507c3241Smlf #include "ata_debug.h" 51507c3241Smlf 52507c3241Smlf 53507c3241Smlf /* 54507c3241Smlf * device types 55507c3241Smlf */ 56507c3241Smlf #define ATA_DEV_NONE 0 57507c3241Smlf #define ATA_DEV_DISK 1 58507c3241Smlf #define ATA_DEV_ATAPI 2 59507c3241Smlf 60507c3241Smlf /* 61507c3241Smlf * Largest sector allowed in 28 bit mode 62507c3241Smlf */ 63507c3241Smlf #define MAX_28BIT_CAPACITY 0xfffffff 64507c3241Smlf 650f2c99a4Syt /* 660f2c99a4Syt * Largest sector count allowed for device firmware file in one command. 670f2c99a4Syt */ 680f2c99a4Syt #define MAX_FWFILE_SIZE_ONECMD 0xffff 69507c3241Smlf 70507c3241Smlf /* 71507c3241Smlf * ata-options property configuration bits 72507c3241Smlf */ 73507c3241Smlf 74507c3241Smlf #define ATA_OPTIONS_DMA 0x01 75507c3241Smlf 760f2c99a4Syt #define ATAPRT(fmt) ghd_err fmt 77507c3241Smlf 78507c3241Smlf /* ad_flags (per-drive) */ 79507c3241Smlf 80507c3241Smlf #define AD_ATAPI 0x01 /* is an ATAPI drive */ 81507c3241Smlf #define AD_DISK 0x02 82507c3241Smlf #define AD_MUTEX_INIT 0x04 83507c3241Smlf #define AD_NO_CDB_INTR 0x20 84507c3241Smlf #define AD_1SECTOR 0x40 85507c3241Smlf #define AD_INT13LBA 0x80 /* supports LBA at Int13 interface */ 86507c3241Smlf #define AD_NORVRT 0x100 /* block revert-to-defaults */ 87507c3241Smlf #define AD_EXT48 0x200 /* 48 bit (extended) LBA */ 88*8c112d45SColin Yi #define AD_BLLBA48 0x400 89507c3241Smlf #define ATAPIDRV(X) ((X)->ad_flags & AD_ATAPI) 90507c3241Smlf 91507c3241Smlf 92507c3241Smlf /* max targets and luns */ 93507c3241Smlf 94507c3241Smlf #define ATA_MAXTARG 2 95507c3241Smlf #define ATA_MAXLUN 16 96507c3241Smlf 97507c3241Smlf /* 98507c3241Smlf * PCI-IDE Bus Mastering Scatter/Gather list size 99507c3241Smlf */ 100507c3241Smlf #define ATA_DMA_NSEGS 17 /* enough for at least 64K */ 101507c3241Smlf 102507c3241Smlf /* 103507c3241Smlf * Controller port address defaults 104507c3241Smlf */ 105507c3241Smlf #define ATA_BASE0 0x1f0 106507c3241Smlf #define ATA_BASE1 0x170 107507c3241Smlf 108507c3241Smlf /* 109507c3241Smlf * port offsets from base address ioaddr1 110507c3241Smlf */ 111507c3241Smlf #define AT_DATA 0x00 /* data register */ 112507c3241Smlf #define AT_ERROR 0x01 /* error register (read) */ 113507c3241Smlf #define AT_FEATURE 0x01 /* features (write) */ 114507c3241Smlf #define AT_COUNT 0x02 /* sector count */ 115507c3241Smlf #define AT_SECT 0x03 /* sector number */ 116507c3241Smlf #define AT_LCYL 0x04 /* cylinder low byte */ 117507c3241Smlf #define AT_HCYL 0x05 /* cylinder high byte */ 118507c3241Smlf #define AT_DRVHD 0x06 /* drive/head register */ 119507c3241Smlf #define AT_STATUS 0x07 /* status/command register */ 120507c3241Smlf #define AT_CMD 0x07 /* status/command register */ 121507c3241Smlf 122507c3241Smlf /* 123507c3241Smlf * port offsets from base address ioaddr2 124507c3241Smlf */ 125507c3241Smlf #define AT_ALTSTATUS 0x00 /* alternate status (read) */ 126507c3241Smlf #define AT_DEVCTL 0x00 /* device control (write) */ 127507c3241Smlf 128507c3241Smlf /* Device control register */ 129507c3241Smlf #define ATDC_NIEN 0x02 /* disable interrupts */ 130507c3241Smlf #define ATDC_SRST 0x04 /* controller reset */ 131507c3241Smlf #define ATDC_D3 0x08 /* Mysterious bit, must be set */ 132507c3241Smlf /* 133507c3241Smlf * ATA-6 spec 134507c3241Smlf * In 48-bit addressing, reading the LBA location and count 135507c3241Smlf * registers when the high-order bit is set reads the "previous 136507c3241Smlf * content" (LBA bits 47:24, count bits 15:8) instead of the 137507c3241Smlf * "most recent" values (LBA bits 23:0, count bits 7:0). 138507c3241Smlf */ 139507c3241Smlf #define ATDC_HOB 0x80 /* High order bit */ 140507c3241Smlf 141507c3241Smlf /* 142507c3241Smlf * Status bits from AT_STATUS register 143507c3241Smlf */ 144507c3241Smlf #define ATS_BSY 0x80 /* controller busy */ 145507c3241Smlf #define ATS_DRDY 0x40 /* drive ready */ 146507c3241Smlf #define ATS_DF 0x20 /* device fault */ 147507c3241Smlf #define ATS_DSC 0x10 /* seek operation complete */ 148507c3241Smlf #define ATS_DRQ 0x08 /* data request */ 149507c3241Smlf #define ATS_CORR 0x04 /* ECC correction applied */ 150507c3241Smlf #define ATS_IDX 0x02 /* disk revolution index */ 151507c3241Smlf #define ATS_ERR 0x01 /* error flag */ 152507c3241Smlf 153507c3241Smlf /* 154507c3241Smlf * Status bits from AT_ERROR register 155507c3241Smlf */ 156507c3241Smlf #define ATE_BBK_ICRC 0x80 /* bad block detected in ATA-1 */ 157507c3241Smlf /* ICRC error in ATA-4 and newer */ 158507c3241Smlf #define ATE_UNC 0x40 /* uncorrectable data error */ 159507c3241Smlf #define ATE_MC 0x20 /* Media change */ 160507c3241Smlf #define ATE_IDNF 0x10 /* ID not found */ 161507c3241Smlf #define ATE_MCR 0x08 /* media change request */ 162507c3241Smlf #define ATE_ABORT 0x04 /* aborted command */ 163507c3241Smlf #define ATE_TKONF 0x02 /* track 0 not found */ 164507c3241Smlf #define ATE_AMNF 0x01 /* address mark not found */ 165507c3241Smlf 166507c3241Smlf #define ATE_NM 0x02 /* no media */ 167507c3241Smlf 168507c3241Smlf /* 169507c3241Smlf * Drive selectors for AT_DRVHD register 170507c3241Smlf */ 171507c3241Smlf #define ATDH_LBA 0x40 /* addressing in LBA mode not chs */ 172507c3241Smlf #define ATDH_DRIVE0 0xa0 /* or into AT_DRVHD to select drive 0 */ 173507c3241Smlf #define ATDH_DRIVE1 0xb0 /* or into AT_DRVHD to select drive 1 */ 174507c3241Smlf 175507c3241Smlf /* 176507c3241Smlf * Feature register bits 177507c3241Smlf */ 178507c3241Smlf #define ATF_ATAPI_DMA 0x01 /* ATAPI DMA enable bit */ 179c8531848Syt #define ATF_XFRMOD_MDMA 0x20 /* Multi-Word DMA mode */ 1802df1fe9cSrandyf #define ATF_XFRMOD_UDMA 0x40 /* Ultra DMA mode */ 1812df1fe9cSrandyf #define ATACM_UDMA_SEL(id) (((id)->ai_ultradma >> 8) & 0x7f) 1822df1fe9cSrandyf 1832df1fe9cSrandyf /* 1842df1fe9cSrandyf * Set feature register definitions. 1852df1fe9cSrandyf */ 1862df1fe9cSrandyf #define ATSF_SET_XFRMOD 0X03 /* Set transfer mode */ 1872df1fe9cSrandyf #define ATSF_DIS_REVPOD 0x66 /* Disable reverting to power on defaults */ 1882df1fe9cSrandyf #define ATSF_ENA_REVPOD 0xcc /* Enable reverting to power on defaults */ 189507c3241Smlf 190507c3241Smlf /* 191507c3241Smlf * common bits and options for set features (ATC_SET_FEAT) 192507c3241Smlf */ 193507c3241Smlf #define FC_WRITE_CACHE_ON 0x02 194507c3241Smlf #define FC_WRITE_CACHE_OFF 0x82 195507c3241Smlf 196507c3241Smlf /* Test which version of ATA is supported */ 197507c3241Smlf #define IS_ATA_VERSION_SUPPORTED(idp, n) \ 198507c3241Smlf ((idp->ai_majorversion != 0xffff) && \ 199507c3241Smlf (idp->ai_majorversion & (1<<n))) 200507c3241Smlf 201507c3241Smlf /* Test if supported version >= ATA-n */ 202507c3241Smlf #define IS_ATA_VERSION_GE(idp, n) \ 203507c3241Smlf ((idp->ai_majorversion != 0xffff) && \ 204507c3241Smlf (idp->ai_majorversion != 0) && \ 205507c3241Smlf (idp->ai_majorversion >= (1<<n))) 206507c3241Smlf 207507c3241Smlf /* Test whether a device is a CD drive */ 208507c3241Smlf #define IS_CDROM(dp) \ 209507c3241Smlf ((dp->ad_flags & AD_ATAPI) && \ 210507c3241Smlf ((dp->ad_id.ai_config >> 8) & DTYPE_MASK) == \ 211507c3241Smlf DTYPE_RODIRECT) 212507c3241Smlf 213507c3241Smlf /* macros from old common hba code */ 214507c3241Smlf 215507c3241Smlf #define ATA_INTPROP(devi, pname, pval, plen) \ 216507c3241Smlf (ddi_prop_op(DDI_DEV_T_ANY, (devi), PROP_LEN_AND_VAL_BUF, \ 217507c3241Smlf DDI_PROP_DONTPASS, (pname), (caddr_t)(pval), (plen))) 218507c3241Smlf 219507c3241Smlf #define ATA_LONGPROP(devi, pname, pval, plen) \ 220507c3241Smlf (ddi_getlongprop(DDI_DEV_T_ANY, (devi), DDI_PROP_DONTPASS, \ 221507c3241Smlf (pname), (caddr_t)(pval), (plen))) 222507c3241Smlf 223507c3241Smlf /* 224507c3241Smlf * 225507c3241Smlf * per-controller soft-state data structure 226507c3241Smlf * 227507c3241Smlf */ 228507c3241Smlf 229507c3241Smlf #define CTL2DRV(cp, t, l) (cp->ac_drvp[t][l]) 230507c3241Smlf 231507c3241Smlf typedef struct ata_ctl { 232507c3241Smlf 233507c3241Smlf dev_info_t *ac_dip; 234507c3241Smlf uint_t ac_flags; 235507c3241Smlf uint_t ac_timing_flags; 236507c3241Smlf struct ata_drv *ac_drvp[ATA_MAXTARG][ATA_MAXLUN]; 237507c3241Smlf int ac_max_transfer; /* max transfer in sectors */ 238507c3241Smlf uint_t ac_standby_time; /* timer value seconds */ 239507c3241Smlf 240507c3241Smlf ccc_t ac_ccc; /* for GHD module */ 241507c3241Smlf struct ata_drv *ac_active_drvp; /* active drive, if any */ 242507c3241Smlf struct ata_pkt *ac_active_pktp; /* active packet, if any */ 243507c3241Smlf uchar_t ac_state; 244507c3241Smlf 245507c3241Smlf scsi_hba_tran_t *ac_atapi_tran; /* for atapi module */ 246507c3241Smlf 247507c3241Smlf /* 248507c3241Smlf * port addresses associated with ioaddr1 249507c3241Smlf */ 250507c3241Smlf ddi_acc_handle_t ac_iohandle1; /* DDI I/O handle */ 251507c3241Smlf caddr_t ac_ioaddr1; 252507c3241Smlf ushort_t *ac_data; /* data register */ 253507c3241Smlf uchar_t *ac_error; /* error register (read) */ 254507c3241Smlf uchar_t *ac_feature; /* features (write) */ 255507c3241Smlf uchar_t *ac_count; /* sector count */ 256507c3241Smlf uchar_t *ac_sect; /* sector number */ 257507c3241Smlf uchar_t *ac_lcyl; /* cylinder low byte */ 258507c3241Smlf uchar_t *ac_hcyl; /* cylinder high byte */ 259507c3241Smlf uchar_t *ac_drvhd; /* drive/head register */ 260507c3241Smlf uchar_t *ac_status; /* status/command register */ 261507c3241Smlf uchar_t *ac_cmd; /* status/command register */ 262507c3241Smlf 263507c3241Smlf /* 264507c3241Smlf * port addresses associated with ioaddr2 265507c3241Smlf */ 266507c3241Smlf ddi_acc_handle_t ac_iohandle2; /* DDI I/O handle */ 267507c3241Smlf caddr_t ac_ioaddr2; 268507c3241Smlf uchar_t *ac_altstatus; /* alternate status (read) */ 269507c3241Smlf uchar_t *ac_devctl; /* device control (write) */ 270507c3241Smlf 271507c3241Smlf /* 272507c3241Smlf * handle and port addresss for PCI-IDE Bus Master controller 273507c3241Smlf */ 274507c3241Smlf ddi_acc_handle_t ac_bmhandle; /* DDI I/O handle */ 275507c3241Smlf caddr_t ac_bmaddr; /* base addr of Bus Master Regs */ 276507c3241Smlf uchar_t ac_pciide; /* PCI-IDE device */ 277507c3241Smlf uchar_t ac_pciide_bm; /* Bus Mastering PCI-IDE device */ 278507c3241Smlf 279507c3241Smlf /* 280507c3241Smlf * Scatter/Gather list for PCI-IDE Bus Mastering controllers 281507c3241Smlf */ 282507c3241Smlf caddr_t ac_sg_list; /* virtual addr of S/G list */ 283507c3241Smlf paddr_t ac_sg_paddr; /* phys addr of S/G list */ 284507c3241Smlf ddi_acc_handle_t ac_sg_acc_handle; 285507c3241Smlf ddi_dma_handle_t ac_sg_handle; 286507c3241Smlf 287507c3241Smlf /* 288507c3241Smlf * data for managing ARQ on ATAPI devices 289507c3241Smlf */ 290507c3241Smlf struct ata_pkt *ac_arq_pktp; /* pkt for performing ATAPI ARQ */ 291507c3241Smlf struct ata_pkt *ac_fault_pktp; /* pkt that caused ARQ */ 292507c3241Smlf uchar_t ac_arq_cdb[6]; 2932df1fe9cSrandyf 2942df1fe9cSrandyf /* 2952df1fe9cSrandyf * Power Management 2962df1fe9cSrandyf */ 2972df1fe9cSrandyf int ac_pm_support; 2982df1fe9cSrandyf int ac_pm_level; 299507c3241Smlf } ata_ctl_t; 300507c3241Smlf 301507c3241Smlf /* ac_flags (per-controller) */ 302507c3241Smlf 303507c3241Smlf #define AC_GHD_INIT 0x02 304507c3241Smlf #define AC_ATAPI_INIT 0x04 305507c3241Smlf #define AC_DISK_INIT 0x08 306507c3241Smlf #define AC_ATTACHED 0x10 307507c3241Smlf #define AC_SCSI_HBA_TRAN_ALLOC 0x1000 308507c3241Smlf #define AC_SCSI_HBA_ATTACH 0x2000 309507c3241Smlf 310507c3241Smlf #define AC_BMSTATREG_PIO_BROKEN 0x80000000 311507c3241Smlf 312507c3241Smlf /* 313507c3241Smlf * Bug 1256489: 314507c3241Smlf * 315507c3241Smlf * If AC_BSY_WAIT needs to be set for laptops that do 316507c3241Smlf * suspend/resume but do not correctly wait for the busy bit to 317507c3241Smlf * drop after a resume. 318507c3241Smlf */ 319507c3241Smlf 320507c3241Smlf /* ac_timing_flags (per-controller) */ 321507c3241Smlf #define AC_BSY_WAIT 0x1 /* tweak timing in ata_start & atapi_start */ 322507c3241Smlf 323507c3241Smlf 324507c3241Smlf 325507c3241Smlf /* Identify drive data */ 326507c3241Smlf struct ata_id { 327507c3241Smlf /* WORD */ 328507c3241Smlf /* OFFSET COMMENT */ 329507c3241Smlf ushort_t ai_config; /* 0 general configuration bits */ 330507c3241Smlf ushort_t ai_fixcyls; /* 1 # of fixed cylinders */ 331507c3241Smlf ushort_t ai_resv0; /* 2 # reserved */ 332507c3241Smlf ushort_t ai_heads; /* 3 # of heads */ 333507c3241Smlf ushort_t ai_trksiz; /* 4 # of unformatted bytes/track */ 334507c3241Smlf ushort_t ai_secsiz; /* 5 # of unformatted bytes/sector */ 335507c3241Smlf ushort_t ai_sectors; /* 6 # of sectors/track */ 336507c3241Smlf ushort_t ai_resv1[3]; /* 7 "Vendor Unique" */ 337507c3241Smlf char ai_drvser[20]; /* 10 Serial number */ 338507c3241Smlf ushort_t ai_buftype; /* 20 Buffer type */ 339507c3241Smlf ushort_t ai_bufsz; /* 21 Buffer size in 512 byte incr */ 340507c3241Smlf ushort_t ai_ecc; /* 22 # of ecc bytes avail on rd/wr */ 341507c3241Smlf char ai_fw[8]; /* 23 Firmware revision */ 342507c3241Smlf char ai_model[40]; /* 27 Model # */ 343507c3241Smlf ushort_t ai_mult1; /* 47 Multiple command flags */ 344507c3241Smlf ushort_t ai_dwcap; /* 48 Doubleword capabilities */ 345507c3241Smlf ushort_t ai_cap; /* 49 Capabilities */ 346507c3241Smlf ushort_t ai_resv2; /* 50 Reserved */ 347507c3241Smlf ushort_t ai_piomode; /* 51 PIO timing mode */ 348507c3241Smlf ushort_t ai_dmamode; /* 52 DMA timing mode */ 349507c3241Smlf ushort_t ai_validinfo; /* 53 bit0: wds 54-58, bit1: 64-70 */ 350507c3241Smlf ushort_t ai_curcyls; /* 54 # of current cylinders */ 351507c3241Smlf ushort_t ai_curheads; /* 55 # of current heads */ 352507c3241Smlf ushort_t ai_cursectrk; /* 56 # of current sectors/track */ 353507c3241Smlf ushort_t ai_cursccp[2]; /* 57 current sectors capacity */ 354507c3241Smlf ushort_t ai_mult2; /* 59 multiple sectors info */ 355507c3241Smlf ushort_t ai_addrsec[2]; /* 60 LBA only: no of addr secs */ 356507c3241Smlf ushort_t ai_sworddma; /* 62 single word dma modes */ 357507c3241Smlf ushort_t ai_dworddma; /* 63 double word dma modes */ 358507c3241Smlf ushort_t ai_advpiomode; /* 64 advanced PIO modes supported */ 359507c3241Smlf ushort_t ai_minmwdma; /* 65 min multi-word dma cycle info */ 360507c3241Smlf ushort_t ai_recmwdma; /* 66 rec multi-word dma cycle info */ 361507c3241Smlf ushort_t ai_minpio; /* 67 min PIO cycle info */ 362507c3241Smlf ushort_t ai_minpioflow; /* 68 min PIO cycle info w/flow ctl */ 363507c3241Smlf ushort_t ai_resv3[2]; /* 69,70 reserved */ 364507c3241Smlf ushort_t ai_resv4[4]; /* 71-74 reserved */ 365507c3241Smlf ushort_t ai_qdepth; /* 75 queue depth */ 366507c3241Smlf ushort_t ai_resv5[4]; /* 76-79 reserved */ 367507c3241Smlf ushort_t ai_majorversion; /* 80 major versions supported */ 368507c3241Smlf ushort_t ai_minorversion; /* 81 minor version number supported */ 369507c3241Smlf ushort_t ai_cmdset82; /* 82 command set supported */ 370507c3241Smlf ushort_t ai_cmdset83; /* 83 more command sets supported */ 371507c3241Smlf ushort_t ai_cmdset84; /* 84 more command sets supported */ 372507c3241Smlf ushort_t ai_features85; /* 85 enabled features */ 373507c3241Smlf ushort_t ai_features86; /* 86 enabled features */ 374507c3241Smlf ushort_t ai_features87; /* 87 enabled features */ 375507c3241Smlf ushort_t ai_ultradma; /* 88 Ultra DMA mode */ 376507c3241Smlf ushort_t ai_erasetime; /* 89 security erase time */ 377507c3241Smlf ushort_t ai_erasetimex; /* 90 enhanced security erase time */ 378507c3241Smlf ushort_t ai_padding1[9]; /* pad through 99 */ 379507c3241Smlf ushort_t ai_addrsecxt[4]; /* 100 extended max LBA sector */ 380507c3241Smlf ushort_t ai_padding2[22]; /* pad to 126 */ 381507c3241Smlf ushort_t ai_lastlun; /* 126 last LUN, as per SFF-8070i */ 382507c3241Smlf ushort_t ai_resv6; /* 127 reserved */ 383507c3241Smlf ushort_t ai_securestatus; /* 128 security status */ 384507c3241Smlf ushort_t ai_vendor[31]; /* 129-159 vendor specific */ 385507c3241Smlf ushort_t ai_padding3[16]; /* 160 pad to 176 */ 386507c3241Smlf ushort_t ai_curmedser[30]; /* 176-205 current media serial number */ 387507c3241Smlf ushort_t ai_padding4[49]; /* 206 pad to 255 */ 388507c3241Smlf ushort_t ai_integrity; /* 255 integrity word */ 389507c3241Smlf }; 390507c3241Smlf 391507c3241Smlf /* Identify Drive: general config bits - word 0 */ 392507c3241Smlf 393507c3241Smlf #define ATA_ID_REM_DRV 0x80 394507c3241Smlf #define ATA_ID_COMPACT_FLASH 0x848a 395507c3241Smlf #define ATA_ID_CF_TO_ATA 0x040a 3960f2c99a4Syt #define ATA_ID_INCMPT 0x0004 397507c3241Smlf 398507c3241Smlf /* Identify Drive: common capability bits - word 49 */ 399507c3241Smlf 400507c3241Smlf #define ATAC_DMA_SUPPORT 0x0100 401507c3241Smlf #define ATAC_LBA_SUPPORT 0x0200 402507c3241Smlf #define ATAC_IORDY_DISABLE 0x0400 403507c3241Smlf #define ATAC_IORDY_SUPPORT 0x0800 404507c3241Smlf #define ATAC_RESERVED_IDPKT 0x1000 /* rsrvd for identify pkt dev */ 405507c3241Smlf #define ATAC_STANDBYTIMER 0x2000 406507c3241Smlf #define ATAC_ATA_TYPE_MASK 0x8001 407507c3241Smlf #define ATAC_ATA_TYPE 0x0000 408507c3241Smlf #define ATAC_ATAPI_TYPE_MASK 0xc000 409507c3241Smlf #define ATAC_ATAPI_TYPE 0x8000 410507c3241Smlf 411507c3241Smlf /* Identify Driver ai_validinfo (word 53) */ 412507c3241Smlf 413507c3241Smlf #define ATAC_VALIDINFO_83 0x0004 /* word 83 supported fields valid */ 414507c3241Smlf #define ATAC_VALIDINFO_70_64 0x0002 /* word 70:64 sup. fields valid */ 415507c3241Smlf 416507c3241Smlf /* Identify Drive: ai_dworddma (word 63) */ 417507c3241Smlf 418c8531848Syt #define ATAC_MDMA_SUP_MASK 0x0007 /* Multiword DMA supported */ 419507c3241Smlf #define ATAC_MDMA_SEL_MASK 0x0700 /* Multiword DMA selected */ 420507c3241Smlf #define ATAC_MDMA_2_SEL 0x0400 /* Multiword DMA mode 2 selected */ 421507c3241Smlf #define ATAC_MDMA_1_SEL 0x0200 /* Multiword DMA mode 1 selected */ 422507c3241Smlf #define ATAC_MDMA_0_SEL 0x0100 /* Multiword DMA mode 0 selected */ 423507c3241Smlf #define ATAC_MDMA_2_SUP 0x0004 /* Multiword DMA mode 2 supported */ 424507c3241Smlf #define ATAC_MDMA_1_SUP 0x0002 /* Multiword DMA mode 1 supported */ 425507c3241Smlf #define ATAC_MDMA_0_SUP 0x0001 /* Multiword DMA mode 0 supported */ 426507c3241Smlf 427507c3241Smlf /* Identify Drive: ai_advpiomode (word 64) */ 428507c3241Smlf 429507c3241Smlf #define ATAC_ADVPIO_4_SUP 0x0002 /* PIO mode 4 supported */ 430507c3241Smlf #define ATAC_ADVPIO_3_SUP 0x0001 /* PIO mode 3 supported */ 431507c3241Smlf #define ATAC_ADVPIO_SERIAL 0x0003 /* Serial interface */ 432507c3241Smlf 433507c3241Smlf /* Identify Drive: ai_majorversion (word 80) */ 434507c3241Smlf 4350f2c99a4Syt #define ATAC_MAJVER_8 0x0100 /* ATA/ATAPI-8 version supported */ 436507c3241Smlf #define ATAC_MAJVER_6 0x0040 /* ATA/ATAPI-6 version supported */ 437507c3241Smlf #define ATAC_MAJVER_4 0x0010 /* ATA/ATAPI-4 version supported */ 438507c3241Smlf 439507c3241Smlf /* Identify Drive: command set supported/enabled bits - words 83 and 86 */ 440507c3241Smlf 441507c3241Smlf #define ATACS_EXT48 0x0400 /* 48 bit address feature */ 442507c3241Smlf 443507c3241Smlf /* Identify Drive: ai_features85 (word 85) */ 444507c3241Smlf #define ATAC_FEATURES85_WCE 0x0020 /* write cache enabled */ 445507c3241Smlf 446c8531848Syt /* Identify Drive: ai_ultradma (word 88) */ 447c8531848Syt #define ATAC_UDMA_SUP_MASK 0x007f /* UDMA modes supported */ 448c8531848Syt #define ATAC_UDMA_SEL_MASK 0x7f00 /* UDMA modes selected */ 449c8531848Syt 450c8531848Syt 451507c3241Smlf /* per-drive data struct */ 452507c3241Smlf 453507c3241Smlf typedef struct ata_drv { 454507c3241Smlf ata_ctl_t *ad_ctlp; /* pointer back to ctlr */ 455507c3241Smlf struct ata_id ad_id; /* IDENTIFY DRIVE data */ 456507c3241Smlf 457507c3241Smlf uint_t ad_flags; 458507c3241Smlf uchar_t ad_pciide_dma; /* PCIIDE DMA supported */ 459507c3241Smlf uchar_t ad_targ; /* target */ 460507c3241Smlf uchar_t ad_lun; /* lun */ 461507c3241Smlf uchar_t ad_drive_bits; 462507c3241Smlf 463507c3241Smlf /* Used by atapi side only */ 464507c3241Smlf 465507c3241Smlf uchar_t ad_state; /* state of ATAPI FSM */ 466507c3241Smlf uchar_t ad_cdb_len; /* Size of ATAPI CDBs */ 467507c3241Smlf 468507c3241Smlf uchar_t ad_bogus_drq; 469507c3241Smlf uchar_t ad_nec_bad_status; 470507c3241Smlf 471507c3241Smlf /* Used by disk side only */ 472507c3241Smlf 473602ca9eaScth struct scsi_device *ad_device; 474507c3241Smlf struct scsi_inquiry ad_inquiry; 475507c3241Smlf struct ctl_obj ad_ctl_obj; 476507c3241Smlf uchar_t ad_rd_cmd; 477507c3241Smlf uchar_t ad_wr_cmd; 478507c3241Smlf ushort_t ad_acyl; 479507c3241Smlf 480507c3241Smlf /* 481507c3241Smlf * Geometry note: The following three values are the geometry 482507c3241Smlf * that the driver will use. They may differ from the 483507c3241Smlf * geometry reported by the controller and/or BIOS. See note 484507c3241Smlf * on ata_fix_large_disk_geometry in ata_disk.c for more 485507c3241Smlf * details. 486507c3241Smlf */ 487507c3241Smlf uint32_t ad_drvrcyl; /* number of cyls */ 488507c3241Smlf uint32_t ad_drvrhd; /* number of heads */ 489507c3241Smlf uint32_t ad_drvrsec; /* number of sectors */ 490507c3241Smlf ushort_t ad_phhd; /* number of phys heads */ 491507c3241Smlf ushort_t ad_phsec; /* number of phys sectors */ 492507c3241Smlf short ad_block_factor; 493507c3241Smlf short ad_bytes_per_block; 494507c3241Smlf 495507c3241Smlf /* 496507c3241Smlf * Support for 48-bit LBA (ATA-6) 497507c3241Smlf */ 498507c3241Smlf uint64_t ad_capacity; /* Total sectors on disk */ 4998c97a06bSAda 5008c97a06bSAda /* 5018c97a06bSAda * save/restore the DMA mode for suspend/resume 5028c97a06bSAda */ 5038c97a06bSAda ushort_t ad_dma_cap; 5048c97a06bSAda ushort_t ad_dma_mode; 505507c3241Smlf } ata_drv_t; 506507c3241Smlf 5078c97a06bSAda /* values for ad_dma_cap */ 5088c97a06bSAda #define ATA_DMA_ULTRAMODE 0x1 5098c97a06bSAda #define ATA_DMA_MWORDMODE 0x2 5108c97a06bSAda 511507c3241Smlf typedef struct ata_tgt { 512507c3241Smlf ata_drv_t *at_drvp; 513507c3241Smlf int at_arq; 514507c3241Smlf ulong_t at_total_sectors; 515507c3241Smlf ddi_dma_attr_t at_dma_attr; 516507c3241Smlf } ata_tgt_t; 517507c3241Smlf 518507c3241Smlf /* values for ad_pciide_dma */ 5195fb86baeSml #define ATA_DMA_OFF 0x0 5205fb86baeSml #define ATA_DMA_ON 0x1 5215fb86baeSml #define ATA_DMA_UNINITIALIZED 0x2 522507c3241Smlf 523507c3241Smlf /* 524507c3241Smlf * (ata_pkt_t *) to (gcmd_t *) 525507c3241Smlf */ 526507c3241Smlf #define APKT2GCMD(apktp) (apktp->ap_gcmdp) 527507c3241Smlf 528507c3241Smlf /* 529507c3241Smlf * (gcmd_t *) to (ata_pkt_t *) 530507c3241Smlf */ 531507c3241Smlf #define GCMD2APKT(gcmdp) ((ata_pkt_t *)gcmdp->cmd_private) 532507c3241Smlf 533507c3241Smlf /* 534507c3241Smlf * (gtgt_t *) to (ata_ctl_t *) 535507c3241Smlf */ 536507c3241Smlf #define GTGTP2ATAP(gtgtp) ((ata_ctl_t *)GTGTP2HBA(gtgtp)) 537507c3241Smlf 538507c3241Smlf /* 539507c3241Smlf * (gtgt_t *) to (ata_tgt_t *) 540507c3241Smlf */ 541507c3241Smlf #define GTGTP2ATATGTP(gtgtp) ((ata_tgt_t *)GTGTP2TARGET(gtgtp)) 542507c3241Smlf 543507c3241Smlf /* 544507c3241Smlf * (gtgt_t *) to (ata_drv_t *) 545507c3241Smlf */ 546507c3241Smlf #define GTGTP2ATADRVP(gtgtp) (GTGTP2ATATGTP(gtgtp)->at_drvp) 547507c3241Smlf 548507c3241Smlf /* 549507c3241Smlf * (gcmd_t *) to (ata_tgt_t *) 550507c3241Smlf */ 551507c3241Smlf #define GCMD2TGT(gcmdp) GTGTP2ATATGTP(GCMDP2GTGTP(gcmdp)) 552507c3241Smlf 553507c3241Smlf /* 554507c3241Smlf * (gcmd_t *) to (ata_drv_t *) 555507c3241Smlf */ 556507c3241Smlf #define GCMD2DRV(gcmdp) GTGTP2ATADRVP(GCMDP2GTGTP(gcmdp)) 557507c3241Smlf 558507c3241Smlf /* 559507c3241Smlf * (ata_pkt_t *) to (ata_drv_t *) 560507c3241Smlf */ 561507c3241Smlf #define APKT2DRV(apktp) GCMD2DRV(APKT2GCMD(apktp)) 562507c3241Smlf 563507c3241Smlf 564507c3241Smlf /* 565507c3241Smlf * (struct hba_tran *) to (ata_ctl_t *) 566507c3241Smlf */ 567507c3241Smlf #define TRAN2ATAP(tranp) ((ata_ctl_t *)TRAN2HBA(tranp)) 568507c3241Smlf 569507c3241Smlf 570507c3241Smlf /* 571507c3241Smlf * ata common packet structure 572507c3241Smlf */ 573507c3241Smlf typedef struct ata_pkt { 574507c3241Smlf 575507c3241Smlf gcmd_t *ap_gcmdp; /* GHD command struct */ 576507c3241Smlf 577507c3241Smlf uint_t ap_flags; /* packet flags */ 578507c3241Smlf 579507c3241Smlf caddr_t ap_baddr; /* I/O buffer base address */ 580507c3241Smlf size_t ap_boffset; /* current offset into I/O buffer */ 581507c3241Smlf size_t ap_bcount; /* # bytes in this request */ 582507c3241Smlf 583507c3241Smlf caddr_t ap_v_addr; /* I/O buffer address */ 584507c3241Smlf size_t ap_resid; /* # bytes left to read/write */ 585507c3241Smlf 586507c3241Smlf uchar_t ap_pciide_dma; /* This pkt uses DMA transfer mode */ 587507c3241Smlf prde_t ap_sg_list[ATA_DMA_NSEGS]; /* Scatter/Gather list */ 588507c3241Smlf int ap_sg_cnt; /* number of entries in S/G list */ 589507c3241Smlf 590507c3241Smlf /* command, starting sector number, sector count */ 591507c3241Smlf 592507c3241Smlf daddr_t ap_startsec; /* starting sector number */ 593507c3241Smlf ushort_t ap_count; /* sector count */ 594507c3241Smlf uchar_t ap_sec; 595507c3241Smlf uchar_t ap_lwcyl; 596507c3241Smlf uchar_t ap_hicyl; 597507c3241Smlf uchar_t ap_hd; 598507c3241Smlf uchar_t ap_cmd; 599507c3241Smlf 600507c3241Smlf /* saved status and error registers for error case */ 601507c3241Smlf 602507c3241Smlf uchar_t ap_status; 603507c3241Smlf uchar_t ap_error; 604507c3241Smlf 605507c3241Smlf /* disk/atapi callback routines */ 606507c3241Smlf 607507c3241Smlf int (*ap_start)(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, 608507c3241Smlf struct ata_pkt *ata_pktp); 609507c3241Smlf int (*ap_intr)(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, 610507c3241Smlf struct ata_pkt *ata_pktp); 611507c3241Smlf void (*ap_complete)(ata_drv_t *ata_drvp, 612507c3241Smlf struct ata_pkt *ata_pktp, int do_callback); 613507c3241Smlf 614507c3241Smlf /* Used by disk side */ 615507c3241Smlf 616507c3241Smlf char ap_cdb; /* disk command */ 617507c3241Smlf char ap_scb; /* status after disk cmd */ 618507c3241Smlf uint_t ap_bytes_per_block; /* blk mode factor */ 619507c3241Smlf uint_t ap_wrt_count; /* size of last write */ 620507c3241Smlf caddr_t ap_v_addr_sav; /* Original I/O buffer address. */ 621507c3241Smlf size_t ap_resid_sav; /* Original # of bytes */ 622507c3241Smlf /* left to read/write. */ 623507c3241Smlf 624507c3241Smlf /* Used by atapi side */ 625507c3241Smlf 626507c3241Smlf uchar_t *ap_cdbp; /* ptr to SCSI CDB */ 627507c3241Smlf uchar_t ap_cdb_len; /* length of SCSI CDB (in bytes) */ 628507c3241Smlf uchar_t ap_cdb_pad; /* padding after SCSI CDB (in shorts) */ 629507c3241Smlf 630507c3241Smlf struct scsi_arq_status *ap_scbp; /* ptr to SCSI status block */ 631507c3241Smlf uchar_t ap_statuslen; /* length of SCSI status block */ 632507c3241Smlf } ata_pkt_t; 633507c3241Smlf 634507c3241Smlf 635507c3241Smlf /* 636507c3241Smlf * defines for ap_flags 637507c3241Smlf */ 638507c3241Smlf #define AP_ATAPI 0x0001 /* device is atapi */ 639507c3241Smlf #define AP_ERROR 0x0002 /* normal error */ 640507c3241Smlf #define AP_TRAN_ERROR 0x0004 /* transport error */ 641507c3241Smlf #define AP_READ 0x0008 /* read data */ 642507c3241Smlf #define AP_WRITE 0x0010 /* write data */ 643507c3241Smlf #define AP_ABORT 0x0020 /* packet aborted */ 644507c3241Smlf #define AP_TIMEOUT 0x0040 /* packet timed out */ 645507c3241Smlf #define AP_BUS_RESET 0x0080 /* bus reset */ 646507c3241Smlf #define AP_DEV_RESET 0x0100 /* device reset */ 647507c3241Smlf 648507c3241Smlf #define AP_SENT_CMD 0x0200 /* atapi: cdb sent */ 649507c3241Smlf #define AP_XFERRED_DATA 0x0400 /* atapi: data transferred */ 650507c3241Smlf #define AP_GOT_STATUS 0x0800 /* atapi: status received */ 651507c3241Smlf #define AP_ARQ_ON_ERROR 0x1000 /* atapi: do ARQ on error */ 652507c3241Smlf #define AP_ARQ_OKAY 0x2000 653507c3241Smlf #define AP_ARQ_ERROR 0x4000 654507c3241Smlf 655507c3241Smlf #define AP_FREE 0x80000000u /* packet is free! */ 656507c3241Smlf 657507c3241Smlf 658507c3241Smlf /* 659507c3241Smlf * public function prototypes 660507c3241Smlf */ 661507c3241Smlf 662507c3241Smlf int ata_check_drive_blacklist(struct ata_id *aidp, uint_t flags); 663507c3241Smlf int ata_command(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, int expect_drdy, 664507c3241Smlf int silent, uint_t busy_wait, uchar_t cmd, uchar_t feature, 665507c3241Smlf uchar_t count, uchar_t sector, uchar_t head, uchar_t cyl_low, 666507c3241Smlf uchar_t cyl_hi); 667507c3241Smlf int ata_get_status_clear_intr(ata_ctl_t *ata_ctlp, ata_pkt_t *ata_pktp); 668507c3241Smlf int ata_id_common(uchar_t id_cmd, int drdy_expected, 669507c3241Smlf ddi_acc_handle_t io_hdl1, caddr_t ioaddr1, 670507c3241Smlf ddi_acc_handle_t io_hdl2, caddr_t ioaddr2, 671507c3241Smlf struct ata_id *ata_idp); 672507c3241Smlf int ata_prop_create(dev_info_t *tgt_dip, ata_drv_t *ata_drvp, char *name); 673507c3241Smlf int ata_queue_cmd(int (*func)(ata_ctl_t *, ata_drv_t *, ata_pkt_t *), 674507c3241Smlf void *arg, ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, 675507c3241Smlf gtgt_t *gtgtp); 676507c3241Smlf int ata_set_feature(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp, 677507c3241Smlf uchar_t feature, uchar_t value); 678507c3241Smlf int ata_wait(ddi_acc_handle_t io_hdl, caddr_t ioaddr, uchar_t onbits, 679507c3241Smlf uchar_t offbits, uint_t timeout_usec); 680507c3241Smlf int ata_wait3(ddi_acc_handle_t io_hdl, caddr_t ioaddr, uchar_t onbits1, 681507c3241Smlf uchar_t offbits1, uchar_t failure_onbits2, 682507c3241Smlf uchar_t failure_offbits2, uchar_t failure_onbits3, 683507c3241Smlf uchar_t failure_offbits3, uint_t timeout_usec); 684507c3241Smlf int ata_test_lba_support(struct ata_id *aidp); 6859f49ae27Smlf void ata_nsecwait(clock_t count); 686c8531848Syt int ata_set_dma_mode(ata_ctl_t *ata_ctlp, ata_drv_t *ata_drvp); 6878c97a06bSAda void atapi_reset_dma_mode(ata_drv_t *ata_drvp); 688507c3241Smlf 689507c3241Smlf 690507c3241Smlf /* 691507c3241Smlf * PCIIDE DMA (Bus Mastering) functions and data in ata_dma.c 692507c3241Smlf */ 693507c3241Smlf extern ddi_dma_attr_t ata_pciide_dma_attr; 694507c3241Smlf extern int ata_dma_disabled; 695507c3241Smlf 696507c3241Smlf int ata_pciide_alloc(dev_info_t *dip, ata_ctl_t *ata_ctlp); 697507c3241Smlf void ata_pciide_free(ata_ctl_t *ata_ctlp); 698507c3241Smlf 699507c3241Smlf void ata_pciide_dma_sg_func(gcmd_t *gcmdp, ddi_dma_cookie_t *dmackp, 700507c3241Smlf int single_segment, int seg_index); 701507c3241Smlf void ata_pciide_dma_setup(ata_ctl_t *ata_ctlp, prde_t *srcp, int sg_cnt); 702507c3241Smlf void ata_pciide_dma_start(ata_ctl_t *ata_ctlp, uchar_t direction); 703507c3241Smlf void ata_pciide_dma_stop(ata_ctl_t *ata_ctlp); 704507c3241Smlf int ata_pciide_status_clear(ata_ctl_t *ata_ctlp); 705507c3241Smlf int ata_pciide_status_dmacheck_clear(ata_ctl_t *ata_ctlp); 706507c3241Smlf int ata_pciide_status_pending(ata_ctl_t *ata_ctlp); 707507c3241Smlf 708507c3241Smlf #ifdef __cplusplus 709507c3241Smlf } 710507c3241Smlf #endif 711507c3241Smlf 712507c3241Smlf #endif /* _ATA_COMMON_H */ 713