1*7c478bd9Sstevel@tonic-gate /* 2*7c478bd9Sstevel@tonic-gate * Copyright 2004 Sun Microsystems, Inc. All rights reserved. 3*7c478bd9Sstevel@tonic-gate * Use is subject to license terms. 4*7c478bd9Sstevel@tonic-gate */ 5*7c478bd9Sstevel@tonic-gate /* 6*7c478bd9Sstevel@tonic-gate * Copyright (c) 1999,2000 Michael Smith 7*7c478bd9Sstevel@tonic-gate * Copyright (c) 2000 BSDi 8*7c478bd9Sstevel@tonic-gate * All rights reserved. 9*7c478bd9Sstevel@tonic-gate * 10*7c478bd9Sstevel@tonic-gate * Redistribution and use in source and binary forms, with or without 11*7c478bd9Sstevel@tonic-gate * modification, are permitted provided that the following conditions 12*7c478bd9Sstevel@tonic-gate * are met: 13*7c478bd9Sstevel@tonic-gate * 1. Redistributions of source code must retain the above copyright 14*7c478bd9Sstevel@tonic-gate * notice, this list of conditions and the following disclaimer. 15*7c478bd9Sstevel@tonic-gate * 2. Redistributions in binary form must reproduce the above copyright 16*7c478bd9Sstevel@tonic-gate * notice, this list of conditions and the following disclaimer in the 17*7c478bd9Sstevel@tonic-gate * documentation and/or other materials provided with the distribution. 18*7c478bd9Sstevel@tonic-gate * 19*7c478bd9Sstevel@tonic-gate * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 20*7c478bd9Sstevel@tonic-gate * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21*7c478bd9Sstevel@tonic-gate * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22*7c478bd9Sstevel@tonic-gate * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 23*7c478bd9Sstevel@tonic-gate * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24*7c478bd9Sstevel@tonic-gate * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25*7c478bd9Sstevel@tonic-gate * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26*7c478bd9Sstevel@tonic-gate * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27*7c478bd9Sstevel@tonic-gate * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28*7c478bd9Sstevel@tonic-gate * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29*7c478bd9Sstevel@tonic-gate * SUCH DAMAGE. 30*7c478bd9Sstevel@tonic-gate * 31*7c478bd9Sstevel@tonic-gate * Copyright (c) 2002 Eric Moore 32*7c478bd9Sstevel@tonic-gate * Copyright (c) 2002 LSI Logic Corporation 33*7c478bd9Sstevel@tonic-gate * All rights reserved. 34*7c478bd9Sstevel@tonic-gate * 35*7c478bd9Sstevel@tonic-gate * Redistribution and use in source and binary forms, with or without 36*7c478bd9Sstevel@tonic-gate * modification, are permitted provided that the following conditions 37*7c478bd9Sstevel@tonic-gate * are met: 38*7c478bd9Sstevel@tonic-gate * 1. Redistributions of source code must retain the above copyright 39*7c478bd9Sstevel@tonic-gate * notice, this list of conditions and the following disclaimer. 40*7c478bd9Sstevel@tonic-gate * 2. Redistributions in binary form must reproduce the above copyright 41*7c478bd9Sstevel@tonic-gate * notice, this list of conditions and the following disclaimer in the 42*7c478bd9Sstevel@tonic-gate * documentation and/or other materials provided with the distribution. 43*7c478bd9Sstevel@tonic-gate * 3. The party using or redistributing the source code and binary forms 44*7c478bd9Sstevel@tonic-gate * agrees to the disclaimer below and the terms and conditions set forth 45*7c478bd9Sstevel@tonic-gate * herein. 46*7c478bd9Sstevel@tonic-gate * 47*7c478bd9Sstevel@tonic-gate * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 48*7c478bd9Sstevel@tonic-gate * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 49*7c478bd9Sstevel@tonic-gate * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 50*7c478bd9Sstevel@tonic-gate * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 51*7c478bd9Sstevel@tonic-gate * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 52*7c478bd9Sstevel@tonic-gate * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 53*7c478bd9Sstevel@tonic-gate * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 54*7c478bd9Sstevel@tonic-gate * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 55*7c478bd9Sstevel@tonic-gate * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 56*7c478bd9Sstevel@tonic-gate * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 57*7c478bd9Sstevel@tonic-gate * SUCH DAMAGE. 58*7c478bd9Sstevel@tonic-gate */ 59*7c478bd9Sstevel@tonic-gate 60*7c478bd9Sstevel@tonic-gate /* 61*7c478bd9Sstevel@tonic-gate * Note: If the structures and variables definitions can be found from the 62*7c478bd9Sstevel@tonic-gate * "MegaRAID PCI SCSI Disk Array Controller F/W Technical Reference 63*7c478bd9Sstevel@tonic-gate * Manual", the names defined in this documents will also be provided 64*7c478bd9Sstevel@tonic-gate * by " ", and the descriptions for each variables and constants are 65*7c478bd9Sstevel@tonic-gate * given as well. 66*7c478bd9Sstevel@tonic-gate */ 67*7c478bd9Sstevel@tonic-gate 68*7c478bd9Sstevel@tonic-gate #ifndef _AMRREG_H 69*7c478bd9Sstevel@tonic-gate #define _AMRREG_H 70*7c478bd9Sstevel@tonic-gate 71*7c478bd9Sstevel@tonic-gate #ifdef __cplusplus 72*7c478bd9Sstevel@tonic-gate extern "C" { 73*7c478bd9Sstevel@tonic-gate #endif 74*7c478bd9Sstevel@tonic-gate 75*7c478bd9Sstevel@tonic-gate #define AMR_NSEG 26 76*7c478bd9Sstevel@tonic-gate #define AMR_MAX_STATUS_ACK 46 77*7c478bd9Sstevel@tonic-gate 78*7c478bd9Sstevel@tonic-gate #define AMR_MAXCMD 255 /* The last CMD is used for Poll only */ 79*7c478bd9Sstevel@tonic-gate 80*7c478bd9Sstevel@tonic-gate #define AMR_LIMITCMD 120 /* max count of outstanding commands */ 81*7c478bd9Sstevel@tonic-gate #define AMR_MAXLD 40 82*7c478bd9Sstevel@tonic-gate 83*7c478bd9Sstevel@tonic-gate #define AMR_MAX_CHANNELS 4 84*7c478bd9Sstevel@tonic-gate #define AMR_MAX_TARGETS 15 85*7c478bd9Sstevel@tonic-gate #define AMR_MAX_LUNS 7 86*7c478bd9Sstevel@tonic-gate #define AMR_MAX_SCSI_CMDS (AMR_MAX_CHANNELS * AMR_MAX_TARGETS) 87*7c478bd9Sstevel@tonic-gate 88*7c478bd9Sstevel@tonic-gate #define AMR_MAX_CDB_LEN 0x0a 89*7c478bd9Sstevel@tonic-gate #define AMR_MAX_EXTCDB_LEN 0x10 90*7c478bd9Sstevel@tonic-gate #define AMR_MAX_REQ_SENSE_LEN 0x20 91*7c478bd9Sstevel@tonic-gate 92*7c478bd9Sstevel@tonic-gate #define AMR_BLKSIZE 512 /* constant for all controllers */ 93*7c478bd9Sstevel@tonic-gate 94*7c478bd9Sstevel@tonic-gate /* 95*7c478bd9Sstevel@tonic-gate * Array constraints for controllers that support 8 logic drivers 96*7c478bd9Sstevel@tonic-gate */ 97*7c478bd9Sstevel@tonic-gate #define AMR_8LD_MAXDRIVES 8 98*7c478bd9Sstevel@tonic-gate #define AMR_8LD_MAXCHAN 5 99*7c478bd9Sstevel@tonic-gate #define AMR_8LD_MAXTARG 15 100*7c478bd9Sstevel@tonic-gate #define AMR_8LD_MAXPHYSDRIVES (AMR_8LD_MAXCHAN * AMR_8LD_MAXTARG) 101*7c478bd9Sstevel@tonic-gate 102*7c478bd9Sstevel@tonic-gate /* 103*7c478bd9Sstevel@tonic-gate * Array constraints for controllers that support 40 logic drivers 104*7c478bd9Sstevel@tonic-gate */ 105*7c478bd9Sstevel@tonic-gate #define AMR_40LD_MAXDRIVES 40 106*7c478bd9Sstevel@tonic-gate #define AMR_40LD_MAXCHAN 16 107*7c478bd9Sstevel@tonic-gate #define AMR_40LD_MAXTARG 16 108*7c478bd9Sstevel@tonic-gate #define AMR_40LD_MAXPHYSDRIVES (AMR_40LD_MAXCHAN * AMR_40LD_MAXTARG) 109*7c478bd9Sstevel@tonic-gate 110*7c478bd9Sstevel@tonic-gate /* 111*7c478bd9Sstevel@tonic-gate * The buffer size for enquiry command 112*7c478bd9Sstevel@tonic-gate */ 113*7c478bd9Sstevel@tonic-gate #define AMR_ENQ_BUFFER_SIZE sizeof (union amr_enq_buffer) 114*7c478bd9Sstevel@tonic-gate 115*7c478bd9Sstevel@tonic-gate /* 116*7c478bd9Sstevel@tonic-gate * Constants used for poll command 117*7c478bd9Sstevel@tonic-gate */ 118*7c478bd9Sstevel@tonic-gate #define AMR_POLL_COMMAND_ID 0xfe 119*7c478bd9Sstevel@tonic-gate #define AMR_POLL_DEFAULT_NSTATUS 0xff 120*7c478bd9Sstevel@tonic-gate #define AMR_POLL_DEFAULT_STATUS 0xff 121*7c478bd9Sstevel@tonic-gate #define AMR_POLL_ACK 0x77 122*7c478bd9Sstevel@tonic-gate 123*7c478bd9Sstevel@tonic-gate #pragma pack(1) 124*7c478bd9Sstevel@tonic-gate 125*7c478bd9Sstevel@tonic-gate /* 126*7c478bd9Sstevel@tonic-gate * The AMR mailbox. This is the main interface for 127*7c478bd9Sstevel@tonic-gate * programming the controller. Must be aligned at 128*7c478bd9Sstevel@tonic-gate * a 16-Byte physical address boundary. 129*7c478bd9Sstevel@tonic-gate * 130*7c478bd9Sstevel@tonic-gate * The first sixteen bytes are commands to the controller. 131*7c478bd9Sstevel@tonic-gate * 132*7c478bd9Sstevel@tonic-gate * There are two formats: 133*7c478bd9Sstevel@tonic-gate * 1. Commands for I/O: mb_blkcount/mb_lba are used. 134*7c478bd9Sstevel@tonic-gate * 2. Commands for I/O control: mb_channel/mb_param are used. 135*7c478bd9Sstevel@tonic-gate * 136*7c478bd9Sstevel@tonic-gate */ 137*7c478bd9Sstevel@tonic-gate 138*7c478bd9Sstevel@tonic-gate struct amr_mailbox 139*7c478bd9Sstevel@tonic-gate { 140*7c478bd9Sstevel@tonic-gate uint8_t mb_command; /* "Command", OUT, the op */ 141*7c478bd9Sstevel@tonic-gate /* code of the command */ 142*7c478bd9Sstevel@tonic-gate uint8_t mb_ident; /* "CommandID", OUT, the */ 143*7c478bd9Sstevel@tonic-gate /* id for this command */ 144*7c478bd9Sstevel@tonic-gate union { 145*7c478bd9Sstevel@tonic-gate uint16_t mbu_blkcount; /* "NoOfSectors", OUT, the */ 146*7c478bd9Sstevel@tonic-gate /* number of sectors for */ 147*7c478bd9Sstevel@tonic-gate /* this request */ 148*7c478bd9Sstevel@tonic-gate uint8_t mbu_chparam[2]; /* "Channel" and "Param", */ 149*7c478bd9Sstevel@tonic-gate /* OUT, Channel No. and */ 150*7c478bd9Sstevel@tonic-gate /* parameters */ 151*7c478bd9Sstevel@tonic-gate } mb_un1; 152*7c478bd9Sstevel@tonic-gate union { 153*7c478bd9Sstevel@tonic-gate uint32_t mbu_lba; /* "Lba", OUT, the starting */ 154*7c478bd9Sstevel@tonic-gate /* LBA for this request */ 155*7c478bd9Sstevel@tonic-gate uint8_t mbu_pad[4]; 156*7c478bd9Sstevel@tonic-gate } mb_un2; 157*7c478bd9Sstevel@tonic-gate uint32_t mb_physaddr; /* "DataTransferAddress", OUT */ 158*7c478bd9Sstevel@tonic-gate /* physical address for a */ 159*7c478bd9Sstevel@tonic-gate /* non-s/g command or the */ 160*7c478bd9Sstevel@tonic-gate /* physical address of a s/g */ 161*7c478bd9Sstevel@tonic-gate /* list for a s/g command */ 162*7c478bd9Sstevel@tonic-gate uint8_t mb_drive; /* "LogicalDriveNumber", OUT, */ 163*7c478bd9Sstevel@tonic-gate /* the log-drive for which */ 164*7c478bd9Sstevel@tonic-gate /* this request is intended */ 165*7c478bd9Sstevel@tonic-gate uint8_t mb_nsgelem; /* "NoSGElements", OUT, */ 166*7c478bd9Sstevel@tonic-gate /* number of s/g elements */ 167*7c478bd9Sstevel@tonic-gate uint8_t res1; 168*7c478bd9Sstevel@tonic-gate uint8_t mb_busy; /* "mailboxBusy", INOUT, set */ 169*7c478bd9Sstevel@tonic-gate /* to 1 before submit the */ 170*7c478bd9Sstevel@tonic-gate /* command, firmware picks */ 171*7c478bd9Sstevel@tonic-gate /* it and makes this byte 0 */ 172*7c478bd9Sstevel@tonic-gate uint8_t mb_nstatus; /* "NoOfStatus", IN, the */ 173*7c478bd9Sstevel@tonic-gate /* number of status returned */ 174*7c478bd9Sstevel@tonic-gate /* by firmware */ 175*7c478bd9Sstevel@tonic-gate uint8_t mb_status; /* "Status", IN, status for */ 176*7c478bd9Sstevel@tonic-gate /* the IDs in mb_completed[] */ 177*7c478bd9Sstevel@tonic-gate uint8_t mb_completed[AMR_MAX_STATUS_ACK]; 178*7c478bd9Sstevel@tonic-gate /* "CompletedIdList", IN, */ 179*7c478bd9Sstevel@tonic-gate /* finished ID list */ 180*7c478bd9Sstevel@tonic-gate uint8_t mb_poll; /* "Mraid_poll", IN, used for */ 181*7c478bd9Sstevel@tonic-gate /* polling/interrupt-driven */ 182*7c478bd9Sstevel@tonic-gate uint8_t mb_ack; /* "Mraid_ack", IN, used for */ 183*7c478bd9Sstevel@tonic-gate /* polling/interrupt-driver */ 184*7c478bd9Sstevel@tonic-gate uint8_t res2[16]; 185*7c478bd9Sstevel@tonic-gate }; 186*7c478bd9Sstevel@tonic-gate 187*7c478bd9Sstevel@tonic-gate /* Fields before mb_nstatus are the portions worth copying for controller */ 188*7c478bd9Sstevel@tonic-gate #define AMR_MBOX_CMDSIZE (size_t)(&((struct amr_mailbox *)(NULL))->mb_nstatus) 189*7c478bd9Sstevel@tonic-gate 190*7c478bd9Sstevel@tonic-gate #define mb_blkcount mb_un1.mbu_blkcount 191*7c478bd9Sstevel@tonic-gate #define mb_channel mb_un1.mbu_chparam[0] 192*7c478bd9Sstevel@tonic-gate #define mb_param mb_un1.mbu_chparam[1] 193*7c478bd9Sstevel@tonic-gate #define mb_cmdsub mb_un1.mbu_chparam[0] 194*7c478bd9Sstevel@tonic-gate #define mb_cmdqual mb_un1.mbu_chparam[1] 195*7c478bd9Sstevel@tonic-gate #define mb_lba mb_un2.mbu_lba 196*7c478bd9Sstevel@tonic-gate 197*7c478bd9Sstevel@tonic-gate /* 198*7c478bd9Sstevel@tonic-gate * I/O commands expect the physical address of an array 199*7c478bd9Sstevel@tonic-gate * of no more than AMR_NSEGS of scatter/gather table entries 200*7c478bd9Sstevel@tonic-gate * in mb_physaddr. 201*7c478bd9Sstevel@tonic-gate * 202*7c478bd9Sstevel@tonic-gate * sg_addr is a physical address. 203*7c478bd9Sstevel@tonic-gate */ 204*7c478bd9Sstevel@tonic-gate struct amr_sgentry 205*7c478bd9Sstevel@tonic-gate { 206*7c478bd9Sstevel@tonic-gate uint32_t sg_addr; 207*7c478bd9Sstevel@tonic-gate uint32_t sg_count; 208*7c478bd9Sstevel@tonic-gate }; 209*7c478bd9Sstevel@tonic-gate 210*7c478bd9Sstevel@tonic-gate /* 211*7c478bd9Sstevel@tonic-gate * Mailbox commands 212*7c478bd9Sstevel@tonic-gate * Note: This is a subset for the command set 213*7c478bd9Sstevel@tonic-gate */ 214*7c478bd9Sstevel@tonic-gate #define AMR_CMD_LREAD 0x01 215*7c478bd9Sstevel@tonic-gate #define AMR_CMD_LWRITE 0x02 216*7c478bd9Sstevel@tonic-gate #define AMR_CMD_PASS 0x03 217*7c478bd9Sstevel@tonic-gate #define AMR_CMD_EXT_ENQUIRY 0x04 218*7c478bd9Sstevel@tonic-gate #define AMR_CMD_ENQUIRY 0x05 219*7c478bd9Sstevel@tonic-gate #define AMR_CMD_FLUSH 0x0a 220*7c478bd9Sstevel@tonic-gate #define AMR_CMD_EXT_ENQUIRY2 0x0c 221*7c478bd9Sstevel@tonic-gate #define AMR_CMD_GET_MACHINEID 0x36 222*7c478bd9Sstevel@tonic-gate #define AMR_CMD_GET_INITIATOR 0x7d 223*7c478bd9Sstevel@tonic-gate #define AMR_CMD_RESET_ADAPTER 0x96 224*7c478bd9Sstevel@tonic-gate #define AMR_CMD_CONFIG 0xa1 225*7c478bd9Sstevel@tonic-gate #define AMR_CMD_MISC_OPCODE 0xa4 226*7c478bd9Sstevel@tonic-gate #define AMR_CMD_EXTPASS 0xe3 227*7c478bd9Sstevel@tonic-gate 228*7c478bd9Sstevel@tonic-gate /* 229*7c478bd9Sstevel@tonic-gate * Subcodes for AMR_CMD_CONFIG 230*7c478bd9Sstevel@tonic-gate */ 231*7c478bd9Sstevel@tonic-gate #define AMR_CONFIG_PRODUCT_INFO 0x0e 232*7c478bd9Sstevel@tonic-gate #define AMR_CONFIG_ENQ3 0x0f 233*7c478bd9Sstevel@tonic-gate #define AMR_CONFIG_ENQ3_SOLICITED_NOTIFY 0x01 234*7c478bd9Sstevel@tonic-gate #define AMR_CONFIG_ENQ3_SOLICITED_FULL 0x02 235*7c478bd9Sstevel@tonic-gate #define AMR_CONFIG_ENQ3_UNSOLICITED 0x03 236*7c478bd9Sstevel@tonic-gate 237*7c478bd9Sstevel@tonic-gate /* 238*7c478bd9Sstevel@tonic-gate * Subcodes for AMR_CMD_MISC_OPCODE 239*7c478bd9Sstevel@tonic-gate */ 240*7c478bd9Sstevel@tonic-gate #define AMR_MISC_CDB_QUERY 0x16 241*7c478bd9Sstevel@tonic-gate 242*7c478bd9Sstevel@tonic-gate /* 243*7c478bd9Sstevel@tonic-gate * Mailbox command results 244*7c478bd9Sstevel@tonic-gate */ 245*7c478bd9Sstevel@tonic-gate #define AMR_STATUS_SUCCESS 0x00 246*7c478bd9Sstevel@tonic-gate #define AMR_STATUS_ABORTED 0x02 247*7c478bd9Sstevel@tonic-gate #define AMR_STATUS_FAILED 0x80 248*7c478bd9Sstevel@tonic-gate 249*7c478bd9Sstevel@tonic-gate /* 250*7c478bd9Sstevel@tonic-gate * Adapter Info structure 251*7c478bd9Sstevel@tonic-gate */ 252*7c478bd9Sstevel@tonic-gate struct amr_adapter_info 253*7c478bd9Sstevel@tonic-gate { 254*7c478bd9Sstevel@tonic-gate uint8_t aa_maxio; /* "MaxConcCmds", concurrent */ 255*7c478bd9Sstevel@tonic-gate /* commands supported */ 256*7c478bd9Sstevel@tonic-gate uint8_t aa_rebuild_rate; /* "RbldRate", rebuild rate, */ 257*7c478bd9Sstevel@tonic-gate /* varies from 0%-100% */ 258*7c478bd9Sstevel@tonic-gate uint8_t aa_maxtargchan; /* "MaxTargPerChan", targets */ 259*7c478bd9Sstevel@tonic-gate /* supported per chan */ 260*7c478bd9Sstevel@tonic-gate uint8_t aa_channels; /* "ChanPresent", No. of */ 261*7c478bd9Sstevel@tonic-gate /* Chans present on this */ 262*7c478bd9Sstevel@tonic-gate /* adapter */ 263*7c478bd9Sstevel@tonic-gate uint8_t aa_firmware[4]; /* "FwVer", firmware version */ 264*7c478bd9Sstevel@tonic-gate uint16_t aa_flashage; /* "AgeOfFlash", No. of times */ 265*7c478bd9Sstevel@tonic-gate /* FW has been downloaded */ 266*7c478bd9Sstevel@tonic-gate uint8_t aa_chipsetvalue; /* "ChipSetValue", contents */ 267*7c478bd9Sstevel@tonic-gate /* of 0xC0000832 */ 268*7c478bd9Sstevel@tonic-gate uint8_t aa_memorysize; /* "DramSize", in terms of MB */ 269*7c478bd9Sstevel@tonic-gate uint8_t aa_cacheflush; /* "CacheFlushInterval", in */ 270*7c478bd9Sstevel@tonic-gate /* terms of Seconds */ 271*7c478bd9Sstevel@tonic-gate uint8_t aa_bios[4]; /* "BiosVersion", Bios ver */ 272*7c478bd9Sstevel@tonic-gate uint8_t aa_boardtype; /* "BoardType", board type */ 273*7c478bd9Sstevel@tonic-gate uint8_t aa_scsisensealert; /* "sense_alert" */ 274*7c478bd9Sstevel@tonic-gate uint8_t aa_writeconfigcount; /* "write_config_count", */ 275*7c478bd9Sstevel@tonic-gate /* increase with evry */ 276*7c478bd9Sstevel@tonic-gate /* configuration change */ 277*7c478bd9Sstevel@tonic-gate uint8_t aa_driveinsertioncount; /* "drive_inserted_count", */ 278*7c478bd9Sstevel@tonic-gate /* increase with every drive */ 279*7c478bd9Sstevel@tonic-gate /* inserted */ 280*7c478bd9Sstevel@tonic-gate uint8_t aa_inserteddrive; /* "inserted_drive", Chan:Id */ 281*7c478bd9Sstevel@tonic-gate /* of inserted drive */ 282*7c478bd9Sstevel@tonic-gate uint8_t aa_batterystatus; /* "battery_status", battery */ 283*7c478bd9Sstevel@tonic-gate /* status */ 284*7c478bd9Sstevel@tonic-gate uint8_t res1; /* "dec_fault_bus_info", was */ 285*7c478bd9Sstevel@tonic-gate /* reserved */ 286*7c478bd9Sstevel@tonic-gate }; 287*7c478bd9Sstevel@tonic-gate 288*7c478bd9Sstevel@tonic-gate /* 289*7c478bd9Sstevel@tonic-gate * aa_batterystatus values 290*7c478bd9Sstevel@tonic-gate */ 291*7c478bd9Sstevel@tonic-gate #define AMR_BATT_MODULE_MISSING 0x01 292*7c478bd9Sstevel@tonic-gate #define AMR_BATT_LOW_VOLTAGE 0x02 293*7c478bd9Sstevel@tonic-gate #define AMR_BATT_TEMP_HIGH 0x04 294*7c478bd9Sstevel@tonic-gate #define AMR_BATT_PACK_MISSING 0x08 295*7c478bd9Sstevel@tonic-gate #define AMR_BATT_CHARGE_MASK 0x30 296*7c478bd9Sstevel@tonic-gate #define AMR_BATT_CHARGE_DONE 0x00 297*7c478bd9Sstevel@tonic-gate #define AMR_BATT_CHARGE_INPROG 0x10 298*7c478bd9Sstevel@tonic-gate #define AMR_BATT_CHARGE_FAIL 0x20 299*7c478bd9Sstevel@tonic-gate #define AMR_BATT_CYCLES_EXCEEDED 0x40 300*7c478bd9Sstevel@tonic-gate 301*7c478bd9Sstevel@tonic-gate /* 302*7c478bd9Sstevel@tonic-gate * Logical Drive info structure 303*7c478bd9Sstevel@tonic-gate */ 304*7c478bd9Sstevel@tonic-gate struct amr_logdrive_info 305*7c478bd9Sstevel@tonic-gate { 306*7c478bd9Sstevel@tonic-gate uint8_t al_numdrives; /* "NumLogDrv", No. of */ 307*7c478bd9Sstevel@tonic-gate /* configured logic drivers */ 308*7c478bd9Sstevel@tonic-gate uint8_t res1[3]; 309*7c478bd9Sstevel@tonic-gate uint32_t al_size[AMR_8LD_MAXDRIVES]; 310*7c478bd9Sstevel@tonic-gate /* "LDrvSize", size of each */ 311*7c478bd9Sstevel@tonic-gate /* logic driver */ 312*7c478bd9Sstevel@tonic-gate uint8_t al_properties[AMR_8LD_MAXDRIVES]; 313*7c478bd9Sstevel@tonic-gate /* "LDrvProp", properties of */ 314*7c478bd9Sstevel@tonic-gate /* each logic driver */ 315*7c478bd9Sstevel@tonic-gate uint8_t al_state[AMR_8LD_MAXDRIVES]; 316*7c478bd9Sstevel@tonic-gate /* "LDrvState", state of */ 317*7c478bd9Sstevel@tonic-gate /* each logic driver */ 318*7c478bd9Sstevel@tonic-gate }; 319*7c478bd9Sstevel@tonic-gate 320*7c478bd9Sstevel@tonic-gate /* 321*7c478bd9Sstevel@tonic-gate * Logical drive only: al_properties 322*7c478bd9Sstevel@tonic-gate */ 323*7c478bd9Sstevel@tonic-gate #define AMR_DRV_RAID_MASK 0x0f /* RAID level 0, 1, 3, 5, etc */ 324*7c478bd9Sstevel@tonic-gate #define AMR_DRV_WRITEBACK 0x10 /* write-back enabled */ 325*7c478bd9Sstevel@tonic-gate #define AMR_DRV_READHEAD 0x20 /* readhead policy enabled */ 326*7c478bd9Sstevel@tonic-gate #define AMR_DRV_ADAPTIVE 0x40 /* adaptive I/O enabled */ 327*7c478bd9Sstevel@tonic-gate 328*7c478bd9Sstevel@tonic-gate /* 329*7c478bd9Sstevel@tonic-gate * Physical Drive info structure 330*7c478bd9Sstevel@tonic-gate */ 331*7c478bd9Sstevel@tonic-gate struct amr_physdrive_info 332*7c478bd9Sstevel@tonic-gate { 333*7c478bd9Sstevel@tonic-gate uint8_t ap_state[AMR_8LD_MAXPHYSDRIVES]; 334*7c478bd9Sstevel@tonic-gate /* "PDrvState", state of each */ 335*7c478bd9Sstevel@tonic-gate /* phy-driver. Low nibble is */ 336*7c478bd9Sstevel@tonic-gate /* current state, high nibble */ 337*7c478bd9Sstevel@tonic-gate /* is previous state */ 338*7c478bd9Sstevel@tonic-gate uint8_t ap_predictivefailure; /* "PredictiveFailure" */ 339*7c478bd9Sstevel@tonic-gate }; 340*7c478bd9Sstevel@tonic-gate 341*7c478bd9Sstevel@tonic-gate /* 342*7c478bd9Sstevel@tonic-gate * Physical/logical drive states 343*7c478bd9Sstevel@tonic-gate * 344*7c478bd9Sstevel@tonic-gate * Both logical and physical drives maintain 345*7c478bd9Sstevel@tonic-gate * 'current' and 'previous' states in the low/high 346*7c478bd9Sstevel@tonic-gate * nibble of the _state field. 347*7c478bd9Sstevel@tonic-gate */ 348*7c478bd9Sstevel@tonic-gate #define AMR_DRV_CURSTATE(x) ((x) & 0x0f) 349*7c478bd9Sstevel@tonic-gate #define AMR_DRV_PREVSTATE(x) (((x) >> 4) & 0x0f) 350*7c478bd9Sstevel@tonic-gate 351*7c478bd9Sstevel@tonic-gate /* 352*7c478bd9Sstevel@tonic-gate * Logical drives: al_state. 353*7c478bd9Sstevel@tonic-gate */ 354*7c478bd9Sstevel@tonic-gate #define AMR_LDRV_OFFLINE 0x00 355*7c478bd9Sstevel@tonic-gate #define AMR_LDRV_DEGRADED 0x01 356*7c478bd9Sstevel@tonic-gate #define AMR_LDRV_OPTIMAL 0x02 357*7c478bd9Sstevel@tonic-gate 358*7c478bd9Sstevel@tonic-gate /* 359*7c478bd9Sstevel@tonic-gate * Physical drives: ap_state. 360*7c478bd9Sstevel@tonic-gate */ 361*7c478bd9Sstevel@tonic-gate #define AMR_PDRV_UNCNF 0x00 362*7c478bd9Sstevel@tonic-gate #define AMR_PDRV_ONLINE 0x03 363*7c478bd9Sstevel@tonic-gate #define AMR_PDRV_FAILED 0x04 364*7c478bd9Sstevel@tonic-gate #define AMR_PDRV_REBUILD 0x05 365*7c478bd9Sstevel@tonic-gate #define AMR_PDRV_HOTSPARE 0x06 366*7c478bd9Sstevel@tonic-gate 367*7c478bd9Sstevel@tonic-gate /* 368*7c478bd9Sstevel@tonic-gate * Notify structure 369*7c478bd9Sstevel@tonic-gate */ 370*7c478bd9Sstevel@tonic-gate struct amr_notify 371*7c478bd9Sstevel@tonic-gate { 372*7c478bd9Sstevel@tonic-gate uint32_t an_globalcounter; /* "globalCounter", change */ 373*7c478bd9Sstevel@tonic-gate /* counter */ 374*7c478bd9Sstevel@tonic-gate uint8_t an_paramcounter; /* "paramCounter", parameter */ 375*7c478bd9Sstevel@tonic-gate /* change counter */ 376*7c478bd9Sstevel@tonic-gate uint8_t an_paramid; /* "paramId", param modified */ 377*7c478bd9Sstevel@tonic-gate uint16_t an_paramval; /* "paramVal", new var of */ 378*7c478bd9Sstevel@tonic-gate /* last param modified */ 379*7c478bd9Sstevel@tonic-gate 380*7c478bd9Sstevel@tonic-gate uint8_t an_writeconfigcounter; /* "writeConfigCounter", */ 381*7c478bd9Sstevel@tonic-gate /* write config occurred */ 382*7c478bd9Sstevel@tonic-gate uint8_t res1[3]; /* "writeConfigRsvd" */ 383*7c478bd9Sstevel@tonic-gate 384*7c478bd9Sstevel@tonic-gate uint8_t an_ldrvopcounter; /* "ldrvOpCounter", logical */ 385*7c478bd9Sstevel@tonic-gate /* drive operation */ 386*7c478bd9Sstevel@tonic-gate uint8_t an_ldrvopid; /* "ldrvOpId", ldrv num */ 387*7c478bd9Sstevel@tonic-gate uint8_t an_ldrvopcmd; /* "ldrvOpCmd", ldrv */ 388*7c478bd9Sstevel@tonic-gate /* operations */ 389*7c478bd9Sstevel@tonic-gate uint8_t an_ldrvopstatus; /* "ldrvOpStatus", status of */ 390*7c478bd9Sstevel@tonic-gate /* the operation */ 391*7c478bd9Sstevel@tonic-gate 392*7c478bd9Sstevel@tonic-gate uint8_t an_ldrvstatecounter; /* "ldrvStateCounter", change */ 393*7c478bd9Sstevel@tonic-gate /* of logical drive state */ 394*7c478bd9Sstevel@tonic-gate uint8_t an_ldrvstateid; /* "ldrvStateId", ldrv num */ 395*7c478bd9Sstevel@tonic-gate uint8_t an_ldrvstatenew; /* "ldrvStateNew", new state */ 396*7c478bd9Sstevel@tonic-gate uint8_t an_ldrvstateold; /* "ldrvStateOld", old state */ 397*7c478bd9Sstevel@tonic-gate 398*7c478bd9Sstevel@tonic-gate uint8_t an_pdrvstatecounter; /* "pdrvStateCounter", change */ 399*7c478bd9Sstevel@tonic-gate /* of physical drive state */ 400*7c478bd9Sstevel@tonic-gate uint8_t an_pdrvstateid; /* "pdrvStateId", pdrv id */ 401*7c478bd9Sstevel@tonic-gate uint8_t an_pdrvstatenew; /* "pdrvStateNew", new state */ 402*7c478bd9Sstevel@tonic-gate uint8_t an_pdrvstateold; /* "pdrvStateOld", old state */ 403*7c478bd9Sstevel@tonic-gate 404*7c478bd9Sstevel@tonic-gate uint8_t an_pdrvfmtcounter; /* "pdrvFmtCounter", pdrv */ 405*7c478bd9Sstevel@tonic-gate /* format started/over */ 406*7c478bd9Sstevel@tonic-gate uint8_t an_pdrvfmtid; /* "pdrvFmtId", pdrv id */ 407*7c478bd9Sstevel@tonic-gate uint8_t an_pdrvfmtval; /* "pdrvFmtVal", format */ 408*7c478bd9Sstevel@tonic-gate /* started/over */ 409*7c478bd9Sstevel@tonic-gate uint8_t res2; /* "pdrvFmtRsvd" */ 410*7c478bd9Sstevel@tonic-gate 411*7c478bd9Sstevel@tonic-gate uint8_t an_targxfercounter; /* "targXferCounter", scsi */ 412*7c478bd9Sstevel@tonic-gate /* xfer rate change */ 413*7c478bd9Sstevel@tonic-gate uint8_t an_targxferid; /* "targXferId", pdrv id */ 414*7c478bd9Sstevel@tonic-gate uint8_t an_targxferval; /* "targXferVal", new Xfer */ 415*7c478bd9Sstevel@tonic-gate /* params of last pdrv */ 416*7c478bd9Sstevel@tonic-gate uint8_t res3; /* "targXferRsvd" */ 417*7c478bd9Sstevel@tonic-gate 418*7c478bd9Sstevel@tonic-gate uint8_t an_fcloopidcounter; /* "fcLoopIdChgCounter", */ 419*7c478bd9Sstevel@tonic-gate /* FC/AL loop ID changed */ 420*7c478bd9Sstevel@tonic-gate uint8_t an_fcloopidpdrvid; /* "fcLoopIdPdrvId", pdrv id */ 421*7c478bd9Sstevel@tonic-gate uint8_t an_fcloopid0; /* "fcLoopId0", loopid on fc */ 422*7c478bd9Sstevel@tonic-gate /* loop 0 */ 423*7c478bd9Sstevel@tonic-gate uint8_t an_fcloopid1; /* "fcLoopId1", loopid on fc */ 424*7c478bd9Sstevel@tonic-gate /* loop 1 */ 425*7c478bd9Sstevel@tonic-gate 426*7c478bd9Sstevel@tonic-gate uint8_t an_fcloopstatecounter; /* "fcLoopStateCounter", */ 427*7c478bd9Sstevel@tonic-gate /* FC/AL loop status changed */ 428*7c478bd9Sstevel@tonic-gate uint8_t an_fcloopstate0; /* "fcLoopState0", state of */ 429*7c478bd9Sstevel@tonic-gate /* fc loop 0 */ 430*7c478bd9Sstevel@tonic-gate uint8_t an_fcloopstate1; /* "fcLoopState1", state of */ 431*7c478bd9Sstevel@tonic-gate /* fc loop 1 */ 432*7c478bd9Sstevel@tonic-gate uint8_t res4; /* "fcLoopStateRsvd" */ 433*7c478bd9Sstevel@tonic-gate uint8_t pad[88]; 434*7c478bd9Sstevel@tonic-gate }; 435*7c478bd9Sstevel@tonic-gate 436*7c478bd9Sstevel@tonic-gate /* 437*7c478bd9Sstevel@tonic-gate * an_param values 438*7c478bd9Sstevel@tonic-gate */ 439*7c478bd9Sstevel@tonic-gate #define AMR_PARAM_REBUILD_RATE 0x01 440*7c478bd9Sstevel@tonic-gate #define AMR_PARAM_FLUSH_INTERVAL 0x02 441*7c478bd9Sstevel@tonic-gate #define AMR_PARAM_SENSE_ALERT 0x03 442*7c478bd9Sstevel@tonic-gate #define AMR_PARAM_DRIVE_INSERTED 0x04 443*7c478bd9Sstevel@tonic-gate #define AMR_PARAM_BATTERY_STATUS 0x05 444*7c478bd9Sstevel@tonic-gate 445*7c478bd9Sstevel@tonic-gate /* 446*7c478bd9Sstevel@tonic-gate * an_ldrvopcmd values 447*7c478bd9Sstevel@tonic-gate */ 448*7c478bd9Sstevel@tonic-gate #define AMR_LDRVOP_CHECK 0x01 449*7c478bd9Sstevel@tonic-gate #define AMR_LDRVOP_INIT 0x02 450*7c478bd9Sstevel@tonic-gate #define AMR_LDRVOP_REBUILD 0x03 451*7c478bd9Sstevel@tonic-gate 452*7c478bd9Sstevel@tonic-gate /* 453*7c478bd9Sstevel@tonic-gate * an_ldrvopstatus: return values after issuing command 454*7c478bd9Sstevel@tonic-gate * via an_ldrvopcmd. 455*7c478bd9Sstevel@tonic-gate */ 456*7c478bd9Sstevel@tonic-gate #define AMR_LDRVOP_SUCCESS 0x00 457*7c478bd9Sstevel@tonic-gate #define AMR_LDRVOP_FAILED 0x01 458*7c478bd9Sstevel@tonic-gate #define AMR_LDRVOP_ABORTED 0x02 459*7c478bd9Sstevel@tonic-gate #define AMR_LDRVOP_CORRECTED 0x03 460*7c478bd9Sstevel@tonic-gate #define AMR_LDRVOP_STARTED 0x04 461*7c478bd9Sstevel@tonic-gate 462*7c478bd9Sstevel@tonic-gate /* 463*7c478bd9Sstevel@tonic-gate * an_pdrvfmtval: Formatting commands/return values 464*7c478bd9Sstevel@tonic-gate */ 465*7c478bd9Sstevel@tonic-gate #define AMR_FORMAT_START 0x01 466*7c478bd9Sstevel@tonic-gate #define AMR_FORMAT_COMPLETE 0x02 467*7c478bd9Sstevel@tonic-gate 468*7c478bd9Sstevel@tonic-gate /* 469*7c478bd9Sstevel@tonic-gate * Enquiry response structure for AMR_CMD_ENQUIRY, AMR_CMD_EXT_ENQUIRY and 470*7c478bd9Sstevel@tonic-gate * AMR_CMD_EXT_ENQUIRY2. 471*7c478bd9Sstevel@tonic-gate */ 472*7c478bd9Sstevel@tonic-gate struct amr_enquiry 473*7c478bd9Sstevel@tonic-gate { 474*7c478bd9Sstevel@tonic-gate struct amr_adapter_info ae_adapter; 475*7c478bd9Sstevel@tonic-gate struct amr_logdrive_info ae_ldrv; 476*7c478bd9Sstevel@tonic-gate struct amr_physdrive_info ae_pdrv; 477*7c478bd9Sstevel@tonic-gate uint8_t ae_formatting[AMR_8LD_MAXDRIVES]; 478*7c478bd9Sstevel@tonic-gate uint8_t res1[AMR_8LD_MAXDRIVES]; 479*7c478bd9Sstevel@tonic-gate uint32_t ae_extlen; 480*7c478bd9Sstevel@tonic-gate uint16_t ae_subsystem; 481*7c478bd9Sstevel@tonic-gate uint16_t ae_subvendor; 482*7c478bd9Sstevel@tonic-gate uint32_t ae_signature; 483*7c478bd9Sstevel@tonic-gate uint8_t res2[844]; 484*7c478bd9Sstevel@tonic-gate }; 485*7c478bd9Sstevel@tonic-gate 486*7c478bd9Sstevel@tonic-gate /* 487*7c478bd9Sstevel@tonic-gate * ae_signature values 488*7c478bd9Sstevel@tonic-gate */ 489*7c478bd9Sstevel@tonic-gate #define AMR_SIG_431 0xfffe0001 490*7c478bd9Sstevel@tonic-gate #define AMR_SIG_438 0xfffd0002 491*7c478bd9Sstevel@tonic-gate #define AMR_SIG_762 0xfffc0003 492*7c478bd9Sstevel@tonic-gate #define AMR_SIG_T5 0xfffb0004 493*7c478bd9Sstevel@tonic-gate #define AMR_SIG_466 0xfffa0005 494*7c478bd9Sstevel@tonic-gate #define AMR_SIG_467 0xfff90006 495*7c478bd9Sstevel@tonic-gate #define AMR_SIG_T7 0xfff80007 496*7c478bd9Sstevel@tonic-gate #define AMR_SIG_490 0xfff70008 497*7c478bd9Sstevel@tonic-gate 498*7c478bd9Sstevel@tonic-gate /* 499*7c478bd9Sstevel@tonic-gate * Enquiry3 structure 500*7c478bd9Sstevel@tonic-gate */ 501*7c478bd9Sstevel@tonic-gate struct amr_enquiry3 502*7c478bd9Sstevel@tonic-gate { 503*7c478bd9Sstevel@tonic-gate uint32_t ae_datasize; /* "dataSize", current size */ 504*7c478bd9Sstevel@tonic-gate /* in bytes(resvd excluded) */ 505*7c478bd9Sstevel@tonic-gate struct amr_notify ae_notify; /* "notify", event notify */ 506*7c478bd9Sstevel@tonic-gate /* structure */ 507*7c478bd9Sstevel@tonic-gate uint8_t ae_rebuildrate; /* "rbldRate", current */ 508*7c478bd9Sstevel@tonic-gate /* rebuild rate in % */ 509*7c478bd9Sstevel@tonic-gate uint8_t ae_cacheflush; /* "cacheFlushInterval", */ 510*7c478bd9Sstevel@tonic-gate /* flush interval in seconds */ 511*7c478bd9Sstevel@tonic-gate uint8_t ae_sensealert; /* "senseAlert" */ 512*7c478bd9Sstevel@tonic-gate uint8_t ae_driveinsertcount; /* "driveInsertedCount", */ 513*7c478bd9Sstevel@tonic-gate /* count of inserted drives */ 514*7c478bd9Sstevel@tonic-gate uint8_t ae_batterystatus; /* "batteryStatus" */ 515*7c478bd9Sstevel@tonic-gate uint8_t ae_numldrives; /* "numLDrv", number of logic */ 516*7c478bd9Sstevel@tonic-gate /* drivers configured */ 517*7c478bd9Sstevel@tonic-gate uint8_t ae_reconstate[AMR_40LD_MAXDRIVES/8]; 518*7c478bd9Sstevel@tonic-gate /* "reconState", */ 519*7c478bd9Sstevel@tonic-gate /* reconstruction state */ 520*7c478bd9Sstevel@tonic-gate uint16_t ae_opstatus[AMR_40LD_MAXDRIVES/8]; 521*7c478bd9Sstevel@tonic-gate /* "lDrvOpStatus", operation */ 522*7c478bd9Sstevel@tonic-gate /* state per logic driver */ 523*7c478bd9Sstevel@tonic-gate uint32_t ae_drivesize[AMR_40LD_MAXDRIVES]; 524*7c478bd9Sstevel@tonic-gate /* "lDrvSize", size of each */ 525*7c478bd9Sstevel@tonic-gate /* logic driver */ 526*7c478bd9Sstevel@tonic-gate uint8_t ae_driveprop[AMR_40LD_MAXDRIVES]; 527*7c478bd9Sstevel@tonic-gate /* "lDrvProp", properties of */ 528*7c478bd9Sstevel@tonic-gate /* each logic driver */ 529*7c478bd9Sstevel@tonic-gate uint8_t ae_drivestate[AMR_40LD_MAXDRIVES]; 530*7c478bd9Sstevel@tonic-gate /* "lDrvState", state of */ 531*7c478bd9Sstevel@tonic-gate /* each logic driver */ 532*7c478bd9Sstevel@tonic-gate uint8_t ae_pdrivestate[AMR_40LD_MAXPHYSDRIVES]; 533*7c478bd9Sstevel@tonic-gate /* "pDrvState", state of each */ 534*7c478bd9Sstevel@tonic-gate /* physical driver */ 535*7c478bd9Sstevel@tonic-gate uint16_t ae_pdriveformat[AMR_40LD_MAXPHYSDRIVES/16]; 536*7c478bd9Sstevel@tonic-gate /* "physDrvFormat" */ 537*7c478bd9Sstevel@tonic-gate uint8_t ae_targxfer[80]; /* "targXfer", physical drive */ 538*7c478bd9Sstevel@tonic-gate /* transfer rates */ 539*7c478bd9Sstevel@tonic-gate uint8_t res1[263]; /* pad to 1024 bytes */ 540*7c478bd9Sstevel@tonic-gate }; 541*7c478bd9Sstevel@tonic-gate 542*7c478bd9Sstevel@tonic-gate /* 543*7c478bd9Sstevel@tonic-gate * Product Info structure. Query for this via AMR_CONFIG_PRODUCT_INFO. 544*7c478bd9Sstevel@tonic-gate */ 545*7c478bd9Sstevel@tonic-gate struct amr_prodinfo 546*7c478bd9Sstevel@tonic-gate { 547*7c478bd9Sstevel@tonic-gate uint32_t ap_size; /* "DataSize", current size */ 548*7c478bd9Sstevel@tonic-gate /* in bytes */ 549*7c478bd9Sstevel@tonic-gate uint32_t ap_configsig; /* "ConfigSignature", default */ 550*7c478bd9Sstevel@tonic-gate /* is 0x00282008, indicating */ 551*7c478bd9Sstevel@tonic-gate /* 0x28 max logical drives, */ 552*7c478bd9Sstevel@tonic-gate /* 0x20 maximum stripes and */ 553*7c478bd9Sstevel@tonic-gate /* 0x08 maximum spans */ 554*7c478bd9Sstevel@tonic-gate uint8_t ap_firmware[16]; /* "FwVer", firmware version */ 555*7c478bd9Sstevel@tonic-gate uint8_t ap_bios[16]; /* "BiosVer", Bios version */ 556*7c478bd9Sstevel@tonic-gate uint8_t ap_product[80]; /* "ProductName", prod name */ 557*7c478bd9Sstevel@tonic-gate uint8_t ap_maxio; /* "MaxConcCmds", max number */ 558*7c478bd9Sstevel@tonic-gate /* of concurrent commands */ 559*7c478bd9Sstevel@tonic-gate uint8_t ap_nschan; /* "SCSIChanPresent", number */ 560*7c478bd9Sstevel@tonic-gate /* of SCSI channels present */ 561*7c478bd9Sstevel@tonic-gate uint8_t ap_fcloops; /* "FCLoopPresent", number of */ 562*7c478bd9Sstevel@tonic-gate /* fibre loops present */ 563*7c478bd9Sstevel@tonic-gate uint8_t ap_memtype; /* "memType", memory type */ 564*7c478bd9Sstevel@tonic-gate uint32_t ap_signature; /* "signature" */ 565*7c478bd9Sstevel@tonic-gate uint16_t ap_memsize; /* "DramSize", onboard memory */ 566*7c478bd9Sstevel@tonic-gate /* in MB */ 567*7c478bd9Sstevel@tonic-gate uint16_t ap_subsystem; /* "subSystemID", subsystem */ 568*7c478bd9Sstevel@tonic-gate /* identifier */ 569*7c478bd9Sstevel@tonic-gate uint16_t ap_subvendor; /* "subSystemVendorID" */ 570*7c478bd9Sstevel@tonic-gate uint8_t ap_numnotifyctr; /* "numNotifyCounters", num */ 571*7c478bd9Sstevel@tonic-gate /* of notify counters */ 572*7c478bd9Sstevel@tonic-gate }; 573*7c478bd9Sstevel@tonic-gate 574*7c478bd9Sstevel@tonic-gate /* 575*7c478bd9Sstevel@tonic-gate * The union for used enquiry commands 576*7c478bd9Sstevel@tonic-gate */ 577*7c478bd9Sstevel@tonic-gate union amr_enq_buffer 578*7c478bd9Sstevel@tonic-gate { 579*7c478bd9Sstevel@tonic-gate struct amr_enquiry3 aeb_enquiry3; 580*7c478bd9Sstevel@tonic-gate struct amr_enquiry aeb_enquiry; 581*7c478bd9Sstevel@tonic-gate struct amr_prodinfo aeb_prodinfo; 582*7c478bd9Sstevel@tonic-gate }; 583*7c478bd9Sstevel@tonic-gate 584*7c478bd9Sstevel@tonic-gate #pragma pack() 585*7c478bd9Sstevel@tonic-gate 586*7c478bd9Sstevel@tonic-gate #ifdef _KERNEL 587*7c478bd9Sstevel@tonic-gate 588*7c478bd9Sstevel@tonic-gate /* 589*7c478bd9Sstevel@tonic-gate * I/O Port offsets 590*7c478bd9Sstevel@tonic-gate */ 591*7c478bd9Sstevel@tonic-gate #define ACK_BYTE 0x08 592*7c478bd9Sstevel@tonic-gate #define I_CMD_PORT 0x00 593*7c478bd9Sstevel@tonic-gate #define I_ACK_PORT 0x00 594*7c478bd9Sstevel@tonic-gate #define I_TOGGLE_PORT 0x01 595*7c478bd9Sstevel@tonic-gate #define INTR_PORT 0x0a 596*7c478bd9Sstevel@tonic-gate #define ENABLE_INTR_BYTE 0xc0 597*7c478bd9Sstevel@tonic-gate #define DISABLE_INTR_BYTE 0x00 598*7c478bd9Sstevel@tonic-gate #define AMR_QINTR 0x0a 599*7c478bd9Sstevel@tonic-gate #define AMR_QINTR_VALID 0x40 600*7c478bd9Sstevel@tonic-gate 601*7c478bd9Sstevel@tonic-gate #define AMR_QGET_ISTAT(sc) pci_config_get8(sc->regsmap_handle, AMR_QINTR) 602*7c478bd9Sstevel@tonic-gate #define AMR_QCLEAR_INTR(sc) pci_config_put8(sc->regsmap_handle, \ 603*7c478bd9Sstevel@tonic-gate I_ACK_PORT, ACK_BYTE) 604*7c478bd9Sstevel@tonic-gate #define AMR_QENABLE_INTR(sc) pci_config_put8(sc->regsmap_handle, \ 605*7c478bd9Sstevel@tonic-gate I_TOGGLE_PORT, ENABLE_INTR_BYTE) 606*7c478bd9Sstevel@tonic-gate #define AMR_QDISABLE_INTR(sc) pci_config_put8(sc->regsmap_handle, \ 607*7c478bd9Sstevel@tonic-gate I_TOGGLE_PORT, DISABLE_INTR_BYTE) 608*7c478bd9Sstevel@tonic-gate #define AMR_CFG_SIG 0xa0 /* PCI config register for signature */ 609*7c478bd9Sstevel@tonic-gate #define AMR_SIGNATURE_1 0xCCCC /* i960 signature (older adapters) */ 610*7c478bd9Sstevel@tonic-gate #define AMR_SIGNATURE_2 0x3344 /* i960 signature (newer adapters) */ 611*7c478bd9Sstevel@tonic-gate 612*7c478bd9Sstevel@tonic-gate /* 613*7c478bd9Sstevel@tonic-gate * Doorbell registers 614*7c478bd9Sstevel@tonic-gate */ 615*7c478bd9Sstevel@tonic-gate #define AMR_QIDB 0x20 616*7c478bd9Sstevel@tonic-gate #define AMR_QODB 0x2c 617*7c478bd9Sstevel@tonic-gate #define AMR_QIDB_SUBMIT 0x00000001 /* mailbox ready for work */ 618*7c478bd9Sstevel@tonic-gate #define AMR_QIDB_ACK 0x00000002 /* mailbox done */ 619*7c478bd9Sstevel@tonic-gate #define AMR_QODB_READY 0x10001234 /* work ready to be processed */ 620*7c478bd9Sstevel@tonic-gate 621*7c478bd9Sstevel@tonic-gate /* 622*7c478bd9Sstevel@tonic-gate * Initialisation status 623*7c478bd9Sstevel@tonic-gate */ 624*7c478bd9Sstevel@tonic-gate #define AMR_QINIT_SCAN 0x01 /* init scanning drives */ 625*7c478bd9Sstevel@tonic-gate #define AMR_QINIT_SCANINIT 0x02 /* init scanning initialising */ 626*7c478bd9Sstevel@tonic-gate #define AMR_QINIT_FIRMWARE 0x03 /* init firmware initing */ 627*7c478bd9Sstevel@tonic-gate #define AMR_QINIT_INPROG 0xdc /* init in progress */ 628*7c478bd9Sstevel@tonic-gate #define AMR_QINIT_SPINUP 0x2c /* init spinning drives */ 629*7c478bd9Sstevel@tonic-gate #define AMR_QINIT_NOMEM 0xac /* insufficient memory */ 630*7c478bd9Sstevel@tonic-gate #define AMR_QINIT_CACHEFLUSH 0xbc /* init flushing cache */ 631*7c478bd9Sstevel@tonic-gate #define AMR_QINIT_DONE 0x9c /* init successfully done */ 632*7c478bd9Sstevel@tonic-gate 633*7c478bd9Sstevel@tonic-gate /* 634*7c478bd9Sstevel@tonic-gate * I/O primitives 635*7c478bd9Sstevel@tonic-gate */ 636*7c478bd9Sstevel@tonic-gate #define AMR_QPUT_IDB(sc, val) pci_config_put32(sc->regsmap_handle, \ 637*7c478bd9Sstevel@tonic-gate AMR_QIDB, val) 638*7c478bd9Sstevel@tonic-gate #define AMR_QGET_IDB(sc) pci_config_get32(sc->regsmap_handle, \ 639*7c478bd9Sstevel@tonic-gate AMR_QIDB) 640*7c478bd9Sstevel@tonic-gate #define AMR_QPUT_ODB(sc, val) pci_config_put32(sc->regsmap_handle, \ 641*7c478bd9Sstevel@tonic-gate AMR_QODB, val) 642*7c478bd9Sstevel@tonic-gate #define AMR_QGET_ODB(sc) pci_config_get32(sc->regsmap_handle, \ 643*7c478bd9Sstevel@tonic-gate AMR_QODB) 644*7c478bd9Sstevel@tonic-gate 645*7c478bd9Sstevel@tonic-gate /* 646*7c478bd9Sstevel@tonic-gate * I/O registers 647*7c478bd9Sstevel@tonic-gate */ 648*7c478bd9Sstevel@tonic-gate #define AMR_SCMD 0x10 /* command/ack register (write) */ 649*7c478bd9Sstevel@tonic-gate #define AMR_SMBOX_BUSY 0x10 /* mailbox status (read) */ 650*7c478bd9Sstevel@tonic-gate #define AMR_STOGGLE 0x11 /* interrupt enable bit here */ 651*7c478bd9Sstevel@tonic-gate #define AMR_SMBOX_0 0x14 /* mailbox physical address low byte */ 652*7c478bd9Sstevel@tonic-gate #define AMR_SMBOX_1 0x15 653*7c478bd9Sstevel@tonic-gate #define AMR_SMBOX_2 0x16 654*7c478bd9Sstevel@tonic-gate #define AMR_SMBOX_3 0x17 /* high byte */ 655*7c478bd9Sstevel@tonic-gate #define AMR_SMBOX_ENABLE 0x18 /* atomic mailbox address enable */ 656*7c478bd9Sstevel@tonic-gate #define AMR_SINTR 0x1a /* interrupt status */ 657*7c478bd9Sstevel@tonic-gate 658*7c478bd9Sstevel@tonic-gate /* 659*7c478bd9Sstevel@tonic-gate * I/O magic numbers 660*7c478bd9Sstevel@tonic-gate */ 661*7c478bd9Sstevel@tonic-gate #define AMR_SCMD_POST 0x10 /* SCMD to initiate action on mailbox */ 662*7c478bd9Sstevel@tonic-gate #define AMR_SCMD_ACKINTR 0x08 /* SCMD to ack mailbox retrieved */ 663*7c478bd9Sstevel@tonic-gate #define AMR_STOGL_IENABLE 0xc0 /* in STOGGLE */ 664*7c478bd9Sstevel@tonic-gate #define AMR_SINTR_VALID 0x40 /* in SINTR */ 665*7c478bd9Sstevel@tonic-gate #define AMR_SMBOX_BUSYFLAG 0x10 /* in SMBOX_BUSY */ 666*7c478bd9Sstevel@tonic-gate #define AMR_SMBOX_ADDR 0x00 /* SMBOX_ENABLE */ 667*7c478bd9Sstevel@tonic-gate 668*7c478bd9Sstevel@tonic-gate /* 669*7c478bd9Sstevel@tonic-gate * Initialisation status 670*7c478bd9Sstevel@tonic-gate */ 671*7c478bd9Sstevel@tonic-gate #define AMR_SINIT_ABEND 0xee /* init abnormal terminated */ 672*7c478bd9Sstevel@tonic-gate #define AMR_SINIT_NOMEM 0xca /* insufficient memory */ 673*7c478bd9Sstevel@tonic-gate #define AMR_SINIT_CACHEFLUSH 0xbb /* firmware flushing cache */ 674*7c478bd9Sstevel@tonic-gate #define AMR_SINIT_INPROG 0x11 /* init in progress */ 675*7c478bd9Sstevel@tonic-gate #define AMR_SINIT_SPINUP 0x22 /* firmware spinning drives */ 676*7c478bd9Sstevel@tonic-gate #define AMR_SINIT_DONE 0x99 /* init successfully done */ 677*7c478bd9Sstevel@tonic-gate 678*7c478bd9Sstevel@tonic-gate /* 679*7c478bd9Sstevel@tonic-gate * I/O primitives 680*7c478bd9Sstevel@tonic-gate */ 681*7c478bd9Sstevel@tonic-gate #define AMR_SPUT_ISTAT(sc, val) pci_config_put8(sc->regsmap_handle, \ 682*7c478bd9Sstevel@tonic-gate AMR_SINTR, val) 683*7c478bd9Sstevel@tonic-gate #define AMR_SGET_ISTAT(sc) pci_config_get8(sc->regsmap_handle, AMR_SINTR) 684*7c478bd9Sstevel@tonic-gate #define AMR_SACK_INTERRUPT(sc) pci_config_put8(sc->regsmap_handle, \ 685*7c478bd9Sstevel@tonic-gate AMR_SCMD, AMR_SCMD_ACKINTR) 686*7c478bd9Sstevel@tonic-gate #define AMR_SPOST_COMMAND(sc) pci_config_put8(sc->regsmap_handle, AMR_SCMD, \ 687*7c478bd9Sstevel@tonic-gate AMR_SCMD_POST) 688*7c478bd9Sstevel@tonic-gate #define AMR_SGET_MBSTAT(sc) pci_config_get8(sc->regsmap_handle, \ 689*7c478bd9Sstevel@tonic-gate AMR_SMBOX_BUSY) 690*7c478bd9Sstevel@tonic-gate 691*7c478bd9Sstevel@tonic-gate #define AMR_SENABLE_INTR(sc) \ 692*7c478bd9Sstevel@tonic-gate pci_config_put8(sc->regsmap_handle, AMR_STOGGLE, \ 693*7c478bd9Sstevel@tonic-gate pci_config_get8(sc->regsmap_handle, AMR_STOGGLE) \ 694*7c478bd9Sstevel@tonic-gate | AMR_STOGL_IENABLE) 695*7c478bd9Sstevel@tonic-gate 696*7c478bd9Sstevel@tonic-gate #define AMR_SDISABLE_INTR(sc) \ 697*7c478bd9Sstevel@tonic-gate pci_config_put8(sc->regsmap_handle, AMR_STOGGLE, \ 698*7c478bd9Sstevel@tonic-gate pci_config_get8(sc->regsmap_handle, AMR_STOGGLE) \ 699*7c478bd9Sstevel@tonic-gate & ~AMR_STOGL_IENABLE) 700*7c478bd9Sstevel@tonic-gate 701*7c478bd9Sstevel@tonic-gate #define AMR_SBYTE_SET(sc, reg, val) pci_config_put8(sc->regsmap_handle, \ 702*7c478bd9Sstevel@tonic-gate reg, val) 703*7c478bd9Sstevel@tonic-gate 704*7c478bd9Sstevel@tonic-gate #endif /* _KERNEL */ 705*7c478bd9Sstevel@tonic-gate 706*7c478bd9Sstevel@tonic-gate #ifdef __cplusplus 707*7c478bd9Sstevel@tonic-gate } 708*7c478bd9Sstevel@tonic-gate #endif 709*7c478bd9Sstevel@tonic-gate 710*7c478bd9Sstevel@tonic-gate #endif /* _AMRREG_H */ 711