1*a3114836SGerry Liu /* 2*a3114836SGerry Liu * CDDL HEADER START 3*a3114836SGerry Liu * 4*a3114836SGerry Liu * The contents of this file are subject to the terms of the 5*a3114836SGerry Liu * Common Development and Distribution License (the "License"). 6*a3114836SGerry Liu * You may not use this file except in compliance with the License. 7*a3114836SGerry Liu * 8*a3114836SGerry Liu * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9*a3114836SGerry Liu * or http://www.opensolaris.org/os/licensing. 10*a3114836SGerry Liu * See the License for the specific language governing permissions 11*a3114836SGerry Liu * and limitations under the License. 12*a3114836SGerry Liu * 13*a3114836SGerry Liu * When distributing Covered Code, include this CDDL HEADER in each 14*a3114836SGerry Liu * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15*a3114836SGerry Liu * If applicable, add the following below this CDDL HEADER, with the 16*a3114836SGerry Liu * fields enclosed by brackets "[]" replaced with your own identifying 17*a3114836SGerry Liu * information: Portions Copyright [yyyy] [name of copyright owner] 18*a3114836SGerry Liu * 19*a3114836SGerry Liu * CDDL HEADER END 20*a3114836SGerry Liu */ 21*a3114836SGerry Liu /* 22*a3114836SGerry Liu * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 23*a3114836SGerry Liu * Use is subject to license terms. 24*a3114836SGerry Liu */ 25*a3114836SGerry Liu /* 26*a3114836SGerry Liu * Copyright (c) 2010, Intel Corporation. 27*a3114836SGerry Liu * All rights reserved. 28*a3114836SGerry Liu */ 29*a3114836SGerry Liu 30*a3114836SGerry Liu #ifndef _SYS_DRMACH_H_ 31*a3114836SGerry Liu #define _SYS_DRMACH_H_ 32*a3114836SGerry Liu #include <sys/types.h> 33*a3114836SGerry Liu #include <sys/memlist.h> 34*a3114836SGerry Liu #include <sys/ddi.h> 35*a3114836SGerry Liu #include <sys/ddi_impldefs.h> 36*a3114836SGerry Liu #include <sys/sunddi.h> 37*a3114836SGerry Liu #include <sys/sunndi.h> 38*a3114836SGerry Liu #include <sys/sysevent.h> 39*a3114836SGerry Liu #include <sys/x86_archext.h> 40*a3114836SGerry Liu #include <sys/sbd_ioctl.h> 41*a3114836SGerry Liu 42*a3114836SGerry Liu #ifdef __cplusplus 43*a3114836SGerry Liu extern "C" { 44*a3114836SGerry Liu #endif 45*a3114836SGerry Liu 46*a3114836SGerry Liu #define MAX_BOARDS drmach_max_boards() 47*a3114836SGerry Liu #define MAX_MEM_UNITS_PER_BOARD drmach_max_mem_units_per_board() 48*a3114836SGerry Liu #define MAX_IO_UNITS_PER_BOARD drmach_max_io_units_per_board() 49*a3114836SGerry Liu #define MAX_CMP_UNITS_PER_BOARD drmach_max_cmp_units_per_board() 50*a3114836SGerry Liu 51*a3114836SGerry Liu /* DR uses MAX_CORES_PER_CMP as number of logical CPUs within a CMP. */ 52*a3114836SGerry Liu #define MAX_CORES_PER_CMP drmach_max_core_per_cmp() 53*a3114836SGerry Liu 54*a3114836SGerry Liu /* Maximum possible logical CPUs per board. */ 55*a3114836SGerry Liu #define MAX_CPU_UNITS_PER_BOARD (MAX_CMP_UNITS_PER_BOARD * MAX_CORES_PER_CMP) 56*a3114836SGerry Liu 57*a3114836SGerry Liu /* Check whether CPU is CMP. True if chip has more than one core/thread. */ 58*a3114836SGerry Liu #define CPU_IMPL_IS_CMP(impl) (MAX_CORES_PER_CMP > 1) 59*a3114836SGerry Liu 60*a3114836SGerry Liu /* CPU implementation ID for Intel Nehalem CPU. */ 61*a3114836SGerry Liu #define X86_CPU_IMPL_NEHALEM_EX 0x062E0000 62*a3114836SGerry Liu #define X86_CPU_IMPL_UNKNOWN 0x00000000 63*a3114836SGerry Liu 64*a3114836SGerry Liu /* returned with drmach_board_find_devices callback */ 65*a3114836SGerry Liu #define DRMACH_DEVTYPE_CPU "cpu" 66*a3114836SGerry Liu #define DRMACH_DEVTYPE_MEM "memory" 67*a3114836SGerry Liu #define DRMACH_DEVTYPE_PCI "pci" 68*a3114836SGerry Liu 69*a3114836SGerry Liu /* 70*a3114836SGerry Liu * x86 platform specific routines currently only defined 71*a3114836SGerry Liu * in drmach_acpi.c and referenced by DR. 72*a3114836SGerry Liu */ 73*a3114836SGerry Liu 74*a3114836SGerry Liu typedef void *drmachid_t; 75*a3114836SGerry Liu 76*a3114836SGerry Liu typedef struct { 77*a3114836SGerry Liu boolean_t assigned; 78*a3114836SGerry Liu boolean_t powered; 79*a3114836SGerry Liu boolean_t configured; 80*a3114836SGerry Liu boolean_t busy; 81*a3114836SGerry Liu boolean_t empty; 82*a3114836SGerry Liu sbd_cond_t cond; 83*a3114836SGerry Liu char type[SBD_TYPE_LEN]; 84*a3114836SGerry Liu char info[SBD_MAX_INFO]; 85*a3114836SGerry Liu } drmach_status_t; 86*a3114836SGerry Liu 87*a3114836SGerry Liu typedef struct { 88*a3114836SGerry Liu int size; 89*a3114836SGerry Liu char *copts; 90*a3114836SGerry Liu } drmach_opts_t; 91*a3114836SGerry Liu 92*a3114836SGerry Liu typedef struct { 93*a3114836SGerry Liu uint64_t mi_basepa; 94*a3114836SGerry Liu uint64_t mi_size; 95*a3114836SGerry Liu uint64_t mi_slice_base; 96*a3114836SGerry Liu uint64_t mi_slice_top; 97*a3114836SGerry Liu uint64_t mi_slice_size; 98*a3114836SGerry Liu uint64_t mi_alignment_mask; 99*a3114836SGerry Liu } drmach_mem_info_t; 100*a3114836SGerry Liu 101*a3114836SGerry Liu extern uint_t drmach_max_boards(void); 102*a3114836SGerry Liu extern uint_t drmach_max_io_units_per_board(void); 103*a3114836SGerry Liu extern uint_t drmach_max_cmp_units_per_board(void); 104*a3114836SGerry Liu extern uint_t drmach_max_mem_units_per_board(void); 105*a3114836SGerry Liu extern uint_t drmach_max_core_per_cmp(void); 106*a3114836SGerry Liu 107*a3114836SGerry Liu extern sbd_error_t *drmach_get_dip(drmachid_t id, dev_info_t **dip); 108*a3114836SGerry Liu extern sbd_error_t *drmach_release(drmachid_t id); 109*a3114836SGerry Liu extern sbd_error_t *drmach_pre_op(int cmd, drmachid_t id, 110*a3114836SGerry Liu drmach_opts_t *opts, void *devsetp); 111*a3114836SGerry Liu extern sbd_error_t *drmach_post_op(int cmd, drmachid_t id, 112*a3114836SGerry Liu drmach_opts_t *opts, int rv); 113*a3114836SGerry Liu extern sbd_error_t *drmach_configure(drmachid_t id, int flags); 114*a3114836SGerry Liu extern sbd_error_t *drmach_unconfigure(drmachid_t id, int flags); 115*a3114836SGerry Liu extern sbd_error_t *drmach_status(drmachid_t id, drmach_status_t *stat); 116*a3114836SGerry Liu extern sbd_error_t *drmach_passthru(drmachid_t id, 117*a3114836SGerry Liu drmach_opts_t *opts); 118*a3114836SGerry Liu 119*a3114836SGerry Liu extern sbd_error_t *drmach_board_find_devices(drmachid_t id, void *a, 120*a3114836SGerry Liu sbd_error_t *(*found)(void *a, const char *, int, drmachid_t)); 121*a3114836SGerry Liu extern int drmach_board_lookup(int bnum, drmachid_t *id); 122*a3114836SGerry Liu extern sbd_error_t *drmach_board_name(int bnum, char *buf, int buflen); 123*a3114836SGerry Liu extern sbd_error_t *drmach_board_assign(int bnum, drmachid_t *id); 124*a3114836SGerry Liu extern sbd_error_t *drmach_board_unassign(drmachid_t id); 125*a3114836SGerry Liu extern sbd_error_t *drmach_board_poweroff(drmachid_t id); 126*a3114836SGerry Liu extern sbd_error_t *drmach_board_poweron(drmachid_t id); 127*a3114836SGerry Liu extern sbd_error_t *drmach_board_test(drmachid_t id, drmach_opts_t *opts, 128*a3114836SGerry Liu int force); 129*a3114836SGerry Liu extern sbd_error_t *drmach_board_connect(drmachid_t id, 130*a3114836SGerry Liu drmach_opts_t *opts); 131*a3114836SGerry Liu extern sbd_error_t *drmach_board_disconnect(drmachid_t id, 132*a3114836SGerry Liu drmach_opts_t *opts); 133*a3114836SGerry Liu extern sbd_error_t *drmach_board_deprobe(drmachid_t id); 134*a3114836SGerry Liu extern int drmach_board_is_floating(drmachid_t); 135*a3114836SGerry Liu 136*a3114836SGerry Liu extern sbd_error_t *drmach_cpu_get_id(drmachid_t id, processorid_t *cpuid); 137*a3114836SGerry Liu extern sbd_error_t *drmach_cpu_get_impl(drmachid_t id, int *ip); 138*a3114836SGerry Liu extern sbd_error_t *drmach_cpu_disconnect(drmachid_t id); 139*a3114836SGerry Liu 140*a3114836SGerry Liu extern sbd_error_t *drmach_io_is_attached(drmachid_t id, int *yes); 141*a3114836SGerry Liu extern sbd_error_t *drmach_io_post_attach(drmachid_t id); 142*a3114836SGerry Liu extern sbd_error_t *drmach_io_pre_release(drmachid_t id); 143*a3114836SGerry Liu extern sbd_error_t *drmach_io_unrelease(drmachid_t id); 144*a3114836SGerry Liu extern sbd_error_t *drmach_io_post_release(drmachid_t id); 145*a3114836SGerry Liu 146*a3114836SGerry Liu extern sbd_error_t *drmach_mem_get_slice_info(drmachid_t id, 147*a3114836SGerry Liu uint64_t *basepa, uint64_t *endpa, 148*a3114836SGerry Liu uint64_t *sizep); 149*a3114836SGerry Liu extern sbd_error_t *drmach_mem_get_memlist(drmachid_t id, 150*a3114836SGerry Liu struct memlist **ml); 151*a3114836SGerry Liu extern sbd_error_t *drmach_mem_get_info(drmachid_t, drmach_mem_info_t *); 152*a3114836SGerry Liu extern sbd_error_t *drmach_mem_enable(drmachid_t id); 153*a3114836SGerry Liu extern sbd_error_t *drmach_mem_disable(drmachid_t id); 154*a3114836SGerry Liu extern sbd_error_t *drmach_mem_add_span(drmachid_t id, 155*a3114836SGerry Liu uint64_t basepa, uint64_t size); 156*a3114836SGerry Liu extern sbd_error_t *drmach_mem_del_span(drmachid_t id, 157*a3114836SGerry Liu uint64_t basepa, uint64_t size); 158*a3114836SGerry Liu extern sbd_error_t *drmach_copy_rename_init( 159*a3114836SGerry Liu drmachid_t dst_id, drmachid_t src_id, 160*a3114836SGerry Liu struct memlist *src_copy_ml, 161*a3114836SGerry Liu drmachid_t *pgm_id); 162*a3114836SGerry Liu extern sbd_error_t *drmach_copy_rename_fini(drmachid_t id); 163*a3114836SGerry Liu extern void drmach_copy_rename(drmachid_t id); 164*a3114836SGerry Liu extern int drmach_copy_rename_need_suspend(drmachid_t id); 165*a3114836SGerry Liu 166*a3114836SGerry Liu extern int drmach_log_sysevent(int board, char *hint, int flag, 167*a3114836SGerry Liu int verbose); 168*a3114836SGerry Liu 169*a3114836SGerry Liu extern int drmach_verify_sr(dev_info_t *dip, int sflag); 170*a3114836SGerry Liu extern void drmach_suspend_last(); 171*a3114836SGerry Liu extern void drmach_resume_first(); 172*a3114836SGerry Liu 173*a3114836SGerry Liu #ifdef __cplusplus 174*a3114836SGerry Liu } 175*a3114836SGerry Liu #endif 176*a3114836SGerry Liu 177*a3114836SGerry Liu #endif /* _SYS_DRMACH_H_ */ 178