10e75152Eric Saxe/*
20e75152Eric Saxe * CDDL HEADER START
30e75152Eric Saxe *
40e75152Eric Saxe * The contents of this file are subject to the terms of the
50e75152Eric Saxe * Common Development and Distribution License (the "License").
60e75152Eric Saxe * You may not use this file except in compliance with the License.
70e75152Eric Saxe *
80e75152Eric Saxe * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
90e75152Eric Saxe * or http://www.opensolaris.org/os/licensing.
100e75152Eric Saxe * See the License for the specific language governing permissions
110e75152Eric Saxe * and limitations under the License.
120e75152Eric Saxe *
130e75152Eric Saxe * When distributing Covered Code, include this CDDL HEADER in each
140e75152Eric Saxe * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
150e75152Eric Saxe * If applicable, add the following below this CDDL HEADER, with the
160e75152Eric Saxe * fields enclosed by brackets "[]" replaced with your own identifying
170e75152Eric Saxe * information: Portions Copyright [yyyy] [name of copyright owner]
180e75152Eric Saxe *
190e75152Eric Saxe * CDDL HEADER END
200e75152Eric Saxe */
210e75152Eric Saxe/*
220e75152Eric Saxe * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
230e75152Eric Saxe * Use is subject to license terms.
240e75152Eric Saxe */
25444f66eMark Haywood/*
26444f66eMark Haywood * Copyright (c) 2009,  Intel Corporation.
27444f66eMark Haywood * All Rights Reserved.
28444f66eMark Haywood */
290e75152Eric Saxe
300e75152Eric Saxe#ifndef	_CPUPM_MACH_H
310e75152Eric Saxe#define	_CPUPM_MACH_H
320e75152Eric Saxe
330e75152Eric Saxe#ifdef __cplusplus
340e75152Eric Saxeextern "C" {
350e75152Eric Saxe#endif
360e75152Eric Saxe
370e75152Eric Saxe#include <sys/ddi.h>
380e75152Eric Saxe#include <sys/sunddi.h>
390e75152Eric Saxe#include <sys/cpuvar.h>
400e75152Eric Saxe#include <sys/ksynch.h>
410e75152Eric Saxe#include <sys/cpu_pm.h>
420e75152Eric Saxe
430e75152Eric Saxe/*
440e75152Eric Saxe * CPU power domains
450e75152Eric Saxe */
460e75152Eric Saxetypedef struct cpupm_state_domains {
470e75152Eric Saxe	struct cpupm_state_domains	*pm_next;
480e75152Eric Saxe	uint32_t			pm_domain;
490e75152Eric Saxe	uint32_t			pm_type;
500e75152Eric Saxe	cpuset_t			pm_cpus;
510e75152Eric Saxe	kmutex_t			pm_lock;
520e75152Eric Saxe} cpupm_state_domains_t;
530e75152Eric Saxe
540e75152Eric Saxeextern cpupm_state_domains_t *cpupm_pstate_domains;
550e75152Eric Saxeextern cpupm_state_domains_t *cpupm_tstate_domains;
560e75152Eric Saxeextern cpupm_state_domains_t *cpupm_cstate_domains;
570e75152Eric Saxe
580e75152Eric Saxe/*
590e75152Eric Saxe * Different processor families have their own technologies for supporting
600e75152Eric Saxe * CPU power management (i.e., Intel has Enhanced SpeedStep for some of its
610e75152Eric Saxe * processors and AMD has PowerNow! for some of its processors). We support
620e75152Eric Saxe * these different technologies via modules that export the interfaces
630e75152Eric Saxe * described below.
640e75152Eric Saxe *
650e75152Eric Saxe * If a module implements the technology that should be used to manage
660e75152Eric Saxe * the current CPU device, then the cpus_init() module should return
670e75152Eric Saxe * succesfully (i.e., return code of 0) and perform any initialization
680e75152Eric Saxe * such that future power transistions can be performed by calling
690e75152Eric Saxe * the cpus_change() interface. And the cpups_fini() interface can be
700e75152Eric Saxe * used to free any resources allocated by cpus_init().
710e75152Eric Saxe */
720e75152Eric Saxetypedef struct cpupm_state_ops {
730e75152Eric Saxe	char	*cpups_label;
740e75152Eric Saxe	int	(*cpus_init)(cpu_t *);
750e75152Eric Saxe	void	(*cpus_fini)(cpu_t *);
760e75152Eric Saxe	void	(*cpus_change)(cpuset_t, uint32_t);
77444f66eMark Haywood	void	(*cpus_stop)(cpu_t *);
780e75152Eric Saxe} cpupm_state_ops_t;
790e75152Eric Saxe
800e75152Eric Saxe/*
810e75152Eric Saxe * Data kept for each C-state power-domain.
820e75152Eric Saxe */
830e75152Eric Saxetypedef struct cma_c_state {
840e75152Eric Saxe	uint32_t	cs_next_cstate;	/* computed best C-state */
850e75152Eric Saxe
860e75152Eric Saxe	uint32_t	cs_cnt;		/* times accessed */
870e75152Eric Saxe	uint32_t	cs_type;	/* current ACPI idle type */
880e75152Eric Saxe
890e75152Eric Saxe	hrtime_t	cs_idle_enter;	/* entered idle */
900e75152Eric Saxe	hrtime_t	cs_idle_exit;	/* left idle */
910e75152Eric Saxe
920e75152Eric Saxe	hrtime_t	cs_smpl_start;	/* accounting sample began */
930e75152Eric Saxe	hrtime_t	cs_idle;	/* time idle */
940e75152Eric Saxe	hrtime_t	cs_smpl_len;	/* sample duration */
950e75152Eric Saxe	hrtime_t	cs_smpl_idle;	/* idle time in last sample */
960e75152Eric Saxe	uint64_t	cs_smpl_idle_pct;	/* % idle time in last smpl */
970e75152Eric Saxe} cma_c_state_t;
980e75152Eric Saxe
990e75152Eric Saxetypedef union cma_state {
1000e75152Eric Saxe	cma_c_state_t	*cstate;
1010e75152Eric Saxe	uint32_t	pstate;
1020e75152Eric Saxe} cma_state_t;
1030e75152Eric Saxe
1040e75152Eric Saxetypedef struct cpupm_mach_acpi_state {
1050e75152Eric Saxe	cpupm_state_ops_t	*cma_ops;
1060e75152Eric Saxe	cpupm_state_domains_t   *cma_domain;
1070e75152Eric Saxe	cma_state_t		cma_state;
1080e75152Eric Saxe} cpupm_mach_acpi_state_t;
1090e75152Eric Saxe
1105951cedHans Rosenfeldtypedef struct cpupm_mach_turbo_info {
1115951cedHans Rosenfeld	kstat_t		*turbo_ksp;		/* turbo kstat */
1125951cedHans Rosenfeld	int		in_turbo;		/* in turbo? */
1135951cedHans Rosenfeld	int		turbo_supported;	/* turbo flag */
1145951cedHans Rosenfeld	uint64_t	t_mcnt;			/* turbo mcnt */
1155951cedHans Rosenfeld	uint64_t	t_acnt;			/* turbo acnt */
1165951cedHans Rosenfeld} cpupm_mach_turbo_info_t;
1175951cedHans Rosenfeld
1180e75152Eric Saxetypedef struct cpupm_mach_state {
1190e75152Eric Saxe	void			*ms_acpi_handle;
1200e75152Eric Saxe	cpupm_mach_acpi_state_t	ms_pstate;
1210e75152Eric Saxe	cpupm_mach_acpi_state_t	ms_cstate;
1220e75152Eric Saxe	cpupm_mach_acpi_state_t	ms_tstate;
1230e75152Eric Saxe	uint32_t		ms_caps;
1240e75152Eric Saxe	dev_info_t		*ms_dip;
1250e75152Eric Saxe	kmutex_t		ms_lock;
1265951cedHans Rosenfeld	cpupm_mach_turbo_info_t	*ms_turbo;
1270e75152Eric Saxe	struct cpupm_notification *ms_handlers;
1280e75152Eric Saxe} cpupm_mach_state_t;
1290e75152Eric Saxe
1300e75152Eric Saxe/*
1310e75152Eric Saxe * Constants used by the Processor Device Notification handler
1320e75152Eric Saxe * that identify what kind of change has occurred.
1330e75152Eric Saxe */
1340e75152Eric Saxe#define	CPUPM_PPC_CHANGE_NOTIFICATION 0x80
1350e75152Eric Saxe#define	CPUPM_CST_CHANGE_NOTIFICATION 0x81
1360e75152Eric Saxe#define	CPUPM_TPC_CHANGE_NOTIFICATION 0x82
1370e75152Eric Saxe
1380e75152Eric Saxetypedef void (*CPUPM_NOTIFY_HANDLER)(void *handle, uint32_t val,
1390e75152Eric Saxe    void *ctx);
1400e75152Eric Saxe
1410e75152Eric Saxetypedef struct cpupm_notification {
1420e75152Eric Saxe	struct cpupm_notification	*nq_next;
1430e75152Eric Saxe	CPUPM_NOTIFY_HANDLER		nq_handler;
1440e75152Eric Saxe	void				*nq_ctx;
1450e75152Eric Saxe} cpupm_notification_t;
1460e75152Eric Saxe
1470e75152Eric Saxe/*
1480e75152Eric Saxe * If any states are added, then make sure to add them to
1490e75152Eric Saxe * CPUPM_ALL_STATES.
1500e75152Eric Saxe */
1510e75152Eric Saxe#define	CPUPM_NO_STATES		0x00
1520e75152Eric Saxe#define	CPUPM_P_STATES		0x01
1530e75152Eric Saxe#define	CPUPM_T_STATES		0x02
1540e75152Eric Saxe#define	CPUPM_C_STATES		0x04
1550e75152Eric Saxe#define	CPUPM_ALL_STATES	(CPUPM_P_STATES \
1560e75152Eric Saxe				| CPUPM_T_STATES \
1570e75152Eric Saxe				| CPUPM_C_STATES)
1580e75152Eric Saxe
1590e75152Eric Saxe/*
1600e75152Eric Saxe * An error in initializing any of the CPU PM results in disabling
1610e75152Eric Saxe * CPU power management.
1620e75152Eric Saxe */
1630e75152Eric Saxe#define	CPUPM_DISABLE() cpupm_disable(CPUPM_ALL_STATES)
1640e75152Eric Saxe
1650e75152Eric Saxe#define	CPUPM_SPEED_HZ(unused, mhz) ((uint64_t)mhz * 1000000)
1660e75152Eric Saxe
1670e75152Eric Saxe/*
1680e75152Eric Saxe * Callbacks used for CPU power management.
1690e75152Eric Saxe */
170444f66eMark Haywoodextern void (*cpupm_ppm_alloc_pstate_domains)(cpu_t *);
171444f66eMark Haywoodextern void (*cpupm_ppm_free_pstate_domains)(cpu_t *);
1720e75152Eric Saxeextern void (*cpupm_redefine_topspeed)(void *);
1730e75152Eric Saxeextern int (*cpupm_get_topspeed_callb)(void *);
1740e75152Eric Saxeextern void (*cpupm_set_topspeed_callb)(void *, int);
1750e75152Eric Saxe
1760e75152Eric Saxeextern void cpupm_init(cpu_t *);
177444f66eMark Haywoodextern void cpupm_fini(cpu_t *);
178444f66eMark Haywoodextern void cpupm_start(cpu_t *);
179444f66eMark Haywoodextern void cpupm_stop(cpu_t *);
180444f66eMark Haywoodextern boolean_t cpupm_is_ready(cpu_t *);
1810e75152Eric Saxeextern boolean_t cpupm_is_enabled(uint32_t);
1820e75152Eric Saxeextern void cpupm_disable(uint32_t);
1830e75152Eric Saxeextern void cpupm_alloc_domains(cpu_t *, int);
1840e75152Eric Saxeextern void cpupm_free_domains(cpupm_state_domains_t **);
185444f66eMark Haywoodextern void cpupm_remove_domains(cpu_t *, int, cpupm_state_domains_t **);
1860e75152Eric Saxeextern void cpupm_alloc_ms_cstate(cpu_t *cp);
1870e75152Eric Saxeextern void cpupm_free_ms_cstate(cpu_t *cp);
1880e75152Eric Saxeextern void cpupm_state_change(cpu_t *, int, int);
1890e75152Eric Saxeextern id_t cpupm_plat_domain_id(cpu_t *cp, cpupm_dtype_t type);
1900e75152Eric Saxeextern uint_t cpupm_plat_state_enumerate(cpu_t *, cpupm_dtype_t,
1910e75152Eric Saxe    cpupm_state_t *);
1920e75152Eric Saxeextern int cpupm_plat_change_state(cpu_t *, cpupm_state_t *);
1930e75152Eric Saxeextern uint_t cpupm_get_speeds(cpu_t *, int **);
1940e75152Eric Saxeextern void cpupm_free_speeds(int *, uint_t);
195444f66eMark Haywoodextern boolean_t cpupm_power_ready(cpu_t *);
196444f66eMark Haywoodextern boolean_t cpupm_throttle_ready(cpu_t *);
197444f66eMark Haywoodextern boolean_t cpupm_cstate_ready(cpu_t *);
1980e75152Eric Saxeextern void cpupm_add_notify_handler(cpu_t *, CPUPM_NOTIFY_HANDLER, void *);
1990e75152Eric Saxeextern int cpupm_get_top_speed(cpu_t *);
2000e75152Eric Saxeextern void cpupm_idle_cstate_data(cma_c_state_t *, int);
2010e75152Eric Saxeextern void cpupm_wakeup_cstate_data(cma_c_state_t *, hrtime_t);
2025951cedHans Rosenfeldextern void cpupm_record_turbo_info(cpupm_mach_turbo_info_t *, uint32_t,
2035951cedHans Rosenfeld    uint32_t);
2045951cedHans Rosenfeldextern cpupm_mach_turbo_info_t *cpupm_turbo_init(cpu_t *);
2055951cedHans Rosenfeldextern void cpupm_turbo_fini(cpupm_mach_turbo_info_t *);
2060e75152Eric Saxe
2070e75152Eric Saxe#ifdef __cplusplus
2080e75152Eric Saxe}
2090e75152Eric Saxe#endif
2100e75152Eric Saxe
2110e75152Eric Saxe#endif	/* _CPUPM_MACH_H */
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