xref: /illumos-gate/usr/src/uts/i86pc/os/pci_cfgspace.c (revision 7f58d7249497f31d23e7d0c4222d27998c8b0d38)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #pragma ident	"%Z%%M%	%I%	%E% SMI"
28 
29 /*
30  * PCI configuration space access routines
31  */
32 
33 #include <sys/systm.h>
34 #include <sys/psw.h>
35 #include <sys/bootconf.h>
36 #include <sys/reboot.h>
37 #include <sys/pci_impl.h>
38 #include <sys/pci_cfgspace.h>
39 #include <sys/pci_cfgspace_impl.h>
40 
41 int pci_bios_cfg_type = PCI_MECHANISM_UNKNOWN;
42 int pci_bios_nbus;
43 int pci_bios_mech;
44 int pci_bios_vers;
45 
46 /*
47  * These two variables can be used to force a configuration mechanism or
48  * to force which function is used to probe for the presence of the PCI bus.
49  */
50 int	PCI_CFG_TYPE = 0;
51 int	PCI_PROBE_TYPE = 0;
52 
53 /*
54  * These function pointers lead to the actual implementation routines
55  * for configuration space access.  Normally they lead to either the
56  * pci_mech1_* or pci_mech2_* routines, but they can also lead to
57  * routines that work around chipset bugs.
58  */
59 uint8_t (*pci_getb_func)(int bus, int dev, int func, int reg);
60 uint16_t (*pci_getw_func)(int bus, int dev, int func, int reg);
61 uint32_t (*pci_getl_func)(int bus, int dev, int func, int reg);
62 void (*pci_putb_func)(int bus, int dev, int func, int reg, uint8_t val);
63 void (*pci_putw_func)(int bus, int dev, int func, int reg, uint16_t val);
64 void (*pci_putl_func)(int bus, int dev, int func, int reg, uint32_t val);
65 
66 /*
67  * Internal routines
68  */
69 static int pci_check(void);
70 static int pci_check_bios(void);
71 static int pci_get_cfg_type(void);
72 
73 /* all config-space access routines share this one... */
74 kmutex_t pcicfg_mutex;
75 
76 /* ..except Orion and Neptune, which have to have their own */
77 kmutex_t pcicfg_chipset_mutex;
78 
79 void
80 pci_cfgspace_init(void)
81 {
82 	mutex_init(&pcicfg_mutex, NULL, MUTEX_SPIN,
83 	    (ddi_iblock_cookie_t)ipltospl(15));
84 	mutex_init(&pcicfg_chipset_mutex, NULL, MUTEX_SPIN,
85 	    (ddi_iblock_cookie_t)ipltospl(15));
86 	if (!pci_check()) {
87 		mutex_destroy(&pcicfg_mutex);
88 		mutex_destroy(&pcicfg_chipset_mutex);
89 	}
90 }
91 
92 /*
93  * This code determines if this system supports PCI and which
94  * type of configuration access method is used
95  */
96 
97 static int
98 pci_check(void)
99 {
100 	/*
101 	 * Only do this once.  NB:  If this is not a PCI system, and we
102 	 * get called twice, we can't detect it and will probably die
103 	 * horribly when we try to ask the BIOS whether PCI is present.
104 	 * This code is safe *ONLY* during system startup when the
105 	 * BIOS is still available.
106 	 */
107 	if (pci_bios_cfg_type != PCI_MECHANISM_UNKNOWN)
108 		return (TRUE);
109 
110 	pci_bios_cfg_type = pci_check_bios();
111 
112 	if (pci_bios_cfg_type == PCI_MECHANISM_NONE)
113 		return (FALSE);
114 
115 	switch (pci_get_cfg_type()) {
116 	case PCI_MECHANISM_1:
117 		if (pci_is_broken_orion()) {
118 			pci_getb_func = pci_orion_getb;
119 			pci_getw_func = pci_orion_getw;
120 			pci_getl_func = pci_orion_getl;
121 			pci_putb_func = pci_orion_putb;
122 			pci_putw_func = pci_orion_putw;
123 			pci_putl_func = pci_orion_putl;
124 		} else {
125 			pci_getb_func = pci_mech1_getb;
126 			pci_getw_func = pci_mech1_getw;
127 			pci_getl_func = pci_mech1_getl;
128 			pci_putb_func = pci_mech1_putb;
129 			pci_putw_func = pci_mech1_putw;
130 			pci_putl_func = pci_mech1_putl;
131 		}
132 		break;
133 
134 	case PCI_MECHANISM_2:
135 		if (pci_check_neptune()) {
136 			/*
137 			 * The BIOS for some systems with the Intel
138 			 * Neptune chipset seem to default to #2 even
139 			 * though the chipset can do #1.  Override
140 			 * the BIOS so that MP systems will work
141 			 * correctly.
142 			 */
143 
144 			pci_getb_func = pci_neptune_getb;
145 			pci_getw_func = pci_neptune_getw;
146 			pci_getl_func = pci_neptune_getl;
147 			pci_putb_func = pci_neptune_putb;
148 			pci_putw_func = pci_neptune_putw;
149 			pci_putl_func = pci_neptune_putl;
150 		} else {
151 			pci_getb_func = pci_mech2_getb;
152 			pci_getw_func = pci_mech2_getw;
153 			pci_getl_func = pci_mech2_getl;
154 			pci_putb_func = pci_mech2_putb;
155 			pci_putw_func = pci_mech2_putw;
156 			pci_putl_func = pci_mech2_putl;
157 		}
158 		break;
159 
160 	default:
161 		return (FALSE);
162 	}
163 
164 	return (TRUE);
165 }
166 
167 
168 static int
169 pci_check_bios(void)
170 {
171 	struct bop_regs regs;
172 	uint32_t	carryflag;
173 	uint16_t	ax, dx;
174 
175 	bzero(&regs, sizeof (regs));
176 	regs.eax.word.ax = (PCI_FUNCTION_ID << 8) | PCI_BIOS_PRESENT;
177 
178 	BOP_DOINT(bootops, 0x1a, &regs);
179 	carryflag = regs.eflags & PS_C;
180 	ax = regs.eax.word.ax;
181 	dx = regs.edx.word.dx;
182 
183 	/* the carry flag must not be set */
184 	if (carryflag != 0)
185 		return (PCI_MECHANISM_NONE);
186 
187 	if (dx != ('P' | 'C'<<8))
188 		return (PCI_MECHANISM_NONE);
189 
190 	/* ah (the high byte of ax) must be zero */
191 	if ((ax & 0xff00) != 0)
192 		return (PCI_MECHANISM_NONE);
193 
194 	pci_bios_mech = (ax & 0x3);
195 	pci_bios_vers = regs.ebx.word.bx;
196 	pci_bios_nbus = (regs.ecx.word.cx & 0xff);
197 
198 	switch (pci_bios_mech) {
199 	default:	/* ?!? */
200 	case 0:		/* supports neither? */
201 		return (PCI_MECHANISM_NONE);
202 
203 	case 1:
204 	case 3:		/* supports both */
205 		return (PCI_MECHANISM_1);
206 
207 	case 2:
208 		return (PCI_MECHANISM_2);
209 	}
210 }
211 
212 static int
213 pci_get_cfg_type(void)
214 {
215 	/* Check to see if the config mechanism has been set in /etc/system */
216 	switch (PCI_CFG_TYPE) {
217 	default:
218 	case 0:
219 		break;
220 	case 1:
221 		return (PCI_MECHANISM_1);
222 	case 2:
223 		return (PCI_MECHANISM_2);
224 	case -1:
225 		return (PCI_MECHANISM_NONE);
226 	}
227 
228 	/* call one of the PCI detection algorithms */
229 	switch (PCI_PROBE_TYPE) {
230 	default:
231 	case 0:
232 		/* From pci_check() and pci_check_bios() */
233 		return (pci_bios_cfg_type);
234 	case -1:
235 		return (PCI_MECHANISM_NONE);
236 	}
237 }
238