1*a3114836SGerry Liu /*
2*a3114836SGerry Liu * CDDL HEADER START
3*a3114836SGerry Liu *
4*a3114836SGerry Liu * The contents of this file are subject to the terms of the
5*a3114836SGerry Liu * Common Development and Distribution License (the "License").
6*a3114836SGerry Liu * You may not use this file except in compliance with the License.
7*a3114836SGerry Liu *
8*a3114836SGerry Liu * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9*a3114836SGerry Liu * or http://www.opensolaris.org/os/licensing.
10*a3114836SGerry Liu * See the License for the specific language governing permissions
11*a3114836SGerry Liu * and limitations under the License.
12*a3114836SGerry Liu *
13*a3114836SGerry Liu * When distributing Covered Code, include this CDDL HEADER in each
14*a3114836SGerry Liu * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15*a3114836SGerry Liu * If applicable, add the following below this CDDL HEADER, with the
16*a3114836SGerry Liu * fields enclosed by brackets "[]" replaced with your own identifying
17*a3114836SGerry Liu * information: Portions Copyright [yyyy] [name of copyright owner]
18*a3114836SGerry Liu *
19*a3114836SGerry Liu * CDDL HEADER END
20*a3114836SGerry Liu */
21*a3114836SGerry Liu
22*a3114836SGerry Liu /*
23*a3114836SGerry Liu * Copyright (c) 2010, Intel Corporation.
24*a3114836SGerry Liu * All rights reserved.
25*a3114836SGerry Liu */
26*a3114836SGerry Liu
27*a3114836SGerry Liu #include <sys/types.h>
28*a3114836SGerry Liu #include <sys/atomic.h>
29*a3114836SGerry Liu #include <sys/sunddi.h>
30*a3114836SGerry Liu #include <sys/sunndi.h>
31*a3114836SGerry Liu #include <sys/acpi/acpi.h>
32*a3114836SGerry Liu #include <sys/acpica.h>
33*a3114836SGerry Liu #include <sys/acpidev.h>
34*a3114836SGerry Liu #include <sys/acpidev_rsc.h>
35*a3114836SGerry Liu #include <sys/acpidev_dr.h>
36*a3114836SGerry Liu #include <sys/acpidev_impl.h>
37*a3114836SGerry Liu
38*a3114836SGerry Liu static ACPI_STATUS acpidev_pci_probe(acpidev_walk_info_t *infop);
39*a3114836SGerry Liu
40*a3114836SGerry Liu /*
41*a3114836SGerry Liu * Default class driver for PCI/PCIEX Host Bridge devices.
42*a3114836SGerry Liu */
43*a3114836SGerry Liu acpidev_class_t acpidev_class_pci = {
44*a3114836SGerry Liu 0, /* adc_refcnt */
45*a3114836SGerry Liu ACPIDEV_CLASS_REV1, /* adc_version */
46*a3114836SGerry Liu ACPIDEV_CLASS_ID_PCI, /* adc_class_id */
47*a3114836SGerry Liu "PCI/PCIex Host Bridge", /* adc_class_name */
48*a3114836SGerry Liu ACPIDEV_TYPE_PCI, /* adc_dev_type */
49*a3114836SGerry Liu NULL, /* adc_private */
50*a3114836SGerry Liu NULL, /* adc_pre_probe */
51*a3114836SGerry Liu NULL, /* adc_post_probe */
52*a3114836SGerry Liu acpidev_pci_probe, /* adc_probe */
53*a3114836SGerry Liu NULL, /* adc_filter */
54*a3114836SGerry Liu NULL, /* adc_init */
55*a3114836SGerry Liu NULL, /* adc_fini */
56*a3114836SGerry Liu };
57*a3114836SGerry Liu
58*a3114836SGerry Liu static char *acpidev_pci_device_ids[] = {
59*a3114836SGerry Liu ACPIDEV_HID_PCIEX_HOSTBRIDGE,
60*a3114836SGerry Liu ACPIDEV_HID_PCI_HOSTBRIDGE,
61*a3114836SGerry Liu };
62*a3114836SGerry Liu
63*a3114836SGerry Liu static char *acpidev_pciex_device_ids[] = {
64*a3114836SGerry Liu ACPIDEV_HID_PCIEX_HOSTBRIDGE,
65*a3114836SGerry Liu };
66*a3114836SGerry Liu
67*a3114836SGerry Liu static void
acpidev_pci_update_status(acpidev_walk_info_t * infop)68*a3114836SGerry Liu acpidev_pci_update_status(acpidev_walk_info_t *infop)
69*a3114836SGerry Liu {
70*a3114836SGerry Liu int status;
71*a3114836SGerry Liu dev_info_t *dip = NULL;
72*a3114836SGerry Liu acpidev_data_handle_t dhdl;
73*a3114836SGerry Liu
74*a3114836SGerry Liu dhdl = infop->awi_data;
75*a3114836SGerry Liu ASSERT((dhdl->aod_iflag & ACPIDEV_ODF_DEVINFO_CREATED) == 0);
76*a3114836SGerry Liu ASSERT((dhdl->aod_iflag & ACPIDEV_ODF_DEVINFO_TAGGED) == 0);
77*a3114836SGerry Liu if ((dhdl->aod_iflag & ACPIDEV_ODF_STATUS_VALID) == 0) {
78*a3114836SGerry Liu status = acpidev_query_device_status(infop->awi_hdl);
79*a3114836SGerry Liu dhdl->aod_status = status;
80*a3114836SGerry Liu dhdl->aod_iflag |= ACPIDEV_ODF_STATUS_VALID;
81*a3114836SGerry Liu } else {
82*a3114836SGerry Liu status = dhdl->aod_status;
83*a3114836SGerry Liu }
84*a3114836SGerry Liu dhdl->aod_level = infop->awi_level;
85*a3114836SGerry Liu dhdl->aod_hdl = infop->awi_hdl;
86*a3114836SGerry Liu dhdl->aod_class = NULL;
87*a3114836SGerry Liu dhdl->aod_class_list = NULL;
88*a3114836SGerry Liu if (acpidev_match_device_id(infop->awi_info,
89*a3114836SGerry Liu ACPIDEV_ARRAY_PARAM(acpidev_pciex_device_ids))) {
90*a3114836SGerry Liu dhdl->aod_class_id = ACPIDEV_CLASS_ID_PCIEX;
91*a3114836SGerry Liu } else {
92*a3114836SGerry Liu dhdl->aod_class_id = ACPIDEV_CLASS_ID_PCI;
93*a3114836SGerry Liu }
94*a3114836SGerry Liu
95*a3114836SGerry Liu if (ACPI_FAILURE(acpica_get_devinfo(infop->awi_hdl, &dip))) {
96*a3114836SGerry Liu dip = NULL;
97*a3114836SGerry Liu } else {
98*a3114836SGerry Liu ASSERT(dip != NULL);
99*a3114836SGerry Liu }
100*a3114836SGerry Liu if (acpidev_check_device_enabled(status)) {
101*a3114836SGerry Liu /*
102*a3114836SGerry Liu * Mark the device as DISABLE if no device node created.
103*a3114836SGerry Liu * BIOS may hide some special PCI/PCIex buses from OS.
104*a3114836SGerry Liu */
105*a3114836SGerry Liu if (dip == NULL) {
106*a3114836SGerry Liu dhdl->aod_dip = NULL;
107*a3114836SGerry Liu dhdl->aod_status &= ~ACPI_STA_DEVICE_ENABLED;
108*a3114836SGerry Liu } else {
109*a3114836SGerry Liu dhdl->aod_dip = dip;
110*a3114836SGerry Liu dhdl->aod_iflag |= ACPIDEV_ODF_DEVINFO_CREATED;
111*a3114836SGerry Liu }
112*a3114836SGerry Liu } else {
113*a3114836SGerry Liu ASSERT(dip == NULL);
114*a3114836SGerry Liu dhdl->aod_dip = NULL;
115*a3114836SGerry Liu dhdl->aod_status &= ~ACPI_STA_DEVICE_ENABLED;
116*a3114836SGerry Liu }
117*a3114836SGerry Liu }
118*a3114836SGerry Liu
119*a3114836SGerry Liu static ACPI_STATUS
acpidev_pci_probe(acpidev_walk_info_t * infop)120*a3114836SGerry Liu acpidev_pci_probe(acpidev_walk_info_t *infop)
121*a3114836SGerry Liu {
122*a3114836SGerry Liu ACPI_STATUS rc = AE_OK;
123*a3114836SGerry Liu
124*a3114836SGerry Liu ASSERT(infop != NULL);
125*a3114836SGerry Liu ASSERT(infop->awi_hdl != NULL);
126*a3114836SGerry Liu ASSERT(infop->awi_info != NULL);
127*a3114836SGerry Liu if (infop->awi_info->Type != ACPI_TYPE_DEVICE ||
128*a3114836SGerry Liu acpidev_match_device_id(infop->awi_info,
129*a3114836SGerry Liu ACPIDEV_ARRAY_PARAM(acpidev_pci_device_ids)) == B_FALSE) {
130*a3114836SGerry Liu return (AE_OK);
131*a3114836SGerry Liu }
132*a3114836SGerry Liu
133*a3114836SGerry Liu if (acpica_get_devcfg_feature(ACPI_DEVCFG_PCI) == 0) {
134*a3114836SGerry Liu return (AE_OK);
135*a3114836SGerry Liu }
136*a3114836SGerry Liu
137*a3114836SGerry Liu if (infop->awi_op_type == ACPIDEV_OP_BOOT_PROBE) {
138*a3114836SGerry Liu /*
139*a3114836SGerry Liu * Check hotplug capability on the first pass.
140*a3114836SGerry Liu */
141*a3114836SGerry Liu acpidev_dr_check(infop);
142*a3114836SGerry Liu } else if (infop->awi_op_type == ACPIDEV_OP_BOOT_REPROBE) {
143*a3114836SGerry Liu /*
144*a3114836SGerry Liu * Check whether the PCI device enumerator has created device
145*a3114836SGerry Liu * nodes for PCI/PCIEX host bridges.
146*a3114836SGerry Liu */
147*a3114836SGerry Liu acpidev_pci_update_status(infop);
148*a3114836SGerry Liu } else if (infop->awi_op_type == ACPIDEV_OP_HOTPLUG_PROBE) {
149*a3114836SGerry Liu /*
150*a3114836SGerry Liu * No support of PCI/PCIEX host bridge hotplug yet.
151*a3114836SGerry Liu * It will come in next phase.
152*a3114836SGerry Liu */
153*a3114836SGerry Liu cmn_err(CE_WARN,
154*a3114836SGerry Liu "!acpidev: no support of PCI/PCIEX host bridge hotplug.");
155*a3114836SGerry Liu /*
156*a3114836SGerry Liu * Don't block the hot-adding process, just skip it.
157*a3114836SGerry Liu */
158*a3114836SGerry Liu rc = AE_OK;
159*a3114836SGerry Liu } else {
160*a3114836SGerry Liu ACPIDEV_DEBUG(CE_WARN, "!acpidev: unknown operation type %u "
161*a3114836SGerry Liu "in acpidev_pci_probe().", infop->awi_op_type);
162*a3114836SGerry Liu rc = AE_BAD_PARAMETER;
163*a3114836SGerry Liu }
164*a3114836SGerry Liu if (ACPI_FAILURE(rc) && rc != AE_NOT_EXIST && rc != AE_ALREADY_EXISTS) {
165*a3114836SGerry Liu cmn_err(CE_CONT, "?acpidev: failed to process PCI/PCIEX host "
166*a3114836SGerry Liu "bridge object %s.\n", infop->awi_name);
167*a3114836SGerry Liu } else {
168*a3114836SGerry Liu rc = AE_OK;
169*a3114836SGerry Liu }
170*a3114836SGerry Liu
171*a3114836SGerry Liu return (rc);
172*a3114836SGerry Liu }
173