27c478bdstevel@tonic-gate * CDDL HEADER START
37c478bdstevel@tonic-gate *
47c478bdstevel@tonic-gate * The contents of this file are subject to the terms of the
520c794bgavinm * Common Development and Distribution License (the "License").
620c794bgavinm * You may not use this file except in compliance with the License.
77c478bdstevel@tonic-gate *
87c478bdstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
97c478bdstevel@tonic-gate * or http://www.opensolaris.org/os/licensing.
107c478bdstevel@tonic-gate * See the License for the specific language governing permissions
117c478bdstevel@tonic-gate * and limitations under the License.
127c478bdstevel@tonic-gate *
137c478bdstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each
147c478bdstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
157c478bdstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the
167c478bdstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying
177c478bdstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner]
187c478bdstevel@tonic-gate *
197c478bdstevel@tonic-gate * CDDL HEADER END
207c478bdstevel@tonic-gate */
23c84b7bbAdrian Frost * Copyright (c) 2006, 2010, Oracle and/or its affiliates. All rights reserved.
24918e0d9Robert Mustacchi * Copyright (c) 2018, Joyent, Inc.
257c478bdstevel@tonic-gate */
277aec1d6cindi#ifndef _GCPU_H
287aec1d6cindi#define	_GCPU_H
307aec1d6cindi#include <sys/types.h>
3120c794bgavinm#include <sys/cpu_module_impl.h>
3220c794bgavinm#include <sys/cpu_module_ms.h>
3320c794bgavinm#include <sys/ksynch.h>
3420c794bgavinm#include <sys/systm.h>
3520c794bgavinm#include <sys/fm/util.h>
377aec1d6cindi#ifdef __cplusplus
387c478bdstevel@tonic-gateextern "C" {
4120c794bgavinm#define	GCPU_MCA_ERRS_PERCPU	10	/* errorq slots per cpu */
4220c794bgavinm#define	GCPU_MCA_MIN_ERRORS	30	/* minimum total errorq slots */
4320c794bgavinm#define	GCPU_MCA_MAX_ERRORS	100	/* maximum total errorq slots */
4520c794bgavinmtypedef struct gcpu_data gcpu_data_t;
4720c794bgavinm#define	GCPU_ERRCODE_MASK_ALL		0xffff
4920c794bgavinmtypedef struct gcpu_error_disp {
5020c794bgavinm	const char *ged_class_fmt;	/* ereport class formatter (last bit) */
5120c794bgavinm	const char *ged_compound_fmt;	/* compound error formatter */
5220c794bgavinm	uint64_t ged_ereport_members;	/* ereport payload members */
5320c794bgavinm	uint16_t ged_errcode_mask_on;	/* errcode bits that must be set ... */
5420c794bgavinm	uint16_t ged_errcode_mask_off;	/* ... and must be clear for a match */
5520c794bgavinm} gcpu_error_disp_t;
5820c794bgavinm * For errorq_dispatch we need to have a single contiguous structure
5920c794bgavinm * capturing all our logout data.  We do not know in advance how many
6020c794bgavinm * error detector banks there are in this cpu model, so we'll manually
6120c794bgavinm * allocate additional space for the gcl_banks array below.
6220c794bgavinm */
6320c794bgavinmtypedef struct gcpu_bank_logout {
6420c794bgavinm	uint64_t gbl_status;		/* MCi_STATUS value */
6520c794bgavinm	uint64_t gbl_addr;		/* MCi_ADDR value */
6620c794bgavinm	uint64_t gbl_misc;		/* MCi_MISC value */
6720c794bgavinm	uint64_t gbl_disp;		/* Error disposition for this bank */
6820c794bgavinm	uint32_t gbl_clrdefcnt;		/* Count of deferred status clears */
6920c794bgavinm} gcpu_bank_logout_t;
7220c794bgavinm * The data structure we "logout" all error telemetry from all banks of
7320c794bgavinm * a cpu to.  The gcl_data array declared with 1 member below will actually
7420c794bgavinm * have gcl_nbanks members - variable with the actual cpu model present.
7520c794bgavinm * After the gcl_data array there is a further model-specific array that
7620c794bgavinm * may be allocated, and gcl_ms_logout will point to that if present.
7720c794bgavinm * This cpu logout data must form one contiguous chunk of memory for
7820c794bgavinm * dispatch with errorq_dispatch.
7920c794bgavinm */
8020c794bgavinmtypedef struct gcpu_logout {
8120c794bgavinm	gcpu_data_t *gcl_gcpu;		/* pointer to per-cpu gcpu_data_t */
8220c794bgavinm	uintptr_t gcl_ip;		/* instruction pointer from #mc trap */
8320c794bgavinm	uint64_t gcl_timestamp;		/* gethrtime() at logout */
8420c794bgavinm	uint64_t gcl_mcg_status;	/* MCG_STATUS register value */
8520c794bgavinm	uint64_t gcl_flags;		/* Flags */
8620c794bgavinm	pc_t gcl_stack[FM_STK_DEPTH];	/* saved stack trace, if any */
8720c794bgavinm	int gcl_stackdepth;		/* saved stack trace depth */
88c84b7bbAdrian Frost	int ismc;			/* is a machine check flag */
8920c794bgavinm	int gcl_nbanks;			/* number of banks in array below */
9020c794bgavinm	void *gcl_ms_logout;		/* Model-specific area after gcl_data */
9120c794bgavinm	gcpu_bank_logout_t gcl_data[1];	/* Bank logout areas - must be last */
9220c794bgavinm} gcpu_logout_t;
9520c794bgavinm * gcl_flag values
9620c794bgavinm */
9720c794bgavinm#define	GCPU_GCL_F_PRIV		0x1	/* #MC during privileged code */
9820c794bgavinm#define	GCPU_GCL_F_TES_P	0x2	/* MCG_CAP indicates TES_P */
10020c794bgavinmstruct gcpu_bios_bankcfg {
10120c794bgavinm	uint64_t bios_bank_ctl;
10220c794bgavinm	uint64_t bios_bank_status;
10320c794bgavinm	uint64_t bios_bank_addr;
10420c794bgavinm	uint64_t bios_bank_misc;
10720c794bgavinmstruct gcpu_bios_cfg {
10820c794bgavinm	uint64_t bios_mcg_cap;
10920c794bgavinm	uint64_t bios_mcg_ctl;
11020c794bgavinm	struct gcpu_bios_bankcfg *bios_bankcfg;
113e4b8688Cheng Sean Ye/*
114e4b8688Cheng Sean Ye * Events types in poll trace records.  Keep these in sync with
115e4b8688Cheng Sean Ye * the generic cpu mdb module names for each (see gcpu_mpt_dump in mdb).
116e4b8688Cheng Sean Ye */
11720c794bgavinm#define	GCPU_MPT_WHAT_CYC_ERR		0	/* cyclic-induced poll */
11820c794bgavinm#define	GCPU_MPT_WHAT_POKE_ERR		1	/* manually-induced poll */
11920c794bgavinm#define	GCPU_MPT_WHAT_UNFAULTING	2	/* discarded error state */
120e3d60c9Adrian Frost#define	GCPU_MPT_WHAT_MC_ERR		3	/* MC# */
121e3d60c9Adrian Frost#define	GCPU_MPT_WHAT_CMCI_ERR		4	/* CMCI interrupt */
122e4b8688Cheng Sean Ye#define	GCPU_MPT_WHAT_XPV_VIRQ		5	/* MCA_VIRQ in dom0 */
123e4b8688Cheng Sean Ye#define	GCPU_MPT_WHAT_XPV_VIRQ_LOGOUT	6	/* MCA_VIRQ logout complete */
125e4b8688Cheng Sean Yetypedef struct gcpu_poll_trace {
12620c794bgavinm	hrtime_t mpt_when;		/* timestamp of event */
12720c794bgavinm	uint8_t mpt_what;		/* GCPU_MPT_WHAT_* (which event?) */
12820c794bgavinm	uint8_t mpt_nerr;		/* number of errors discovered */
12920c794bgavinm	uint16_t mpt_pad1;
13020c794bgavinm	uint32_t mpt_pad2;
131e4b8688Cheng Sean Ye} gcpu_poll_trace_t;
133e4b8688Cheng Sean Yetypedef struct gcpu_poll_trace_ctl {
134e4b8688Cheng Sean Ye	gcpu_poll_trace_t *mptc_tbufs;	/* trace buffers */
13520c794bgavinm	uint_t mptc_curtrace;			/* last buffer filled */
136e4b8688Cheng Sean Ye} gcpu_poll_trace_ctl_t;
138e3d60c9Adrian Frost
139e3d60c9Adrian Frost/*
140e3d60c9Adrian Frost * For counting some of the important number or time for runtime
141e3d60c9Adrian Frost * cmci enable/disable
142e3d60c9Adrian Frost */
143e3d60c9Adrian Frosttypedef struct gcpu_mca_cmci {
144e3d60c9Adrian Frost	uint32_t cmci_cap;	/* cmci capability for this bank */
145e3d60c9Adrian Frost	uint32_t ncmci;		/* number of correctable errors between polls */
146e3d60c9Adrian Frost	uint32_t drtcmci;	/* duration of no cmci when cmci is disabled */
147e3d60c9Adrian Frost	uint32_t cmci_enabled;	/* cmci enable/disable status for this bank */
148e3d60c9Adrian Frost} gcpu_mca_cmci_t;
149e3d60c9Adrian Frost
15020c794bgavinm/* Index for gcpu_mca_logout array below */
15120c794bgavinm#define	GCPU_MCA_LOGOUT_EXCEPTION	0	/* area for #MC */
15220c794bgavinm#define	GCPU_MCA_LOGOUT_POLLER_1	1	/* next/prev poll area */
15320c794bgavinm#define	GCPU_MCA_LOGOUT_POLLER_2	2	/* prev/next poll area */
15420c794bgavinm#define	GCPU_MCA_LOGOUT_NUM		3
1567aec1d6cinditypedef struct gcpu_mca {
15720c794bgavinm	gcpu_logout_t *gcpu_mca_logout[GCPU_MCA_LOGOUT_NUM];
15820c794bgavinm	uint32_t gcpu_mca_nextpoll_idx;	/* logout area for next poll */
15920c794bgavinm	struct gcpu_bios_cfg gcpu_mca_bioscfg;
1607aec1d6cindi	uint_t gcpu_mca_nbanks;
16120c794bgavinm	size_t gcpu_mca_lgsz;		/* size of gcpu_mca_logout structs */
16220c794bgavinm	uint_t gcpu_mca_flags;		/* GCPU_MCA_F_* */
16320c794bgavinm	hrtime_t gcpu_mca_lastpoll;
164e4b8688Cheng Sean Ye	gcpu_poll_trace_ctl_t gcpu_polltrace;
165e3d60c9Adrian Frost	uint32_t gcpu_mca_first_poll_cmci_enabled; /* cmci on in first poll */
166e3d60c9Adrian Frost	gcpu_mca_cmci_t *gcpu_bank_cmci;
1677aec1d6cindi} gcpu_mca_t;
16920c794bgavinmtypedef struct gcpu_mce_status {
17020c794bgavinm	uint_t mce_nerr;	/* total errors found in logout of all banks */
17120c794bgavinm	uint64_t mce_disp;	/* Disposition information */
17220c794bgavinm	uint_t mce_npcc;	/* number of errors with PCC */
17320c794bgavinm	uint_t mce_npcc_ok;	/* PCC with CMS_ERRSCOPE_CURCONTEXT_OK */
17420c794bgavinm	uint_t mce_nuc;		/* number of errors with UC */
17520c794bgavinm	uint_t mce_nuc_ok;	/* UC with CMS_ERRSCOPE_CLEARED_UC */
17620c794bgavinm	uint_t mce_nuc_poisoned; /* UC with CMS_ERRSCOPE_POISONED */
17720c794bgavinm	uint_t mce_forcefatal;	/* CMS_ERRSCOPE_FORCE_FATAL */
17820c794bgavinm	uint_t mce_ignored;	/* CMS_ERRSCOPE_IGNORE_ERR */
17920c794bgavinm} gcpu_mce_status_t;
18220c794bgavinm * Flags for gcpu_mca_flags
18320c794bgavinm */
18420c794bgavinm#define	GCPU_MCA_F_UNFAULTING		0x1	/* CPU exiting faulted state */
185918e0d9Robert Mustacchi#define	GCPU_MCA_F_CMCI_CAPABLE		0x2	/* CPU supports CMCI */
186918e0d9Robert Mustacchi#define	GCPU_MCA_F_CMCI_ENABLE		0x4	/* CPU CMCI enabled */
18920c794bgavinm * State shared by all cpus on a chip
19020c794bgavinm */
19120c794bgavinmstruct gcpu_chipshared {
19220c794bgavinm	kmutex_t gcpus_cfglock;		/* serial MCA config from chip cores */
19320c794bgavinm	kmutex_t gcpus_poll_lock;	/* serialize pollers on the same chip */
19420c794bgavinm	uint32_t gcpus_actv_banks;	/* MCA bank numbers active on chip */
195a311483Gerry Liu	volatile uint32_t gcpus_actv_cnt; /* active cpu count in this chip */
1962a613b5Robert Mustacchi	char *gcpus_ident;		/* ident string, if available */
19920c794bgavinmstruct gcpu_data {
20020c794bgavinm	gcpu_mca_t gcpu_mca;			/* MCA state for this CPU */
20120c794bgavinm	cmi_hdl_t gcpu_hdl;			/* associated handle */
20220c794bgavinm	struct gcpu_chipshared *gcpu_shared;	/* Shared state for the chip */
20520c794bgavinm#ifdef _KERNEL
2077aec1d6cindistruct regs;
21020c794bgavinm * CMI implementation
21120c794bgavinm */
21220c794bgavinmextern int gcpu_init(cmi_hdl_t, void **);
213a311483Gerry Liuextern void gcpu_fini(cmi_hdl_t);
21420c794bgavinmextern void gcpu_post_startup(cmi_hdl_t);
21520c794bgavinmextern void gcpu_post_mpstartup(cmi_hdl_t);
21620c794bgavinmextern void gcpu_faulted_enter(cmi_hdl_t);
21720c794bgavinmextern void gcpu_faulted_exit(cmi_hdl_t);
21820c794bgavinmextern void gcpu_mca_init(cmi_hdl_t);
219918e0d9Robert Mustacchiextern void gcpu_mca_fini(cmi_hdl_t);
220918e0d9Robert Mustacchiextern void gcpu_mca_cmci_enable(cmi_hdl_t);
22120c794bgavinmextern cmi_errno_t gcpu_msrinject(cmi_hdl_t, cmi_mca_regs_t *, uint_t, int);
222e4b8688Cheng Sean Ye#ifndef __xpv
22320c794bgavinmextern uint64_t gcpu_mca_trap(cmi_hdl_t, struct regs *);
224e3d60c9Adrian Frostextern void gcpu_cmci_trap(cmi_hdl_t);
22520c794bgavinmextern void gcpu_hdl_poke(cmi_hdl_t);
226e4b8688Cheng Sean Ye#else
227e4b8688Cheng Sean Yeextern void gcpu_xpv_panic_callback(void);
228e4b8688Cheng Sean Ye#endif
23120c794bgavinm * Local functions
23220c794bgavinm */
23320c794bgavinmextern void gcpu_mca_poll_init(cmi_hdl_t);
234a311483Gerry Liuextern void gcpu_mca_poll_fini(cmi_hdl_t);
23520c794bgavinmextern void gcpu_mca_poll_start(cmi_hdl_t);
236e4b8688Cheng Sean Yeextern void gcpu_poll_trace_init(gcpu_poll_trace_ctl_t *);
237e4b8688Cheng Sean Yeextern void gcpu_poll_trace(gcpu_poll_trace_ctl_t *, uint8_t, uint8_t);
23820c794bgavinmextern void gcpu_mca_logout(cmi_hdl_t, struct regs *, uint64_t,
239e3d60c9Adrian Frost    gcpu_mce_status_t *, boolean_t, int);
240e4b8688Cheng Sean Ye#ifdef __xpv
241e4b8688Cheng Sean Yeextern void gcpu_xpv_mca_init(int);
242e4b8688Cheng Sean Ye#endif /* __xpv */
24420c794bgavinm#endif /* _KERNEL */
2467c478bdstevel@tonic-gate#ifdef __cplusplus
2507aec1d6cindi#endif /* _GCPU_H */