17aec1d6eScindi /*
27aec1d6eScindi * CDDL HEADER START
37aec1d6eScindi *
47aec1d6eScindi * The contents of this file are subject to the terms of the
58a40a695Sgavinm * Common Development and Distribution License (the "License").
68a40a695Sgavinm * You may not use this file except in compliance with the License.
77aec1d6eScindi *
87aec1d6eScindi * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
97aec1d6eScindi * or http://www.opensolaris.org/os/licensing.
107aec1d6eScindi * See the License for the specific language governing permissions
117aec1d6eScindi * and limitations under the License.
127aec1d6eScindi *
137aec1d6eScindi * When distributing Covered Code, include this CDDL HEADER in each
147aec1d6eScindi * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
157aec1d6eScindi * If applicable, add the following below this CDDL HEADER, with the
167aec1d6eScindi * fields enclosed by brackets "[]" replaced with your own identifying
177aec1d6eScindi * information: Portions Copyright [yyyy] [name of copyright owner]
187aec1d6eScindi *
197aec1d6eScindi * CDDL HEADER END
207aec1d6eScindi */
217aec1d6eScindi
227aec1d6eScindi /*
23*8031591dSSrihari Venkatesan * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
247aec1d6eScindi * Use is subject to license terms.
257aec1d6eScindi */
267aec1d6eScindi
277aec1d6eScindi #include <sys/types.h>
28fb2f18f8Sesaxe #include <sys/pghw.h>
297aec1d6eScindi #include <sys/cmn_err.h>
307aec1d6eScindi #include <sys/sysmacros.h>
317aec1d6eScindi #include <sys/fm/protocol.h>
328a40a695Sgavinm #include <sys/x86_archext.h>
3320c794b3Sgavinm #include <sys/pci_cfgspace.h>
347aec1d6eScindi
357aec1d6eScindi #include "ao.h"
367aec1d6eScindi
377aec1d6eScindi /*
387aec1d6eScindi * AMD Opteron CPU Subroutines
397aec1d6eScindi *
4020c794b3Sgavinm * The following two tunables are used to determine the scrubbing rates for
4120c794b3Sgavinm * the D$ and L2$. The values range from 0x00-0x16 as described in BKDG
4220c794b3Sgavinm * Scrub Control Register. A value of zero disables the scrubber. Values
4320c794b3Sgavinm * above zero indicate rates in descending order.
447aec1d6eScindi *
457aec1d6eScindi * The current default values are used on several Sun systems. In the future
4620c794b3Sgavinm * this code should assign values dynamically based on cache sizing. If you
477aec1d6eScindi * tune these values manually be aware of the following architectural issue:
487aec1d6eScindi * At present, Opteron can only survive certain kinds of multi-bit errors if
497aec1d6eScindi * they are detected by the scrubbers. Therefore in general we want these
507aec1d6eScindi * values tuned as high as possible without impacting workload performance.
517aec1d6eScindi */
527aec1d6eScindi uint32_t ao_scrub_rate_dcache = 8; /* 64B every 5.12 us */
537aec1d6eScindi uint32_t ao_scrub_rate_l2cache = 9; /* 64B every 10.2 us */
547aec1d6eScindi
557aec1d6eScindi enum {
568a40a695Sgavinm AO_SCRUB_BIOSDEFAULT, /* retain system default values */
577aec1d6eScindi AO_SCRUB_FIXED, /* assign ao_scrub_rate_* values */
587aec1d6eScindi AO_SCRUB_MAX /* assign max of system and tunables */
597aec1d6eScindi } ao_scrub_policy = AO_SCRUB_MAX;
607aec1d6eScindi
6120c794b3Sgavinm void
ao_pcicfg_write(uint_t procnodeid,uint_t func,uint_t reg,uint32_t val)62*8031591dSSrihari Venkatesan ao_pcicfg_write(uint_t procnodeid, uint_t func, uint_t reg, uint32_t val)
637aec1d6eScindi {
64*8031591dSSrihari Venkatesan ASSERT(procnodeid + 24 <= 31);
6520c794b3Sgavinm ASSERT((func & 7) == func);
6620c794b3Sgavinm ASSERT((reg & 3) == 0 && reg < 256);
6720c794b3Sgavinm
68*8031591dSSrihari Venkatesan cmi_pci_putl(0, procnodeid + 24, func, reg, 0, val);
6920c794b3Sgavinm }
707aec1d6eScindi
7120c794b3Sgavinm uint32_t
ao_pcicfg_read(uint_t procnodeid,uint_t func,uint_t reg)72*8031591dSSrihari Venkatesan ao_pcicfg_read(uint_t procnodeid, uint_t func, uint_t reg)
7320c794b3Sgavinm {
74*8031591dSSrihari Venkatesan ASSERT(procnodeid + 24 <= 31);
7520c794b3Sgavinm ASSERT((func & 7) == func);
7620c794b3Sgavinm ASSERT((reg & 3) == 0 && reg < 256);
777aec1d6eScindi
78*8031591dSSrihari Venkatesan return (cmi_pci_getl(0, procnodeid + 24, func, reg, 0, 0));
797aec1d6eScindi }
807aec1d6eScindi
8120c794b3Sgavinm
827aec1d6eScindi /*
837aec1d6eScindi * Return the maximum scrubbing rate between r1 and r2, where r2 is extracted
847aec1d6eScindi * from the specified 'cfg' register value using 'mask' and 'shift'. If a
857aec1d6eScindi * value is zero, scrubbing is off so return the opposite value. Otherwise
867aec1d6eScindi * the maximum rate is the smallest non-zero value of the two values.
877aec1d6eScindi */
887aec1d6eScindi static uint32_t
ao_scrubber_max(uint32_t r1,uint32_t r2)8920c794b3Sgavinm ao_scrubber_max(uint32_t r1, uint32_t r2)
907aec1d6eScindi {
917aec1d6eScindi if (r1 != 0 && r2 != 0)
927aec1d6eScindi return (MIN(r1, r2));
937aec1d6eScindi
947aec1d6eScindi return (r1 ? r1 : r2);
957aec1d6eScindi }
967aec1d6eScindi
977aec1d6eScindi /*
98*8031591dSSrihari Venkatesan * Enable the node-specific hardware scrubbers for the D$ and L2$. We set
997aec1d6eScindi * the scrubber rate based on a set of tunables defined at the top of the file.
1007aec1d6eScindi */
10120c794b3Sgavinm void
ao_procnode_scrubber_enable(cmi_hdl_t hdl,ao_ms_data_t * ao)102*8031591dSSrihari Venkatesan ao_procnode_scrubber_enable(cmi_hdl_t hdl, ao_ms_data_t *ao)
1037aec1d6eScindi {
104*8031591dSSrihari Venkatesan uint_t procnodeid = cmi_hdl_procnodeid(hdl);
10520c794b3Sgavinm union mcreg_scrubctl scrubctl;
1067aec1d6eScindi
10720c794b3Sgavinm ao->ao_ms_shared->aos_bcfg_scrubctl = MCREG_VAL32(&scrubctl) =
108*8031591dSSrihari Venkatesan ao_pcicfg_read(procnodeid, MC_FUNC_MISCCTL, MC_CTL_REG_SCRUBCTL);
1097aec1d6eScindi
11020c794b3Sgavinm if (ao_scrub_policy == AO_SCRUB_BIOSDEFAULT)
11120c794b3Sgavinm return;
1127aec1d6eScindi
1137aec1d6eScindi if (ao_scrub_rate_dcache > AMD_NB_SCRUBCTL_RATE_MAX) {
1147aec1d6eScindi cmn_err(CE_WARN, "ao_scrub_rate_dcache is too large; "
1157aec1d6eScindi "resetting to 0x%x\n", AMD_NB_SCRUBCTL_RATE_MAX);
1167aec1d6eScindi ao_scrub_rate_dcache = AMD_NB_SCRUBCTL_RATE_MAX;
1177aec1d6eScindi }
1187aec1d6eScindi
1197aec1d6eScindi if (ao_scrub_rate_l2cache > AMD_NB_SCRUBCTL_RATE_MAX) {
1207aec1d6eScindi cmn_err(CE_WARN, "ao_scrub_rate_l2cache is too large; "
1217aec1d6eScindi "resetting to 0x%x\n", AMD_NB_SCRUBCTL_RATE_MAX);
1227aec1d6eScindi ao_scrub_rate_l2cache = AMD_NB_SCRUBCTL_RATE_MAX;
1237aec1d6eScindi }
1247aec1d6eScindi
1258a40a695Sgavinm switch (ao_scrub_policy) {
1268a40a695Sgavinm case AO_SCRUB_FIXED:
1278a40a695Sgavinm /* Use the system values checked above */
1288a40a695Sgavinm break;
1298a40a695Sgavinm
1308a40a695Sgavinm default:
1318a40a695Sgavinm cmn_err(CE_WARN, "Unknown ao_scrub_policy value %d - "
1328a40a695Sgavinm "using default policy of AO_SCRUB_MAX", ao_scrub_policy);
1338a40a695Sgavinm /*FALLTHRU*/
1348a40a695Sgavinm
1358a40a695Sgavinm case AO_SCRUB_MAX:
1367aec1d6eScindi ao_scrub_rate_dcache =
13720c794b3Sgavinm ao_scrubber_max(ao_scrub_rate_dcache,
13820c794b3Sgavinm MCREG_FIELD_CMN(&scrubctl, DcacheScrub));
1397aec1d6eScindi
1407aec1d6eScindi ao_scrub_rate_l2cache =
14120c794b3Sgavinm ao_scrubber_max(ao_scrub_rate_l2cache,
14220c794b3Sgavinm MCREG_FIELD_CMN(&scrubctl, L2Scrub));
1438a40a695Sgavinm break;
1448a40a695Sgavinm }
1458a40a695Sgavinm
14620c794b3Sgavinm MCREG_FIELD_CMN(&scrubctl, DcacheScrub) = ao_scrub_rate_dcache;
14720c794b3Sgavinm MCREG_FIELD_CMN(&scrubctl, L2Scrub) = ao_scrub_rate_l2cache;
1487aec1d6eScindi
149*8031591dSSrihari Venkatesan ao_pcicfg_write(procnodeid, MC_FUNC_MISCCTL, MC_CTL_REG_SCRUBCTL,
15020c794b3Sgavinm MCREG_VAL32(&scrubctl));
1517aec1d6eScindi }
152