14c06356dh/*
24c06356dh * CDDL HEADER START
34c06356dh *
44c06356dh * The contents of this file are subject to the terms of the
54c06356dh * Common Development and Distribution License (the "License").
64c06356dh * You may not use this file except in compliance with the License.
74c06356dh *
84c06356dh * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
94c06356dh * or http://www.opensolaris.org/os/licensing.
104c06356dh * See the License for the specific language governing permissions
114c06356dh * and limitations under the License.
124c06356dh *
134c06356dh * When distributing Covered Code, include this CDDL HEADER in each
144c06356dh * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
154c06356dh * If applicable, add the following below this CDDL HEADER, with the
164c06356dh * fields enclosed by brackets "[]" replaced with your own identifying
174c06356dh * information: Portions Copyright [yyyy] [name of copyright owner]
184c06356dh *
194c06356dh * CDDL HEADER END
20658280bDavid Hollister */
21658280bDavid Hollister/*
22658280bDavid Hollister * Copyright (c) 2009, 2010, Oracle and/or its affiliates. All rights reserved.
234c06356dh */
244c06356dh#ifndef	_PMCS_DEF_H
254c06356dh#define	_PMCS_DEF_H
264c06356dh#ifdef	__cplusplus
274c06356dhextern "C" {
284c06356dh#endif
294c06356dh
304c06356dhtypedef enum {
314c06356dh	NOTHING,	/* nothing connected here */
324c06356dh	SATA,		/* SATA connection */
334c06356dh	SAS,		/* direct or indirect SAS connection */
344c06356dh	EXPANDER,	/* connection to an expander */
354c06356dh	NEW		/* Brand new device (pending state) */
364c06356dh} pmcs_dtype_t;
374c06356dh
384c06356dh/*
394c06356dh * This structure defines a PHY device that represents what we
404c06356dh * are connected to.
414c06356dh *
424c06356dh * The eight real physical PHYs that are in the PMC8X6G are represented
434c06356dh * as an array of eight of these structures which define what these
444c06356dh * real PHYs are connected to.
454c06356dh *
464c06356dh * Depending upon what is actually connected to each PHY, the
474c06356dh * type set will define what we're connected to. If it is
484c06356dh * a direct SATA connection, the phy will describe a SATA endpoint
494c06356dh * If it is a direct SAS connection, it will describe a SAS
504c06356dh * endpoint.
514c06356dh *
524c06356dh * If it is an EXPANDER, this will describe the edge of an expander.
534c06356dh * As we perform discovery on what is in an EXPANDER we define an
544c06356dh * additional list of phys that represent what the Expander is connected to.
554c06356dh */
564c06356dh#define	PMCS_HW_MIN_LINK_RATE	SAS_LINK_RATE_1_5GBIT
574c06356dh#define	PMCS_HW_MAX_LINK_RATE	SAS_LINK_RATE_6GBIT
584c06356dh
59601c90fSrikanth, Ramana#define	PMCS_INVALID_DEVICE_ID		0xffffffff
6065e70c0David Hollister#define	PMCS_DEVICE_ID_MASK		0xffff
61601c90fSrikanth, Ramana#define	PMCS_PHY_INVALID_PORT_ID	0xf
624c06356dh
63499cfd1David Hollister#define	PMCS_PM_MAX_NAMELEN	16
649aed162David Hollister#define	PMCS_MAX_REENUMERATE	2	/* Maximum re-enumeration attempts */
659aed162David Hollister
669aed162David Hollister/*
679aed162David Hollister * Number of usecs to wait after last noted activate/deactivate callback
689aed162David Hollister * before possibly restarting discovery
699aed162David Hollister */
709aed162David Hollister#define	PMCS_REDISCOVERY_DELAY	(5 * MICROSEC)
71499cfd1David Hollister
724c06356dhstruct pmcs_phy {
734c06356dh	pmcs_phy_t	*sibling;	/* sibling phy */
744c06356dh	pmcs_phy_t 	*parent;	/* parent phy */
754c06356dh	pmcs_phy_t 	*children;	/* head of list of children */
764c06356dh	pmcs_phy_t 	*dead_next;	/* dead PHY list link */
774c06356dh	list_node_t	list_node;	/* list element */
784c06356dh	uint32_t	device_id;	/* PMC8X6G device handle */
794c06356dh	uint32_t
804c06356dh		ncphy 		: 8,	/* # of contained phys for expander */
814c06356dh		hw_event_ack	: 24;	/* XXX: first level phy event acked */
824c06356dh	uint8_t		phynum;		/* phy number on parent expander */
834c06356dh	uint8_t		width;		/* how many phys wide */
844c06356dh	uint8_t		ds_recovery_retries; /* # error retry attempts */
85af68568Srikanth, Ramana	uint8_t		ds_prev_good_recoveries; /* # successful recoveries */
86af68568Srikanth, Ramana	clock_t		prev_recovery;	/* previous successful recovery */
87af68568Srikanth, Ramana	clock_t		last_good_recovery; /* oldest successful recovery */
88af68568Srikanth, Ramana			/* within PMCS_MAX_DS_RECOVERY_TIME time frame */
894c06356dh	pmcs_dtype_t	dtype;		/* current dtype of the phy */
904c06356dh	pmcs_dtype_t	pend_dtype;	/* new dtype (pending change) */
914c06356dh	uint32_t
924c06356dh		level		: 8,	/* level in expander tree */
934c06356dh		tolerates_sas2	: 1,	/* tolerates SAS2 SMP */
944c06356dh		spinup_hold	: 1,	/* spinup hold needs releasing */
954c06356dh		atdt		: 3,	/* attached device type */
964c06356dh		portid		: 4,	/* PMC8X6G port context */
974c06356dh		link_rate   	: 4,	/* current supported speeds */
984c06356dh		valid_device_id	: 1,	/* device id is valid */
994c06356dh		abort_sent	: 1,	/* we've sent an abort */
1004c06356dh		abort_pending	: 1,	/* we have an abort pending */
1014c06356dh		need_rl_ext	: 1,	/* need SATA RL_EXT recocvery */
1024c06356dh		subsidiary	: 1,	/* this is part of a wide phy */
1034c06356dh		configured	: 1,	/* is configured */
1044c06356dh		dead		: 1,	/* dead */
105601c90fSrikanth, Ramana		changed		: 1,	/* this phy is changing */
1069aed162David Hollister		reenumerate	: 1,	/* attempt re-enumeration */
107c80dec5David Hollister		virtual		: 1,	/* This is a virtual PHY */
108601c90fSrikanth, Ramana		deregister_wait : 1;	/* phy waiting to get deregistered */
1094c06356dh	clock_t		config_stop;	/* When config attempts will stop */
1104c06356dh	hrtime_t	abort_all_start;
1114c06356dh	kcondvar_t	abort_all_cv;	/* Wait for ABORT_ALL completion */
1124c06356dh	kmutex_t	phy_lock;
1134c06356dh	volatile uint32_t ref_count;	/* Targets & work on this PHY */
1149aed162David Hollister	uint32_t	enum_attempts;	/* # of enumeration attempts */
1154c06356dh	uint8_t 	sas_address[8];	/* SAS address for this PHY */
1164c06356dh	struct {
1174c06356dh	uint32_t
1184c06356dh		prog_min_rate	:4,
1194c06356dh		hw_min_rate	:4,
1204c06356dh		prog_max_rate	:4,
1214c06356dh		hw_max_rate	:4,
1224c06356dh		reserved	:16;
1234c06356dh	} state;
1244c06356dh	char		path[32];	/* path name for this phy */
1254c06356dh	pmcs_hw_t	*pwp;		/* back ptr to hba struct */
1264c06356dh	pmcs_iport_t	*iport;		/* back ptr to the iport handle */
12773a3eccDavid Hollister	pmcs_iport_t	*last_iport;	/* last iport this PHY was on */
1284c06356dh	pmcs_xscsi_t	*target;	/* back ptr to current target */
129188eaedSrikanth Suravajhala	pmcs_xscsi_t	**target_addr;	/* address of real target pointer */
1304c06356dh	kstat_t		*phy_stats;	/* kstats for this phy */
131499cfd1David Hollister	/*
132499cfd1David Hollister	 * Attached port phy mask and target port phymask.  With 16 bytes
133499cfd1David Hollister	 * we can represent a phymask for anything with up to 64 ports
134499cfd1David Hollister	 */
135499cfd1David Hollister	uint64_t	att_port_pm;		/* att port pm for this PHY */
136499cfd1David Hollister	uint64_t	att_port_pm_tmp;	/* Temp area for wide-ports */
137499cfd1David Hollister	char		att_port_pm_str[PMCS_PM_MAX_NAMELEN + 1];
138499cfd1David Hollister	uint64_t	tgt_port_pm;		/* tgt port pm for this PHY */
139499cfd1David Hollister	uint64_t	tgt_port_pm_tmp;	/* Temp area for wide-ports */
140499cfd1David Hollister	char		tgt_port_pm_str[PMCS_PM_MAX_NAMELEN + 1];
1419aed162David Hollister	smp_routing_attr_t routing_attr; /* Routing attr. from discover resp. */
1429aed162David Hollister	smp_routing_attr_t routing_method; /* Actual routing method used. */
1439aed162David Hollister	smp_report_general_resp_t rg_resp;	/* Response to REPORT_GENERAL */
1449aed162David Hollister	smp_discover_resp_t disc_resp;		/* Response to DISCOVER */
1454c06356dh};
1464c06356dh
1474c06356dh/* maximum number of ds recovery retries (ds_recovery_retries) */
148601c90fSrikanth, Ramana#define	PMCS_MAX_DS_RECOVERY_RETRIES	10
1494c06356dh
150af68568Srikanth, Ramana/* max time allowed for successful recovery */
151af68568Srikanth, Ramana#define	PMCS_MAX_DS_RECOVERY_TIME	(60 * 1000000) /* 60 seconds */
152af68568Srikanth, Ramana
153af68568Srikanth, Ramana/* ds recovery on same same phy is not allowed within this interval */
154af68568Srikanth, Ramana#define	PMCS_DS_RECOVERY_INTERVAL	(1000000) /* 1 second */
155af68568Srikanth, Ramana
1564c06356dh
1574c06356dh/*
1584c06356dh * Inbound and Outbound Queue Related Definitions.
1594c06356dh *
1604c06356dh * The PMC8X6G has a programmable number of inbound and outbound circular
1614c06356dh * queues for use in message passing between the host and the PMC8X6G
1624c06356dh * (up to 64 queues for the Rev C Chip). This driver does not use all
1634c06356dh * possible queues.
1644c06356dh *
1654c06356dh * Each Queue is given 4K of consistent memory and we set a 64 byte size for
1664c06356dh * the queue entry size (this gives us 256 queue entries per queue).
1674c06356dh *
1684c06356dh * This allocation then continues up a further PMCS_SCRATCH_SIZE bytes
1694c06356dh * that the driver uses as a temporary scratch area for things like
1704c06356dh * SMP discovery.
1714c06356dh *
1724c06356dh * This control area looks like this:
1734c06356dh *
1744c06356dh * Offset			What
1754c06356dh * ------------------------------------------------
1764c06356dh * 0					IQ 0 Consumer Index
1774c06356dh * 4					IQ 1 Consumer Index
1784c06356dh * 8..255				...
1794c06356dh * 252..255				IQ 63 Consumer Index
1804c06356dh * 256					OQ 0 Producer Index
1814c06356dh * 260					OQ 1 Producer Index
1824c06356dh * 264..259				....
1834c06356dh * 508..511				OQ 63 Producer Index
1844c06356dh * 512..512+PMCS_SCRATCH_SIZE-1		Scratch area.
1854c06356dh */
1864c06356dh#define	IQCI_BASE_OFFSET	0
1874c06356dh#define	IQ_OFFSET(qnum)		(IQCI_BASE_OFFSET + (qnum << 2))
1884c06356dh#define	OQPI_BASE_OFFSET	256
1894c06356dh#define	OQ_OFFSET(qnum)		(OQPI_BASE_OFFSET + (qnum << 2))
1904c06356dh
1914c06356dh/*
1924c06356dh * Work related structures. Each one of these structures is paired
1934c06356dh * with *any* command that is fed to the PMC8X6G via one of the
1944c06356dh * Inbound Queues. The work structure has a tag to compare with
1954c06356dh * the message that comes back out of an Outbound Queue. The
1964c06356dh * work structure also points to the phy which this command is
1974c06356dh * tied to. It also has a pointer a callback function (if defined).
1984c06356dh * See that TAG Architecture below for the various kinds of
1994c06356dh * dispositions of a work structure.
2004c06356dh */
2014c06356dh
2024c06356dh/*
2034c06356dh * Work Structure States
2044c06356dh *
2054c06356dh * NIL			->	READY
2064c06356dh * READY		->	NIL
2074c06356dh * READY		->	ONCHIP
2084c06356dh * ONCHIP		->	INTR
2094c06356dh * INTR			->	READY
2104c06356dh * INTR			->	NIL
2114c06356dh * INTR			->	ABORTED
2124c06356dh * INTR			->	TIMED_OUT
2134c06356dh * ABORTED		->	NIL
2144c06356dh * TIMED_OUT		->	NIL
2154c06356dh */
2164c06356dhtypedef enum {
2174c06356dh	PMCS_WORK_STATE_NIL = 0,
2184c06356dh	PMCS_WORK_STATE_READY,
2194c06356dh	PMCS_WORK_STATE_ONCHIP,
2204c06356dh	PMCS_WORK_STATE_INTR,
2214c06356dh	PMCS_WORK_STATE_IOCOMPQ,
2224c06356dh	PMCS_WORK_STATE_ABORTED,
2234c06356dh	PMCS_WORK_STATE_TIMED_OUT
2244c06356dh} pmcs_work_state_t;
2254c06356dh
2264c06356dhstruct pmcwork {
2274c06356dh	STAILQ_ENTRY(pmcwork)	next;
2284c06356dh	kmutex_t		lock;
2294c06356dh	kcondvar_t		sleep_cv;
2304c06356dh	void			*ptr;	/* linkage or callback function */
2314c06356dh	void 			*arg;	/* command specific data */
2324c06356dh	pmcs_phy_t 		*phy;	/* phy who owns this command */
2334c06356dh	pmcs_xscsi_t		*xp;	/* Back pointer to xscsi struct */
2344c06356dh	volatile uint32_t	htag;	/* tag for this structure */
235c3bc407dh	uint32_t		abt_htag; /* Tag of command to be aborted */
2364c06356dh	uint32_t
2374c06356dh			timer	:	27,
2384c06356dh			onwire	:	1,
2394c06356dh			dead	:	1,
2404c06356dh			state	:	3;
2414c06356dh	hrtime_t		start;	/* timestamp start */
2424c06356dh	uint32_t		ssp_event; /* ssp event */
2434c06356dh	pmcs_dtype_t		dtype;	/* stash, incase phy gets cleared */
2444c06356dh
2454c06356dh	void			*last_ptr;
2464c06356dh	void			*last_arg;
2474c06356dh	pmcs_phy_t		*last_phy;
2484c06356dh	pmcs_xscsi_t		*last_xp;
2494c06356dh	uint32_t		last_htag;
2504c06356dh	pmcs_work_state_t	last_state;
2514c06356dh	hrtime_t		finish;
2524c06356dh};
25339cd77aJesse Butler#define	PMCS_ABT_HTAG_ALL	0xffffffff
2544c06356dh
2554c06356dh#define	PMCS_REC_EVENT	0xffffffff	/* event recovery */
2564c06356dh
2574c06356dh/*
2584c06356dh * This structure defines a PMC-Sierra defined firmware header.
2594c06356dh */
2604c06356dh#pragma	pack(4)
2614c06356dhtypedef struct {
2624c06356dh	char 		vendor_id[8];
2634c06356dh	uint8_t		product_id;
2644c06356dh	uint8_t		hwrev;
2654c06356dh	uint8_t		destination_partition;
2664c06356dh	uint8_t		reserved0;
2674c06356dh	uint8_t		fwrev[4];
2684c06356dh	uint32_t	firmware_length;
2694c06356dh	uint32_t	crc;
2704c06356dh	uint32_t	start_address;
2714c06356dh	uint8_t		data[];
2724c06356dh} pmcs_fw_hdr_t;
2734c06356dh#pragma	pack()
2744c06356dh
2754c06356dh/*
2764c06356dh * Offlevel work as a bit pattern.
2774c06356dh */
2784c06356dh#define	PMCS_WORK_DISCOVER		0
2794c06356dh#define	PMCS_WORK_ABORT_HANDLE		3
2804c06356dh#define	PMCS_WORK_SPINUP_RELEASE	4
2814c06356dh#define	PMCS_WORK_SAS_HW_ACK		5
2824c06356dh#define	PMCS_WORK_SATA_RUN		6
2834c06356dh#define	PMCS_WORK_RUN_QUEUES		7
2844c06356dh#define	PMCS_WORK_ADD_DMA_CHUNKS	8
2854c06356dh#define	PMCS_WORK_DS_ERR_RECOVERY	9
2864c06356dh#define	PMCS_WORK_SSP_EVT_RECOVERY	10
287601c90fSrikanth, Ramana#define	PMCS_WORK_DEREGISTER_DEV	11
288c280a92David Hollister#define	PMCS_WORK_DUMP_REGS		12
2894c06356dh
2904c06356dh/*
2914c06356dh * The actual values as they appear in work_flags
2924c06356dh */
2934c06356dh#define	PMCS_WORK_FLAG_DISCOVER		(1 << 0)
2944c06356dh#define	PMCS_WORK_FLAG_ABORT_HANDLE	(1 << 3)
2954c06356dh#define	PMCS_WORK_FLAG_SPINUP_RELEASE	(1 << 4)
2964c06356dh#define	PMCS_WORK_FLAG_SAS_HW_ACK	(1 << 5)
2974c06356dh#define	PMCS_WORK_FLAG_SATA_RUN		(1 << 6)
2984c06356dh#define	PMCS_WORK_FLAG_RUN_QUEUES	(1 << 7)
2994c06356dh#define	PMCS_WORK_FLAG_ADD_DMA_CHUNKS	(1 << 8)
3004c06356dh#define	PMCS_WORK_FLAG_DS_ERR_RECOVERY	(1 << 9)
3014c06356dh#define	PMCS_WORK_FLAG_SSP_EVT_RECOVERY (1 << 10)
302601c90fSrikanth, Ramana#define	PMCS_WORK_FLAG_DEREGISTER_DEV   (1 << 11)
303c280a92David Hollister#define	PMCS_WORK_FLAG_DUMP_REGS	(1 << 12)
3044c06356dh
3054c06356dh/*
3064c06356dh * This structure is used by this function to test MPI (and interrupts)
3074c06356dh * after MPI has been started to make sure it's working reliably.
3084c06356dh */
3094c06356dhtypedef struct {
3104c06356dh	uint32_t signature;
3114c06356dh	uint32_t count;
3124c06356dh	uint32_t *ptr;
3134c06356dh} echo_test_t;
3144c06356dh#define	ECHO_SIGNATURE	0xbebebeef
3154c06356dh
3164c06356dh/*
3174c06356dh * Tag Architecture. The PMC has 32 bit tags for MPI messages.
3184c06356dh * We use this tag this way.
3194c06356dh *
3204c06356dh * bits		what
3214c06356dh * ------------------------
3224c06356dh * 31		done bit
323978d744Srikanth Suravajhala * 30		non-io cmd bit
324978d744Srikanth Suravajhala * 29..28	tag type
3254c06356dh * 27..12	rolling serial number
3264c06356dh * 11..0	index into work area to get pmcwork structure
3274c06356dh *
3284c06356dh * A tag type of NONE means that nobody is waiting on any results,
3294c06356dh * so the interrupt code frees the work structure that has this
3304c06356dh * tag.
3314c06356dh *
3324c06356dh * A tag type of CBACK means that the the interrupt handler
3334c06356dh * takes the tag 'arg' in the work structure to be a callback
3344c06356dh * function pointer (see pmcs_cb_t). The callee is responsible
3354c06356dh * for freeing the work structure that has this tag.
3364c06356dh *
3374c06356dh * A tag type of WAIT means that the issuer of the work needs
3384c06356dh * be woken up from interrupt level when the command completes
3394c06356dh * (or times out). If work structure tag 'arg' is non-null,
3404c06356dh * up to 2*PMCS_QENTRY_SIZE bits of data from the Outbound Queue
3414c06356dh * entry may be copied to the area pointed to by 'arg'. This
3424c06356dh * allows issuers to get directly at the results of the command
3434c06356dh * they issed. The synchronization point for the issuer and the
3444c06356dh * interrupt code for command done notification is the setting
3454c06356dh * of the 'DONE' bit in the tag as stored in the work structure.
3464c06356dh */
3474c06356dh#define	PMCS_TAG_TYPE_FREE	0
3484c06356dh#define	PMCS_TAG_TYPE_NONE	1
3494c06356dh#define	PMCS_TAG_TYPE_CBACK  	2
3504c06356dh#define	PMCS_TAG_TYPE_WAIT	3
3514c06356dh#define	PMCS_TAG_TYPE_SHIFT	28
3524c06356dh#define	PMCS_TAG_SERNO_SHIFT	12
3534c06356dh#define	PMCS_TAG_INDEX_SHIFT	0
354978d744Srikanth Suravajhala#define	PMCS_TAG_TYPE_MASK	0x30000000
355978d744Srikanth Suravajhala#define	PMCS_TAG_NONIO_CMD	0x40000000
3564c06356dh#define	PMCS_TAG_DONE		0x80000000
3574c06356dh#define	PMCS_TAG_SERNO_MASK	0x0ffff000
3584c06356dh#define	PMCS_TAG_INDEX_MASK	0x00000fff
3594c06356dh#define	PMCS_TAG_TYPE(x)		\
3604c06356dh	(((x) & PMCS_TAG_TYPE_MASK) >> PMCS_TAG_TYPE_SHIFT)
3614c06356dh#define	PMCS_TAG_SERNO(x)	\
3624c06356dh	(((x) & PMCS_TAG_SERNO_MASK) >> PMCS_TAG_SERNO_SHIFT)
3634c06356dh#define	PMCS_TAG_INDEX(x)	\
3644c06356dh	(((x) & PMCS_TAG_INDEX_MASK) >> PMCS_TAG_INDEX_SHIFT)
3654c06356dh#define	PMCS_TAG_FREE		0
3664c06356dh#define	PMCS_COMMAND_DONE(x)	\
3674c06356dh	(((x)->htag == PMCS_TAG_FREE) || (((x)->htag & PMCS_TAG_DONE) != 0))
3684c06356dh#define	PMCS_COMMAND_ACTIVE(x)	\
3694c06356dh	((x)->htag != PMCS_TAG_FREE && (x)->state == PMCS_WORK_STATE_ONCHIP)
3704c06356dh
3714c06356dh/*
3724c06356dh * Miscellaneous Definitions
3734c06356dh */
3744c06356dh#define	CLEAN_MESSAGE(m, x)	{	\
3754c06356dh	int _j = x;			\
3764c06356dh	while (_j < PMCS_MSG_SIZE) {	\
3774c06356dh		m[_j++] = 0;		\
3784c06356dh	}				\
3794c06356dh}
3804c06356dh
3814c06356dh#define	COPY_MESSAGE(t, f, a)	{	\
3824c06356dh	int _j;				\
3834c06356dh	for (_j = 0; _j < a; _j++) {	\
3844c06356dh		t[_j] = f[_j];		\
3854c06356dh	}				\
3864c06356dh	while (_j < PMCS_MSG_SIZE) {	\
3874c06356dh		t[_j++] = 0;		\
3884c06356dh	}				\
3894c06356dh}
3904c06356dh
3914c06356dh#define	PMCS_PHY_ADDRESSABLE(pp)			\
3924c06356dh	((pp)->level == 0 && (pp)->dtype == SATA &&	\
3934c06356dh	    ((pp)->sas_address[0] >> 4) != 5)
3944c06356dh
3954c06356dh#define	RESTART_DISCOVERY(pwp)				\
3964c06356dh	ASSERT(!mutex_owned(&pwp->config_lock));	\
3974c06356dh	mutex_enter(&pwp->config_lock);			\
3984c06356dh	pwp->config_changed = B_TRUE;			\
3994c06356dh	mutex_exit(&pwp->config_lock);			\
4004c06356dh	SCHEDULE_WORK(pwp, PMCS_WORK_DISCOVER);
4014c06356dh
4024c06356dh#define	RESTART_DISCOVERY_LOCKED(pwp)			\
4034c06356dh	ASSERT(mutex_owned(&pwp->config_lock));		\
4044c06356dh	pwp->config_changed = B_TRUE;			\
4054c06356dh	SCHEDULE_WORK(pwp, PMCS_WORK_DISCOVER);
4064c06356dh
4074c06356dh#define	PHY_CHANGED(pwp, p)						\
408c3bc407dh	pmcs_prt(pwp, PMCS_PRT_DEBUG_CONFIG, p, NULL, "%s changed in "  \
409c3bc407dh	    "%s line %d", p->path, __func__, __LINE__); 		\
4109aed162David Hollister	p->changed = 1;							\
4119aed162David Hollister	p->enum_attempts = 0
4124c06356dh
4134c06356dh#define	PHY_CHANGED_AT_LOCATION(pwp, p, func, line)			\
414c3bc407dh	pmcs_prt(pwp, PMCS_PRT_DEBUG_CONFIG, p, NULL, "%s changed in "  \
415c3bc407dh	    "%s line %d", p->path, func, line);				\
4169aed162David Hollister	p->changed = 1;							\
4179aed162David Hollister	p->enum_attempts = 0
4184c06356dh
4194c06356dh#define	PHY_TYPE(pptr)					\
4204c06356dh	(((pptr)->dtype == NOTHING)?  "NOTHING" :	\
4214c06356dh	(((pptr)->dtype == SATA)? "SATA" :		\
4224c06356dh	(((pptr)->dtype == SAS)? "SAS" : "EXPANDER")))
4234c06356dh
4244c06356dh#define	IS_ROOT_PHY(pptr)	(pptr->parent == NULL)
4254c06356dh
4264c06356dh#define	PMCS_HIPRI(pwp, oq, c)				\
4274c06356dh	(pwp->hipri_queue & (1 << PMCS_IQ_OTHER)) ?	\
4284c06356dh	(PMCS_IOMB_HIPRI | PMCS_IOMB_IN_SAS(oq, c)) :	\
4294c06356dh	(PMCS_IOMB_IN_SAS(oq, c))
4304c06356dh
4314c06356dh#define	SCHEDULE_WORK(hwp, wrk)		\
4324c06356dh	(void) atomic_set_long_excl(&hwp->work_flags, wrk)
4334c06356dh
4344c06356dh/*
4354c06356dh * Check to see if the requested work bit is set.  Either way, the bit will
4364c06356dh * be cleared upon return.
4374c06356dh */
4384c06356dh#define	WORK_SCHEDULED(hwp, wrk)	\
4394c06356dh	(atomic_clear_long_excl(&hwp->work_flags, wrk) == 0)
4404c06356dh
4414c06356dh/*
4424c06356dh * Check to see if the requested work bit is set.  The value will not be
4434c06356dh * changed in this case.  The atomic_xx_nv operations can be quite expensive
4444c06356dh * so this should not be used in non-DEBUG code.
4454c06356dh */
4464c06356dh#define	WORK_IS_SCHEDULED(hwp, wrk)	\
4474c06356dh	((atomic_and_ulong_nv(&hwp->work_flags, (ulong_t)-1) & (1 << wrk)) != 0)
4484c06356dh
4494c06356dh#define	WAIT_FOR(p, t, r)					\
45032b54dbJesse Butler	clock_t	_lb = ddi_get_lbolt();				\
4514c06356dh	r = 0;							\
4524c06356dh	while (!PMCS_COMMAND_DONE(p)) {				\
45332b54dbJesse Butler		clock_t _ret = cv_timedwait(&p->sleep_cv,	\
45432b54dbJesse Butler		    &p->lock, _lb + drv_usectohz(t * 1000));	\
45532b54dbJesse Butler		if (!PMCS_COMMAND_DONE(p) && _ret < 0) {		\
4564c06356dh			r = 1;					\
4574c06356dh			break;					\
4584c06356dh		}						\
4594c06356dh	}
4604c06356dh
4614c06356dh/*
4624c06356dh * Signal the next I/O completion thread to start running.
4634c06356dh */
4644c06356dh
4654c06356dh#define	PMCS_CQ_RUN_LOCKED(hwp)						\
4664c06356dh	if (!STAILQ_EMPTY(&hwp->cq) || hwp->iocomp_cb_head) {		\
4674c06356dh		pmcs_cq_thr_info_t *cqti;				\
4684c06356dh		cqti = &hwp->cq_info.cq_thr_info			\
4694c06356dh		    [hwp->cq_info.cq_next_disp_thr];			\
4704c06356dh		hwp->cq_info.cq_next_disp_thr++;			\
4714c06356dh		if (hwp->cq_info.cq_next_disp_thr ==			\
4724c06356dh		    hwp->cq_info.cq_threads) {				\
4734c06356dh			hwp->cq_info.cq_next_disp_thr = 0;		\
4744c06356dh		}							\
4754c06356dh		mutex_enter(&cqti->cq_thr_lock);			\
4764c06356dh		cv_signal(&cqti->cq_cv);				\
4774c06356dh		mutex_exit(&cqti->cq_thr_lock);				\
4788f514e7David Hollister	}
4794c06356dh
4804c06356dh#define	PMCS_CQ_RUN(hwp)						\
4814c06356dh	mutex_enter(&hwp->cq_lock);					\
4824c06356dh	PMCS_CQ_RUN_LOCKED(hwp);					\
4834c06356dh	mutex_exit(&hwp->cq_lock);
4844c06356dh
4854c06356dh
4864c06356dh/*
4874c06356dh * Watchdog/SCSA timer definitions
4884c06356dh */
4894c06356dh/* usecs to SCSA watchdog ticks */
4904c06356dh#define	US2WT(x)	(x)/10
4914c06356dh
4924c06356dh/*
4934c06356dh * More misc
4944c06356dh */
4954c06356dh#define	BYTE0(x)	(((x) >>  0) & 0xff)
4964c06356dh#define	BYTE1(x)	(((x) >>  8) & 0xff)
4974c06356dh#define	BYTE2(x)	(((x) >> 16) & 0xff)
4984c06356dh#define	BYTE3(x)	(((x) >> 24) & 0xff)
4994c06356dh#define	BYTE4(x)	(((x) >> 32) & 0xff)
5004c06356dh#define	BYTE5(x)	(((x) >> 40) & 0xff)
5014c06356dh#define	BYTE6(x)	(((x) >> 48) & 0xff)
5024c06356dh#define	BYTE7(x)	(((x) >> 56) & 0xff)
5034c06356dh#define	WORD0(x)	(((x) >>  0) & 0xffff)
5044c06356dh#define	WORD1(x)	(((x) >> 16) & 0xffff)
5054c06356dh#define	WORD2(x)	(((x) >> 32) & 0xffff)
5064c06356dh#define	WORD3(x)	(((x) >> 48) & 0xffff)
5074c06356dh#define	DWORD0(x)	((uint32_t)(x))
5084c06356dh#define	DWORD1(x)	((uint32_t)(((uint64_t)x) >> 32))
5094c06356dh
5104c06356dh#define	SAS_ADDR_FMT	"0x%02x%02x%02x%02x%02x%02x%02x%02x"
5114c06356dh#define	SAS_ADDR_PRT(x)	x[0], x[1], x[2], x[3], x[4], x[5], x[6], x[7]
5124c06356dh
5134c06356dh#define	PMCS_VALID_LINK_RATE(r) \
5144c06356dh	((r == SAS_LINK_RATE_1_5GBIT) || (r == SAS_LINK_RATE_3GBIT) || \
5154c06356dh	(r == SAS_LINK_RATE_6GBIT))
5164c06356dh
5174c06356dh/*
5184c06356dh * This is here to avoid inclusion of <sys/ctype.h> which is not lint clean.
5194c06356dh */
5204c06356dh#define	HEXDIGIT(x)	(((x) >= '0' && (x) <= '9') || \
5214c06356dh	((x) >= 'a' && (x) <= 'f') || ((x) >= 'A' && (x) <= 'F'))
5224c06356dh
5231f81b46David Hollister#define	NSECS_PER_SEC	1000000000UL
5241f81b46David Hollister
5254c06356dh
5264c06356dhtypedef void (*pmcs_cb_t) (pmcs_hw_t *, pmcwork_t *, uint32_t *);
5274c06356dh
5284c06356dh/*
5294c06356dh * Defines and structure used for tracing/logging information
5304c06356dh */
5314c06356dh
5324c06356dh#define	PMCS_TBUF_ELEM_SIZE	120
5334c06356dh#define	PMCS_TBUF_NUM_ELEMS_DEF	100000
5344c06356dh
535c3bc407dh#define	PMCS_TBUF_UA_MAX_SIZE	32
5364c06356dhtypedef struct {
537c3bc407dh	/* Target-specific data */
538c3bc407dh	uint16_t	target_num;
539c3bc407dh	char		target_ua[PMCS_TBUF_UA_MAX_SIZE];
540c3bc407dh	/* PHY-specific data */
541c3bc407dh	uint8_t 	phy_sas_address[8];
542c3bc407dh	char		phy_path[32];
543c3bc407dh	pmcs_dtype_t	phy_dtype;
544c3bc407dh	/* Log data */
5454c06356dh	timespec_t	timestamp;
5461f81b46David Hollister	uint64_t	fw_timestamp;
5474c06356dh	char		buf[PMCS_TBUF_ELEM_SIZE];
5484c06356dh} pmcs_tbuf_t;
5494c06356dh
5504c06356dh/*
5514c06356dh * Firmware event log header format
5524c06356dh */
5534c06356dhtypedef struct pmcs_fw_event_hdr_s {
5544c06356dh	uint32_t	fw_el_signature;
5554c06356dh	uint32_t	fw_el_entry_start_offset;
5564c06356dh	uint32_t	fw_el_rsvd1;
5574c06356dh	uint32_t	fw_el_buf_size;
5584c06356dh	uint32_t	fw_el_rsvd2;
5594c06356dh	uint32_t	fw_el_oldest_idx;
5604c06356dh	uint32_t	fw_el_latest_idx;
5614c06356dh	uint32_t	fw_el_entry_size;
5624c06356dh} pmcs_fw_event_hdr_t;
5634c06356dh
564658280bDavid Hollister/*
5651f81b46David Hollister * Firmware event log entry format
5661f81b46David Hollister */
5671f81b46David Hollistertypedef struct pmcs_fw_event_entry_s {
5681f81b46David Hollister	uint32_t	num_words : 3,
5691f81b46David Hollister			reserved : 25,
5701f81b46David Hollister			severity: 4;
5711f81b46David Hollister	uint32_t	ts_upper;
5721f81b46David Hollister	uint32_t	ts_lower;
5731f81b46David Hollister	uint32_t	seq_num;
5741f81b46David Hollister	uint32_t	logw0;
5751f81b46David Hollister	uint32_t	logw1;
5761f81b46David Hollister	uint32_t	logw2;
5771f81b46David Hollister	uint32_t	logw3;
5781f81b46David Hollister} pmcs_fw_event_entry_t;
5791f81b46David Hollister
5801f81b46David Hollister#define	PMCS_FWLOG_TIMER_DIV	8	/* fw timer has 8ns granularity */
5811f81b46David Hollister#define	PMCS_FWLOG_AAP1_SIG	0x1234AAAA
5821f81b46David Hollister#define	PMCS_FWLOG_IOP_SIG	0x5678CCCC
5831f81b46David Hollister
5841f81b46David Hollister/*
585658280bDavid Hollister * Receptacle information
586658280bDavid Hollister */
587658280bDavid Hollister#define	PMCS_NUM_RECEPTACLES	2
588658280bDavid Hollister
589658280bDavid Hollister#define	PMCS_RECEPT_LABEL_0	"SAS0"
590658280bDavid Hollister#define	PMCS_RECEPT_LABEL_1	"SAS1"
591658280bDavid Hollister
5921f81b46David Hollister#define	PMCS_RECEPT_PM_0	"f0"
5931f81b46David Hollister#define	PMCS_RECEPT_PM_1	"f"
594658280bDavid Hollister
5954c06356dh#ifdef	__cplusplus
5964c06356dh}
5974c06356dh#endif
5984c06356dh#endif	/* _PMCS_DEF_H */
599