144961713Sgirish /* 244961713Sgirish * CDDL HEADER START 344961713Sgirish * 444961713Sgirish * The contents of this file are subject to the terms of the 544961713Sgirish * Common Development and Distribution License (the "License"). 644961713Sgirish * You may not use this file except in compliance with the License. 744961713Sgirish * 844961713Sgirish * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 944961713Sgirish * or http://www.opensolaris.org/os/licensing. 1044961713Sgirish * See the License for the specific language governing permissions 1144961713Sgirish * and limitations under the License. 1244961713Sgirish * 1344961713Sgirish * When distributing Covered Code, include this CDDL HEADER in each 1444961713Sgirish * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 1544961713Sgirish * If applicable, add the following below this CDDL HEADER, with the 1644961713Sgirish * fields enclosed by brackets "[]" replaced with your own identifying 1744961713Sgirish * information: Portions Copyright [yyyy] [name of copyright owner] 1844961713Sgirish * 1944961713Sgirish * CDDL HEADER END 2044961713Sgirish */ 2144961713Sgirish /* 22678453a8Sspeer * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 2344961713Sgirish * Use is subject to license terms. 2444961713Sgirish */ 2544961713Sgirish 2644961713Sgirish #ifndef _SYS_NXGE_NXGE_TXDMA_H 2744961713Sgirish #define _SYS_NXGE_NXGE_TXDMA_H 2844961713Sgirish 2944961713Sgirish #ifdef __cplusplus 3044961713Sgirish extern "C" { 3144961713Sgirish #endif 3244961713Sgirish 33*da14cebeSEric Cheng #include <sys/taskq.h> 3444961713Sgirish #include <sys/nxge/nxge_txdma_hw.h> 3544961713Sgirish #include <npi_txdma.h> 3644961713Sgirish 3744961713Sgirish #define TXDMA_PORT_BITMAP(nxgep) (nxgep->pt_config.tx_dma_map) 3844961713Sgirish 3944961713Sgirish #define TXDMA_RECLAIM_PENDING_DEFAULT 64 4044961713Sgirish #define TX_FULL_MARK 3 4144961713Sgirish 4244961713Sgirish /* 4344961713Sgirish * Transmit load balancing definitions. 4444961713Sgirish */ 4544961713Sgirish #define NXGE_TX_LB_TCPUDP 0 /* default policy */ 4644961713Sgirish #define NXGE_TX_LB_HASH 1 /* from the hint data */ 4744961713Sgirish #define NXGE_TX_LB_DEST_MAC 2 /* Dest. MAC */ 4844961713Sgirish 4944961713Sgirish /* 5044961713Sgirish * Descriptor ring empty: 5144961713Sgirish * (1) head index is equal to tail index. 5244961713Sgirish * (2) wrapped around bits are the same. 5344961713Sgirish * Descriptor ring full: 5444961713Sgirish * (1) head index is equal to tail index. 5544961713Sgirish * (2) wrapped around bits are different. 5644961713Sgirish * 5744961713Sgirish */ 5844961713Sgirish #define TXDMA_RING_EMPTY(head, head_wrap, tail, tail_wrap) \ 5944961713Sgirish ((head == tail && head_wrap == tail_wrap) ? B_TRUE : B_FALSE) 6044961713Sgirish 6144961713Sgirish #define TXDMA_RING_FULL(head, head_wrap, tail, tail_wrap) \ 6244961713Sgirish ((head == tail && head_wrap != tail_wrap) ? B_TRUE : B_FALSE) 6344961713Sgirish 6444961713Sgirish #define TXDMA_DESC_NEXT_INDEX(index, entries, wrap_mask) \ 6544961713Sgirish ((index + entries) & wrap_mask) 6644961713Sgirish 6744961713Sgirish #define TXDMA_DRR_WEIGHT_DEFAULT 0x001f 6844961713Sgirish 691f8914d5Sml typedef enum { 701f8914d5Sml NXGE_USE_SERIAL = 0, 711f8914d5Sml NXGE_USE_START, 721f8914d5Sml } nxge_tx_mode_t; 731f8914d5Sml 7444961713Sgirish typedef struct _tx_msg_t { 7544961713Sgirish nxge_os_block_mv_t flags; /* DMA, BCOPY, DVMA (?) */ 7644961713Sgirish nxge_os_dma_common_t buf_dma; /* premapped buffer blocks */ 7744961713Sgirish nxge_os_dma_handle_t buf_dma_handle; /* premapped buffer handle */ 7844961713Sgirish nxge_os_dma_handle_t dma_handle; /* DMA handle for normal send */ 7944961713Sgirish nxge_os_dma_handle_t dvma_handle; /* Fast DVMA handle */ 802d99c5d4SMichael Speer struct _tx_msg_t *nextp; 8144961713Sgirish 8244961713Sgirish p_mblk_t tx_message; 8344961713Sgirish uint32_t tx_msg_size; 8444961713Sgirish size_t bytes_used; 8544961713Sgirish int head; 8644961713Sgirish int tail; 8744961713Sgirish } tx_msg_t, *p_tx_msg_t; 8844961713Sgirish 8944961713Sgirish /* 9044961713Sgirish * TX Statistics. 9144961713Sgirish */ 9244961713Sgirish typedef struct _nxge_tx_ring_stats_t { 9344961713Sgirish uint64_t opackets; 9444961713Sgirish uint64_t obytes; 9544961713Sgirish uint64_t oerrors; 9644961713Sgirish 9744961713Sgirish uint32_t tx_inits; 9844961713Sgirish uint32_t tx_no_buf; 9944961713Sgirish 10044961713Sgirish uint32_t mbox_err; 10144961713Sgirish uint32_t pkt_size_err; 10244961713Sgirish uint32_t tx_ring_oflow; 10344961713Sgirish uint32_t pre_buf_par_err; 10444961713Sgirish uint32_t nack_pref; 10544961713Sgirish uint32_t nack_pkt_rd; 10644961713Sgirish uint32_t conf_part_err; 10744961713Sgirish uint32_t pkt_part_err; 10844961713Sgirish uint32_t tx_starts; 10944961713Sgirish uint32_t tx_nocanput; 11044961713Sgirish uint32_t tx_msgdup_fail; 11144961713Sgirish uint32_t tx_allocb_fail; 11244961713Sgirish uint32_t tx_no_desc; 11344961713Sgirish uint32_t tx_dma_bind_fail; 11444961713Sgirish uint32_t tx_uflo; 11544961713Sgirish 11644961713Sgirish uint32_t tx_hdr_pkts; 11744961713Sgirish uint32_t tx_ddi_pkts; 11844961713Sgirish uint32_t tx_dvma_pkts; 11944961713Sgirish 12044961713Sgirish uint32_t tx_max_pend; 12144961713Sgirish uint32_t tx_jumbo_pkts; 12244961713Sgirish 12344961713Sgirish txdma_ring_errlog_t errlog; 12444961713Sgirish } nxge_tx_ring_stats_t, *p_nxge_tx_ring_stats_t; 12544961713Sgirish 12644961713Sgirish typedef struct _tx_ring_t { 12744961713Sgirish nxge_os_dma_common_t tdc_desc; 12844961713Sgirish struct _nxge_t *nxgep; 12944961713Sgirish p_tx_msg_t tx_msg_ring; 13044961713Sgirish uint32_t tnblocks; 13144961713Sgirish tx_rng_cfig_t tx_ring_cfig; 13244961713Sgirish tx_ring_hdl_t tx_ring_hdl; 13344961713Sgirish tx_ring_kick_t tx_ring_kick; 13444961713Sgirish tx_cs_t tx_cs; 13544961713Sgirish tx_dma_ent_msk_t tx_evmask; 13644961713Sgirish txdma_mbh_t tx_mbox_mbh; 13744961713Sgirish txdma_mbl_t tx_mbox_mbl; 13844961713Sgirish log_page_vld_t page_valid; 13944961713Sgirish log_page_mask_t page_mask_1; 14044961713Sgirish log_page_mask_t page_mask_2; 14144961713Sgirish log_page_value_t page_value_1; 14244961713Sgirish log_page_value_t page_value_2; 14344961713Sgirish log_page_relo_t page_reloc_1; 14444961713Sgirish log_page_relo_t page_reloc_2; 14544961713Sgirish log_page_hdl_t page_hdl; 14644961713Sgirish txc_dma_max_burst_t max_burst; 14744961713Sgirish boolean_t cfg_set; 14822c0d73aSspeer #define NXGE_TX_RING_ONLINE 0x00 14922c0d73aSspeer #define NXGE_TX_RING_OFFLINING 0x01 15022c0d73aSspeer #define NXGE_TX_RING_OFFLINED 0x02 15122c0d73aSspeer uint32_t tx_ring_offline; 1526895688eSspeer boolean_t tx_ring_busy; 15344961713Sgirish 15444961713Sgirish nxge_os_mutex_t lock; 155*da14cebeSEric Cheng mac_ring_handle_t tx_ring_handle; 156*da14cebeSEric Cheng ddi_taskq_t *taskq; 15744961713Sgirish uint16_t index; 15844961713Sgirish uint16_t tdc; 15944961713Sgirish struct nxge_tdc_cfg *tdc_p; 160*da14cebeSEric Cheng int tx_ring_size; 16144961713Sgirish uint32_t num_chunks; 16244961713Sgirish 16344961713Sgirish uint_t tx_wrap_mask; 16444961713Sgirish uint_t rd_index; 16544961713Sgirish uint_t wr_index; 16644961713Sgirish boolean_t wr_index_wrap; 16744961713Sgirish tx_ring_hdl_t ring_head; 16844961713Sgirish tx_ring_kick_t ring_kick_tail; 16944961713Sgirish txdma_mailbox_t tx_mbox; 17044961713Sgirish 171*da14cebeSEric Cheng int descs_pending; 17244961713Sgirish boolean_t queueing; 17344961713Sgirish 17444961713Sgirish nxge_os_mutex_t sq_lock; 17544961713Sgirish p_mblk_t head; 17644961713Sgirish p_mblk_t tail; 17744961713Sgirish 17844961713Sgirish uint16_t ldg_group_id; 17944961713Sgirish p_nxge_tx_ring_stats_t tdc_stats; 18044961713Sgirish 18144961713Sgirish nxge_os_mutex_t dvma_lock; 18244961713Sgirish uint_t dvma_wr_index; 18344961713Sgirish uint_t dvma_rd_index; 18444961713Sgirish uint_t dvma_pending; 18544961713Sgirish uint_t dvma_available; 18644961713Sgirish uint_t dvma_wrap_mask; 18744961713Sgirish 18844961713Sgirish nxge_os_dma_handle_t *dvma_ring; 18944961713Sgirish 19044961713Sgirish #if defined(sun4v) && defined(NIU_LP_WORKAROUND) 19144961713Sgirish uint64_t hv_tx_buf_base_ioaddr_pp; 19244961713Sgirish uint64_t hv_tx_buf_ioaddr_size; 19344961713Sgirish uint64_t hv_tx_cntl_base_ioaddr_pp; 19444961713Sgirish uint64_t hv_tx_cntl_ioaddr_size; 19544961713Sgirish boolean_t hv_set; 19644961713Sgirish #endif 19744961713Sgirish } tx_ring_t, *p_tx_ring_t; 19844961713Sgirish 19944961713Sgirish 20044961713Sgirish /* Transmit Mailbox */ 20144961713Sgirish typedef struct _tx_mbox_t { 20244961713Sgirish nxge_os_mutex_t lock; 20344961713Sgirish uint16_t index; 20444961713Sgirish struct _nxge_t *nxgep; 20544961713Sgirish uint16_t tdc; 20644961713Sgirish nxge_os_dma_common_t tx_mbox; 20744961713Sgirish txdma_mbl_t tx_mbox_l; 20844961713Sgirish txdma_mbh_t tx_mbox_h; 20944961713Sgirish } tx_mbox_t, *p_tx_mbox_t; 21044961713Sgirish 21144961713Sgirish typedef struct _tx_rings_t { 21244961713Sgirish p_tx_ring_t *rings; 21344961713Sgirish boolean_t txdesc_allocated; 21444961713Sgirish uint32_t ndmas; 21544961713Sgirish nxge_os_dma_common_t tdc_dma; 21644961713Sgirish nxge_os_dma_common_t tdc_mbox; 21744961713Sgirish } tx_rings_t, *p_tx_rings_t; 21844961713Sgirish 21944961713Sgirish 22044961713Sgirish typedef struct _tx_mbox_areas_t { 22144961713Sgirish p_tx_mbox_t *txmbox_areas_p; 22244961713Sgirish boolean_t txmbox_allocated; 22344961713Sgirish } tx_mbox_areas_t, *p_tx_mbox_areas_t; 22444961713Sgirish 22544961713Sgirish /* 22644961713Sgirish * Transmit prototypes. 22744961713Sgirish */ 22844961713Sgirish nxge_status_t nxge_init_txdma_channels(p_nxge_t); 22944961713Sgirish void nxge_uninit_txdma_channels(p_nxge_t); 230678453a8Sspeer 231678453a8Sspeer nxge_status_t nxge_init_txdma_channel(p_nxge_t, int); 232678453a8Sspeer void nxge_uninit_txdma_channel(p_nxge_t, int); 233678453a8Sspeer 23444961713Sgirish void nxge_setup_dma_common(p_nxge_dma_common_t, p_nxge_dma_common_t, 23544961713Sgirish uint32_t, uint32_t); 23644961713Sgirish nxge_status_t nxge_reset_txdma_channel(p_nxge_t, uint16_t, 23744961713Sgirish uint64_t); 23844961713Sgirish nxge_status_t nxge_init_txdma_channel_event_mask(p_nxge_t, 23944961713Sgirish uint16_t, p_tx_dma_ent_msk_t); 24044961713Sgirish nxge_status_t nxge_init_txdma_channel_cntl_stat(p_nxge_t, 24144961713Sgirish uint16_t, uint64_t); 24244961713Sgirish nxge_status_t nxge_enable_txdma_channel(p_nxge_t, uint16_t, 24344961713Sgirish p_tx_ring_t, p_tx_mbox_t); 24444961713Sgirish 24544961713Sgirish p_mblk_t nxge_tx_pkt_header_reserve(p_mblk_t, uint8_t *); 24644961713Sgirish int nxge_tx_pkt_nmblocks(p_mblk_t, int *); 24744961713Sgirish boolean_t nxge_txdma_reclaim(p_nxge_t, p_tx_ring_t, int); 24844961713Sgirish 24944961713Sgirish void nxge_fill_tx_hdr(p_mblk_t, boolean_t, boolean_t, 250b4d05839Sml int, uint8_t, p_tx_pkt_hdr_all_t, t_uscalar_t, t_uscalar_t); 25144961713Sgirish 25244961713Sgirish nxge_status_t nxge_txdma_hw_mode(p_nxge_t, boolean_t); 25344961713Sgirish void nxge_hw_start_tx(p_nxge_t); 25444961713Sgirish void nxge_txdma_stop(p_nxge_t); 25544961713Sgirish void nxge_txdma_stop_start(p_nxge_t); 25644961713Sgirish void nxge_fixup_txdma_rings(p_nxge_t); 25744961713Sgirish void nxge_txdma_hw_kick(p_nxge_t); 25844961713Sgirish void nxge_txdma_fix_channel(p_nxge_t, uint16_t); 25944961713Sgirish void nxge_txdma_fixup_channel(p_nxge_t, p_tx_ring_t, 26044961713Sgirish uint16_t); 26144961713Sgirish void nxge_txdma_hw_kick_channel(p_nxge_t, p_tx_ring_t, 26244961713Sgirish uint16_t); 26344961713Sgirish 26444961713Sgirish void nxge_txdma_regs_dump(p_nxge_t, int); 26544961713Sgirish void nxge_txdma_regs_dump_channels(p_nxge_t); 26644961713Sgirish 26744961713Sgirish void nxge_check_tx_hang(p_nxge_t); 26844961713Sgirish void nxge_fixup_hung_txdma_rings(p_nxge_t); 26944961713Sgirish 27044961713Sgirish void nxge_reclaim_rings(p_nxge_t); 27144961713Sgirish int nxge_txdma_channel_hung(p_nxge_t, 27244961713Sgirish p_tx_ring_t tx_ring_p, uint16_t); 27344961713Sgirish int nxge_txdma_hung(p_nxge_t); 27444961713Sgirish int nxge_txdma_stop_inj_err(p_nxge_t, int); 27544961713Sgirish void nxge_txdma_inject_err(p_nxge_t, uint32_t, uint8_t); 27644961713Sgirish 277678453a8Sspeer extern nxge_status_t nxge_alloc_tx_mem_pool(p_nxge_t); 278678453a8Sspeer extern nxge_status_t nxge_alloc_txb(p_nxge_t nxgep, int channel); 279678453a8Sspeer extern void nxge_free_txb(p_nxge_t nxgep, int channel); 280678453a8Sspeer 28144961713Sgirish #ifdef __cplusplus 28244961713Sgirish } 28344961713Sgirish #endif 28444961713Sgirish 28544961713Sgirish #endif /* _SYS_NXGE_NXGE_TXDMA_H */ 286