xref: /illumos-gate/usr/src/uts/common/sys/fm/io/pci.h (revision 2d6eb4a5)
17c478bd9Sstevel@tonic-gate /*
27c478bd9Sstevel@tonic-gate  * CDDL HEADER START
37c478bd9Sstevel@tonic-gate  *
47c478bd9Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
500d0963fSdilpreet  * Common Development and Distribution License (the "License").
600d0963fSdilpreet  * You may not use this file except in compliance with the License.
77c478bd9Sstevel@tonic-gate  *
87c478bd9Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
97c478bd9Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
107c478bd9Sstevel@tonic-gate  * See the License for the specific language governing permissions
117c478bd9Sstevel@tonic-gate  * and limitations under the License.
127c478bd9Sstevel@tonic-gate  *
137c478bd9Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
147c478bd9Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
157c478bd9Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
167c478bd9Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
177c478bd9Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
187c478bd9Sstevel@tonic-gate  *
197c478bd9Sstevel@tonic-gate  * CDDL HEADER END
207c478bd9Sstevel@tonic-gate  */
217c478bd9Sstevel@tonic-gate /*
22*eae2e508Skrishnae  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
237c478bd9Sstevel@tonic-gate  * Use is subject to license terms.
247c478bd9Sstevel@tonic-gate  */
257c478bd9Sstevel@tonic-gate 
267c478bd9Sstevel@tonic-gate #ifndef _SYS_FM_IO_PCI_H
277c478bd9Sstevel@tonic-gate #define	_SYS_FM_IO_PCI_H
287c478bd9Sstevel@tonic-gate 
297c478bd9Sstevel@tonic-gate #ifdef	__cplusplus
307c478bd9Sstevel@tonic-gate extern "C" {
317c478bd9Sstevel@tonic-gate #endif
327c478bd9Sstevel@tonic-gate 
337c478bd9Sstevel@tonic-gate #define	PCI_ERROR_SUBCLASS	"pci"
347c478bd9Sstevel@tonic-gate #define	PCI_SEC_ERROR_SUBCLASS	"sec"
357c478bd9Sstevel@tonic-gate 
367c478bd9Sstevel@tonic-gate /* Common PCI ereport classes */
377c478bd9Sstevel@tonic-gate #define	PCI_DET_PERR		"dpe"
387c478bd9Sstevel@tonic-gate #define	PCI_MDPE		"mdpe"
397c478bd9Sstevel@tonic-gate #define	PCI_REC_SERR		"rserr"
407c478bd9Sstevel@tonic-gate #define	PCI_SIG_SERR		"sserr"
417c478bd9Sstevel@tonic-gate #define	PCI_MA			"ma"
427c478bd9Sstevel@tonic-gate #define	PCI_REC_TA		"rta"
437c478bd9Sstevel@tonic-gate #define	PCI_SIG_TA		"sta"
447c478bd9Sstevel@tonic-gate #define	PCI_DTO			"dto"
457c478bd9Sstevel@tonic-gate #define	PCI_TARG_MDPE		"target-mdpe"
467c478bd9Sstevel@tonic-gate #define	PCI_TARG_MA		"target-ma"
477c478bd9Sstevel@tonic-gate #define	PCI_TARG_REC_TA		"target-rta"
487c478bd9Sstevel@tonic-gate #define	PCI_NR			"nr"
497c478bd9Sstevel@tonic-gate 
507c478bd9Sstevel@tonic-gate /* PCI Error payload name fields */
517c478bd9Sstevel@tonic-gate #define	PCI_CONFIG_STATUS	"pci-status"
527c478bd9Sstevel@tonic-gate #define	PCI_CONFIG_COMMAND	"pci-command"
537c478bd9Sstevel@tonic-gate #define	PCI_SEC_CONFIG_STATUS	"pci-sec-status"
547c478bd9Sstevel@tonic-gate #define	PCI_BCNTRL		"pci-bdg-ctrl"
557c478bd9Sstevel@tonic-gate #define	PCI_PA			"pci-pa"
567c478bd9Sstevel@tonic-gate 
5700d0963fSdilpreet /*
5800d0963fSdilpreet  * PCI-X extensions
5900d0963fSdilpreet  */
6000d0963fSdilpreet #define	PCIX_ERROR_SUBCLASS	"pcix"
6100d0963fSdilpreet #define	PCIX_SEC_ERROR_SUBCLASS "sec-"
6200d0963fSdilpreet 
6300d0963fSdilpreet /* Common PCI-X ereport classes */
6400d0963fSdilpreet #define	PCIX_ECC_CE_ADDR	"ecc.ce-addr"
6500d0963fSdilpreet #define	PCIX_ECC_CE_ATTR	"ecc.ce-attr"
6600d0963fSdilpreet #define	PCIX_ECC_CE_DATA	"ecc.ce-data"
6700d0963fSdilpreet #define	PCIX_ECC_UE_ADDR	"ecc.ue-addr"
6800d0963fSdilpreet #define	PCIX_ECC_UE_ATTR	"ecc.ue-attr"
6900d0963fSdilpreet #define	PCIX_ECC_UE_DATA	"ecc.ue-data"
7000d0963fSdilpreet #define	PCIX_RX_SPL_MSG		"rx-spl"
7100d0963fSdilpreet #define	PCIX_ECC_S_CE		"s-ce"
7200d0963fSdilpreet #define	PCIX_ECC_S_UE		"s-ue"
7300d0963fSdilpreet #define	PCIX_SPL_DIS		"spl-dis"
7400d0963fSdilpreet #define	PCIX_BSS_SPL_DLY	"spl-dly"
7500d0963fSdilpreet #define	PCIX_BSS_SPL_OR		"spl-or"
7600d0963fSdilpreet #define	PCIX_UNEX_SPL		"unex-spl"
7700d0963fSdilpreet 
7800d0963fSdilpreet #define	PCIX_SEC_STATUS		"pcix-sec-status"
7900d0963fSdilpreet #define	PCIX_BDG_STAT		"pcix-bdg-stat"
8000d0963fSdilpreet #define	PCIX_COMMAND		"pcix-command"
8100d0963fSdilpreet #define	PCIX_STATUS		"pcix-status"
8200d0963fSdilpreet #define	PCIX_ECC_CTLSTAT	"pcix-ecc-ctlstat"
8300d0963fSdilpreet #define	PCIX_ECC_ATTR		"pcix-ecc-attr"
8400d0963fSdilpreet 
8500d0963fSdilpreet /*
8600d0963fSdilpreet  * PCI Express extensions
8700d0963fSdilpreet  */
8800d0963fSdilpreet #define	PCIEX_ERROR_SUBCLASS		"pciex"
8900d0963fSdilpreet 
9000d0963fSdilpreet /* Common PCI Express ereport classes */
9100d0963fSdilpreet #define	PCIEX_RE		"pl.re"
9200d0963fSdilpreet #define	PCIEX_TE		"pl.te"
9300d0963fSdilpreet 
9400d0963fSdilpreet #define	PCIEX_SD		"dl.sd"
9500d0963fSdilpreet #define	PCIEX_BDP		"dl.bdllp"
9600d0963fSdilpreet #define	PCIEX_BTP		"dl.btlp"
9700d0963fSdilpreet #define	PCIEX_DLP		"dl.dllp"
9800d0963fSdilpreet #define	PCIEX_RNR		"dl.rnr"
9900d0963fSdilpreet #define	PCIEX_RTO		"dl.rto"
10000d0963fSdilpreet 
10100d0963fSdilpreet #define	PCIEX_CA		"tl.ca"
10200d0963fSdilpreet #define	PCIEX_CTO		"tl.cto"
10300d0963fSdilpreet #define	PCIEX_ECRC		"tl.ecrc"
10400d0963fSdilpreet #define	PCIEX_FCP		"tl.fcp"
10500d0963fSdilpreet #define	PCIEX_MFP		"tl.mtlp"
10600d0963fSdilpreet #define	PCIEX_POIS		"tl.ptlp"
10700d0963fSdilpreet #define	PCIEX_ROF		"tl.rof"
10800d0963fSdilpreet #define	PCIEX_UC		"tl.uc"
10900d0963fSdilpreet #define	PCIEX_UR		"tl.ur"
11000d0963fSdilpreet 
11100d0963fSdilpreet #define	PCIEX_INTERR		"bdg.sec-interr"
11200d0963fSdilpreet #define	PCIEX_S_MA_SC		"bdg.sec-ma-sc"
11300d0963fSdilpreet #define	PCIEX_S_PERR		"bdg.sec-perr"
11400d0963fSdilpreet #define	PCIEX_S_RMA		"bdg.sec-rma"
11500d0963fSdilpreet #define	PCIEX_S_RTA		"bdg.sec-rta"
11600d0963fSdilpreet #define	PCIEX_S_SERR		"bdg.sec-serr"
11700d0963fSdilpreet #define	PCIEX_S_TA_SC		"bdg.sec-ta-sc"
11800d0963fSdilpreet #define	PCIEX_S_TEX		"bdg.sec-tex"
11900d0963fSdilpreet #define	PCIEX_S_UADR		"bdg.sec-uadr"
12000d0963fSdilpreet #define	PCIEX_S_UAT		"bdg.sec-uat"
12100d0963fSdilpreet #define	PCIEX_S_UDE		"bdg.sec-ude"
12200d0963fSdilpreet #define	PCIEX_S_USC		"bdg.usc"
12300d0963fSdilpreet #define	PCIEX_S_USCMD		"bdg.uscmd"
12400d0963fSdilpreet 
12500d0963fSdilpreet #define	PCIEX_RC_FE_MSG		"rc.fe-msg"
12600d0963fSdilpreet #define	PCIEX_RC_NFE_MSG	"rc.nfe-msg"
12700d0963fSdilpreet #define	PCIEX_RC_CE_MSG		"rc.ce-msg"
12800d0963fSdilpreet #define	PCIEX_RC_MCE_MSG	"rc.mce-msg"
12900d0963fSdilpreet #define	PCIEX_RC_MUE_MSG	"rc.mue-msg"
13000d0963fSdilpreet 
13100d0963fSdilpreet #define	PCIEX_CORR		"correctable"
13200d0963fSdilpreet #define	PCIEX_FAT		"fatal"
13300d0963fSdilpreet #define	PCIEX_NONFAT		"nonfatal"
13400d0963fSdilpreet #define	PCIEX_NADV		"noadverr"
13500d0963fSdilpreet #define	PCIEX_ANFE		"a-nonfatal"
13600d0963fSdilpreet 
13700d0963fSdilpreet /* PCI Express payload name fields */
13800d0963fSdilpreet #define	PCIEX_DEVSTS_REG	"dev-status"
13900d0963fSdilpreet #define	PCIEX_LINKSTS_REG	"link-status"
14000d0963fSdilpreet #define	PCIEX_ROOT_ERRSTS_REG	"rc-status"
14100d0963fSdilpreet #define	PCIEX_CE_STATUS_REG	"ce-status"
14200d0963fSdilpreet #define	PCIEX_UE_STATUS_REG	"ue-status"
14300d0963fSdilpreet #define	PCIEX_UE_SEV_REG	"ue-severity"
14400d0963fSdilpreet #define	PCIEX_SEC_UE_STATUS	"sue-status"
14500d0963fSdilpreet #define	PCIEX_SRC_ID		"source-id"
14600d0963fSdilpreet #define	PCIEX_SRC_VALID		"source-valid"
14700d0963fSdilpreet #define	PCIEX_ADV_CTL		"adv-ctl"
14800d0963fSdilpreet #define	PCIEX_UE_HDR0		"ue_hdr0"
14900d0963fSdilpreet #define	PCIEX_UE_HDR1		"ue_hdr1"
15000d0963fSdilpreet #define	PCIEX_UE_HDR2		"ue_hdr2"
15100d0963fSdilpreet #define	PCIEX_UE_HDR3		"ue_hdr3"
15200d0963fSdilpreet #define	PCIEX_SUE_HDR0		"sue_hdr0"
15300d0963fSdilpreet #define	PCIEX_SUE_HDR1		"sue_hdr1"
15400d0963fSdilpreet #define	PCIEX_SUE_HDR2		"sue_hdr2"
15500d0963fSdilpreet #define	PCIEX_SUE_HDR3		"sue_hdr3"
15600d0963fSdilpreet 
157*eae2e508Skrishnae /* Common fabric class names */
158*eae2e508Skrishnae #define	PCIEX_FABRIC		"fabric"
159*eae2e508Skrishnae 
1607c478bd9Sstevel@tonic-gate #ifdef	__cplusplus
1617c478bd9Sstevel@tonic-gate }
1627c478bd9Sstevel@tonic-gate #endif
1637c478bd9Sstevel@tonic-gate 
1647c478bd9Sstevel@tonic-gate #endif	/* _SYS_FM_IO_PCI_H */
165