182527734SSukumar Swaminathan /*
282527734SSukumar Swaminathan  * CDDL HEADER START
382527734SSukumar Swaminathan  *
482527734SSukumar Swaminathan  * The contents of this file are subject to the terms of the
582527734SSukumar Swaminathan  * Common Development and Distribution License (the "License").
682527734SSukumar Swaminathan  * You may not use this file except in compliance with the License.
782527734SSukumar Swaminathan  *
8*8f23e9faSHans Rosenfeld  * You can obtain a copy of the license at
9*8f23e9faSHans Rosenfeld  * http://www.opensource.org/licenses/cddl1.txt.
1082527734SSukumar Swaminathan  * See the License for the specific language governing permissions
1182527734SSukumar Swaminathan  * and limitations under the License.
1282527734SSukumar Swaminathan  *
1382527734SSukumar Swaminathan  * When distributing Covered Code, include this CDDL HEADER in each
1482527734SSukumar Swaminathan  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
1582527734SSukumar Swaminathan  * If applicable, add the following below this CDDL HEADER, with the
1682527734SSukumar Swaminathan  * fields enclosed by brackets "[]" replaced with your own identifying
1782527734SSukumar Swaminathan  * information: Portions Copyright [yyyy] [name of copyright owner]
1882527734SSukumar Swaminathan  *
1982527734SSukumar Swaminathan  * CDDL HEADER END
2082527734SSukumar Swaminathan  */
2182527734SSukumar Swaminathan 
2282527734SSukumar Swaminathan /*
23*8f23e9faSHans Rosenfeld  * Copyright (c) 2004-2012 Emulex. All rights reserved.
2482527734SSukumar Swaminathan  * Use is subject to license terms.
2582527734SSukumar Swaminathan  */
2682527734SSukumar Swaminathan 
2782527734SSukumar Swaminathan #ifndef _EMLXS_QUEUE_H
2882527734SSukumar Swaminathan #define	_EMLXS_QUEUE_H
2982527734SSukumar Swaminathan 
3082527734SSukumar Swaminathan #ifdef	__cplusplus
3182527734SSukumar Swaminathan extern "C" {
3282527734SSukumar Swaminathan #endif
3382527734SSukumar Swaminathan 
3482527734SSukumar Swaminathan 
3582527734SSukumar Swaminathan /* Queue entry defines */
3682527734SSukumar Swaminathan 
3782527734SSukumar Swaminathan /* EQ entries */
3882527734SSukumar Swaminathan typedef struct EQE
3982527734SSukumar Swaminathan {
4082527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN
4182527734SSukumar Swaminathan 	uint32_t	CQId: 16;
4282527734SSukumar Swaminathan 	uint32_t	MinorCode: 12;
4382527734SSukumar Swaminathan 	uint32_t	MajorCode: 3;
4482527734SSukumar Swaminathan 	uint32_t	Valid: 1;
4582527734SSukumar Swaminathan #endif
4682527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN
4782527734SSukumar Swaminathan 	uint32_t	Valid: 1;
4882527734SSukumar Swaminathan 	uint32_t	MajorCode: 3;
4982527734SSukumar Swaminathan 	uint32_t	MinorCode: 12;
5082527734SSukumar Swaminathan 	uint32_t	CQId: 16;
5182527734SSukumar Swaminathan #endif
5282527734SSukumar Swaminathan 
5382527734SSukumar Swaminathan } EQE_t;
5482527734SSukumar Swaminathan 
5582527734SSukumar Swaminathan typedef union
5682527734SSukumar Swaminathan {
5782527734SSukumar Swaminathan 	uint32_t	word;
5882527734SSukumar Swaminathan 	EQE_t		entry;
5982527734SSukumar Swaminathan 
6082527734SSukumar Swaminathan } EQE_u;
6182527734SSukumar Swaminathan 
6282527734SSukumar Swaminathan #define	EQE_VALID	0x00000001  /* Mask for EQE valid */
6382527734SSukumar Swaminathan #define	EQE_CQID	0xFFFF0000  /* Mask for EQE CQID */
6482527734SSukumar Swaminathan 
6582527734SSukumar Swaminathan /* CQ entries */
6682527734SSukumar Swaminathan typedef struct CQE_CmplWQ
6782527734SSukumar Swaminathan {
6882527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN
6982527734SSukumar Swaminathan 	uint16_t	RequestTag;	/* Word 0 */
7082527734SSukumar Swaminathan 	uint8_t		Status;
7182527734SSukumar Swaminathan 	uint8_t		hw_status;
7282527734SSukumar Swaminathan 
7382527734SSukumar Swaminathan 	uint32_t	CmdSpecific;	/* Word 1 */
7482527734SSukumar Swaminathan 	uint32_t	Parameter;	/* Word 2 */
7582527734SSukumar Swaminathan 
7682527734SSukumar Swaminathan 	uint32_t	Valid: 1;	/* Word 3 */
7782527734SSukumar Swaminathan 	uint32_t	Rsvd1: 2;
7882527734SSukumar Swaminathan 	uint32_t	XB: 1;
7982527734SSukumar Swaminathan 	uint32_t	PV: 1;
8082527734SSukumar Swaminathan 	uint32_t	Priority: 3;
8182527734SSukumar Swaminathan 	uint32_t	Code: 8;
8282527734SSukumar Swaminathan 	uint32_t	Rsvd2: 16;
8382527734SSukumar Swaminathan #endif
8482527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN
8582527734SSukumar Swaminathan 	uint8_t		hw_status;
8682527734SSukumar Swaminathan 	uint8_t		Status;
8782527734SSukumar Swaminathan 	uint16_t	RequestTag;	/* Word 0 */
8882527734SSukumar Swaminathan 
8982527734SSukumar Swaminathan 	uint32_t	CmdSpecific;	/* Word 1 */
9082527734SSukumar Swaminathan 	uint32_t	Parameter;	/* Word 2 */
9182527734SSukumar Swaminathan 
9282527734SSukumar Swaminathan 	uint32_t	Rsvd2: 16;
9382527734SSukumar Swaminathan 	uint32_t	Code: 8;
9482527734SSukumar Swaminathan 	uint32_t	Priority: 3;
9582527734SSukumar Swaminathan 	uint32_t	PV: 1;
9682527734SSukumar Swaminathan 	uint32_t	XB: 1;
9782527734SSukumar Swaminathan 	uint32_t	Rsvd1: 2;
9882527734SSukumar Swaminathan 	uint32_t	Valid: 1;	/* Word 3 */
9982527734SSukumar Swaminathan #endif
10082527734SSukumar Swaminathan } CQE_CmplWQ_t;
10182527734SSukumar Swaminathan 
10282527734SSukumar Swaminathan typedef struct CQE_RelWQ
10382527734SSukumar Swaminathan {
10482527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN
10582527734SSukumar Swaminathan 	uint32_t	Reserved1;	/* Word 0 */
10682527734SSukumar Swaminathan 	uint32_t	Reserved2;	/* Word 1 */
10782527734SSukumar Swaminathan 
10882527734SSukumar Swaminathan 	uint16_t	WQid;		/* Word 2 */
10982527734SSukumar Swaminathan 	uint16_t	WQindex;
11082527734SSukumar Swaminathan 
11182527734SSukumar Swaminathan 	uint32_t	Valid: 1;	/* Word 3 */
11282527734SSukumar Swaminathan 	uint32_t	Rsvd1: 7;
11382527734SSukumar Swaminathan 	uint32_t	Code: 8;
11482527734SSukumar Swaminathan 	uint32_t	Rsvd2: 16;
11582527734SSukumar Swaminathan #endif
11682527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN
11782527734SSukumar Swaminathan 	uint32_t	Reserved1;	/* Word 0 */
11882527734SSukumar Swaminathan 	uint32_t	Reserved2;	/* Word 1 */
11982527734SSukumar Swaminathan 
12082527734SSukumar Swaminathan 	uint16_t	WQindex;
12182527734SSukumar Swaminathan 	uint16_t	WQid;		/* Word 2 */
12282527734SSukumar Swaminathan 
12382527734SSukumar Swaminathan 	uint32_t	Rsvd2: 16;
12482527734SSukumar Swaminathan 	uint32_t	Code: 8;
12582527734SSukumar Swaminathan 	uint32_t	Rsvd1: 7;
12682527734SSukumar Swaminathan 	uint32_t	Valid: 1;	/* Word 3 */
12782527734SSukumar Swaminathan #endif
12882527734SSukumar Swaminathan } CQE_RelWQ_t;
12982527734SSukumar Swaminathan 
13082527734SSukumar Swaminathan typedef struct CQE_UnsolRcv
13182527734SSukumar Swaminathan {
13282527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN
13382527734SSukumar Swaminathan 	uint16_t	RQindex;	/* Word 0 */
13482527734SSukumar Swaminathan 	uint8_t		Status;
13582527734SSukumar Swaminathan 	uint8_t		Rsvd1;
13682527734SSukumar Swaminathan 
13782527734SSukumar Swaminathan 	uint32_t	Rsvd2;		/* Word 1 */
13882527734SSukumar Swaminathan 
13982527734SSukumar Swaminathan 	uint32_t	data_size: 16;	/* Word 2 */
14082527734SSukumar Swaminathan 	uint32_t	RQid: 10;
14182527734SSukumar Swaminathan 	uint32_t	FCFId: 6;
14282527734SSukumar Swaminathan 
14382527734SSukumar Swaminathan 	uint32_t	Valid: 1;	/* Word 3 */
144*8f23e9faSHans Rosenfeld 	uint32_t	Rsvd3: 1;
14582527734SSukumar Swaminathan 	uint32_t	hdr_size: 6;
14682527734SSukumar Swaminathan 	uint32_t	Code: 8;
14782527734SSukumar Swaminathan 	uint32_t	eof: 8;
14882527734SSukumar Swaminathan 	uint32_t	sof: 8;
14982527734SSukumar Swaminathan #endif
15082527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN
15182527734SSukumar Swaminathan 	uint8_t		Rsvd1;
15282527734SSukumar Swaminathan 	uint8_t		Status;
15382527734SSukumar Swaminathan 	uint16_t	RQindex;	/* Word 0 */
15482527734SSukumar Swaminathan 
15582527734SSukumar Swaminathan 	uint32_t	Rsvd2;		/* Word 1 */
15682527734SSukumar Swaminathan 
15782527734SSukumar Swaminathan 	uint32_t	FCFId: 6;
15882527734SSukumar Swaminathan 	uint32_t	RQid: 10;
15982527734SSukumar Swaminathan 	uint32_t	data_size: 16;	/* Word 2 */
16082527734SSukumar Swaminathan 
16182527734SSukumar Swaminathan 	uint32_t	sof: 8;
16282527734SSukumar Swaminathan 	uint32_t	eof: 8;
16382527734SSukumar Swaminathan 	uint32_t	Code: 8;
16482527734SSukumar Swaminathan 	uint32_t	hdr_size: 6;
165*8f23e9faSHans Rosenfeld 	uint32_t	Rsvd3: 1;
16682527734SSukumar Swaminathan 	uint32_t	Valid: 1;	/* Word 3 */
16782527734SSukumar Swaminathan #endif
16882527734SSukumar Swaminathan } CQE_UnsolRcv_t;
16982527734SSukumar Swaminathan 
170*8f23e9faSHans Rosenfeld 
171*8f23e9faSHans Rosenfeld typedef struct CQE_UnsolRcvV1
172*8f23e9faSHans Rosenfeld {
173*8f23e9faSHans Rosenfeld #ifdef EMLXS_BIG_ENDIAN
174*8f23e9faSHans Rosenfeld 	uint16_t	RQindex;	/* Word 0 */
175*8f23e9faSHans Rosenfeld 	uint8_t		Status;
176*8f23e9faSHans Rosenfeld 	uint8_t		Rsvd1;
177*8f23e9faSHans Rosenfeld 
178*8f23e9faSHans Rosenfeld 	uint32_t	Rsvd2: 26;	/* Word 1 */
179*8f23e9faSHans Rosenfeld 	uint32_t	FCFId: 6;
180*8f23e9faSHans Rosenfeld 
181*8f23e9faSHans Rosenfeld 	uint16_t	data_size;	/* Word 2 */
182*8f23e9faSHans Rosenfeld 	uint16_t	RQid;
183*8f23e9faSHans Rosenfeld 
184*8f23e9faSHans Rosenfeld 	uint32_t	Valid: 1;	/* Word 3 */
185*8f23e9faSHans Rosenfeld 	uint32_t	Rsvd3: 1;
186*8f23e9faSHans Rosenfeld 	uint32_t	hdr_size: 6;
187*8f23e9faSHans Rosenfeld 	uint32_t	Code: 8;
188*8f23e9faSHans Rosenfeld 	uint32_t	eof: 8;
189*8f23e9faSHans Rosenfeld 	uint32_t	sof: 8;
190*8f23e9faSHans Rosenfeld #endif
191*8f23e9faSHans Rosenfeld #ifdef EMLXS_LITTLE_ENDIAN
192*8f23e9faSHans Rosenfeld 	uint8_t		Rsvd1;
193*8f23e9faSHans Rosenfeld 	uint8_t		Status;
194*8f23e9faSHans Rosenfeld 	uint16_t	RQindex;	/* Word 0 */
195*8f23e9faSHans Rosenfeld 
196*8f23e9faSHans Rosenfeld 	uint32_t	FCFId: 6;
197*8f23e9faSHans Rosenfeld 	uint32_t	Rsvd2: 26;	/* Word 1 */
198*8f23e9faSHans Rosenfeld 
199*8f23e9faSHans Rosenfeld 	uint16_t	RQid;
200*8f23e9faSHans Rosenfeld 	uint16_t	data_size;	/* Word 2 */
201*8f23e9faSHans Rosenfeld 
202*8f23e9faSHans Rosenfeld 	uint32_t	sof: 8;
203*8f23e9faSHans Rosenfeld 	uint32_t	eof: 8;
204*8f23e9faSHans Rosenfeld 	uint32_t	Code: 8;
205*8f23e9faSHans Rosenfeld 	uint32_t	hdr_size: 6;
206*8f23e9faSHans Rosenfeld 	uint32_t	Rsvd3: 1;
207*8f23e9faSHans Rosenfeld 	uint32_t	Valid: 1;	/* Word 3 */
208*8f23e9faSHans Rosenfeld #endif
209*8f23e9faSHans Rosenfeld } CQE_UnsolRcvV1_t;
210*8f23e9faSHans Rosenfeld 
21182527734SSukumar Swaminathan /* Status defines */
21282527734SSukumar Swaminathan #define	RQ_STATUS_SUCCESS		0x10
21382527734SSukumar Swaminathan #define	RQ_STATUS_BUFLEN_EXCEEDED	0x11
21482527734SSukumar Swaminathan #define	RQ_STATUS_NEED_BUFFER		0x12
21582527734SSukumar Swaminathan #define	RQ_STATUS_FRAME_DISCARDED	0x13
21682527734SSukumar Swaminathan 
21782527734SSukumar Swaminathan 
21882527734SSukumar Swaminathan typedef struct CQE_XRI_Abort
21982527734SSukumar Swaminathan {
22082527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN
22182527734SSukumar Swaminathan 	uint16_t	Rsvd1;		/* Word 0 */
22282527734SSukumar Swaminathan 	uint8_t		Status;
22382527734SSukumar Swaminathan 	uint8_t		Rsvd2;
22482527734SSukumar Swaminathan 
22582527734SSukumar Swaminathan 	uint32_t	rjtStatus;	/* Word 1 */
22682527734SSukumar Swaminathan 
22782527734SSukumar Swaminathan 	uint16_t	RemoteXID;	/* Word 2 */
22882527734SSukumar Swaminathan 	uint16_t	XRI;
22982527734SSukumar Swaminathan 
23082527734SSukumar Swaminathan 	uint32_t	Valid: 1;	/* Word 3 */
23182527734SSukumar Swaminathan 	uint32_t	IA: 1;
23282527734SSukumar Swaminathan 	uint32_t	BR: 1;
23382527734SSukumar Swaminathan 	uint32_t	EO: 1;
23482527734SSukumar Swaminathan 	uint32_t	Rsvd3: 4;
23582527734SSukumar Swaminathan 	uint32_t	Code: 8;
23682527734SSukumar Swaminathan 	uint32_t	Rsvd4: 16;
23782527734SSukumar Swaminathan #endif
23882527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN
23982527734SSukumar Swaminathan 	uint8_t		Rsvd2;
24082527734SSukumar Swaminathan 	uint8_t		Status;
24182527734SSukumar Swaminathan 	uint16_t	Rsvd1;		/* Word 0 */
24282527734SSukumar Swaminathan 
24382527734SSukumar Swaminathan 	uint32_t	rjtStatus;	/* Word 1 */
24482527734SSukumar Swaminathan 
24582527734SSukumar Swaminathan 	uint16_t	XRI;
24682527734SSukumar Swaminathan 	uint16_t	RemoteXID;	/* Word 2 */
24782527734SSukumar Swaminathan 
24882527734SSukumar Swaminathan 	uint32_t	Rsvd4: 16;
24982527734SSukumar Swaminathan 	uint32_t	Code: 8;
25082527734SSukumar Swaminathan 	uint32_t	Rsvd3: 4;
25182527734SSukumar Swaminathan 	uint32_t	EO: 1;
25282527734SSukumar Swaminathan 	uint32_t	BR: 1;
25382527734SSukumar Swaminathan 	uint32_t	IA: 1;
25482527734SSukumar Swaminathan 	uint32_t	Valid: 1;	/* Word 3 */
25582527734SSukumar Swaminathan #endif
25682527734SSukumar Swaminathan } CQE_XRI_Abort_t;
25782527734SSukumar Swaminathan 
25882527734SSukumar Swaminathan 
25982527734SSukumar Swaminathan 
26082527734SSukumar Swaminathan #define	CQE_VALID    0x80000000  /* Mask for CQE valid */
26182527734SSukumar Swaminathan 
26282527734SSukumar Swaminathan /* Defines for CQE Codes */
26382527734SSukumar Swaminathan #define	CQE_TYPE_WQ_COMPLETION	1
26482527734SSukumar Swaminathan #define	CQE_TYPE_RELEASE_WQE	2
26582527734SSukumar Swaminathan #define	CQE_TYPE_UNSOL_RCV	4
26682527734SSukumar Swaminathan #define	CQE_TYPE_XRI_ABORTED	5
267*8f23e9faSHans Rosenfeld #define	CQE_TYPE_UNSOL_RCV_V1	9
26882527734SSukumar Swaminathan 
26982527734SSukumar Swaminathan 
27082527734SSukumar Swaminathan typedef struct CQE_ASYNC_FCOE
27182527734SSukumar Swaminathan {
27282527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN
27382527734SSukumar Swaminathan 	uint32_t	ref_index;	/* Word 0 */
27482527734SSukumar Swaminathan 
27582527734SSukumar Swaminathan 	uint16_t	evt_type;	/* Word 1 */
27682527734SSukumar Swaminathan 	uint16_t	fcf_count;
27782527734SSukumar Swaminathan 
27882527734SSukumar Swaminathan 	uint32_t	event_tag;	/* Word 2 */
27982527734SSukumar Swaminathan #endif
28082527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN
28182527734SSukumar Swaminathan 	uint32_t	ref_index;	/* Word 0 */
28282527734SSukumar Swaminathan 
28382527734SSukumar Swaminathan 	uint16_t	fcf_count;
28482527734SSukumar Swaminathan 	uint16_t	evt_type;	/* Word 1 */
28582527734SSukumar Swaminathan 
28682527734SSukumar Swaminathan 	uint32_t	event_tag;	/* Word 2 */
28782527734SSukumar Swaminathan #endif
28882527734SSukumar Swaminathan } CQE_ASYNC_FCOE_t;
28982527734SSukumar Swaminathan 
290a9800bebSGarrett D'Amore typedef struct CQE_ASYNC_LINK_STATE
29182527734SSukumar Swaminathan {
29282527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN
29382527734SSukumar Swaminathan 	uint8_t		port_speed;	/* Word 0 */
29482527734SSukumar Swaminathan 	uint8_t		port_duplex;
29582527734SSukumar Swaminathan 	uint8_t		link_status;
29682527734SSukumar Swaminathan 	uint8_t		phys_port;
29782527734SSukumar Swaminathan 
298b3660a96SSukumar Swaminathan 	uint16_t	qos_link_speed;	/* Word 1 */
299b3660a96SSukumar Swaminathan 	uint8_t		Rsvd1;
300b3660a96SSukumar Swaminathan 	uint8_t		port_fault;
30182527734SSukumar Swaminathan 
30282527734SSukumar Swaminathan 	uint32_t	event_tag;	/* Word 2 */
30382527734SSukumar Swaminathan #endif
30482527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN
30582527734SSukumar Swaminathan 	uint8_t		phys_port;
30682527734SSukumar Swaminathan 	uint8_t		link_status;
30782527734SSukumar Swaminathan 	uint8_t		port_duplex;
30882527734SSukumar Swaminathan 	uint8_t		port_speed;	/* Word 0 */
30982527734SSukumar Swaminathan 
310b3660a96SSukumar Swaminathan 	uint8_t		port_fault;	/* Word 1 */
311b3660a96SSukumar Swaminathan 	uint8_t		Rsvd1;
312b3660a96SSukumar Swaminathan 	uint16_t	qos_link_speed;
31382527734SSukumar Swaminathan 
31482527734SSukumar Swaminathan 	uint32_t	event_tag;	/* Word 2 */
315a9800bebSGarrett D'Amore #endif
316a9800bebSGarrett D'Amore } CQE_ASYNC_LINK_STATE_t;
317a9800bebSGarrett D'Amore 
318a9800bebSGarrett D'Amore typedef struct CQE_ASYNC_GRP_5_QOS
319a9800bebSGarrett D'Amore {
320a9800bebSGarrett D'Amore #ifdef EMLXS_BIG_ENDIAN
321a9800bebSGarrett D'Amore 	uint8_t		Rsvd2;
322a9800bebSGarrett D'Amore 	uint8_t		Rsvd1;
323a9800bebSGarrett D'Amore 	uint8_t		Rsvd0;
324a9800bebSGarrett D'Amore 	uint8_t		phys_port;	/* Word 0 */
325a9800bebSGarrett D'Amore 
326a9800bebSGarrett D'Amore 	uint16_t	qos_link_speed;
327a9800bebSGarrett D'Amore 	uint8_t		Rsvd4;
328a9800bebSGarrett D'Amore 	uint8_t		Rsvd3;		/* Word 1 */
329a9800bebSGarrett D'Amore 
330a9800bebSGarrett D'Amore 	uint32_t	event_tag;	/* Word 2 */
331a9800bebSGarrett D'Amore #endif
332a9800bebSGarrett D'Amore #ifdef EMLXS_LITTLE_ENDIAN
333a9800bebSGarrett D'Amore 	uint8_t		phys_port;
334a9800bebSGarrett D'Amore 	uint8_t		Rsvd0;
335a9800bebSGarrett D'Amore 	uint8_t		Rsvd1;
336a9800bebSGarrett D'Amore 	uint8_t		Rsvd2;		/* Word 0 */
337a9800bebSGarrett D'Amore 
338a9800bebSGarrett D'Amore 	uint8_t		Rsvd3;
339a9800bebSGarrett D'Amore 	uint8_t		Rsvd4;
340a9800bebSGarrett D'Amore 	uint16_t	qos_link_speed;	/* Word 1 */
341a9800bebSGarrett D'Amore 
342a9800bebSGarrett D'Amore 	uint32_t	event_tag;	/* Word 2 */
343a9800bebSGarrett D'Amore #endif
344a9800bebSGarrett D'Amore } CQE_ASYNC_GRP_5_QOS_t;
34582527734SSukumar Swaminathan 
346*8f23e9faSHans Rosenfeld 
347*8f23e9faSHans Rosenfeld typedef struct CQE_ASYNC_FC_LINK_ATT
348*8f23e9faSHans Rosenfeld {
349*8f23e9faSHans Rosenfeld #ifdef EMLXS_BIG_ENDIAN
350*8f23e9faSHans Rosenfeld 	uint8_t		port_speed;	/* Word 0 */
351*8f23e9faSHans Rosenfeld 	uint8_t		topology;
352*8f23e9faSHans Rosenfeld 	uint8_t		att_type;
353*8f23e9faSHans Rosenfeld 	uint8_t		link_number;
354*8f23e9faSHans Rosenfeld 
355*8f23e9faSHans Rosenfeld 	uint16_t	link_speed;	/* Word 1 */
356*8f23e9faSHans Rosenfeld 	uint8_t		shared_link_status;
357*8f23e9faSHans Rosenfeld 	uint8_t		port_fault;
358*8f23e9faSHans Rosenfeld 
359*8f23e9faSHans Rosenfeld 	uint32_t	event_tag;	/* Word 2 */
360*8f23e9faSHans Rosenfeld #endif
361*8f23e9faSHans Rosenfeld #ifdef EMLXS_LITTLE_ENDIAN
362*8f23e9faSHans Rosenfeld 	uint8_t		link_number;
363*8f23e9faSHans Rosenfeld 	uint8_t		att_type;
364*8f23e9faSHans Rosenfeld 	uint8_t		topology;
365*8f23e9faSHans Rosenfeld 	uint8_t		port_speed;	/* Word 0 */
366*8f23e9faSHans Rosenfeld 
367*8f23e9faSHans Rosenfeld 	uint8_t		port_fault;
368*8f23e9faSHans Rosenfeld 	uint8_t		shared_link_status;
369*8f23e9faSHans Rosenfeld 	uint16_t	link_speed;	/* Word 1 */
370*8f23e9faSHans Rosenfeld 
371*8f23e9faSHans Rosenfeld 	uint32_t	event_tag;	/* Word 2 */
372*8f23e9faSHans Rosenfeld #endif
373*8f23e9faSHans Rosenfeld } CQE_ASYNC_FC_LINK_ATT_t;
374*8f23e9faSHans Rosenfeld 
375*8f23e9faSHans Rosenfeld typedef struct CQE_ASYNC_PORT
376*8f23e9faSHans Rosenfeld {
377*8f23e9faSHans Rosenfeld 	uint8_t		link_status[4];
378*8f23e9faSHans Rosenfeld 	uint32_t	data_word2;
379*8f23e9faSHans Rosenfeld 	uint32_t	Rsvd;
380*8f23e9faSHans Rosenfeld } CQE_ASYNC_PORT_t;
381*8f23e9faSHans Rosenfeld 
382*8f23e9faSHans Rosenfeld /* topology */
383*8f23e9faSHans Rosenfeld #define	TOPOLOGY_UNKNOWN	0
384*8f23e9faSHans Rosenfeld #define	TOPOLOGY_NPORT		1
385*8f23e9faSHans Rosenfeld #define	TOPOLOGY_LPORT		2
386*8f23e9faSHans Rosenfeld #define	TOPOLOGY_INTERNAL_LB	3
387*8f23e9faSHans Rosenfeld #define	TOPOLOGY_SERDES_LB	4
388*8f23e9faSHans Rosenfeld 
389*8f23e9faSHans Rosenfeld /* att_type */
390*8f23e9faSHans Rosenfeld #define	ATT_TYPE_LINK_UP	1
391*8f23e9faSHans Rosenfeld #define	ATT_TYPE_LINK_DOWN	2
392*8f23e9faSHans Rosenfeld #define	ATT_TYPE_NO_HARD_ALPA	3
393*8f23e9faSHans Rosenfeld 
394*8f23e9faSHans Rosenfeld /* shared_link_status */
395*8f23e9faSHans Rosenfeld #define	SHARED_STATUS_NONE			0
396*8f23e9faSHans Rosenfeld #define	SHARED_STATUS_LD_UNUSABLE		1
397*8f23e9faSHans Rosenfeld #define	SHARED_STATUS_LD_TRAN_FAULT		2
398*8f23e9faSHans Rosenfeld #define	SHARED_STATUS_LD_NO_SIGNAL		3
399*8f23e9faSHans Rosenfeld #define	SHARED_STATUS_LD_MGMT_DISABLED		4
400*8f23e9faSHans Rosenfeld #define	SHARED_STATUS_LU_FAILED_P2P		5
401*8f23e9faSHans Rosenfeld #define	SHARED_STATUS_LU_FAILED_FLOGI_TMO	6
402*8f23e9faSHans Rosenfeld #define	SHARED_STATUS_LU_FAILED_NO_FPORT	7
403*8f23e9faSHans Rosenfeld #define	SHARED_STATUS_LU_FAILED_NO_NPIV		8
404*8f23e9faSHans Rosenfeld #define	SHARED_STATUS_LU_FAILED_FLOGO		9
405*8f23e9faSHans Rosenfeld #define	SHARED_STATUS_LU_LOOPBACK		20
406*8f23e9faSHans Rosenfeld #define	SHARED_STATUS_LU_NORMAL			40
407*8f23e9faSHans Rosenfeld 
408*8f23e9faSHans Rosenfeld /* port_fault */
409*8f23e9faSHans Rosenfeld #define	PORT_FAULT_NONE		0