182527734SSukumar Swaminathan /* 282527734SSukumar Swaminathan * CDDL HEADER START 382527734SSukumar Swaminathan * 482527734SSukumar Swaminathan * The contents of this file are subject to the terms of the 582527734SSukumar Swaminathan * Common Development and Distribution License (the "License"). 682527734SSukumar Swaminathan * You may not use this file except in compliance with the License. 782527734SSukumar Swaminathan * 882527734SSukumar Swaminathan * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 982527734SSukumar Swaminathan * or http://www.opensolaris.org/os/licensing. 1082527734SSukumar Swaminathan * See the License for the specific language governing permissions 1182527734SSukumar Swaminathan * and limitations under the License. 1282527734SSukumar Swaminathan * 1382527734SSukumar Swaminathan * When distributing Covered Code, include this CDDL HEADER in each 1482527734SSukumar Swaminathan * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 1582527734SSukumar Swaminathan * If applicable, add the following below this CDDL HEADER, with the 1682527734SSukumar Swaminathan * fields enclosed by brackets "[]" replaced with your own identifying 1782527734SSukumar Swaminathan * information: Portions Copyright [yyyy] [name of copyright owner] 1882527734SSukumar Swaminathan * 1982527734SSukumar Swaminathan * CDDL HEADER END 2082527734SSukumar Swaminathan */ 2182527734SSukumar Swaminathan 2282527734SSukumar Swaminathan /* 23*a9800bebSGarrett D'Amore * Copyright 2010 Emulex. All rights reserved. 2482527734SSukumar Swaminathan * Use is subject to license terms. 2582527734SSukumar Swaminathan */ 2682527734SSukumar Swaminathan 2782527734SSukumar Swaminathan #ifndef _EMLXS_QUEUE_H 2882527734SSukumar Swaminathan #define _EMLXS_QUEUE_H 2982527734SSukumar Swaminathan 3082527734SSukumar Swaminathan #ifdef __cplusplus 3182527734SSukumar Swaminathan extern "C" { 3282527734SSukumar Swaminathan #endif 3382527734SSukumar Swaminathan 3482527734SSukumar Swaminathan 3582527734SSukumar Swaminathan /* Queue entry defines */ 3682527734SSukumar Swaminathan 3782527734SSukumar Swaminathan /* EQ entries */ 3882527734SSukumar Swaminathan typedef struct EQE 3982527734SSukumar Swaminathan { 4082527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 4182527734SSukumar Swaminathan uint32_t CQId: 16; 4282527734SSukumar Swaminathan uint32_t MinorCode: 12; 4382527734SSukumar Swaminathan uint32_t MajorCode: 3; 4482527734SSukumar Swaminathan uint32_t Valid: 1; 4582527734SSukumar Swaminathan #endif 4682527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 4782527734SSukumar Swaminathan uint32_t Valid: 1; 4882527734SSukumar Swaminathan uint32_t MajorCode: 3; 4982527734SSukumar Swaminathan uint32_t MinorCode: 12; 5082527734SSukumar Swaminathan uint32_t CQId: 16; 5182527734SSukumar Swaminathan #endif 5282527734SSukumar Swaminathan 5382527734SSukumar Swaminathan } EQE_t; 5482527734SSukumar Swaminathan 5582527734SSukumar Swaminathan typedef union 5682527734SSukumar Swaminathan { 5782527734SSukumar Swaminathan uint32_t word; 5882527734SSukumar Swaminathan EQE_t entry; 5982527734SSukumar Swaminathan 6082527734SSukumar Swaminathan } EQE_u; 6182527734SSukumar Swaminathan 6282527734SSukumar Swaminathan #define EQE_VALID 0x00000001 /* Mask for EQE valid */ 6382527734SSukumar Swaminathan #define EQE_CQID 0xFFFF0000 /* Mask for EQE CQID */ 6482527734SSukumar Swaminathan 6582527734SSukumar Swaminathan /* CQ entries */ 6682527734SSukumar Swaminathan typedef struct CQE_CmplWQ 6782527734SSukumar Swaminathan { 6882527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 6982527734SSukumar Swaminathan uint16_t RequestTag; /* Word 0 */ 7082527734SSukumar Swaminathan uint8_t Status; 7182527734SSukumar Swaminathan uint8_t hw_status; 7282527734SSukumar Swaminathan 7382527734SSukumar Swaminathan uint32_t CmdSpecific; /* Word 1 */ 7482527734SSukumar Swaminathan uint32_t Parameter; /* Word 2 */ 7582527734SSukumar Swaminathan 7682527734SSukumar Swaminathan uint32_t Valid: 1; /* Word 3 */ 7782527734SSukumar Swaminathan uint32_t Rsvd1: 2; 7882527734SSukumar Swaminathan uint32_t XB: 1; 7982527734SSukumar Swaminathan uint32_t PV: 1; 8082527734SSukumar Swaminathan uint32_t Priority: 3; 8182527734SSukumar Swaminathan uint32_t Code: 8; 8282527734SSukumar Swaminathan uint32_t Rsvd2: 16; 8382527734SSukumar Swaminathan #endif 8482527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 8582527734SSukumar Swaminathan uint8_t hw_status; 8682527734SSukumar Swaminathan uint8_t Status; 8782527734SSukumar Swaminathan uint16_t RequestTag; /* Word 0 */ 8882527734SSukumar Swaminathan 8982527734SSukumar Swaminathan uint32_t CmdSpecific; /* Word 1 */ 9082527734SSukumar Swaminathan uint32_t Parameter; /* Word 2 */ 9182527734SSukumar Swaminathan 9282527734SSukumar Swaminathan uint32_t Rsvd2: 16; 9382527734SSukumar Swaminathan uint32_t Code: 8; 9482527734SSukumar Swaminathan uint32_t Priority: 3; 9582527734SSukumar Swaminathan uint32_t PV: 1; 9682527734SSukumar Swaminathan uint32_t XB: 1; 9782527734SSukumar Swaminathan uint32_t Rsvd1: 2; 9882527734SSukumar Swaminathan uint32_t Valid: 1; /* Word 3 */ 9982527734SSukumar Swaminathan #endif 10082527734SSukumar Swaminathan } CQE_CmplWQ_t; 10182527734SSukumar Swaminathan 10282527734SSukumar Swaminathan typedef struct CQE_RelWQ 10382527734SSukumar Swaminathan { 10482527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 10582527734SSukumar Swaminathan uint32_t Reserved1; /* Word 0 */ 10682527734SSukumar Swaminathan uint32_t Reserved2; /* Word 1 */ 10782527734SSukumar Swaminathan 10882527734SSukumar Swaminathan uint16_t WQid; /* Word 2 */ 10982527734SSukumar Swaminathan uint16_t WQindex; 11082527734SSukumar Swaminathan 11182527734SSukumar Swaminathan uint32_t Valid: 1; /* Word 3 */ 11282527734SSukumar Swaminathan uint32_t Rsvd1: 7; 11382527734SSukumar Swaminathan uint32_t Code: 8; 11482527734SSukumar Swaminathan uint32_t Rsvd2: 16; 11582527734SSukumar Swaminathan #endif 11682527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 11782527734SSukumar Swaminathan uint32_t Reserved1; /* Word 0 */ 11882527734SSukumar Swaminathan uint32_t Reserved2; /* Word 1 */ 11982527734SSukumar Swaminathan 12082527734SSukumar Swaminathan uint16_t WQindex; 12182527734SSukumar Swaminathan uint16_t WQid; /* Word 2 */ 12282527734SSukumar Swaminathan 12382527734SSukumar Swaminathan uint32_t Rsvd2: 16; 12482527734SSukumar Swaminathan uint32_t Code: 8; 12582527734SSukumar Swaminathan uint32_t Rsvd1: 7; 12682527734SSukumar Swaminathan uint32_t Valid: 1; /* Word 3 */ 12782527734SSukumar Swaminathan #endif 12882527734SSukumar Swaminathan } CQE_RelWQ_t; 12982527734SSukumar Swaminathan 13082527734SSukumar Swaminathan typedef struct CQE_UnsolRcv 13182527734SSukumar Swaminathan { 13282527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 13382527734SSukumar Swaminathan uint16_t RQindex; /* Word 0 */ 13482527734SSukumar Swaminathan uint8_t Status; 13582527734SSukumar Swaminathan uint8_t Rsvd1; 13682527734SSukumar Swaminathan 13782527734SSukumar Swaminathan uint32_t Rsvd2; /* Word 1 */ 13882527734SSukumar Swaminathan 13982527734SSukumar Swaminathan uint32_t data_size: 16; /* Word 2 */ 14082527734SSukumar Swaminathan uint32_t RQid: 10; 14182527734SSukumar Swaminathan uint32_t FCFId: 6; 14282527734SSukumar Swaminathan 14382527734SSukumar Swaminathan uint32_t Valid: 1; /* Word 3 */ 14482527734SSukumar Swaminathan uint32_t port: 1; 14582527734SSukumar Swaminathan uint32_t hdr_size: 6; 14682527734SSukumar Swaminathan uint32_t Code: 8; 14782527734SSukumar Swaminathan uint32_t eof: 8; 14882527734SSukumar Swaminathan uint32_t sof: 8; 14982527734SSukumar Swaminathan #endif 15082527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 15182527734SSukumar Swaminathan uint8_t Rsvd1; 15282527734SSukumar Swaminathan uint8_t Status; 15382527734SSukumar Swaminathan uint16_t RQindex; /* Word 0 */ 15482527734SSukumar Swaminathan 15582527734SSukumar Swaminathan uint32_t Rsvd2; /* Word 1 */ 15682527734SSukumar Swaminathan 15782527734SSukumar Swaminathan uint32_t FCFId: 6; 15882527734SSukumar Swaminathan uint32_t RQid: 10; 15982527734SSukumar Swaminathan uint32_t data_size: 16; /* Word 2 */ 16082527734SSukumar Swaminathan 16182527734SSukumar Swaminathan uint32_t sof: 8; 16282527734SSukumar Swaminathan uint32_t eof: 8; 16382527734SSukumar Swaminathan uint32_t Code: 8; 16482527734SSukumar Swaminathan uint32_t hdr_size: 6; 16582527734SSukumar Swaminathan uint32_t port: 1; 16682527734SSukumar Swaminathan uint32_t Valid: 1; /* Word 3 */ 16782527734SSukumar Swaminathan #endif 16882527734SSukumar Swaminathan } CQE_UnsolRcv_t; 16982527734SSukumar Swaminathan 17082527734SSukumar Swaminathan /* Status defines */ 17182527734SSukumar Swaminathan #define RQ_STATUS_SUCCESS 0x10 17282527734SSukumar Swaminathan #define RQ_STATUS_BUFLEN_EXCEEDED 0x11 17382527734SSukumar Swaminathan #define RQ_STATUS_NEED_BUFFER 0x12 17482527734SSukumar Swaminathan #define RQ_STATUS_FRAME_DISCARDED 0x13 17582527734SSukumar Swaminathan 17682527734SSukumar Swaminathan 17782527734SSukumar Swaminathan typedef struct CQE_XRI_Abort 17882527734SSukumar Swaminathan { 17982527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 18082527734SSukumar Swaminathan uint16_t Rsvd1; /* Word 0 */ 18182527734SSukumar Swaminathan uint8_t Status; 18282527734SSukumar Swaminathan uint8_t Rsvd2; 18382527734SSukumar Swaminathan 18482527734SSukumar Swaminathan uint32_t rjtStatus; /* Word 1 */ 18582527734SSukumar Swaminathan 18682527734SSukumar Swaminathan uint16_t RemoteXID; /* Word 2 */ 18782527734SSukumar Swaminathan uint16_t XRI; 18882527734SSukumar Swaminathan 18982527734SSukumar Swaminathan uint32_t Valid: 1; /* Word 3 */ 19082527734SSukumar Swaminathan uint32_t IA: 1; 19182527734SSukumar Swaminathan uint32_t BR: 1; 19282527734SSukumar Swaminathan uint32_t EO: 1; 19382527734SSukumar Swaminathan uint32_t Rsvd3: 4; 19482527734SSukumar Swaminathan uint32_t Code: 8; 19582527734SSukumar Swaminathan uint32_t Rsvd4: 16; 19682527734SSukumar Swaminathan #endif 19782527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 19882527734SSukumar Swaminathan uint8_t Rsvd2; 19982527734SSukumar Swaminathan uint8_t Status; 20082527734SSukumar Swaminathan uint16_t Rsvd1; /* Word 0 */ 20182527734SSukumar Swaminathan 20282527734SSukumar Swaminathan uint32_t rjtStatus; /* Word 1 */ 20382527734SSukumar Swaminathan 20482527734SSukumar Swaminathan uint16_t XRI; 20582527734SSukumar Swaminathan uint16_t RemoteXID; /* Word 2 */ 20682527734SSukumar Swaminathan 20782527734SSukumar Swaminathan uint32_t Rsvd4: 16; 20882527734SSukumar Swaminathan uint32_t Code: 8; 20982527734SSukumar Swaminathan uint32_t Rsvd3: 4; 21082527734SSukumar Swaminathan uint32_t EO: 1; 21182527734SSukumar Swaminathan uint32_t BR: 1; 21282527734SSukumar Swaminathan uint32_t IA: 1; 21382527734SSukumar Swaminathan uint32_t Valid: 1; /* Word 3 */ 21482527734SSukumar Swaminathan #endif 21582527734SSukumar Swaminathan } CQE_XRI_Abort_t; 21682527734SSukumar Swaminathan 21782527734SSukumar Swaminathan 21882527734SSukumar Swaminathan 21982527734SSukumar Swaminathan #define CQE_VALID 0x80000000 /* Mask for CQE valid */ 22082527734SSukumar Swaminathan 22182527734SSukumar Swaminathan /* Defines for CQE Codes */ 22282527734SSukumar Swaminathan #define CQE_TYPE_WQ_COMPLETION 1 22382527734SSukumar Swaminathan #define CQE_TYPE_RELEASE_WQE 2 22482527734SSukumar Swaminathan #define CQE_TYPE_UNSOL_RCV 4 22582527734SSukumar Swaminathan #define CQE_TYPE_XRI_ABORTED 5 22682527734SSukumar Swaminathan 22782527734SSukumar Swaminathan 22882527734SSukumar Swaminathan typedef struct CQE_ASYNC_FCOE 22982527734SSukumar Swaminathan { 23082527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 23182527734SSukumar Swaminathan uint32_t ref_index; /* Word 0 */ 23282527734SSukumar Swaminathan 23382527734SSukumar Swaminathan uint16_t evt_type; /* Word 1 */ 23482527734SSukumar Swaminathan uint16_t fcf_count; 23582527734SSukumar Swaminathan 23682527734SSukumar Swaminathan uint32_t event_tag; /* Word 2 */ 23782527734SSukumar Swaminathan #endif 23882527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 23982527734SSukumar Swaminathan uint32_t ref_index; /* Word 0 */ 24082527734SSukumar Swaminathan 24182527734SSukumar Swaminathan uint16_t fcf_count; 24282527734SSukumar Swaminathan uint16_t evt_type; /* Word 1 */ 24382527734SSukumar Swaminathan 24482527734SSukumar Swaminathan uint32_t event_tag; /* Word 2 */ 24582527734SSukumar Swaminathan #endif 24682527734SSukumar Swaminathan } CQE_ASYNC_FCOE_t; 24782527734SSukumar Swaminathan 248*a9800bebSGarrett D'Amore typedef struct CQE_ASYNC_LINK_STATE 24982527734SSukumar Swaminathan { 25082527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 25182527734SSukumar Swaminathan uint8_t port_speed; /* Word 0 */ 25282527734SSukumar Swaminathan uint8_t port_duplex; 25382527734SSukumar Swaminathan uint8_t link_status; 25482527734SSukumar Swaminathan uint8_t phys_port; 25582527734SSukumar Swaminathan 256b3660a96SSukumar Swaminathan uint16_t qos_link_speed; /* Word 1 */ 257b3660a96SSukumar Swaminathan uint8_t Rsvd1; 258b3660a96SSukumar Swaminathan uint8_t port_fault; 25982527734SSukumar Swaminathan 26082527734SSukumar Swaminathan uint32_t event_tag; /* Word 2 */ 26182527734SSukumar Swaminathan #endif 26282527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 26382527734SSukumar Swaminathan uint8_t phys_port; 26482527734SSukumar Swaminathan uint8_t link_status; 26582527734SSukumar Swaminathan uint8_t port_duplex; 26682527734SSukumar Swaminathan uint8_t port_speed; /* Word 0 */ 26782527734SSukumar Swaminathan 268b3660a96SSukumar Swaminathan uint8_t port_fault; /* Word 1 */ 269b3660a96SSukumar Swaminathan uint8_t Rsvd1; 270b3660a96SSukumar Swaminathan uint16_t qos_link_speed; 27182527734SSukumar Swaminathan 27282527734SSukumar Swaminathan uint32_t event_tag; /* Word 2 */ 273*a9800bebSGarrett D'Amore #endif 274*a9800bebSGarrett D'Amore } CQE_ASYNC_LINK_STATE_t; 275*a9800bebSGarrett D'Amore 276*a9800bebSGarrett D'Amore typedef struct CQE_ASYNC_GRP_5_QOS 277*a9800bebSGarrett D'Amore { 278*a9800bebSGarrett D'Amore #ifdef EMLXS_BIG_ENDIAN 279*a9800bebSGarrett D'Amore uint8_t Rsvd2; 280*a9800bebSGarrett D'Amore uint8_t Rsvd1; 281*a9800bebSGarrett D'Amore uint8_t Rsvd0; 282*a9800bebSGarrett D'Amore uint8_t phys_port; /* Word 0 */ 283*a9800bebSGarrett D'Amore 284*a9800bebSGarrett D'Amore uint16_t qos_link_speed; 285*a9800bebSGarrett D'Amore uint8_t Rsvd4; 286*a9800bebSGarrett D'Amore uint8_t Rsvd3; /* Word 1 */ 287*a9800bebSGarrett D'Amore 288*a9800bebSGarrett D'Amore uint32_t event_tag; /* Word 2 */ 289*a9800bebSGarrett D'Amore #endif 290*a9800bebSGarrett D'Amore #ifdef EMLXS_LITTLE_ENDIAN 291*a9800bebSGarrett D'Amore uint8_t phys_port; 292*a9800bebSGarrett D'Amore uint8_t Rsvd0; 293*a9800bebSGarrett D'Amore uint8_t Rsvd1; 294*a9800bebSGarrett D'Amore uint8_t Rsvd2; /* Word 0 */ 295*a9800bebSGarrett D'Amore 296*a9800bebSGarrett D'Amore uint8_t Rsvd3; 297*a9800bebSGarrett D'Amore uint8_t Rsvd4; 298*a9800bebSGarrett D'Amore uint16_t qos_link_speed; /* Word 1 */ 299*a9800bebSGarrett D'Amore 300*a9800bebSGarrett D'Amore uint32_t event_tag; /* Word 2 */ 301*a9800bebSGarrett D'Amore #endif 302*a9800bebSGarrett D'Amore } CQE_ASYNC_GRP_5_QOS_t; 30382527734SSukumar Swaminathan 304*a9800bebSGarrett D'Amore typedef struct CQE_ASYNC 305*a9800bebSGarrett D'Amore { 306*a9800bebSGarrett D'Amore /* Words 0-2 */ 307*a9800bebSGarrett D'Amore union 308*a9800bebSGarrett D'Amore { 309*a9800bebSGarrett D'Amore CQE_ASYNC_LINK_STATE_t link; 310*a9800bebSGarrett D'Amore CQE_ASYNC_FCOE_t fcoe; 311*a9800bebSGarrett D'Amore CQE_ASYNC_GRP_5_QOS_t qos; 312*a9800bebSGarrett D'Amore } un; 313*a9800bebSGarrett D'Amore 314*a9800bebSGarrett D'Amore #ifdef EMLXS_BIG_ENDIAN 315*a9800bebSGarrett D'Amore uint32_t valid: 1; 316*a9800bebSGarrett D'Amore uint32_t async_evt: 1; 317*a9800bebSGarrett D'Amore uint32_t Rsvd2: 6; 318*a9800bebSGarrett D'Amore uint32_t event_type: 8; 319*a9800bebSGarrett D'Amore uint32_t event_code: 8; 320*a9800bebSGarrett D'Amore uint32_t Rsvd3: 8; /* Word 3 */ 321*a9800bebSGarrett D'Amore #endif 322*a9800bebSGarrett D'Amore #ifdef EMLXS_LITTLE_ENDIAN 32382527734SSukumar Swaminathan uint32_t Rsvd3: 8; 32482527734SSukumar Swaminathan uint32_t event_code: 8; 32582527734SSukumar Swaminathan uint32_t event_type: 8; 32682527734SSukumar Swaminathan uint32_t Rsvd2: 6; 32782527734SSukumar Swaminathan uint32_t async_evt: 1; 32882527734SSukumar Swaminathan uint32_t valid: 1; /* Word 3 */ 32982527734SSukumar Swaminathan #endif 33082527734SSukumar Swaminathan } CQE_ASYNC_t; 33182527734SSukumar Swaminathan 33282527734SSukumar Swaminathan /* port_speed defines */ 33382527734SSukumar Swaminathan #define PHY_1GHZ_LINK 3 33482527734SSukumar Swaminathan #define PHY_10GHZ_LINK 4 33582527734SSukumar Swaminathan 33682527734SSukumar Swaminathan /* event_code defines */ 33782527734SSukumar Swaminathan #define ASYNC_EVENT_CODE_LINK_STATE 1 33882527734SSukumar Swaminathan #define ASYNC_EVENT_CODE_FCOE_FIP 2 33982527734SSukumar Swaminathan #define ASYNC_EVENT_CODE_DCBX 3 340*a9800bebSGarrett D'Amore #define ASYNC_EVENT_CODE_GRP_5 5 34182527734SSukumar Swaminathan 34282527734SSukumar Swaminathan /* LINK_STATE - link_status defines */ 34382527734SSukumar Swaminathan #define ASYNC_EVENT_PHYS_LINK_DOWN 0 34482527734SSukumar Swaminathan #define ASYNC_EVENT_PHYS_LINK_UP 1 34582527734SSukumar Swaminathan #define ASYNC_EVENT_LOGICAL_LINK_DOWN 2 34682527734SSukumar Swaminathan #define ASYNC_EVENT_LOGICAL_LINK_UP 3 34782527734SSukumar Swaminathan 34882527734SSukumar Swaminathan /* FCOE_FIP - evt_type defines */ 34982527734SSukumar Swaminathan #define ASYNC_EVENT_NEW_FCF_DISC 1 35082527734SSukumar Swaminathan #define ASYNC_EVENT_FCF_TABLE_FULL 2 35182527734SSukumar Swaminathan #define ASYNC_EVENT_FCF_DEAD 3 35282527734SSukumar Swaminathan #define ASYNC_EVENT_VIRT_LINK_CLEAR 4 353*a9800bebSGarrett D'Amore #define ASYNC_EVENT_FCF_MODIFIED 5 354*a9800bebSGarrett D'Amore 355*a9800bebSGarrett D'Amore /* GRP_5 - evt_type defines */ 356*a9800bebSGarrett D'Amore #define ASYNC_EVENT_QOS_SPEED 1 35782527734SSukumar Swaminathan 35882527734SSukumar Swaminathan typedef struct CQE_MBOX 35982527734SSukumar Swaminathan { 36082527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 36182527734SSukumar Swaminathan uint16_t extend_status; /* Word 0 */ 36282527734SSukumar Swaminathan uint16_t cmpl_status; 36382527734SSukumar Swaminathan 36482527734SSukumar Swaminathan uint32_t tag_low; /* Word 1 */ 36582527734SSukumar Swaminathan uint32_t tag_high; /* Word 2 */ 36682527734SSukumar Swaminathan 36782527734SSukumar Swaminathan uint32_t valid: 1; /* Word 3 */ 36882527734SSukumar Swaminathan uint32_t async_evt: 1; 36982527734SSukumar Swaminathan uint32_t hpi: 1; 37082527734SSukumar Swaminathan uint32_t completed: 1; 37182527734SSukumar Swaminathan uint32_t consumed: 1; 37282527734SSukumar Swaminathan uint32_t Rsvd1: 27; 37382527734SSukumar Swaminathan #endif 37482527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 37582527734SSukumar Swaminathan uint16_t cmpl_status; 37682527734SSukumar Swaminathan uint16_t extend_status; /* Word 0 */ 37782527734SSukumar Swaminathan 37882527734SSukumar Swaminathan uint32_t tag_low; /* Word 1 */ 37982527734SSukumar Swaminathan uint32_t tag_high; /* Word 2 */ 38082527734SSukumar Swaminathan 38182527734SSukumar Swaminathan uint32_t Rsvd1: 27; 38282527734SSukumar Swaminathan uint32_t consumed: 1; 38382527734SSukumar Swaminathan uint32_t completed: 1; 38482527734SSukumar Swaminathan uint32_t hpi: 1; 38582527734SSukumar Swaminathan uint32_t async_evt: 1; 38682527734SSukumar Swaminathan uint32_t valid: 1; /* Word 3 */ 38782527734SSukumar Swaminathan #endif 38882527734SSukumar Swaminathan } CQE_MBOX_t; 38982527734SSukumar Swaminathan 39082527734SSukumar Swaminathan typedef union 39182527734SSukumar Swaminathan { 39282527734SSukumar Swaminathan uint32_t word[4]; 39382527734SSukumar Swaminathan 39482527734SSukumar Swaminathan /* Group 1 types */ 39582527734SSukumar Swaminathan CQE_ASYNC_t cqAsyncEntry; 39682527734SSukumar Swaminathan CQE_ASYNC_FCOE_t cqAsyncFCOEEntry; 39782527734SSukumar Swaminathan CQE_MBOX_t cqMboxEntry; 39882527734SSukumar Swaminathan 39982527734SSukumar Swaminathan /* Group 2 types */ 40082527734SSukumar Swaminathan CQE_CmplWQ_t cqCmplEntry; 40182527734SSukumar Swaminathan CQE_RelWQ_t cqRelEntry; 40282527734SSukumar Swaminathan CQE_UnsolRcv_t cqUnsolRcvEntry; 40382527734SSukumar Swaminathan CQE_XRI_Abort_t cqXRIEntry; 40482527734SSukumar Swaminathan } CQE_u; 40582527734SSukumar Swaminathan 40682527734SSukumar Swaminathan /* RQ entries */ 40782527734SSukumar Swaminathan typedef struct RQE 40882527734SSukumar Swaminathan { 40982527734SSukumar Swaminathan uint32_t AddrHi; 41082527734SSukumar Swaminathan uint32_t AddrLo; 41182527734SSukumar Swaminathan 41282527734SSukumar Swaminathan } RQE_t; 41382527734SSukumar Swaminathan 41482527734SSukumar Swaminathan 41582527734SSukumar Swaminathan /* Definitions for WQEs */ 41682527734SSukumar Swaminathan typedef struct 41782527734SSukumar Swaminathan { 41882527734SSukumar Swaminathan ULP_BDE64 Payload; 41982527734SSukumar Swaminathan uint32_t PayloadLength; 42082527734SSukumar Swaminathan 42182527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 42282527734SSukumar Swaminathan uint32_t Rsvd1: 6; 42382527734SSukumar Swaminathan uint32_t VF: 1; 42482527734SSukumar Swaminathan uint32_t SP: 1; 42582527734SSukumar Swaminathan uint32_t LocalId: 24; 42682527734SSukumar Swaminathan 42782527734SSukumar Swaminathan uint32_t Rsvd2: 8; 42882527734SSukumar Swaminathan uint32_t RemoteId: 24; 42982527734SSukumar Swaminathan #endif 43082527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 43182527734SSukumar Swaminathan uint32_t LocalId: 24; 43282527734SSukumar Swaminathan uint32_t SP: 1; 43382527734SSukumar Swaminathan uint32_t VF: 1; 43482527734SSukumar Swaminathan uint32_t Rsvd1: 6; 43582527734SSukumar Swaminathan 43682527734SSukumar Swaminathan uint32_t RemoteId: 24; 43782527734SSukumar Swaminathan uint32_t Rsvd2: 8; 43882527734SSukumar Swaminathan #endif 43982527734SSukumar Swaminathan 44082527734SSukumar Swaminathan } ELS_REQ_WQE; 44182527734SSukumar Swaminathan 44282527734SSukumar Swaminathan typedef struct 44382527734SSukumar Swaminathan { 44482527734SSukumar Swaminathan ULP_BDE64 Payload; 44582527734SSukumar Swaminathan uint32_t Rsvd1[2]; 44682527734SSukumar Swaminathan 44782527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 44882527734SSukumar Swaminathan uint32_t Rsvd2: 8; 44982527734SSukumar Swaminathan uint32_t RemoteId: 24; 45082527734SSukumar Swaminathan #endif 45182527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 45282527734SSukumar Swaminathan uint32_t RemoteId: 24; 45382527734SSukumar Swaminathan uint32_t Rsvd2: 8; 45482527734SSukumar Swaminathan #endif 45582527734SSukumar Swaminathan 45682527734SSukumar Swaminathan } ELS_RSP_WQE; 45782527734SSukumar Swaminathan 45882527734SSukumar Swaminathan typedef struct 45982527734SSukumar Swaminathan { 46082527734SSukumar Swaminathan ULP_BDE64 Payload; 46182527734SSukumar Swaminathan uint32_t PayloadLength; 46282527734SSukumar Swaminathan 46382527734SSukumar Swaminathan uint32_t Parameter; 46482527734SSukumar Swaminathan 46582527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 46682527734SSukumar Swaminathan uint32_t Rctl: 8; 46782527734SSukumar Swaminathan uint32_t Type: 8; 46882527734SSukumar Swaminathan uint32_t DFctl: 8; 46982527734SSukumar Swaminathan uint32_t Rsvd1: 4; 47082527734SSukumar Swaminathan uint32_t la: 1; 47182527734SSukumar Swaminathan uint32_t Rsvd2: 3; 47282527734SSukumar Swaminathan #endif 47382527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 47482527734SSukumar Swaminathan uint32_t Rsvd2: 3; 47582527734SSukumar Swaminathan uint32_t la: 1; 47682527734SSukumar Swaminathan uint32_t Rsvd1: 4; 47782527734SSukumar Swaminathan uint32_t DFctl: 8; 47882527734SSukumar Swaminathan uint32_t Type: 8; 47982527734SSukumar Swaminathan uint32_t Rctl: 8; 48082527734SSukumar Swaminathan #endif 48182527734SSukumar Swaminathan 48282527734SSukumar Swaminathan } GEN_REQ_WQE; 48382527734SSukumar Swaminathan 48482527734SSukumar Swaminathan typedef struct 48582527734SSukumar Swaminathan { 48682527734SSukumar Swaminathan ULP_BDE64 Payload; 48782527734SSukumar Swaminathan uint32_t PayloadLength; 48882527734SSukumar Swaminathan 48982527734SSukumar Swaminathan uint32_t Parameter; 49082527734SSukumar Swaminathan 49182527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 49282527734SSukumar Swaminathan uint32_t Rctl: 8; 49382527734SSukumar Swaminathan uint32_t Type: 8; 49482527734SSukumar Swaminathan uint32_t DFctl: 8; 49582527734SSukumar Swaminathan uint32_t ls: 1; 49682527734SSukumar Swaminathan uint32_t Rsvd1: 3; 49782527734SSukumar Swaminathan uint32_t la: 1; 49882527734SSukumar Swaminathan uint32_t si: 1; 49982527734SSukumar Swaminathan uint32_t Rsvd2: 2; 50082527734SSukumar Swaminathan #endif 50182527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 50282527734SSukumar Swaminathan uint32_t Rsvd2: 2; 50382527734SSukumar Swaminathan uint32_t si: 1; 50482527734SSukumar Swaminathan uint32_t la: 1; 50582527734SSukumar Swaminathan uint32_t Rsvd1: 3; 50682527734SSukumar Swaminathan uint32_t ls: 1; 50782527734SSukumar Swaminathan uint32_t DFctl: 8; 50882527734SSukumar Swaminathan uint32_t Type: 8; 50982527734SSukumar Swaminathan uint32_t Rctl: 8; 51082527734SSukumar Swaminathan #endif 51182527734SSukumar Swaminathan 51282527734SSukumar Swaminathan } XMIT_SEQ_WQE; 51382527734SSukumar Swaminathan 51482527734SSukumar Swaminathan typedef struct 51582527734SSukumar Swaminathan { 51682527734SSukumar Swaminathan ULP_BDE64 Payload; 51782527734SSukumar Swaminathan uint32_t PayloadLength; 51882527734SSukumar Swaminathan 51982527734SSukumar Swaminathan uint32_t TotalTransferCount; 52082527734SSukumar Swaminathan uint32_t Rsvd1; 52182527734SSukumar Swaminathan 52282527734SSukumar Swaminathan } FCP_WQE; 52382527734SSukumar Swaminathan 52482527734SSukumar Swaminathan 52582527734SSukumar Swaminathan typedef struct 52682527734SSukumar Swaminathan { 52782527734SSukumar Swaminathan uint32_t Rsvd1[3]; 52882527734SSukumar Swaminathan 52982527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 53082527734SSukumar Swaminathan uint32_t Rsvd2: 16; 53182527734SSukumar Swaminathan uint32_t Criteria: 8; 53282527734SSukumar Swaminathan uint32_t Rsvd3: 7; 53382527734SSukumar Swaminathan uint32_t IA: 1; 53482527734SSukumar Swaminathan #endif 53582527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 53682527734SSukumar Swaminathan uint32_t IA: 1; 53782527734SSukumar Swaminathan uint32_t Rsvd3: 7; 53882527734SSukumar Swaminathan uint32_t Criteria: 8; 53982527734SSukumar Swaminathan uint32_t Rsvd2: 16; 54082527734SSukumar Swaminathan #endif 54182527734SSukumar Swaminathan 54282527734SSukumar Swaminathan uint32_t Rsvd4[2]; 54382527734SSukumar Swaminathan 54482527734SSukumar Swaminathan } ABORT_WQE; 54582527734SSukumar Swaminathan 54682527734SSukumar Swaminathan #define ABORT_XRI_TAG 1 /* Abort tag is a XRITag */ 54782527734SSukumar Swaminathan #define ABORT_ABT_TAG 2 /* Abort tag is a AbortTag */ 54882527734SSukumar Swaminathan #define ABORT_REQ_TAG 3 /* Abort tag is a RequestTag */ 54982527734SSukumar Swaminathan 55082527734SSukumar Swaminathan typedef struct 55182527734SSukumar Swaminathan { 55282527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 55382527734SSukumar Swaminathan uint8_t Payload0; 55482527734SSukumar Swaminathan uint8_t Payload1; 55582527734SSukumar Swaminathan uint8_t Payload2; 55682527734SSukumar Swaminathan uint8_t Payload3; 55782527734SSukumar Swaminathan 55882527734SSukumar Swaminathan uint32_t OXId: 16; 55982527734SSukumar Swaminathan uint32_t RXId: 16; 56082527734SSukumar Swaminathan 56182527734SSukumar Swaminathan uint32_t SeqCntLow: 16; 56282527734SSukumar Swaminathan uint32_t SeqCntHigh: 16; 56382527734SSukumar Swaminathan #endif 56482527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 56582527734SSukumar Swaminathan uint8_t Payload3; 56682527734SSukumar Swaminathan uint8_t Payload2; 56782527734SSukumar Swaminathan uint8_t Payload1; 56882527734SSukumar Swaminathan uint8_t Payload0; 56982527734SSukumar Swaminathan 57082527734SSukumar Swaminathan uint32_t RXId: 16; 57182527734SSukumar Swaminathan uint32_t OXId: 16; 57282527734SSukumar Swaminathan 57382527734SSukumar Swaminathan uint32_t SeqCntHigh: 16; 57482527734SSukumar Swaminathan uint32_t SeqCntLow: 16; 57582527734SSukumar Swaminathan #endif 57682527734SSukumar Swaminathan uint32_t Rsvd1[2]; 57782527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 57882527734SSukumar Swaminathan uint32_t XO: 1; 57982527734SSukumar Swaminathan uint32_t AR: 1; 58082527734SSukumar Swaminathan uint32_t PT: 1; 58182527734SSukumar Swaminathan uint32_t Rsvd2: 5; 58282527734SSukumar Swaminathan uint32_t RemoteId: 24; 58382527734SSukumar Swaminathan #endif 58482527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 58582527734SSukumar Swaminathan uint32_t RemoteId: 24; 58682527734SSukumar Swaminathan uint32_t Rsvd2: 5; 58782527734SSukumar Swaminathan uint32_t PT: 1; 58882527734SSukumar Swaminathan uint32_t AR: 1; 58982527734SSukumar Swaminathan uint32_t XO: 1; 59082527734SSukumar Swaminathan #endif 59182527734SSukumar Swaminathan 59282527734SSukumar Swaminathan } BLS_WQE; 59382527734SSukumar Swaminathan 59482527734SSukumar Swaminathan 59582527734SSukumar Swaminathan typedef struct 59682527734SSukumar Swaminathan { 59782527734SSukumar Swaminathan uint32_t Rsvd1[5]; 59882527734SSukumar Swaminathan 59982527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 60082527734SSukumar Swaminathan uint32_t XO: 1; 60182527734SSukumar Swaminathan uint32_t Rsvd2: 7; 60282527734SSukumar Swaminathan uint32_t RemoteId: 24; 60382527734SSukumar Swaminathan #endif 60482527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 60582527734SSukumar Swaminathan uint32_t RemoteId: 24; 60682527734SSukumar Swaminathan uint32_t Rsvd2: 7; 60782527734SSukumar Swaminathan uint32_t XO: 1; 60882527734SSukumar Swaminathan #endif 60982527734SSukumar Swaminathan 61082527734SSukumar Swaminathan } CREATE_XRI_WQE; 61182527734SSukumar Swaminathan 61282527734SSukumar Swaminathan typedef struct emlxs_wqe 61382527734SSukumar Swaminathan { 61482527734SSukumar Swaminathan /* Words 0-5 */ 61582527734SSukumar Swaminathan union 61682527734SSukumar Swaminathan { 61782527734SSukumar Swaminathan uint32_t word[6]; /* Words 0-5: cmd specific */ 61882527734SSukumar Swaminathan ELS_REQ_WQE ElsCmd; /* ELS command overlay */ 61982527734SSukumar Swaminathan GEN_REQ_WQE GenReq; /* CT command overlay */ 62082527734SSukumar Swaminathan FCP_WQE FcpCmd; /* FCP command overlay */ 62182527734SSukumar Swaminathan ELS_RSP_WQE ElsRsp; /* ELS response overlay */ 62282527734SSukumar Swaminathan ABORT_WQE Abort; /* Abort overlay */ 62382527734SSukumar Swaminathan BLS_WQE BlsRsp; /* BLS overlay */ 62482527734SSukumar Swaminathan CREATE_XRI_WQE CreateXri; /* Create XRI */ 62582527734SSukumar Swaminathan XMIT_SEQ_WQE XmitSeq; /* Xmit Sequence */ 62682527734SSukumar Swaminathan } un; 62782527734SSukumar Swaminathan 62882527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 62982527734SSukumar Swaminathan /* Word 6 */ 63082527734SSukumar Swaminathan uint16_t ContextTag; /* Context Tag */ 63182527734SSukumar Swaminathan uint16_t XRITag; /* XRItag */ 63282527734SSukumar Swaminathan /* Word 7 */ 63382527734SSukumar Swaminathan uint32_t Timer: 8; /* TOV */ 63482527734SSukumar Swaminathan uint32_t Rsvd2: 1; 63582527734SSukumar Swaminathan uint32_t ERP: 1; /* ERP */ 63682527734SSukumar Swaminathan uint32_t PU: 2; /* PU */ 63782527734SSukumar Swaminathan uint32_t Rsvd1: 1; 63882527734SSukumar Swaminathan uint32_t Class: 3; /* COS */ 63982527734SSukumar Swaminathan uint32_t Command: 8; /* Command Code */ 64082527734SSukumar Swaminathan uint32_t Status: 4; /* Final Status */ 64182527734SSukumar Swaminathan uint32_t ContextType: 2; /* Context Type */ 64282527734SSukumar Swaminathan uint32_t Rsvd0: 2; 64382527734SSukumar Swaminathan /* Word 8 */ 64482527734SSukumar Swaminathan uint32_t AbortTag; /* Abort Tag */ 64582527734SSukumar Swaminathan /* Word 9 */ 64682527734SSukumar Swaminathan uint16_t OXId; /* OXId on xmitted rsp */ 64782527734SSukumar Swaminathan uint16_t RequestTag; /* Request Tag */ 64882527734SSukumar Swaminathan /* Word 10 */ 64982527734SSukumar Swaminathan uint32_t CCP: 8; /* CCP */ 65082527734SSukumar Swaminathan uint32_t CCPE: 1; /* CCPEnabled */ 65182527734SSukumar Swaminathan uint32_t Rsvd6: 1; 65282527734SSukumar Swaminathan uint32_t XC: 1; /* Exchange Create */ 65382527734SSukumar Swaminathan uint32_t Rsvd5: 1; 65482527734SSukumar Swaminathan uint32_t PV: 1; /* PRIValid */ 65582527734SSukumar Swaminathan uint32_t PRI: 3; /* PRI */ 65682527734SSukumar Swaminathan uint32_t Rsvd4: 16; 65782527734SSukumar Swaminathan /* Word 11 */ 65882527734SSukumar Swaminathan uint32_t Rsvd9: 6; 65982527734SSukumar Swaminathan uint32_t CQId: 10; /* CompletionQueueID */ 66082527734SSukumar Swaminathan uint32_t Rsvd8: 8; 66182527734SSukumar Swaminathan uint32_t WQEC: 1; /* Request WQE consumed CQE */ 66282527734SSukumar Swaminathan uint32_t Rsvd7: 1; 66382527734SSukumar Swaminathan uint32_t ELSId: 2; 66482527734SSukumar Swaminathan uint32_t CmdType: 4; /* Command Type */ 66582527734SSukumar Swaminathan #endif 66682527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 66782527734SSukumar Swaminathan /* Word 6 */ 66882527734SSukumar Swaminathan uint16_t XRITag; /* XRItag */ 66982527734SSukumar Swaminathan uint16_t ContextTag; /* Context Tag */ 67082527734SSukumar Swaminathan /* Word 7 */ 67182527734SSukumar Swaminathan uint32_t Rsvd0: 2; 67282527734SSukumar Swaminathan uint32_t ContextType: 2; /* Context Type */ 67382527734SSukumar Swaminathan uint32_t Status: 4; /* Final Status */ 67482527734SSukumar Swaminathan uint32_t Command: 8; /* Command Code */ 67582527734SSukumar Swaminathan uint32_t Class: 3; /* COS */ 67682527734SSukumar Swaminathan uint32_t Rsvd1: 1; 67782527734SSukumar Swaminathan uint32_t PU: 2; /* PU */ 67882527734SSukumar Swaminathan uint32_t ERP: 1; /* ERP */ 67982527734SSukumar Swaminathan uint32_t Rsvd2: 1; 68082527734SSukumar Swaminathan uint32_t Timer: 8; /* TOV */ 68182527734SSukumar Swaminathan /* Word 8 */ 68282527734SSukumar Swaminathan uint32_t AbortTag; /* Abort Tag */ 68382527734SSukumar Swaminathan /* Word 9 */ 68482527734SSukumar Swaminathan uint16_t RequestTag; /* Request Tag */ 68582527734SSukumar Swaminathan uint16_t OXId; /* OXId on xmitted rsp */ 68682527734SSukumar Swaminathan /* Word 10 */ 68782527734SSukumar Swaminathan uint32_t Rsvd4: 16; 68882527734SSukumar Swaminathan uint32_t PRI: 3; /* PRI */ 68982527734SSukumar Swaminathan uint32_t PV: 1; /* PRIValid */ 69082527734SSukumar Swaminathan uint32_t Rsvd5: 1; 69182527734SSukumar Swaminathan uint32_t XC: 1; /* Exchange Create */ 69282527734SSukumar Swaminathan uint32_t Rsvd6: 1; 69382527734SSukumar Swaminathan uint32_t CCPE: 1; /* CCPEnabled */ 69482527734SSukumar Swaminathan uint32_t CCP: 8; /* CCP */ 69582527734SSukumar Swaminathan /* Word 11 */ 69682527734SSukumar Swaminathan uint32_t CmdType: 4; /* Command Type */ 69782527734SSukumar Swaminathan uint32_t ELSId: 2; 69882527734SSukumar Swaminathan uint32_t Rsvd7: 1; 69982527734SSukumar Swaminathan uint32_t WQEC: 1; /* Request WQE consumed CQE */ 70082527734SSukumar Swaminathan uint32_t Rsvd8: 8; 70182527734SSukumar Swaminathan uint32_t CQId: 10; /* CompletionQueueID */ 70282527734SSukumar Swaminathan uint32_t Rsvd9: 6; 70382527734SSukumar Swaminathan #endif 70482527734SSukumar Swaminathan 70582527734SSukumar Swaminathan /* Words 12-15 */ 70682527734SSukumar Swaminathan uint32_t CmdSpecific[4]; /* Word12-15: commandspecific */ 70782527734SSukumar Swaminathan } emlxs_wqe_t; 70882527734SSukumar Swaminathan 70982527734SSukumar Swaminathan /* Defines for ContextType */ 71082527734SSukumar Swaminathan #define WQE_RPI_CONTEXT 0 71182527734SSukumar Swaminathan #define WQE_VPI_CONTEXT 1 71282527734SSukumar Swaminathan #define WQE_VFI_CONTEXT 2 71382527734SSukumar Swaminathan #define WQE_FCFI_CONTEXT 3 71482527734SSukumar Swaminathan 71582527734SSukumar Swaminathan /* Defines for CmdType */ 71682527734SSukumar Swaminathan #define WQE_TYPE_FCP_DATA_IN 0x00 71782527734SSukumar Swaminathan #define WQE_TYPE_FCP_DATA_OUT 0x01 71882527734SSukumar Swaminathan #define WQE_TYPE_ELS 0x0C 71982527734SSukumar Swaminathan #define WQE_TYPE_GEN 0x08 72082527734SSukumar Swaminathan #define WQE_TYPE_ABORT 0x08 72182527734SSukumar Swaminathan #define WQE_TYPE_MASK_FIP 0x01 72282527734SSukumar Swaminathan 72382527734SSukumar Swaminathan /* Defines for ELSId */ 72482527734SSukumar Swaminathan #define WQE_ELSID_FLOGI 0x03 72582527734SSukumar Swaminathan #define WQE_ELSID_FDISC 0x02 72682527734SSukumar Swaminathan #define WQE_ELSID_LOGO 0x01 72782527734SSukumar Swaminathan #define WQE_ELSID_CMD 0x0 72882527734SSukumar Swaminathan 72982527734SSukumar Swaminathan /* RQB */ 73082527734SSukumar Swaminathan #define RQB_HEADER_SIZE 32 73182527734SSukumar Swaminathan #define RQB_DATA_SIZE 2048 73282527734SSukumar Swaminathan #define RQB_COUNT 256 73382527734SSukumar Swaminathan 73482527734SSukumar Swaminathan #define EMLXS_NUM_WQ_PAGES 4 73582527734SSukumar Swaminathan 73682527734SSukumar Swaminathan #define EQ_DEPTH 1024 73782527734SSukumar Swaminathan #define CQ_DEPTH 256 73882527734SSukumar Swaminathan #define WQ_DEPTH (64 * EMLXS_NUM_WQ_PAGES) 73982527734SSukumar Swaminathan #define MQ_DEPTH 16 74082527734SSukumar Swaminathan #define RQ_DEPTH 512 /* Multiple of RQB_COUNT */ 74182527734SSukumar Swaminathan #define RQ_DEPTH_EXPONENT 9 74282527734SSukumar Swaminathan 74382527734SSukumar Swaminathan 74482527734SSukumar Swaminathan /* Principal doorbell register layouts */ 74582527734SSukumar Swaminathan typedef struct emlxs_rqdb 74682527734SSukumar Swaminathan { 74782527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 74882527734SSukumar Swaminathan uint32_t Rsvd2:2; 74982527734SSukumar Swaminathan uint32_t NumPosted:14; /* Number of entries posted */ 75082527734SSukumar Swaminathan uint32_t Rsvd1:6; 75182527734SSukumar Swaminathan uint32_t Qid:10; /* RQ id for posted RQE */ 75282527734SSukumar Swaminathan #endif /* EMLXS_BIG_ENDIAN */ 75382527734SSukumar Swaminathan 75482527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 75582527734SSukumar Swaminathan uint32_t Qid:10; /* RQ id for posted RQE */ 75682527734SSukumar Swaminathan uint32_t Rsvd1:6; 75782527734SSukumar Swaminathan uint32_t NumPosted:14; /* Number of entries posted */ 75882527734SSukumar Swaminathan uint32_t Rsvd2:2; 75982527734SSukumar Swaminathan #endif /* EMLXS_LITTLE_ENDIAN */ 76082527734SSukumar Swaminathan 76182527734SSukumar Swaminathan } emlxs_rqdb_t; 76282527734SSukumar Swaminathan 76382527734SSukumar Swaminathan 76482527734SSukumar Swaminathan typedef union emlxs_rqdbu 76582527734SSukumar Swaminathan { 76682527734SSukumar Swaminathan uint32_t word; 76782527734SSukumar Swaminathan emlxs_rqdb_t db; 76882527734SSukumar Swaminathan 76982527734SSukumar Swaminathan } emlxs_rqdbu_t; 77082527734SSukumar Swaminathan 77182527734SSukumar Swaminathan 77282527734SSukumar Swaminathan typedef struct emlxs_wqdb 77382527734SSukumar Swaminathan { 77482527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 77582527734SSukumar Swaminathan uint32_t NumPosted:8; /* Number of entries posted */ 77682527734SSukumar Swaminathan uint32_t Index:8; /* Queue index for posted command */ 77782527734SSukumar Swaminathan uint32_t Rsvd1:6; 77882527734SSukumar Swaminathan uint32_t Qid:10; /* WQ id for posted WQE */ 77982527734SSukumar Swaminathan #endif /* EMLXS_BIG_ENDIAN */ 78082527734SSukumar Swaminathan 78182527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 78282527734SSukumar Swaminathan uint32_t Qid:10; /* WQ id for posted WQE */ 78382527734SSukumar Swaminathan uint32_t Rsvd1:6; 78482527734SSukumar Swaminathan uint32_t Index:8; /* Queue index for posted command */ 78582527734SSukumar Swaminathan uint32_t NumPosted:8; /* Number of entries posted */ 78682527734SSukumar Swaminathan #endif /* EMLXS_LITTLE_ENDIAN */ 78782527734SSukumar Swaminathan 78882527734SSukumar Swaminathan } emlxs_wqdb_t; 78982527734SSukumar Swaminathan 79082527734SSukumar Swaminathan 79182527734SSukumar Swaminathan typedef union emlxs_wqdbu 79282527734SSukumar Swaminathan { 79382527734SSukumar Swaminathan uint32_t word; 79482527734SSukumar Swaminathan emlxs_wqdb_t db; 79582527734SSukumar Swaminathan 79682527734SSukumar Swaminathan } emlxs_wqdbu_t; 79782527734SSukumar Swaminathan 79882527734SSukumar Swaminathan 79982527734SSukumar Swaminathan typedef struct emlxs_cqdb 80082527734SSukumar Swaminathan { 80182527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 80282527734SSukumar Swaminathan uint32_t NumPosted:2; /* Number of entries posted */ 80382527734SSukumar Swaminathan uint32_t Rearm:1; /* Rearm CQ */ 80482527734SSukumar Swaminathan uint32_t NumPopped:13; /* Number of CQ entries processed */ 80582527734SSukumar Swaminathan uint32_t Rsvd1:5; 80682527734SSukumar Swaminathan uint32_t Event:1; /* 1 if processed entry is EQE */ 80782527734SSukumar Swaminathan /* 0 if processed entry is CQE */ 80882527734SSukumar Swaminathan uint32_t Qid:10; /* CQ id for posted CQE */ 80982527734SSukumar Swaminathan #endif /* EMLXS_BIG_ENDIAN */ 81082527734SSukumar Swaminathan 81182527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 81282527734SSukumar Swaminathan uint32_t Qid:10; /* CQ id for posted CQE */ 81382527734SSukumar Swaminathan uint32_t Event:1; /* 1 if processed entry is EQE */ 81482527734SSukumar Swaminathan /* 0 if processed entry is CQE */ 81582527734SSukumar Swaminathan uint32_t Rsvd1:5; 81682527734SSukumar Swaminathan uint32_t NumPopped:13; /* Number of CQ entries processed */ 81782527734SSukumar Swaminathan uint32_t Rearm:1; /* Rearm CQ */ 81882527734SSukumar Swaminathan uint32_t NumPosted:2; /* Number of entries posted */ 81982527734SSukumar Swaminathan #endif /* EMLXS_LITTLE_ENDIAN */ 82082527734SSukumar Swaminathan 82182527734SSukumar Swaminathan } emlxs_cqdb_t; 82282527734SSukumar Swaminathan 82382527734SSukumar Swaminathan 82482527734SSukumar Swaminathan typedef union emlxs_cqdbu 82582527734SSukumar Swaminathan { 82682527734SSukumar Swaminathan uint32_t word; 82782527734SSukumar Swaminathan emlxs_cqdb_t db; 82882527734SSukumar Swaminathan 82982527734SSukumar Swaminathan } emlxs_cqdbu_t; 83082527734SSukumar Swaminathan 83182527734SSukumar Swaminathan typedef struct emlxs_eqdb 83282527734SSukumar Swaminathan { 83382527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 83482527734SSukumar Swaminathan uint32_t Rsvd2:2; 83582527734SSukumar Swaminathan uint32_t Rearm:1; /* Rearm EQ */ 83682527734SSukumar Swaminathan uint32_t NumPopped:13; /* Number of CQ entries processed */ 83782527734SSukumar Swaminathan uint32_t Rsvd1:5; 83882527734SSukumar Swaminathan uint32_t Event:1; /* True iff processed entry is EQE */ 83982527734SSukumar Swaminathan uint32_t Clear:1; /* clears EQ interrupt when set */ 84082527734SSukumar Swaminathan uint32_t Qid:9; /* EQ id for posted EQE */ 84182527734SSukumar Swaminathan #endif /* EMLXS_BIG_ENDIAN */ 84282527734SSukumar Swaminathan 84382527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 84482527734SSukumar Swaminathan uint32_t Qid:9; /* EQ id for posted EQE */ 84582527734SSukumar Swaminathan uint32_t Clear:1; /* clears EQ interrupt when set */ 84682527734SSukumar Swaminathan uint32_t Event:1; /* True iff processed entry is EQE */ 84782527734SSukumar Swaminathan uint32_t Rsvd1:5; 84882527734SSukumar Swaminathan uint32_t NumPopped:13; /* Number of CQ entries processed */ 84982527734SSukumar Swaminathan uint32_t Rearm:1; /* Rearm EQ */ 85082527734SSukumar Swaminathan uint32_t Rsvd2:2; 85182527734SSukumar Swaminathan #endif /* EMLXS_LITTLE_ENDIAN */ 85282527734SSukumar Swaminathan 85382527734SSukumar Swaminathan } emlxs_eqdb_t; 85482527734SSukumar Swaminathan 85582527734SSukumar Swaminathan 85682527734SSukumar Swaminathan typedef union emlxs_eqdbu 85782527734SSukumar Swaminathan { 85882527734SSukumar Swaminathan uint32_t word; 85982527734SSukumar Swaminathan emlxs_eqdb_t db; 86082527734SSukumar Swaminathan 86182527734SSukumar Swaminathan } emlxs_eqdbu_t; 86282527734SSukumar Swaminathan 86382527734SSukumar Swaminathan 86482527734SSukumar Swaminathan typedef struct emlxs_mqdb 86582527734SSukumar Swaminathan { 86682527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 86782527734SSukumar Swaminathan uint32_t Rsvd2:2; 86882527734SSukumar Swaminathan uint32_t NumPosted:14; /* Number of entries posted */ 86982527734SSukumar Swaminathan uint32_t Rsvd1:5; 87082527734SSukumar Swaminathan uint32_t Qid:11; /* MQ id for posted MQE */ 87182527734SSukumar Swaminathan #endif /* EMLXS_BIG_ENDIAN */ 87282527734SSukumar Swaminathan 87382527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 87482527734SSukumar Swaminathan uint32_t Qid:11; /* MQ id for posted MQE */ 87582527734SSukumar Swaminathan uint32_t Rsvd1:5; 87682527734SSukumar Swaminathan uint32_t NumPosted:14; /* Number of entries posted */ 87782527734SSukumar Swaminathan uint32_t Rsvd2:2; 87882527734SSukumar Swaminathan #endif /* EMLXS_LITTLE_ENDIAN */ 87982527734SSukumar Swaminathan 88082527734SSukumar Swaminathan } emlxs_mqdb_t; 88182527734SSukumar Swaminathan 88282527734SSukumar Swaminathan 88382527734SSukumar Swaminathan typedef union emlxs_mqdbu 88482527734SSukumar Swaminathan { 88582527734SSukumar Swaminathan uint32_t word; 88682527734SSukumar Swaminathan emlxs_mqdb_t db; 88782527734SSukumar Swaminathan 88882527734SSukumar Swaminathan } emlxs_mqdbu_t; 88982527734SSukumar Swaminathan 89082527734SSukumar Swaminathan 89182527734SSukumar Swaminathan #ifdef __cplusplus 89282527734SSukumar Swaminathan } 89382527734SSukumar Swaminathan #endif 89482527734SSukumar Swaminathan 89582527734SSukumar Swaminathan #endif /* _EMLXS_QUEUE_H */ 896