1 /* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9 * or http://www.opensolaris.org/os/licensing. 10 * See the License for the specific language governing permissions 11 * and limitations under the License. 12 * 13 * When distributing Covered Code, include this CDDL HEADER in each 14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15 * If applicable, add the following below this CDDL HEADER, with the 16 * fields enclosed by brackets "[]" replaced with your own identifying 17 * information: Portions Copyright [yyyy] [name of copyright owner] 18 * 19 * CDDL HEADER END 20 */ 21 22 /* 23 * Copyright 2009 Emulex. All rights reserved. 24 * Use is subject to license terms. 25 */ 26 27 #ifndef _EMLXS_OS_H 28 #define _EMLXS_OS_H 29 30 #ifdef __cplusplus 31 extern "C" { 32 #endif 33 34 #define EMLXS_MODREV2 2 /* Old Solaris 8 & 9 interface */ 35 #define EMLXS_MODREV3 3 /* New Solaris 10 & 11 interface */ 36 #define EMLXS_MODREV4 4 /* Sun FC packet change */ 37 /* Symbolic Node Name interface */ 38 #define EMLXS_MODREV5 5 /* New Sun NPIV Interface */ 39 40 #define EMLXS_MODREV2X 2 /* Old Solaris 8 & 9 x86 interface */ 41 #define EMLXS_MODREV3X 3 /* New Solaris 10 & 11 x86 interface */ 42 43 44 /* 45 * DRIVER LEVEL FEATURES 46 */ 47 #define DHCHAP_SUPPORT /* 2.21 driver */ 48 49 #define SATURN_MSI_SUPPORT /* 2.30 driver */ 50 #define MENLO_SUPPORT /* 2.30 driver */ 51 #define MBOX_EXT_SUPPORT /* 2.30 driver */ 52 53 #define DUMP_SUPPORT /* 2.40 driver */ 54 #define SAN_DIAG_SUPPORT /* 2.40 driver */ 55 #define FMA_SUPPORT /* 2.40 driver */ 56 57 #define SLI4_FASTPATH_DEBUG 58 59 /* #define IDLE_TIMER Not yet - untested */ 60 61 /* 62 * OS LEVEL FEATURES 63 */ 64 #ifdef S10 65 #define EMLXS_MODREV EMLXS_MODREV3 66 #define MSI_SUPPORT 67 68 69 #ifdef EMLXS_I386 70 #define EMLXS_MODREVX EMLXS_MODREV2X 71 #endif /* i386 */ 72 #endif /* S10 */ 73 74 75 #ifdef S11 76 #define MSI_SUPPORT 77 #define SFCT_SUPPORT /* COMSTAR Support */ 78 #define MODFW_SUPPORT /* Dynamic firmware module support */ 79 #define EMLXS_MODREV EMLXS_MODREV5 /* Sun NPIV Enhancement */ 80 81 #ifdef EMLXS_I386 82 #define EMLXS_MODREVX EMLXS_MODREV2X 83 #endif /* i386 */ 84 #endif /* S11 */ 85 86 /* 87 * SUBFEATURES 88 */ 89 #ifdef SFCT_SUPPORT 90 #define MODSYM_SUPPORT /* Dynamic Module Loading Support */ 91 #define FCIO_SUPPORT /* FCIO IOCTL support */ 92 #endif /* SFCT_SUPPORT */ 93 94 95 #ifndef EMLXS_MODREV 96 #define EMLXS_MODREV 0 97 #endif /* EMLXS_MODREV */ 98 99 #ifndef EMLXS_MODREVX 100 #define EMLXS_MODREVX 0 101 #endif /* EMLXS_MODREVX */ 102 103 /* Create combined definition */ 104 #if defined(S10) || defined(S11) 105 #define S10S11 106 #endif /* S10 or S11 */ 107 108 #define DRIVER_NAME "emlxs" 109 110 #include <sys/types.h> 111 #include <sys/varargs.h> 112 #include <sys/devops.h> 113 #include <sys/param.h> 114 #include <sys/user.h> 115 #include <sys/buf.h> 116 #include <sys/ioctl.h> 117 #include <sys/uio.h> 118 #include <sys/fcntl.h> 119 120 #include <sys/cmn_err.h> 121 #include <sys/stropts.h> 122 #include <sys/kmem.h> 123 124 #include <sys/errno.h> 125 #include <sys/open.h> 126 #include <sys/kmem.h> 127 #include <sys/poll.h> 128 #include <sys/thread.h> 129 #include <sys/taskq.h> 130 #include <sys/debug.h> 131 #include <sys/cpu.h> 132 #include <sys/autoconf.h> 133 #include <sys/conf.h> 134 #include <sys/stat.h> 135 #include <sys/var.h> 136 137 #include <sys/map.h> 138 #include <sys/file.h> 139 #include <sys/syslog.h> 140 #include <sys/disp.h> 141 #include <sys/taskq.h> 142 143 #include <sys/ddi.h> 144 #include <sys/sunddi.h> 145 #include <sys/promif.h> 146 #include <sys/ethernet.h> 147 #include <vm/seg_kmem.h> 148 #include <sys/utsname.h> 149 #include <sys/modctl.h> 150 #include <sys/scsi/scsi.h> 151 #include <sys/varargs.h> 152 #include <sys/atomic.h> 153 154 #include <emlxs_hbaapi.h> 155 156 #ifdef FMA_SUPPORT 157 #include <sys/ddifm.h> 158 #include <sys/fm/protocol.h> 159 #include <sys/fm/util.h> 160 #endif /* FMA_SUPPORT */ 161 #include <sys/fm/io/ddi.h> 162 163 #ifdef S11 164 165 /* ULP header files */ 166 #include <sys/fibre-channel/fc.h> 167 #include <sys/fibre-channel/impl/fc_fcaif.h> 168 169 #else /* !S11 */ 170 171 /* ULP header files */ 172 #include <sys/fibre-channel/fcio.h> 173 #include <sys/fibre-channel/fc.h> 174 #include <sys/fibre-channel/fc_appif.h> 175 #include <sys/fibre-channel/fc_types.h> 176 #include <sys/fibre-channel/impl/fc_error.h> 177 #include <sys/fibre-channel/impl/fc_fla.h> 178 #include <sys/fibre-channel/impl/fc_linkapp.h> 179 #include <sys/fibre-channel/impl/fcal.h> 180 #include <sys/fibre-channel/impl/fcgs2.h> 181 #include <sys/fibre-channel/impl/fcph.h> 182 #include <sys/fibre-channel/impl/fc_ulpif.h> 183 #include <sys/fibre-channel/impl/fc_fcaif.h> 184 #include <sys/fibre-channel/impl/fctl.h> 185 #include <sys/fibre-channel/impl/fctl_private.h> 186 #include <sys/fibre-channel/ulp/fcp.h> 187 #include <sys/fibre-channel/ulp/fcp_util.h> 188 189 #endif /* S11 */ 190 191 #ifndef FC_HBA_PORTSPEED_8GBIT 192 #define FC_HBA_PORTSPEED_8GBIT 16 193 #endif /* FC_HBA_PORTSPEED_8GBIT */ 194 195 #ifndef FP_DEFAULT_SID 196 #define FP_DEFAULT_SID (0x000AE) 197 #endif /* FP_DEFAULT_SID */ 198 199 #ifndef FP_DEFAULT_DID 200 #define FP_DEFAULT_DID (0x000EA) 201 #endif /* FP_DEFAULT_DID */ 202 203 #ifdef MSI_SUPPORT 204 #pragma weak ddi_intr_get_supported_types 205 #pragma weak ddi_intr_get_nintrs 206 #pragma weak ddi_intr_add_handler 207 #pragma weak ddi_intr_remove_handler 208 #pragma weak ddi_intr_get_hilevel_pri 209 #pragma weak ddi_intr_enable 210 #pragma weak ddi_intr_disable 211 #pragma weak ddi_intr_get_cap 212 #pragma weak ddi_intr_get_pri 213 #pragma weak ddi_intr_alloc 214 #pragma weak ddi_intr_free 215 #pragma weak ddi_intr_block_enable 216 #pragma weak ddi_intr_block_disable 217 extern int ddi_intr_get_supported_types(); 218 #endif /* MSI_SUPPORT */ 219 220 #ifndef MODSYM_SUPPORT 221 #pragma weak fc_fca_init 222 #pragma weak fc_fca_attach 223 #pragma weak fc_fca_detach 224 #endif /* MODSYM_SUPPORT */ 225 226 /* S11 flag for dma_attr_flags for ddi_dma_attr_t */ 227 #ifndef DDI_DMA_RELAXED_ORDERING 228 #define DDI_DMA_RELAXED_ORDERING 0x400 229 #endif /* DDI_DMA_RELAXED_ORDERING */ 230 231 #ifdef FMA_SUPPORT 232 /* FMA Support */ 233 #pragma weak ddi_fm_acc_err_clear 234 extern void ddi_fm_acc_err_clear(); 235 #endif /* FMA_SUPPORT */ 236 237 #ifdef EMLXS_SPARC 238 #define EMLXS_BIG_ENDIAN 239 #endif /* EMLXS_SPARC */ 240 241 #ifdef EMLXS_I386 242 #define EMLXS_LITTLE_ENDIAN 243 #endif /* EMLXS_I386 */ 244 245 246 /* Solaris 8 does not define this */ 247 #ifndef TASKQ_DYNAMIC 248 #define TASKQ_DYNAMIC 0x0004 249 #endif /* TASKQ_DYNAMIC */ 250 251 #ifdef _LP64 252 #define DEAD_PTR 0xdeadbeefdeadbeef 253 #else 254 #define DEAD_PTR 0xdeadbeef 255 #endif /* _LP64 */ 256 257 #ifndef FC_STATE_8GBIT_SPEED 258 /* This was obtained from OpenSolaris */ 259 #define FC_STATE_8GBIT_SPEED 0x0700 /* 8 Gbit/sec */ 260 #endif /* FC_STATE_8GBIT_SPEED */ 261 262 #define FC_STATE_QUAD_SPEED 0x0500 263 264 #ifndef BURSTSIZE 265 #define BURSTSIZE 266 #define BURST1 0x01 267 #define BURST2 0x02 268 #define BURST4 0x04 269 #define BURST8 0x08 270 #define BURST16 0x10 271 #define BURST32 0x20 272 #define BURST64 0x40 273 #ifdef _LP64 274 #define BURSTSIZE_MASK 0x7f 275 #else 276 #define BURSTSIZE_MASK 0x3f 277 #endif /* _LP64 */ 278 #define DEFAULT_BURSTSIZE (BURSTSIZE_MASK) /* all burst sizes */ 279 #endif /* BURSTSIZE */ 280 281 #define PADDR_LO(addr) ((uint32_t)(((uint64_t)(addr)) & 0xffffffff)) 282 #define PADDR_HI(addr) ((uint32_t)(((uint64_t)(addr)) >> 32)) 283 #define PADDR(high, low) ((uint64_t)((((uint64_t)(high)) << 32) \ 284 | (((uint64_t)(low)) & 0xffffffff))) 285 286 #ifndef TRUE 287 #define TRUE 1 288 #endif /* TRUE */ 289 290 #ifndef FALSE 291 #define FALSE 0 292 #endif /* FALSE */ 293 294 #define DMA_READ_WRITE 0 295 #define DMA_READ_ONLY 1 296 #define DMA_WRITE_ONLY 2 297 298 #define DMA_SUCC 1 299 300 #define MAX_FC_BRDS 256 /* Maximum # boards per system */ 301 302 #define DELAYMS(ms) drv_usecwait((ms*1000)) 303 #define DELAYUS(us) drv_usecwait(us) 304 305 #ifdef FMA_SUPPORT 306 #define EMLXS_MPDATA_SYNC(h, a, b, c) \ 307 if (h) { \ 308 (void) ddi_dma_sync((ddi_dma_handle_t)(h), \ 309 (off_t)(a), (size_t)(b), (uint_t)c); \ 310 if (emlxs_fm_check_dma_handle(hba, h) != DDI_FM_OK) { \ 311 EMLXS_MSGF(EMLXS_CONTEXT, \ 312 &emlxs_invalid_dma_handle_msg, \ 313 "ddi_dma_sync hdl=%p off=%x " \ 314 "size=%d dir=%x ", \ 315 h, a, b, c); \ 316 } \ 317 } 318 #else /* !FMA_SUPPORT */ 319 #define EMLXS_MPDATA_SYNC(h, a, b, c) \ 320 if (h) { \ 321 (void) ddi_dma_sync((ddi_dma_handle_t)(h), \ 322 (off_t)(a), (size_t)(b), (uint_t)c); \ 323 } 324 #endif /* FMA_SUPPORT */ 325 326 327 #define PKT2PRIV(pkt) ((emlxs_buf_t *)(pkt)->pkt_fca_private) 328 #define PRIV2PKT(sbp) sbp->pkt 329 330 #define EMLXS_INUMBER 0 331 #define EMLXS_MSI_INUMBER 0 332 333 #define EMLXS_DMA_ALIGN BURST16 334 335 /* 336 * Register indices in PCI configuration space. 337 */ 338 #define SBUS_FLASH_RD 0 /* FCODE-Flash Read only */ 339 /* index */ 340 #define SBUS_FLASH_RDWR 1 /* FCODE-Flash Read/Write */ 341 /* index */ 342 #define SBUS_DFLY_SLIM_RINDEX 2 /* DragonFly SLIM regs index */ 343 #define SBUS_DFLY_CSR_RINDEX 3 /* DragonFly I/O regs index */ 344 #define SBUS_TITAN_CORE_RINDEX 4 /* TITAN Core register index */ 345 #define SBUS_DFLY_PCI_CFG_RINDEX 5 /* DragonFly PCI ConfigSpace */ 346 /* regs index */ 347 #define SBUS_TITAN_PCI_CFG_RINDEX 6 /* TITAN PCI ConfigSpace regs */ 348 /* index */ 349 #define SBUS_TITAN_CSR_RINDEX 7 /* TITAN Control/Status regs */ 350 /* index */ 351 352 #define PCI_CFG_RINDEX 0 353 #define PCI_SLIM_RINDEX 1 354 #define PCI_CSR_RINDEX 2 355 356 #define PCI_BAR1_RINDEX 2 357 #define PCI_BAR2_RINDEX 3 358 359 360 #define EMLXS_MAX_UBUFS 65535 361 362 /* Tokens < EMLXS_UB_TOKEN_OFFSET are reserved for ELS response oxids */ 363 #define EMLXS_UB_TOKEN_OFFSET 0x100 364 365 typedef struct emlxs_ub_priv 366 { 367 fc_unsol_buf_t *ubp; 368 void *port; 369 370 uint32_t bpl_size; 371 uint8_t *bpl_virt; /* virtual address ptr */ 372 uint64_t bpl_phys; /* mapped address */ 373 void *bpl_data_handle; 374 void *bpl_dma_handle; 375 376 uint32_t ip_ub_size; 377 uint8_t *ip_ub_virt; /* virtual address ptr */ 378 ddi_dma_cookie_t ip_ub_dma_cookies[64]; 379 ddi_acc_handle_t ip_ub_data_handle; 380 ddi_dma_handle_t ip_ub_dma_handle; 381 uint32_t ip_ub_cookie_cnt; 382 uint32_t FC4type; 383 384 uint16_t flags; 385 #define EMLXS_UB_FREE 0x0000 386 #define EMLXS_UB_IN_USE 0x0001 387 #define EMLXS_UB_REPLY 0x0002 388 #define EMLXS_UB_RESV 0x0004 389 #define EMLXS_UB_TIMEOUT 0x0008 390 #define EMLXS_UB_INTERCEPT 0x0010 391 392 uint16_t available; 393 394 uint32_t timeout; /* Timeout period in seconds */ 395 uint32_t time; /* EMLXS_UB_IN_USE timestamp */ 396 uint32_t cmd; 397 uint32_t token; 398 399 struct emlxs_unsol_buf *pool; 400 struct emlxs_ub_priv *next; 401 } emlxs_ub_priv_t; 402 403 404 typedef struct emlxs_unsol_buf 405 { 406 struct emlxs_unsol_buf *pool_prev; /* ptr to prev type */ 407 /* of unsol_buf hdr */ 408 struct emlxs_unsol_buf *pool_next; /* ptr to next type */ 409 /* of unsol_buf hdr */ 410 411 uint32_t pool_type; /* FC-4 type */ 412 uint32_t pool_buf_size; /* buffer size for */ 413 /* this pool */ 414 415 uint32_t pool_nentries; /* no. of bufs in */ 416 /* pool */ 417 uint32_t pool_available; /* no. of bufs avail */ 418 /* in pool */ 419 420 uint32_t pool_flags; 421 #define POOL_DESTROY 0x00000001 /* Pool is marked for */ 422 /* destruction */ 423 424 uint32_t pool_free; /* Number of free */ 425 /* buffers */ 426 uint32_t pool_free_resv; /* Number of free */ 427 /* reserved buffers */ 428 429 uint32_t pool_first_token; /* First token */ 430 /* in pool */ 431 uint32_t pool_last_token; /* Last token */ 432 /* in pool */ 433 434 fc_unsol_buf_t *fc_ubufs; /* array of unsol buf */ 435 /* structs */ 436 } emlxs_unsol_buf_t; 437 438 439 #ifndef FC_REASON_NONE 440 #define FC_REASON_NONE 0 441 #endif /* FC_REASON_NONE */ 442 443 #ifndef FC_ACTION_NONE 444 #define FC_ACTION_NONE 0 445 #endif /* FC_ACTION_NONE */ 446 447 /* 448 * emlx status translation table 449 */ 450 typedef struct emlxs_xlat_err 451 { 452 uint32_t emlxs_status; 453 uint32_t pkt_state; 454 uint32_t pkt_reason; 455 uint32_t pkt_expln; 456 uint32_t pkt_action; 457 } emlxs_xlat_err_t; 458 459 460 typedef struct emlxs_table 461 { 462 uint32_t code; 463 char string[32]; 464 } emlxs_table_t; 465 466 467 /* PATCH MASK DEFINES */ 468 #define EMLXS_PATCH1 0x00000001 469 #define EMLXS_PATCH2 0x00000002 470 #define EMLXS_PATCH3 0x00000004 471 #define EMLXS_PATCH4 0x00000008 472 #define EMLXS_PATCH5 0x00000010 473 #define EMLXS_PATCH6 0x00000020 474 #define EMLXS_PATCH7 0x00000040 475 #define EMLXS_PATCH8 0x00000080 476 #define EMLXS_PATCH9 0x00000100 477 #define EMLXS_PATCH10 0x00000200 478 #define EMLXS_PATCH11 0x00000400 479 #define EMLXS_PATCH12 0x00000800 480 #define EMLXS_PATCH13 0x00001000 481 #define EMLXS_PATCH14 0x00002000 482 #define EMLXS_PATCH15 0x00004000 483 #define EMLXS_PATCH16 0x00008000 484 #define EMLXS_PATCH17 0x00010000 485 #define EMLXS_PATCH18 0x00020000 486 #define EMLXS_PATCH19 0x00040000 487 #define EMLXS_PATCH20 0x00080000 488 #define EMLXS_PATCH21 0x00100000 489 #define EMLXS_PATCH22 0x00200000 490 #define EMLXS_PATCH23 0x00400000 491 #define EMLXS_PATCH24 0x00800000 492 #define EMLXS_PATCH25 0x01000000 493 #define EMLXS_PATCH26 0x02000000 494 #define EMLXS_PATCH27 0x04000000 495 #define EMLXS_PATCH28 0x08000000 496 #define EMLXS_PATCH29 0x10000000 497 #define EMLXS_PATCH30 0x20000000 498 #define EMLXS_PATCH31 0x40000000 499 #define EMLXS_PATCH32 0x80000000 500 501 502 /* ULP Patches: */ 503 504 /* This patch enables the driver to auto respond to unsolicited LOGO's */ 505 /* This is needed because ULP is sometimes doesn't reply itself */ 506 #define ULP_PATCH2 EMLXS_PATCH2 507 508 /* This patch enables the driver to auto respond to unsolicited PRLI's */ 509 /* This is needed because ULP is known to panic sometimes */ 510 #define ULP_PATCH3 EMLXS_PATCH3 511 512 /* This patch enables the driver to auto respond to unsolicited PRLO's */ 513 /* This is needed because ULP is known to panic sometimes */ 514 #define ULP_PATCH4 EMLXS_PATCH4 515 516 /* This patch enables the driver to fail pkt abort requests */ 517 #define ULP_PATCH5 EMLXS_PATCH5 518 519 /* This patch enables the driver to generate an RSCN for unsolicited PRLO's */ 520 /* and LOGO's */ 521 #define ULP_PATCH6 EMLXS_PATCH6 522 523 /* Sun Disk Array Patches: */ 524 525 /* This patch enables the driver to fix a residual underrun issue with */ 526 /* check conditions */ 527 #define FCP_UNDERRUN_PATCH1 EMLXS_PATCH9 528 529 /* This patch enables the driver to fix a residual underrun issue with */ 530 /* SCSI inquiry commands */ 531 #define FCP_UNDERRUN_PATCH2 EMLXS_PATCH10 532 533 534 #define DEFAULT_PATCHES (ULP_PATCH2 | ULP_PATCH3 | \ 535 ULP_PATCH5 | ULP_PATCH6 | \ 536 FCP_UNDERRUN_PATCH1 | FCP_UNDERRUN_PATCH2) 537 538 #ifdef __cplusplus 539 } 540 #endif 541 542 #endif /* _EMLXS_OS_H */ 543