1fcf3ce44SJohn Forte /* 2fcf3ce44SJohn Forte * CDDL HEADER START 3fcf3ce44SJohn Forte * 4fcf3ce44SJohn Forte * The contents of this file are subject to the terms of the 5fcf3ce44SJohn Forte * Common Development and Distribution License (the "License"). 6fcf3ce44SJohn Forte * You may not use this file except in compliance with the License. 7fcf3ce44SJohn Forte * 8fcf3ce44SJohn Forte * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9fcf3ce44SJohn Forte * or http://www.opensolaris.org/os/licensing. 10fcf3ce44SJohn Forte * See the License for the specific language governing permissions 11fcf3ce44SJohn Forte * and limitations under the License. 12fcf3ce44SJohn Forte * 13fcf3ce44SJohn Forte * When distributing Covered Code, include this CDDL HEADER in each 14fcf3ce44SJohn Forte * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15fcf3ce44SJohn Forte * If applicable, add the following below this CDDL HEADER, with the 16fcf3ce44SJohn Forte * fields enclosed by brackets "[]" replaced with your own identifying 17fcf3ce44SJohn Forte * information: Portions Copyright [yyyy] [name of copyright owner] 18fcf3ce44SJohn Forte * 19fcf3ce44SJohn Forte * CDDL HEADER END 20fcf3ce44SJohn Forte */ 21fcf3ce44SJohn Forte 22fcf3ce44SJohn Forte /* 23bce54adfSSukumar Swaminathan * Copyright 2010 Emulex. All rights reserved. 2482527734SSukumar Swaminathan * Use is subject to license terms. 25fcf3ce44SJohn Forte */ 26fcf3ce44SJohn Forte 27fcf3ce44SJohn Forte #ifndef _EMLXS_OS_H 28fcf3ce44SJohn Forte #define _EMLXS_OS_H 29fcf3ce44SJohn Forte 30fcf3ce44SJohn Forte #ifdef __cplusplus 31fcf3ce44SJohn Forte extern "C" { 32fcf3ce44SJohn Forte #endif 33fcf3ce44SJohn Forte 34291a2b48SSukumar Swaminathan #define EMLXS_MODREV2 2 /* Old Solaris 8 & 9 interface */ 35291a2b48SSukumar Swaminathan #define EMLXS_MODREV3 3 /* New Solaris 10 & 11 interface */ 36291a2b48SSukumar Swaminathan #define EMLXS_MODREV4 4 /* Sun FC packet change */ 37291a2b48SSukumar Swaminathan /* Symbolic Node Name interface */ 38291a2b48SSukumar Swaminathan #define EMLXS_MODREV5 5 /* New Sun NPIV Interface */ 39fcf3ce44SJohn Forte 40291a2b48SSukumar Swaminathan #define EMLXS_MODREV2X 2 /* Old Solaris 8 & 9 x86 interface */ 41291a2b48SSukumar Swaminathan #define EMLXS_MODREV3X 3 /* New Solaris 10 & 11 x86 interface */ 42fcf3ce44SJohn Forte 43fcf3ce44SJohn Forte 44fcf3ce44SJohn Forte /* 45291a2b48SSukumar Swaminathan * DRIVER LEVEL FEATURES 46fcf3ce44SJohn Forte */ 47fcf3ce44SJohn Forte #define DHCHAP_SUPPORT /* 2.21 driver */ 48fcf3ce44SJohn Forte 49fcf3ce44SJohn Forte #define SATURN_MSI_SUPPORT /* 2.30 driver */ 50fcf3ce44SJohn Forte #define MENLO_SUPPORT /* 2.30 driver */ 51fcf3ce44SJohn Forte #define MBOX_EXT_SUPPORT /* 2.30 driver */ 52fcf3ce44SJohn Forte 53291a2b48SSukumar Swaminathan #define DUMP_SUPPORT /* 2.40 driver */ 54291a2b48SSukumar Swaminathan #define SAN_DIAG_SUPPORT /* 2.40 driver */ 554baa2c25SSukumar Swaminathan #define FMA_SUPPORT /* 2.40 driver */ 56fcf3ce44SJohn Forte 57291a2b48SSukumar Swaminathan /* #define IDLE_TIMER Not yet - untested */ 58fcf3ce44SJohn Forte 59fcf3ce44SJohn Forte /* 60291a2b48SSukumar Swaminathan * OS LEVEL FEATURES 61fcf3ce44SJohn Forte */ 62fcf3ce44SJohn Forte #ifdef S10 63291a2b48SSukumar Swaminathan #define EMLXS_MODREV EMLXS_MODREV3 64291a2b48SSukumar Swaminathan #define MSI_SUPPORT 65fcf3ce44SJohn Forte 66fcf3ce44SJohn Forte 67fcf3ce44SJohn Forte #ifdef EMLXS_I386 68291a2b48SSukumar Swaminathan #define EMLXS_MODREVX EMLXS_MODREV2X 6982527734SSukumar Swaminathan #endif /* i386 */ 70fcf3ce44SJohn Forte #endif /* S10 */ 71fcf3ce44SJohn Forte 72fcf3ce44SJohn Forte 73fcf3ce44SJohn Forte #ifdef S11 74fcf3ce44SJohn Forte #define MSI_SUPPORT 75291a2b48SSukumar Swaminathan #define SFCT_SUPPORT /* COMSTAR Support */ 76291a2b48SSukumar Swaminathan #define MODFW_SUPPORT /* Dynamic firmware module support */ 7782527734SSukumar Swaminathan #define EMLXS_MODREV EMLXS_MODREV5 /* Sun NPIV Enhancement */ 78fcf3ce44SJohn Forte 79fcf3ce44SJohn Forte #ifdef EMLXS_I386 8082527734SSukumar Swaminathan #define EMLXS_MODREVX EMLXS_MODREV2X 8182527734SSukumar Swaminathan #endif /* i386 */ 82fcf3ce44SJohn Forte #endif /* S11 */ 83fcf3ce44SJohn Forte 84fcf3ce44SJohn Forte /* 85291a2b48SSukumar Swaminathan * SUBFEATURES 86fcf3ce44SJohn Forte */ 87fcf3ce44SJohn Forte #ifdef SFCT_SUPPORT 88291a2b48SSukumar Swaminathan #define MODSYM_SUPPORT /* Dynamic Module Loading Support */ 89291a2b48SSukumar Swaminathan #define FCIO_SUPPORT /* FCIO IOCTL support */ 90291a2b48SSukumar Swaminathan #endif /* SFCT_SUPPORT */ 91fcf3ce44SJohn Forte 92fcf3ce44SJohn Forte 93fcf3ce44SJohn Forte #ifndef EMLXS_MODREV 94fcf3ce44SJohn Forte #define EMLXS_MODREV 0 95291a2b48SSukumar Swaminathan #endif /* EMLXS_MODREV */ 96fcf3ce44SJohn Forte 97fcf3ce44SJohn Forte #ifndef EMLXS_MODREVX 98fcf3ce44SJohn Forte #define EMLXS_MODREVX 0 99291a2b48SSukumar Swaminathan #endif /* EMLXS_MODREVX */ 100fcf3ce44SJohn Forte 101fcf3ce44SJohn Forte /* Create combined definition */ 102fcf3ce44SJohn Forte #if defined(S10) || defined(S11) 103fcf3ce44SJohn Forte #define S10S11 104291a2b48SSukumar Swaminathan #endif /* S10 or S11 */ 105fcf3ce44SJohn Forte 106291a2b48SSukumar Swaminathan #define DRIVER_NAME "emlxs" 107fcf3ce44SJohn Forte 108fcf3ce44SJohn Forte #include <sys/types.h> 109fcf3ce44SJohn Forte #include <sys/varargs.h> 110fcf3ce44SJohn Forte #include <sys/devops.h> 111fcf3ce44SJohn Forte #include <sys/param.h> 112fcf3ce44SJohn Forte #include <sys/user.h> 113fcf3ce44SJohn Forte #include <sys/buf.h> 114fcf3ce44SJohn Forte #include <sys/ioctl.h> 115fcf3ce44SJohn Forte #include <sys/uio.h> 116fcf3ce44SJohn Forte #include <sys/fcntl.h> 117fcf3ce44SJohn Forte 118fcf3ce44SJohn Forte #include <sys/cmn_err.h> 119fcf3ce44SJohn Forte #include <sys/stropts.h> 120fcf3ce44SJohn Forte #include <sys/kmem.h> 121fcf3ce44SJohn Forte 122fcf3ce44SJohn Forte #include <sys/errno.h> 123fcf3ce44SJohn Forte #include <sys/open.h> 124fcf3ce44SJohn Forte #include <sys/kmem.h> 125fcf3ce44SJohn Forte #include <sys/poll.h> 126fcf3ce44SJohn Forte #include <sys/thread.h> 127fcf3ce44SJohn Forte #include <sys/taskq.h> 128fcf3ce44SJohn Forte #include <sys/debug.h> 129fcf3ce44SJohn Forte #include <sys/cpu.h> 130fcf3ce44SJohn Forte #include <sys/autoconf.h> 131fcf3ce44SJohn Forte #include <sys/conf.h> 132fcf3ce44SJohn Forte #include <sys/stat.h> 133fcf3ce44SJohn Forte #include <sys/var.h> 134fcf3ce44SJohn Forte 135fcf3ce44SJohn Forte #include <sys/map.h> 136fcf3ce44SJohn Forte #include <sys/file.h> 137fcf3ce44SJohn Forte #include <sys/syslog.h> 138fcf3ce44SJohn Forte #include <sys/disp.h> 139fcf3ce44SJohn Forte #include <sys/taskq.h> 140fcf3ce44SJohn Forte 141fcf3ce44SJohn Forte #include <sys/ddi.h> 142fcf3ce44SJohn Forte #include <sys/sunddi.h> 143fcf3ce44SJohn Forte #include <sys/promif.h> 144fcf3ce44SJohn Forte #include <sys/ethernet.h> 145fcf3ce44SJohn Forte #include <vm/seg_kmem.h> 146fcf3ce44SJohn Forte #include <sys/utsname.h> 147fcf3ce44SJohn Forte #include <sys/modctl.h> 148fcf3ce44SJohn Forte #include <sys/scsi/scsi.h> 149fcf3ce44SJohn Forte #include <sys/varargs.h> 150fcf3ce44SJohn Forte #include <sys/atomic.h> 151*a9800bebSGarrett D'Amore #ifdef S11 152*a9800bebSGarrett D'Amore #include <sys/pci.h> 153*a9800bebSGarrett D'Amore #else /* !S11 */ 154*a9800bebSGarrett D'Amore /* 155*a9800bebSGarrett D'Amore * Capabilities linked list entry offsets 156*a9800bebSGarrett D'Amore */ 157*a9800bebSGarrett D'Amore #define PCI_CAP_ID 0x0 /* capability identifier, 1 byte */ 158*a9800bebSGarrett D'Amore #define PCI_CAP_NEXT_PTR 0x1 /* next entry pointer, 1 byte */ 159*a9800bebSGarrett D'Amore #define PCI_CAP_ID_REGS_OFF 0x2 /* cap id register offset */ 160*a9800bebSGarrett D'Amore #define PCI_CAP_MAX_PTR 0x30 /* maximum number of cap pointers */ 161*a9800bebSGarrett D'Amore #define PCI_CAP_PTR_OFF 0x40 /* minimum cap pointer offset */ 162*a9800bebSGarrett D'Amore #define PCI_CAP_PTR_MASK 0xFC /* mask for capability pointer */ 163*a9800bebSGarrett D'Amore 164*a9800bebSGarrett D'Amore /* 165*a9800bebSGarrett D'Amore * Capability identifier values 166*a9800bebSGarrett D'Amore */ 167*a9800bebSGarrett D'Amore #define PCI_CAP_ID_PM 0x1 /* power management entry */ 168*a9800bebSGarrett D'Amore #define PCI_CAP_ID_AGP 0x2 /* AGP supported */ 169*a9800bebSGarrett D'Amore #define PCI_CAP_ID_VPD 0x3 /* VPD supported */ 170*a9800bebSGarrett D'Amore #define PCI_CAP_ID_SLOT_ID 0x4 /* Slot Identification supported */ 171*a9800bebSGarrett D'Amore #define PCI_CAP_ID_MSI 0x5 /* MSI supported */ 172*a9800bebSGarrett D'Amore #define PCI_CAP_ID_cPCI_HS 0x6 /* CompactPCI Host Swap supported */ 173*a9800bebSGarrett D'Amore #define PCI_CAP_ID_PCIX 0x7 /* PCI-X supported */ 174*a9800bebSGarrett D'Amore #define PCI_CAP_ID_HT 0x8 /* HyperTransport supported */ 175*a9800bebSGarrett D'Amore #define PCI_CAP_ID_VS 0x9 /* Vendor Specific */ 176*a9800bebSGarrett D'Amore #define PCI_CAP_ID_DEBUG_PORT 0xA /* Debug Port supported */ 177*a9800bebSGarrett D'Amore #define PCI_CAP_ID_cPCI_CRC 0xB /* CompactPCI central resource ctrl */ 178*a9800bebSGarrett D'Amore #define PCI_CAP_ID_PCI_HOTPLUG 0xC /* PCI Hot Plug supported */ 179*a9800bebSGarrett D'Amore #define PCI_CAP_ID_P2P_SUBSYS 0xD /* PCI bridge Sub-system ID */ 180*a9800bebSGarrett D'Amore #define PCI_CAP_ID_AGP_8X 0xE /* AGP 8X supported */ 181*a9800bebSGarrett D'Amore #define PCI_CAP_ID_SECURE_DEV 0xF /* Secure Device supported */ 182*a9800bebSGarrett D'Amore #define PCI_CAP_ID_PCI_E 0x10 /* PCI Express supported */ 183*a9800bebSGarrett D'Amore #define PCI_CAP_ID_MSI_X 0x11 /* MSI-X supported */ 184*a9800bebSGarrett D'Amore #define PCI_CAP_ID_SATA 0x12 /* SATA Data/Index Config supported */ 185*a9800bebSGarrett D'Amore #define PCI_CAP_ID_FLR 0x13 /* Function Level Reset supported */ 186*a9800bebSGarrett D'Amore 187*a9800bebSGarrett D'Amore /* 188*a9800bebSGarrett D'Amore * PCI power management (PM) capability entry offsets 189*a9800bebSGarrett D'Amore */ 190*a9800bebSGarrett D'Amore #define PCI_PMCAP 0x2 /* PM capabilities, 2 bytes */ 191*a9800bebSGarrett D'Amore #define PCI_PMCSR 0x4 /* PM control/status reg, 2 bytes */ 192*a9800bebSGarrett D'Amore #define PCI_PMCSR_BSE 0x6 /* PCI-PCI bridge extensions, 1 byte */ 193*a9800bebSGarrett D'Amore #define PCI_PMDATA 0x7 /* PM data, 1 byte */ 194*a9800bebSGarrett D'Amore 195*a9800bebSGarrett D'Amore /* 196*a9800bebSGarrett D'Amore * PM control/status values - 2 bytes 197*a9800bebSGarrett D'Amore */ 198*a9800bebSGarrett D'Amore #define PCI_PMCSR_D0 0x0 /* power state D0 */ 199*a9800bebSGarrett D'Amore #define PCI_PMCSR_D1 0x1 /* power state D1 */ 200*a9800bebSGarrett D'Amore #define PCI_PMCSR_D2 0x2 /* power state D2 */ 201*a9800bebSGarrett D'Amore #define PCI_PMCSR_D3HOT 0x3 /* power state D3hot */ 202*a9800bebSGarrett D'Amore #endif /* S11 */ 203fcf3ce44SJohn Forte 204fcf3ce44SJohn Forte #include <emlxs_hbaapi.h> 205fcf3ce44SJohn Forte 206291a2b48SSukumar Swaminathan #ifdef FMA_SUPPORT 207291a2b48SSukumar Swaminathan #include <sys/ddifm.h> 208291a2b48SSukumar Swaminathan #include <sys/fm/protocol.h> 209291a2b48SSukumar Swaminathan #include <sys/fm/util.h> 210291a2b48SSukumar Swaminathan #endif /* FMA_SUPPORT */ 211291a2b48SSukumar Swaminathan #include <sys/fm/io/ddi.h> 212fcf3ce44SJohn Forte 213fcf3ce44SJohn Forte #ifdef S11 214fcf3ce44SJohn Forte 215fcf3ce44SJohn Forte /* ULP header files */ 216fcf3ce44SJohn Forte #include <sys/fibre-channel/fc.h> 217fcf3ce44SJohn Forte #include <sys/fibre-channel/impl/fc_fcaif.h> 218fcf3ce44SJohn Forte 219fcf3ce44SJohn Forte #else /* !S11 */ 220fcf3ce44SJohn Forte 221fcf3ce44SJohn Forte /* ULP header files */ 222fcf3ce44SJohn Forte #include <sys/fibre-channel/fcio.h> 223fcf3ce44SJohn Forte #include <sys/fibre-channel/fc.h> 224fcf3ce44SJohn Forte #include <sys/fibre-channel/fc_appif.h> 225fcf3ce44SJohn Forte #include <sys/fibre-channel/fc_types.h> 226fcf3ce44SJohn Forte #include <sys/fibre-channel/impl/fc_error.h> 227fcf3ce44SJohn Forte #include <sys/fibre-channel/impl/fc_fla.h> 228fcf3ce44SJohn Forte #include <sys/fibre-channel/impl/fc_linkapp.h> 229fcf3ce44SJohn Forte #include <sys/fibre-channel/impl/fcal.h> 230fcf3ce44SJohn Forte #include <sys/fibre-channel/impl/fcgs2.h> 231fcf3ce44SJohn Forte #include <sys/fibre-channel/impl/fcph.h> 232fcf3ce44SJohn Forte #include <sys/fibre-channel/impl/fc_ulpif.h> 233fcf3ce44SJohn Forte #include <sys/fibre-channel/impl/fc_fcaif.h> 234fcf3ce44SJohn Forte #include <sys/fibre-channel/impl/fctl.h> 235fcf3ce44SJohn Forte #include <sys/fibre-channel/impl/fctl_private.h> 236fcf3ce44SJohn Forte #include <sys/fibre-channel/ulp/fcp.h> 237fcf3ce44SJohn Forte #include <sys/fibre-channel/ulp/fcp_util.h> 238fcf3ce44SJohn Forte 239fcf3ce44SJohn Forte #endif /* S11 */ 240fcf3ce44SJohn Forte 241fcf3ce44SJohn Forte #ifndef FC_HBA_PORTSPEED_8GBIT 242fcf3ce44SJohn Forte #define FC_HBA_PORTSPEED_8GBIT 16 243fcf3ce44SJohn Forte #endif /* FC_HBA_PORTSPEED_8GBIT */ 244fcf3ce44SJohn Forte 245fcf3ce44SJohn Forte #ifndef FP_DEFAULT_SID 246fcf3ce44SJohn Forte #define FP_DEFAULT_SID (0x000AE) 247fcf3ce44SJohn Forte #endif /* FP_DEFAULT_SID */ 248fcf3ce44SJohn Forte 249fcf3ce44SJohn Forte #ifndef FP_DEFAULT_DID 250fcf3ce44SJohn Forte #define FP_DEFAULT_DID (0x000EA) 251fcf3ce44SJohn Forte #endif /* FP_DEFAULT_DID */ 252fcf3ce44SJohn Forte 253fcf3ce44SJohn Forte #ifdef MSI_SUPPORT 254fcf3ce44SJohn Forte #pragma weak ddi_intr_get_supported_types 255fcf3ce44SJohn Forte #pragma weak ddi_intr_get_nintrs 256fcf3ce44SJohn Forte #pragma weak ddi_intr_add_handler 257fcf3ce44SJohn Forte #pragma weak ddi_intr_remove_handler 258fcf3ce44SJohn Forte #pragma weak ddi_intr_get_hilevel_pri 259fcf3ce44SJohn Forte #pragma weak ddi_intr_enable 260fcf3ce44SJohn Forte #pragma weak ddi_intr_disable 261fcf3ce44SJohn Forte #pragma weak ddi_intr_get_cap 262fcf3ce44SJohn Forte #pragma weak ddi_intr_get_pri 263fcf3ce44SJohn Forte #pragma weak ddi_intr_alloc 264fcf3ce44SJohn Forte #pragma weak ddi_intr_free 265fcf3ce44SJohn Forte #pragma weak ddi_intr_block_enable 266fcf3ce44SJohn Forte #pragma weak ddi_intr_block_disable 267fcf3ce44SJohn Forte extern int ddi_intr_get_supported_types(); 268fcf3ce44SJohn Forte #endif /* MSI_SUPPORT */ 269fcf3ce44SJohn Forte 270fcf3ce44SJohn Forte #ifndef MODSYM_SUPPORT 271fcf3ce44SJohn Forte #pragma weak fc_fca_init 272fcf3ce44SJohn Forte #pragma weak fc_fca_attach 273fcf3ce44SJohn Forte #pragma weak fc_fca_detach 274291a2b48SSukumar Swaminathan #endif /* MODSYM_SUPPORT */ 275fcf3ce44SJohn Forte 276fcf3ce44SJohn Forte /* S11 flag for dma_attr_flags for ddi_dma_attr_t */ 277fcf3ce44SJohn Forte #ifndef DDI_DMA_RELAXED_ORDERING 278fcf3ce44SJohn Forte #define DDI_DMA_RELAXED_ORDERING 0x400 279fcf3ce44SJohn Forte #endif /* DDI_DMA_RELAXED_ORDERING */ 280fcf3ce44SJohn Forte 281291a2b48SSukumar Swaminathan #ifdef FMA_SUPPORT 282291a2b48SSukumar Swaminathan /* FMA Support */ 283291a2b48SSukumar Swaminathan #pragma weak ddi_fm_acc_err_clear 284bb63f56eSSukumar Swaminathan extern void ddi_fm_acc_err_clear(); 285291a2b48SSukumar Swaminathan #endif /* FMA_SUPPORT */ 286fcf3ce44SJohn Forte 287fcf3ce44SJohn Forte #ifdef EMLXS_SPARC 288fcf3ce44SJohn Forte #define EMLXS_BIG_ENDIAN 289fcf3ce44SJohn Forte #endif /* EMLXS_SPARC */ 290fcf3ce44SJohn Forte 291fcf3ce44SJohn Forte #ifdef EMLXS_I386 292fcf3ce44SJohn Forte #define EMLXS_LITTLE_ENDIAN 293fcf3ce44SJohn Forte #endif /* EMLXS_I386 */ 294fcf3ce44SJohn Forte 295fcf3ce44SJohn Forte 296fcf3ce44SJohn Forte /* Solaris 8 does not define this */ 297fcf3ce44SJohn Forte #ifndef TASKQ_DYNAMIC 298291a2b48SSukumar Swaminathan #define TASKQ_DYNAMIC 0x0004 299fcf3ce44SJohn Forte #endif /* TASKQ_DYNAMIC */ 300fcf3ce44SJohn Forte 301fcf3ce44SJohn Forte #ifdef _LP64 302291a2b48SSukumar Swaminathan #define DEAD_PTR 0xdeadbeefdeadbeef 303fcf3ce44SJohn Forte #else 304291a2b48SSukumar Swaminathan #define DEAD_PTR 0xdeadbeef 305fcf3ce44SJohn Forte #endif /* _LP64 */ 306fcf3ce44SJohn Forte 307fcf3ce44SJohn Forte #ifndef FC_STATE_8GBIT_SPEED 308fcf3ce44SJohn Forte /* This was obtained from OpenSolaris */ 309fcf3ce44SJohn Forte #define FC_STATE_8GBIT_SPEED 0x0700 /* 8 Gbit/sec */ 310fcf3ce44SJohn Forte #endif /* FC_STATE_8GBIT_SPEED */ 311fcf3ce44SJohn Forte 312fcf3ce44SJohn Forte #define FC_STATE_QUAD_SPEED 0x0500 313fcf3ce44SJohn Forte 314fcf3ce44SJohn Forte #ifndef BURSTSIZE 315fcf3ce44SJohn Forte #define BURSTSIZE 316291a2b48SSukumar Swaminathan #define BURST1 0x01 317291a2b48SSukumar Swaminathan #define BURST2 0x02 318291a2b48SSukumar Swaminathan #define BURST4 0x04 319291a2b48SSukumar Swaminathan #define BURST8 0x08 320291a2b48SSukumar Swaminathan #define BURST16 0x10 321291a2b48SSukumar Swaminathan #define BURST32 0x20 322291a2b48SSukumar Swaminathan #define BURST64 0x40 323fcf3ce44SJohn Forte #ifdef _LP64 324291a2b48SSukumar Swaminathan #define BURSTSIZE_MASK 0x7f 325fcf3ce44SJohn Forte #else 326291a2b48SSukumar Swaminathan #define BURSTSIZE_MASK 0x3f 327fcf3ce44SJohn Forte #endif /* _LP64 */ 328fcf3ce44SJohn Forte #define DEFAULT_BURSTSIZE (BURSTSIZE_MASK) /* all burst sizes */ 329fcf3ce44SJohn Forte #endif /* BURSTSIZE */ 330fcf3ce44SJohn Forte 33182527734SSukumar Swaminathan #define PADDR_LO(addr) ((uint32_t)(((uint64_t)(addr)) & 0xffffffff)) 33282527734SSukumar Swaminathan #define PADDR_HI(addr) ((uint32_t)(((uint64_t)(addr)) >> 32)) 33382527734SSukumar Swaminathan #define PADDR(high, low) ((uint64_t)((((uint64_t)(high)) << 32) \ 334291a2b48SSukumar Swaminathan | (((uint64_t)(low)) & 0xffffffff))) 335fcf3ce44SJohn Forte 336fcf3ce44SJohn Forte #ifndef TRUE 337fcf3ce44SJohn Forte #define TRUE 1 338fcf3ce44SJohn Forte #endif /* TRUE */ 339fcf3ce44SJohn Forte 340fcf3ce44SJohn Forte #ifndef FALSE 341fcf3ce44SJohn Forte #define FALSE 0 342fcf3ce44SJohn Forte #endif /* FALSE */ 343fcf3ce44SJohn Forte 344291a2b48SSukumar Swaminathan #define DMA_READ_WRITE 0 345291a2b48SSukumar Swaminathan #define DMA_READ_ONLY 1 346291a2b48SSukumar Swaminathan #define DMA_WRITE_ONLY 2 347fcf3ce44SJohn Forte 348291a2b48SSukumar Swaminathan #define DMA_SUCC 1 349fcf3ce44SJohn Forte 350291a2b48SSukumar Swaminathan #define MAX_FC_BRDS 256 /* Maximum # boards per system */ 351fcf3ce44SJohn Forte 352fcf3ce44SJohn Forte #define DELAYMS(ms) drv_usecwait((ms*1000)) 353fcf3ce44SJohn Forte #define DELAYUS(us) drv_usecwait(us) 354fcf3ce44SJohn Forte 35582527734SSukumar Swaminathan #define EMLXS_MPDATA_SYNC(h, a, b, c) \ 356291a2b48SSukumar Swaminathan if (h) { \ 357291a2b48SSukumar Swaminathan (void) ddi_dma_sync((ddi_dma_handle_t)(h), \ 358291a2b48SSukumar Swaminathan (off_t)(a), (size_t)(b), (uint_t)c); \ 359fcf3ce44SJohn Forte } 360fcf3ce44SJohn Forte 361fcf3ce44SJohn Forte #define PKT2PRIV(pkt) ((emlxs_buf_t *)(pkt)->pkt_fca_private) 362fcf3ce44SJohn Forte #define PRIV2PKT(sbp) sbp->pkt 363fcf3ce44SJohn Forte 364fcf3ce44SJohn Forte #define EMLXS_INUMBER 0 365fcf3ce44SJohn Forte #define EMLXS_MSI_INUMBER 0 366fcf3ce44SJohn Forte 367fcf3ce44SJohn Forte #define EMLXS_DMA_ALIGN BURST16 368fcf3ce44SJohn Forte 369fcf3ce44SJohn Forte /* 370291a2b48SSukumar Swaminathan * Register indices in PCI configuration space. 371fcf3ce44SJohn Forte */ 372291a2b48SSukumar Swaminathan #define SBUS_FLASH_RD 0 /* FCODE-Flash Read only */ 373291a2b48SSukumar Swaminathan /* index */ 374291a2b48SSukumar Swaminathan #define SBUS_FLASH_RDWR 1 /* FCODE-Flash Read/Write */ 375291a2b48SSukumar Swaminathan /* index */ 376291a2b48SSukumar Swaminathan #define SBUS_DFLY_SLIM_RINDEX 2 /* DragonFly SLIM regs index */ 377291a2b48SSukumar Swaminathan #define SBUS_DFLY_CSR_RINDEX 3 /* DragonFly I/O regs index */ 378291a2b48SSukumar Swaminathan #define SBUS_TITAN_CORE_RINDEX 4 /* TITAN Core register index */ 379291a2b48SSukumar Swaminathan #define SBUS_DFLY_PCI_CFG_RINDEX 5 /* DragonFly PCI ConfigSpace */ 380291a2b48SSukumar Swaminathan /* regs index */ 381291a2b48SSukumar Swaminathan #define SBUS_TITAN_PCI_CFG_RINDEX 6 /* TITAN PCI ConfigSpace regs */ 382291a2b48SSukumar Swaminathan /* index */ 383291a2b48SSukumar Swaminathan #define SBUS_TITAN_CSR_RINDEX 7 /* TITAN Control/Status regs */ 384291a2b48SSukumar Swaminathan /* index */ 385291a2b48SSukumar Swaminathan 386291a2b48SSukumar Swaminathan #define PCI_CFG_RINDEX 0 387291a2b48SSukumar Swaminathan #define PCI_SLIM_RINDEX 1 388291a2b48SSukumar Swaminathan #define PCI_CSR_RINDEX 2 389fcf3ce44SJohn Forte 39082527734SSukumar Swaminathan #define PCI_BAR1_RINDEX 2 39182527734SSukumar Swaminathan #define PCI_BAR2_RINDEX 3 39282527734SSukumar Swaminathan 39382527734SSukumar Swaminathan 394fcf3ce44SJohn Forte #define EMLXS_MAX_UBUFS 65535 395fcf3ce44SJohn Forte 396fcf3ce44SJohn Forte /* Tokens < EMLXS_UB_TOKEN_OFFSET are reserved for ELS response oxids */ 397291a2b48SSukumar Swaminathan #define EMLXS_UB_TOKEN_OFFSET 0x100 398fcf3ce44SJohn Forte 399291a2b48SSukumar Swaminathan typedef struct emlxs_ub_priv 400291a2b48SSukumar Swaminathan { 401291a2b48SSukumar Swaminathan fc_unsol_buf_t *ubp; 402291a2b48SSukumar Swaminathan void *port; 403fcf3ce44SJohn Forte 404291a2b48SSukumar Swaminathan uint32_t bpl_size; 405291a2b48SSukumar Swaminathan uint8_t *bpl_virt; /* virtual address ptr */ 406291a2b48SSukumar Swaminathan uint64_t bpl_phys; /* mapped address */ 407291a2b48SSukumar Swaminathan void *bpl_data_handle; 408291a2b48SSukumar Swaminathan void *bpl_dma_handle; 409fcf3ce44SJohn Forte 410291a2b48SSukumar Swaminathan uint32_t ip_ub_size; 411291a2b48SSukumar Swaminathan uint8_t *ip_ub_virt; /* virtual address ptr */ 412fcf3ce44SJohn Forte ddi_dma_cookie_t ip_ub_dma_cookies[64]; 413fcf3ce44SJohn Forte ddi_acc_handle_t ip_ub_data_handle; 414fcf3ce44SJohn Forte ddi_dma_handle_t ip_ub_dma_handle; 415291a2b48SSukumar Swaminathan uint32_t ip_ub_cookie_cnt; 416291a2b48SSukumar Swaminathan uint32_t FC4type; 417fcf3ce44SJohn Forte 418291a2b48SSukumar Swaminathan uint16_t flags; 419fcf3ce44SJohn Forte #define EMLXS_UB_FREE 0x0000 420fcf3ce44SJohn Forte #define EMLXS_UB_IN_USE 0x0001 421fcf3ce44SJohn Forte #define EMLXS_UB_REPLY 0x0002 422fcf3ce44SJohn Forte #define EMLXS_UB_RESV 0x0004 423fcf3ce44SJohn Forte #define EMLXS_UB_TIMEOUT 0x0008 424fcf3ce44SJohn Forte #define EMLXS_UB_INTERCEPT 0x0010 425fcf3ce44SJohn Forte 426291a2b48SSukumar Swaminathan uint16_t available; 427fcf3ce44SJohn Forte 428291a2b48SSukumar Swaminathan uint32_t timeout; /* Timeout period in seconds */ 429291a2b48SSukumar Swaminathan uint32_t time; /* EMLXS_UB_IN_USE timestamp */ 430291a2b48SSukumar Swaminathan uint32_t cmd; 431291a2b48SSukumar Swaminathan uint32_t token; 432fcf3ce44SJohn Forte 433fcf3ce44SJohn Forte struct emlxs_unsol_buf *pool; 434fcf3ce44SJohn Forte struct emlxs_ub_priv *next; 435fcf3ce44SJohn Forte } emlxs_ub_priv_t; 436fcf3ce44SJohn Forte 437fcf3ce44SJohn Forte 438291a2b48SSukumar Swaminathan typedef struct emlxs_unsol_buf 439291a2b48SSukumar Swaminathan { 440291a2b48SSukumar Swaminathan struct emlxs_unsol_buf *pool_prev; /* ptr to prev type */ 441291a2b48SSukumar Swaminathan /* of unsol_buf hdr */ 442291a2b48SSukumar Swaminathan struct emlxs_unsol_buf *pool_next; /* ptr to next type */ 443291a2b48SSukumar Swaminathan /* of unsol_buf hdr */ 444fcf3ce44SJohn Forte 445291a2b48SSukumar Swaminathan uint32_t pool_type; /* FC-4 type */ 446291a2b48SSukumar Swaminathan uint32_t pool_buf_size; /* buffer size for */ 447291a2b48SSukumar Swaminathan /* this pool */ 448fcf3ce44SJohn Forte 449291a2b48SSukumar Swaminathan uint32_t pool_nentries; /* no. of bufs in */ 450291a2b48SSukumar Swaminathan /* pool */ 451291a2b48SSukumar Swaminathan uint32_t pool_available; /* no. of bufs avail */ 452291a2b48SSukumar Swaminathan /* in pool */ 453fcf3ce44SJohn Forte 454291a2b48SSukumar Swaminathan uint32_t pool_flags; 455291a2b48SSukumar Swaminathan #define POOL_DESTROY 0x00000001 /* Pool is marked for */ 456291a2b48SSukumar Swaminathan /* destruction */ 457fcf3ce44SJohn Forte 458291a2b48SSukumar Swaminathan uint32_t pool_free; /* Number of free */ 459291a2b48SSukumar Swaminathan /* buffers */ 460291a2b48SSukumar Swaminathan uint32_t pool_free_resv; /* Number of free */ 461291a2b48SSukumar Swaminathan /* reserved buffers */ 462fcf3ce44SJohn Forte 463291a2b48SSukumar Swaminathan uint32_t pool_first_token; /* First token */ 464291a2b48SSukumar Swaminathan /* in pool */ 465291a2b48SSukumar Swaminathan uint32_t pool_last_token; /* Last token */ 466291a2b48SSukumar Swaminathan /* in pool */ 467fcf3ce44SJohn Forte 468291a2b48SSukumar Swaminathan fc_unsol_buf_t *fc_ubufs; /* array of unsol buf */ 469291a2b48SSukumar Swaminathan /* structs */ 470fcf3ce44SJohn Forte } emlxs_unsol_buf_t; 471fcf3ce44SJohn Forte 472fcf3ce44SJohn Forte 473fcf3ce44SJohn Forte #ifndef FC_REASON_NONE 474fcf3ce44SJohn Forte #define FC_REASON_NONE 0 475291a2b48SSukumar Swaminathan #endif /* FC_REASON_NONE */ 476fcf3ce44SJohn Forte 477fcf3ce44SJohn Forte #ifndef FC_ACTION_NONE 478fcf3ce44SJohn Forte #define FC_ACTION_NONE 0 479291a2b48SSukumar Swaminathan #endif /* FC_ACTION_NONE */ 480fcf3ce44SJohn Forte 481fcf3ce44SJohn Forte /* 482fcf3ce44SJohn Forte * emlx status translation table 483fcf3ce44SJohn Forte */ 484291a2b48SSukumar Swaminathan typedef struct emlxs_xlat_err 485291a2b48SSukumar Swaminathan { 486291a2b48SSukumar Swaminathan uint32_t emlxs_status; 487291a2b48SSukumar Swaminathan uint32_t pkt_state; 488291a2b48SSukumar Swaminathan uint32_t pkt_reason; 489291a2b48SSukumar Swaminathan uint32_t pkt_expln; 490291a2b48SSukumar Swaminathan uint32_t pkt_action; 491fcf3ce44SJohn Forte } emlxs_xlat_err_t; 492fcf3ce44SJohn Forte 493fcf3ce44SJohn Forte 494291a2b48SSukumar Swaminathan typedef struct emlxs_table 495291a2b48SSukumar Swaminathan { 496291a2b48SSukumar Swaminathan uint32_t code; 497291a2b48SSukumar Swaminathan char string[32]; 498fcf3ce44SJohn Forte } emlxs_table_t; 499fcf3ce44SJohn Forte 50082527734SSukumar Swaminathan 50182527734SSukumar Swaminathan /* PATCH MASK DEFINES */ 50282527734SSukumar Swaminathan #define EMLXS_PATCH1 0x00000001 50382527734SSukumar Swaminathan #define EMLXS_PATCH2 0x00000002 50482527734SSukumar Swaminathan #define EMLXS_PATCH3 0x00000004 50582527734SSukumar Swaminathan #define EMLXS_PATCH4 0x00000008 50682527734SSukumar Swaminathan #define EMLXS_PATCH5 0x00000010 50782527734SSukumar Swaminathan #define EMLXS_PATCH6 0x00000020 50882527734SSukumar Swaminathan #define EMLXS_PATCH7 0x00000040 50982527734SSukumar Swaminathan #define EMLXS_PATCH8 0x00000080 51082527734SSukumar Swaminathan #define EMLXS_PATCH9 0x00000100 51182527734SSukumar Swaminathan #define EMLXS_PATCH10 0x00000200 51282527734SSukumar Swaminathan #define EMLXS_PATCH11 0x00000400 51382527734SSukumar Swaminathan #define EMLXS_PATCH12 0x00000800 51482527734SSukumar Swaminathan #define EMLXS_PATCH13 0x00001000 51582527734SSukumar Swaminathan #define EMLXS_PATCH14 0x00002000 51682527734SSukumar Swaminathan #define EMLXS_PATCH15 0x00004000 51782527734SSukumar Swaminathan #define EMLXS_PATCH16 0x00008000 51882527734SSukumar Swaminathan #define EMLXS_PATCH17 0x00010000 51982527734SSukumar Swaminathan #define EMLXS_PATCH18 0x00020000 52082527734SSukumar Swaminathan #define EMLXS_PATCH19 0x00040000 52182527734SSukumar Swaminathan #define EMLXS_PATCH20 0x00080000 52282527734SSukumar Swaminathan #define EMLXS_PATCH21 0x00100000 52382527734SSukumar Swaminathan #define EMLXS_PATCH22 0x00200000 52482527734SSukumar Swaminathan #define EMLXS_PATCH23 0x00400000 52582527734SSukumar Swaminathan #define EMLXS_PATCH24 0x00800000 52682527734SSukumar Swaminathan #define EMLXS_PATCH25 0x01000000 52782527734SSukumar Swaminathan #define EMLXS_PATCH26 0x02000000 52882527734SSukumar Swaminathan #define EMLXS_PATCH27 0x04000000 52982527734SSukumar Swaminathan #define EMLXS_PATCH28 0x08000000 53082527734SSukumar Swaminathan #define EMLXS_PATCH29 0x10000000 53182527734SSukumar Swaminathan #define EMLXS_PATCH30 0x20000000 53282527734SSukumar Swaminathan #define EMLXS_PATCH31 0x40000000 53382527734SSukumar Swaminathan #define EMLXS_PATCH32 0x80000000 53482527734SSukumar Swaminathan 53582527734SSukumar Swaminathan 53682527734SSukumar Swaminathan /* ULP Patches: */ 53782527734SSukumar Swaminathan 53882527734SSukumar Swaminathan /* This patch enables the driver to auto respond to unsolicited LOGO's */ 53982527734SSukumar Swaminathan /* This is needed because ULP is sometimes doesn't reply itself */ 54082527734SSukumar Swaminathan #define ULP_PATCH2 EMLXS_PATCH2 54182527734SSukumar Swaminathan 54282527734SSukumar Swaminathan /* This patch enables the driver to auto respond to unsolicited PRLI's */ 54382527734SSukumar Swaminathan /* This is needed because ULP is known to panic sometimes */ 54482527734SSukumar Swaminathan #define ULP_PATCH3 EMLXS_PATCH3 54582527734SSukumar Swaminathan 54682527734SSukumar Swaminathan /* This patch enables the driver to auto respond to unsolicited PRLO's */ 54782527734SSukumar Swaminathan /* This is needed because ULP is known to panic sometimes */ 54882527734SSukumar Swaminathan #define ULP_PATCH4 EMLXS_PATCH4 54982527734SSukumar Swaminathan 55082527734SSukumar Swaminathan /* This patch enables the driver to fail pkt abort requests */ 55182527734SSukumar Swaminathan #define ULP_PATCH5 EMLXS_PATCH5 55282527734SSukumar Swaminathan 55382527734SSukumar Swaminathan /* This patch enables the driver to generate an RSCN for unsolicited PRLO's */ 55482527734SSukumar Swaminathan /* and LOGO's */ 55582527734SSukumar Swaminathan #define ULP_PATCH6 EMLXS_PATCH6 55682527734SSukumar Swaminathan 55782527734SSukumar Swaminathan /* Sun Disk Array Patches: */ 55882527734SSukumar Swaminathan 55982527734SSukumar Swaminathan /* This patch enables the driver to fix a residual underrun issue with */ 56082527734SSukumar Swaminathan /* check conditions */ 56182527734SSukumar Swaminathan #define FCP_UNDERRUN_PATCH1 EMLXS_PATCH9 56282527734SSukumar Swaminathan 56382527734SSukumar Swaminathan /* This patch enables the driver to fix a residual underrun issue with */ 56482527734SSukumar Swaminathan /* SCSI inquiry commands */ 56582527734SSukumar Swaminathan #define FCP_UNDERRUN_PATCH2 EMLXS_PATCH10 56682527734SSukumar Swaminathan 56782527734SSukumar Swaminathan 56882527734SSukumar Swaminathan #define DEFAULT_PATCHES (ULP_PATCH2 | ULP_PATCH3 | \ 56982527734SSukumar Swaminathan ULP_PATCH5 | ULP_PATCH6 | \ 57082527734SSukumar Swaminathan FCP_UNDERRUN_PATCH1 | FCP_UNDERRUN_PATCH2) 57182527734SSukumar Swaminathan 572fcf3ce44SJohn Forte #ifdef __cplusplus 573fcf3ce44SJohn Forte } 574fcf3ce44SJohn Forte #endif 575fcf3ce44SJohn Forte 576fcf3ce44SJohn Forte #endif /* _EMLXS_OS_H */ 577