xref: /illumos-gate/usr/src/uts/common/sys/fibre-channel/fca/emlxs/emlxs_fc.h (revision a3170057)

/*
 * CDDL HEADER START
 *
 * The contents of this file are subject to the terms of the
 * Common Development and Distribution License (the "License").
 * You may not use this file except in compliance with the License.
 *
 * You can obtain a copy of the license at
 * http://www.opensource.org/licenses/cddl1.txt.
 * See the License for the specific language governing permissions
 * and limitations under the License.
 *
 * When distributing Covered Code, include this CDDL HEADER in each
 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
 * If applicable, add the following below this CDDL HEADER, with the
 * fields enclosed by brackets "[]" replaced with your own identifying
 * information: Portions Copyright [yyyy] [name of copyright owner]
 *
 * CDDL HEADER END
 */

/*
 * Copyright (c) 2004-2012 Emulex. All rights reserved.
 * Use is subject to license terms.
 * Copyright 2018 OmniOS Community Edition (OmniOSce) Association.
 * Copyright 2020 RackTop Systems, Inc.
 */

#ifndef _EMLXS_FC_H
#define	_EMLXS_FC_H

#ifdef	__cplusplus
extern "C" {
#endif

typedef struct emlxs_buf
{
	fc_packet_t		*pkt;		/* scsi_pkt reference */
	struct emlxs_port	*port;		/* pointer to port */
	void			*bmp;		/* Save the buffer pointer */
						/* list for later use. */
	struct emlxs_buf	*fc_fwd;	/* Use it by chip_Q */
	struct emlxs_buf	*fc_bkwd;	/* Use it by chip_Q */
	struct emlxs_buf	*next;		/* Use it when the iodone */
	struct emlxs_node 	*node;
	void			*channel;	/* Save channel and used by */
						/* abort */
	struct emlxs_buf	*fpkt;		/* Flush pkt pointer */
	struct XRIobj		*xrip;		/* Exchange resource */
	IOCBQ			iocbq;
	kmutex_t		mtx;
	uint32_t		pkt_flags;
	uint32_t		iotag;		/* iotag for this cmd */
	uint32_t		ticks;		/* save the timeout ticks */
						/* for the fc_packet_t */
	uint32_t		abort_attempts;
	uint32_t		lun;
#define	EMLXS_LUN_NONE		0xFFFFFFFF

	uint32_t		class;		/* Save class and used by */
						/* abort */
	uint32_t		ucmd;		/* Unsolicted command that */
						/* this packet is responding */
						/* to, if any */
	int32_t			flush_count;	/* Valid only in flush pkts */
	uint32_t		did;

#ifdef SFCT_SUPPORT
	kmutex_t		fct_mtx;
	fc_packet_t		*fct_pkt;
	fct_cmd_t		*fct_cmd;

	uint8_t			fct_type;

#define	EMLXS_FCT_ELS_CMD		0x01	/* Unsolicted */
#define	EMLXS_FCT_ELS_REQ		0x02	/* Solicited */
#define	EMLXS_FCT_ELS_RSP		0x04
#define	EMLXS_FCT_CT_REQ		0x08	/* Solicited */
#define	EMLXS_FCT_FCP_CMD		0x10	/* Unsolicted */
#define	EMLXS_FCT_FCP_DATA		0x20
#define	EMLXS_FCT_FCP_STATUS		0x40


	uint8_t			fct_flags;

#define	EMLXS_FCT_SEND_STATUS		0x01
#define	EMLXS_FCT_ABORT_INP		0x02
#define	EMLXS_FCT_IO_INP		0x04
#define	EMLXS_FCT_PLOGI_RECEIVED	0x10
#define	EMLXS_FCT_REGISTERED		0x20

	uint16_t		fct_state;

#define	EMLXS_FCT_FCP_CMD_RECEIVED	1
#define	EMLXS_FCT_ELS_CMD_RECEIVED	2
#define	EMLXS_FCT_CMD_POSTED		3
#define	EMLXS_FCT_CMD_WAITQ		4
#define	EMLXS_FCT_SEND_CMD_RSP		5
#define	EMLXS_FCT_SEND_ELS_RSP		6
#define	EMLXS_FCT_SEND_ELS_REQ		7
#define	EMLXS_FCT_SEND_CT_REQ		8
#define	EMLXS_FCT_RSP_PENDING		9
#define	EMLXS_FCT_REQ_PENDING		10
#define	EMLXS_FCT_REG_PENDING		11
#define	EMLXS_FCT_REG_COMPLETE		12
#define	EMLXS_FCT_OWNED			13
#define	EMLXS_FCT_SEND_FCP_DATA		14
#define	EMLXS_FCT_SEND_FCP_STATUS	15
#define	EMLXS_FCT_DATA_PENDING		16
#define	EMLXS_FCT_STATUS_PENDING	17
#define	EMLXS_FCT_PKT_COMPLETE		18
#define	EMLXS_FCT_PKT_FCPRSP_COMPLETE	19
#define	EMLXS_FCT_PKT_ELSRSP_COMPLETE	20
#define	EMLXS_FCT_PKT_ELSCMD_COMPLETE	21
#define	EMLXS_FCT_PKT_CTCMD_COMPLETE	22
#define	EMLXS_FCT_REQ_COMPLETE		23
#define	EMLXS_FCT_CLOSE_PENDING		24
#define	EMLXS_FCT_ABORT_PENDING		25
#define	EMLXS_FCT_ABORT_DONE		26
#define	EMLXS_FCT_IO_DONE		27

#define	EMLXS_FCT_IOCB_ISSUED		256 /* For tracing only */
#define	EMLXS_FCT_IOCB_COMPLETE		257 /* For tracing only */

	stmf_data_buf_t		*fct_buf;

#endif /* SFCT_SUPPORT */

#ifdef SAN_DIAG_SUPPORT
	hrtime_t		sd_start_time;
#endif /* SAN_DIAG_SUPPORT */

} emlxs_buf_t;



#ifdef FCT_IO_TRACE
#define	EMLXS_FCT_STATE_CHG(_fct_cmd, _cmd_sbp, _state)	\
	(_cmd_sbp)->fct_state = _state;			\
	emlxs_fct_io_trace((_cmd_sbp)->port, _fct_cmd, _state)
#else
/* define to set fct_state */
#define	EMLXS_FCT_STATE_CHG(_fct_cmd, _cmd_sbp, _state)	\
	(_cmd_sbp)->fct_state = _state
#endif /* FCT_IO_TRACE */


/* pkt_flags */
#define	PACKET_IN_COMPLETION	0x00000001
#define	PACKET_IN_TXQ		0x00000002
#define	PACKET_IN_CHIPQ		0x00000004
#define	PACKET_IN_DONEQ		0x00000008

#define	PACKET_FCP_RESET	0x00000030
#define	PACKET_FCP_TGT_RESET	0x00000010
#define	PACKET_FCP_LUN_RESET	0x00000020
#define	PACKET_POLLED		0x00000040

#ifdef EMLXS_I386
#define	PACKET_FCP_SWAPPED	0x00000100
#define	PACKET_ELS_SWAPPED	0x00000200
#define	PACKET_CT_SWAPPED	0x00000400
#define	PACKET_CSP_SWAPPED	0x00000800
#endif	/* EMLXS_I386 */

#define	PACKET_STALE		0x00001000

#define	PACKET_IN_TIMEOUT	0x00010000
#define	PACKET_IN_FLUSH		0x00020000
#define	PACKET_IN_ABORT		0x00040000
#define	PACKET_XRI_CLOSED	0x00080000 /* An XRI abort/close was issued */

#define	PACKET_CHIP_COMP	0x00100000
#define	PACKET_COMPLETED	0x00200000
#define	PACKET_ULP_OWNED	0x00400000

#define	PACKET_STATE_VALID	0x01000000
#define	PACKET_FCP_RSP_VALID	0x02000000
#define	PACKET_ELS_RSP_VALID	0x04000000
#define	PACKET_CT_RSP_VALID	0x08000000

#define	PACKET_DELAY_REQUIRED	0x10000000
#define	PACKET_ALLOCATED	0x40000000
#define	PACKET_VALID		0x80000000


#define	STALE_PACKET		((emlxs_buf_t *)0xFFFFFFFF)


/*
 * From fc_error.h pkt_reason (except for state = NPORT_RJT, FABRIC_RJT,
 * NPORT_BSY, FABRIC_BSY, LS_RJT, BA_RJT, FS_RJT)
 *
 * FCA unique error codes can begin after FC_REASON_FCA_UNIQUE.
 * Each FCA defines its own set with values greater >= 0x7F
 */
#define	FC_REASON_FCA_DEFINED   0x100


/*
 * Device VPD save area
 */

typedef struct emlxs_vpd
{
	uint32_t	biuRev;
	uint32_t	smRev;
	uint32_t	smFwRev;
	uint32_t	endecRev;
	uint16_t	rBit;
	uint8_t		fcphHigh;
	uint8_t		fcphLow;
	uint8_t		feaLevelHigh;
	uint8_t		feaLevelLow;

	uint32_t	postKernRev;
	char		postKernName[32];

	uint32_t	opFwRev;
	char		opFwName[32];
	char		opFwLabel[32];

	uint32_t	sli1FwRev;
	char		sli1FwName[32];
	char		sli1FwLabel[32];

	uint32_t	sli2FwRev;
	char		sli2FwName[32];
	char		sli2FwLabel[32];

	uint32_t	sli3FwRev;
	char		sli3FwName[32];
	char		sli3FwLabel[32];

	uint32_t	sli4FwRev;
	char		sli4FwName[32];
	char		sli4FwLabel[32];

	char		fw_version[32];
	char		fw_label[32];

	char		fcode_version[32];
	char		boot_version[32];

	char		serial_num[32];
	char		part_num[32];
	char		port_num[20];
	char		eng_change[32];
	char		manufacturer[80];
	char		model[80];
	char		model_desc[256];
	char		prog_types[256];
	char		id[256];

	uint32_t	port_index;
	uint16_t	link_speed;
} emlxs_vpd_t;


typedef struct emlxs_queue
{
	void		*q_first;	/* queue first element */
	void		*q_last;	/* queue last element */
	uint16_t	q_cnt;	/* current length of queue */
	uint16_t	q_max;	/* max length queue can get */
} emlxs_queue_t;
typedef emlxs_queue_t Q;



/*
 * This structure is used when allocating a buffer pool.
 * Note: this should be identical to gasket buf_info (fldl.h).
 */
typedef struct emlxs_buf_info
{
	int32_t		size;	/* Specifies the number of bytes to allocate. */
	int32_t		align;	/* The desired address boundary. */

	int32_t		flags;

#define	FC_MBUF_DMA		0x01	/* blocks are for DMA */
#define	FC_MBUF_PHYSONLY	0x02	/* For malloc - map a given virtual */
					/* address to physical address (skip */
					/* the malloc). */
					/* For free - just unmap the given */
					/* physical address (skip the free). */
#define	FC_MBUF_IOCTL		0x04	/* called from dfc_ioctl */
#define	FC_MBUF_UNLOCK		0x08	/* called with driver unlocked */
#define	FC_MBUF_SNGLSG		0x10	/* allocate a single contiguous */
					/* physical memory */

	uint64_t	phys;		/* specifies physical buffer pointer */
	void		*virt;		/* specifies virtual buffer pointer */
	void		*data_handle;
	void		*dma_handle;
} emlxs_buf_info_t;
typedef emlxs_buf_info_t MBUF_INFO;


#define	EMLXS_MAX_HBQ   	16	/* Max HBQs handled by firmware */
#define	EMLXS_ELS_HBQ_ID	0
#define	EMLXS_IP_HBQ_ID		1
#define	EMLXS_CT_HBQ_ID		2
#define	EMLXS_FCT_HBQ_ID	3

#ifdef SFCT_SUPPORT
#define	EMLXS_NUM_HBQ		4	/* Number of HBQs supported by driver */
#else
#define	EMLXS_NUM_HBQ		3	/* Number of HBQs supported by driver */
#endif /* SFCT_SUPPORT */


/*
 * An IO Channel is a object that comprises a xmit/cmpl
 * path for IOs.
 * For SLI3, an IO path maps to a ring (cmd/rsp)
 * For SLI4, an IO path map to a queue pair (WQ/CQ)
 */
typedef struct emlxs_channel
{
	struct emlxs_hba *hba;			/* ptr to hba for channel */
	void		*iopath;		/* ptr to SLI3/4 io path */

	kmutex_t	rsp_lock;
	IOCBQ		*rsp_head;	/* deferred completion head */
	IOCBQ		*rsp_tail;	/* deferred completion tail */
	emlxs_thread_t  intr_thread;


	uint16_t	channelno;
	uint16_t	chan_flag;

#define	EMLXS_NEEDS_TRIGGER 1

	/* Protected by EMLXS_TX_CHANNEL_LOCK */
	emlxs_queue_t	nodeq;			/* Node service queue */

	kmutex_t	channel_cmd_lock;
	uint32_t	timeout;

	/* Channel command counters */
	uint32_t	ulpSendCmd;
	uint32_t	ulpCmplCmd;
	uint32_t	hbaSendCmd;
	uint32_t	hbaCmplCmd;
	uint32_t	hbaSendCmd_sbp;
	uint32_t	hbaCmplCmd_sbp;

} emlxs_channel_t;
typedef emlxs_channel_t CHANNEL;

/*
 * Should be able to handle max number of io paths for a
 * SLI4 HBA (EMLXS_MAX_WQS) or for a SLI3 HBA (MAX_RINGS)
 */
#define	MAX_CHANNEL EMLXS_MSI_MAX_INTRS


/* Structure used to access adapter rings */
typedef struct emlxs_ring
{
	void		*fc_cmdringaddr;	/* virtual offset for cmd */
						/* rings */
	void		*fc_rspringaddr;	/* virtual offset for rsp */
						/* rings */

	void		*fc_mpon;		/* index ptr for match */
						/* structure */
	void		*fc_mpoff;		/* index ptr for match */
						/* structure */
	struct emlxs_hba *hba;			/* ptr to hba for ring */

	uint8_t		fc_numCiocb;		/* number of command iocb's */
						/* per ring */
	uint8_t		fc_numRiocb;		/* number of response iocb's */
						/* per ring */
	uint8_t		fc_rspidx;		/* current index in response */
						/* ring */
	uint8_t		fc_cmdidx;		/* current index in command */
						/* ring */
	uint8_t		fc_port_rspidx;
	uint8_t		fc_port_cmdidx;
	uint8_t		ringno;

	uint16_t	fc_missbufcnt;		/* buf cnt we need to repost */
	CHANNEL		*channelp;


} emlxs_ring_t;
typedef emlxs_ring_t RING;


#ifdef SAN_DIAG_SUPPORT
/*
 * Although right now it's just 1 field, SAN Diag anticipates that this
 * structure will grow in the future.
 */
typedef struct sd_timestat_level0 {
	int		count;
} sd_timestat_level0_t;
#endif

typedef struct emlxs_node
{
	struct emlxs_node	*nlp_list_next;
	struct emlxs_node	*nlp_list_prev;

	NAME_TYPE		nlp_portname;	/* port name */
	NAME_TYPE		nlp_nodename;	/* node name */

	uint32_t		nlp_DID;	/* fibre channel D_ID */

	uint16_t		nlp_Rpi;	/* login id returned by */
						/* REG_LOGIN */
	uint16_t		nlp_Xri;	/* login id returned by */
						/* REG_LOGIN */

	uint8_t			nlp_fcp_info;	/* Remote class info */

	/* nlp_fcp_info */
#define	NLP_FCP_TGT_DEVICE	0x10	/* FCP TGT device */
#define	NLP_FCP_INI_DEVICE	0x20	/* FCP Initiator device */
#define	NLP_FCP_2_DEVICE	0x40	/* FCP-2 TGT device */
#define	NLP_EMLX_VPORT		0x80    /* Virtual port */

	uint8_t			dfc_state;
#define	EMLXS_SET_DFC_STATE(_n, _state)	if (_n && _n->nlp_active)\
		{(_n)->dfc_state = (_state); }

	uint32_t		nlp_force_rscn;
	uint32_t		nlp_tag;	/* Tag used by port_offline */
	uint32_t		flag;

#define	NODE_POOL_ALLOCATED 	0x00000001

	SERV_PARM		sparm;

	/* Protected by EMLXS_TX_CHANNEL_LOCK */
	uint32_t		nlp_active;	/* Node active flag */
	uint32_t		nlp_base;
	uint32_t		nlp_flag[MAX_CHANNEL];	/* Node level channel */
							/* flags */

	/* nlp_flag */
#define	NLP_CLOSED		0x1
#define	NLP_OFFLINE		0x2
#define	NLP_RPI_XRI		0x4

	uint32_t		nlp_tics[MAX_CHANNEL];	/* gate timeout */
	emlxs_queue_t		nlp_tx[MAX_CHANNEL];	/* Transmit Q head */
	emlxs_queue_t		nlp_ptx[MAX_CHANNEL];	/* Priority transmit */
							/* Queue head */
	void			*nlp_next[MAX_CHANNEL];	/* Service Request */
							/* Queue pointer used */
							/* when node needs */
							/* servicing */
#ifdef DHCHAP_SUPPORT
	emlxs_node_dhc_t	node_dhc;
#endif	/* DHCHAP_SUPPORT */

#ifdef SAN_DIAG_SUPPORT
	sd_timestat_level0_t	sd_dev_bucket[SD_IO_LATENCY_MAX_BUCKETS];
#endif

	struct RPIobj		*rpip;	/* SLI4 only */
#define	EMLXS_NODE_TO_RPI(_p, _n)	\
	((_n)?((_n->rpip)?_n->rpip:emlxs_rpi_find(_p, _n->nlp_Rpi)):NULL)

#ifdef NODE_THROTTLE_SUPPORT
	uint32_t io_throttle;
	uint32_t io_active;
#endif /* NODE_THROTTLE_SUPPORT */

} emlxs_node_t;
typedef emlxs_node_t NODELIST;



#define	NADDR_LEN	6	/* MAC network address length */
typedef struct emlxs_fcip_nethdr
{
	NAME_TYPE	fc_destname;	/* destination port name */
	NAME_TYPE	fc_srcname;	/* source port name */
} emlxs_fcip_nethdr_t;
typedef emlxs_fcip_nethdr_t NETHDR;


#define	MEM_NLP		0	/* memory segment to hold node list entries */
#define	MEM_IOCB	1	/* memory segment to hold iocb commands */
#define	MEM_MBOX	2	/* memory segment to hold mailbox cmds  */
#define	MEM_BPL		3	/* and to hold buffer ptr lists - SLI2   */
#define	MEM_BUF		4	/* memory segment to hold buffer data   */
#define	MEM_ELSBUF	4	/* memory segment to hold buffer data   */
#define	MEM_IPBUF	5	/* memory segment to hold IP buffer data */
#define	MEM_CTBUF	6	/* memory segment to hold CT buffer data */
#define	MEM_FCTBUF	7	/* memory segment to hold FCT buffer data */
#define MEM_SGL1K	8	/* memory segment to hold 1K SGL entries */
#define MEM_SGL2K	9	/* memory segment to hold 2K SGL entries */
#define MEM_SGL4K	10	/* memory segment to hold 4K SGL entries */

#ifdef SFCT_SUPPORT
#define	FC_MAX_SEG	11
#define	MEM_FCTSEG	13 /* must be greater than FC_MAX_SEG */
#else
#define	FC_MAX_SEG	10
#endif /* SFCT_SUPPORT */


/* A BPL entry is 12 bytes. Subtract 2 for command and response buffers */
#define	BPL_TO_SGLLEN(_bpl)	((_bpl/12)-2)
#define	MEM_BPL_SIZE		36 /* Default size */

/* A SGL entry is 16 bytes. Subtract 2 for command and response buffers */
#define	SGL_TO_SGLLEN(_sgl)	((_sgl/16)-2)
#define	MEM_SGL_SIZE		4096 /* Default size */

#define	MEM_BUF_SIZE		1024
#define	MEM_BUF_COUNT		64

#define	MEM_ELSBUF_SIZE   	MEM_BUF_SIZE
#define	MEM_ELSBUF_COUNT  	hba->max_nodes
#define	MEM_IPBUF_SIZE  	65535
#define	MEM_IPBUF_COUNT		60
#define	MEM_CTBUF_SIZE		MAX_CT_PAYLOAD	/* (1024*320) */
#define	MEM_CTBUF_COUNT		8
#define	MEM_FCTBUF_SIZE  	65535
#define	MEM_FCTBUF_COUNT	128

typedef struct emlxs_memseg
{
	void			*fc_memget_ptr;
	void			*fc_memget_end;
	void			*fc_memput_ptr;
	void			*fc_memput_end;

	uint32_t		fc_total_memsize;
	uint32_t		fc_memsize;		/* size of mem blks */
	uint32_t		fc_numblks;		/* no of mem blks */
	uint32_t		fc_memget_cnt;		/* no of mem get blks */
	uint32_t		fc_memput_cnt;		/* no of mem put blks */
	uint32_t		fc_memflag;  /* emlxs_buf_info_t FLAGS */
#define	FC_MEMSEG_PUT_ENABLED	0x20000000
#define	FC_MEMSEG_GET_ENABLED	0x40000000
#define	FC_MEMSEG_DYNAMIC	0x80000000

	uint32_t		fc_memalign;
	uint32_t		fc_memtag;
	char			fc_label[32];

	uint32_t		fc_hi_water;
	uint32_t		fc_lo_water;
	uint32_t		fc_step;  /* Dyn increment.  Zero = static */
	uint32_t		fc_low;   /* Lowest free count (dyn only) */
	uint32_t		fc_last;  /* Last fc_numblks (dyn only) */

} emlxs_memseg_t;
typedef emlxs_memseg_t MEMSEG;


/* Board stat counters */