1fcf3ce44SJohn Forte /* 2fcf3ce44SJohn Forte * CDDL HEADER START 3fcf3ce44SJohn Forte * 4fcf3ce44SJohn Forte * The contents of this file are subject to the terms of the 5fcf3ce44SJohn Forte * Common Development and Distribution License (the "License"). 6fcf3ce44SJohn Forte * You may not use this file except in compliance with the License. 7fcf3ce44SJohn Forte * 8fcf3ce44SJohn Forte * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9fcf3ce44SJohn Forte * or http://www.opensolaris.org/os/licensing. 10fcf3ce44SJohn Forte * See the License for the specific language governing permissions 11fcf3ce44SJohn Forte * and limitations under the License. 12fcf3ce44SJohn Forte * 13fcf3ce44SJohn Forte * When distributing Covered Code, include this CDDL HEADER in each 14fcf3ce44SJohn Forte * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15fcf3ce44SJohn Forte * If applicable, add the following below this CDDL HEADER, with the 16fcf3ce44SJohn Forte * fields enclosed by brackets "[]" replaced with your own identifying 17fcf3ce44SJohn Forte * information: Portions Copyright [yyyy] [name of copyright owner] 18fcf3ce44SJohn Forte * 19fcf3ce44SJohn Forte * CDDL HEADER END 20fcf3ce44SJohn Forte */ 21fcf3ce44SJohn Forte 22fcf3ce44SJohn Forte /* 23bce54adfSSukumar Swaminathan * Copyright 2010 Emulex. All rights reserved. 2482527734SSukumar Swaminathan * Use is subject to license terms. 25fcf3ce44SJohn Forte */ 26fcf3ce44SJohn Forte 27fcf3ce44SJohn Forte #ifndef _EMLXS_FC_H 28fcf3ce44SJohn Forte #define _EMLXS_FC_H 29fcf3ce44SJohn Forte 30fcf3ce44SJohn Forte #ifdef __cplusplus 31fcf3ce44SJohn Forte extern "C" { 32fcf3ce44SJohn Forte #endif 33fcf3ce44SJohn Forte 34291a2b48SSukumar Swaminathan typedef struct emlxs_buf 35291a2b48SSukumar Swaminathan { 36291a2b48SSukumar Swaminathan fc_packet_t *pkt; /* scsi_pkt reference */ 37291a2b48SSukumar Swaminathan struct emlxs_port *port; /* pointer to port */ 38291a2b48SSukumar Swaminathan void *bmp; /* Save the buffer pointer */ 39291a2b48SSukumar Swaminathan /* list for later use. */ 40291a2b48SSukumar Swaminathan struct emlxs_buf *fc_fwd; /* Use it by chip_Q */ 41291a2b48SSukumar Swaminathan struct emlxs_buf *fc_bkwd; /* Use it by chip_Q */ 42291a2b48SSukumar Swaminathan struct emlxs_buf *next; /* Use it when the iodone */ 43*a9800bebSGarrett D'Amore struct emlxs_node *node; 4482527734SSukumar Swaminathan void *channel; /* Save channel and used by */ 45291a2b48SSukumar Swaminathan /* abort */ 4682527734SSukumar Swaminathan struct emlxs_buf *fpkt; /* Flush pkt pointer */ 47*a9800bebSGarrett D'Amore struct XRIobj *xrip; /* Exchange resource */ 48291a2b48SSukumar Swaminathan IOCBQ iocbq; 49291a2b48SSukumar Swaminathan kmutex_t mtx; 50291a2b48SSukumar Swaminathan uint32_t pkt_flags; 51291a2b48SSukumar Swaminathan uint32_t iotag; /* iotag for this cmd */ 52291a2b48SSukumar Swaminathan uint32_t ticks; /* save the timeout ticks */ 53291a2b48SSukumar Swaminathan /* for the fc_packet_t */ 54291a2b48SSukumar Swaminathan uint32_t abort_attempts; 55*a9800bebSGarrett D'Amore uint32_t lun; 56*a9800bebSGarrett D'Amore #define EMLXS_LUN_NONE 0xFFFFFFFF 57*a9800bebSGarrett D'Amore 58291a2b48SSukumar Swaminathan uint32_t class; /* Save class and used by */ 59291a2b48SSukumar Swaminathan /* abort */ 60291a2b48SSukumar Swaminathan uint32_t ucmd; /* Unsolicted command that */ 61291a2b48SSukumar Swaminathan /* this packet is responding */ 62291a2b48SSukumar Swaminathan /* to, if any */ 63291a2b48SSukumar Swaminathan int32_t flush_count; /* Valid only in flush pkts */ 64291a2b48SSukumar Swaminathan uint32_t did; 65fcf3ce44SJohn Forte 66fcf3ce44SJohn Forte #ifdef SFCT_SUPPORT 67291a2b48SSukumar Swaminathan kmutex_t fct_mtx; 68291a2b48SSukumar Swaminathan fc_packet_t *fct_pkt; 69291a2b48SSukumar Swaminathan fct_cmd_t *fct_cmd; 70fcf3ce44SJohn Forte 71291a2b48SSukumar Swaminathan uint8_t fct_type; 72fcf3ce44SJohn Forte 73fcf3ce44SJohn Forte #define EMLXS_FCT_ELS_CMD 0x01 /* Unsolicted */ 74fcf3ce44SJohn Forte #define EMLXS_FCT_ELS_REQ 0x02 /* Solicited */ 75fcf3ce44SJohn Forte #define EMLXS_FCT_ELS_RSP 0x04 76fcf3ce44SJohn Forte #define EMLXS_FCT_CT_REQ 0x08 /* Solicited */ 77fcf3ce44SJohn Forte #define EMLXS_FCT_FCP_CMD 0x10 /* Unsolicted */ 78fcf3ce44SJohn Forte #define EMLXS_FCT_FCP_DATA 0x20 79fcf3ce44SJohn Forte #define EMLXS_FCT_FCP_STATUS 0x40 80fcf3ce44SJohn Forte 81fcf3ce44SJohn Forte 82291a2b48SSukumar Swaminathan uint8_t fct_flags; 83fcf3ce44SJohn Forte 84fcf3ce44SJohn Forte #define EMLXS_FCT_SEND_STATUS 0x01 8582527734SSukumar Swaminathan #define EMLXS_FCT_ABORT_INP 0x02 8682527734SSukumar Swaminathan #define EMLXS_FCT_IO_INP 0x04 87*a9800bebSGarrett D'Amore #define EMLXS_FCT_PLOGI_RECEIVED 0x10 88*a9800bebSGarrett D'Amore #define EMLXS_FCT_REGISTERED 0x20 89291a2b48SSukumar Swaminathan 90291a2b48SSukumar Swaminathan uint16_t fct_state; 91291a2b48SSukumar Swaminathan 92291a2b48SSukumar Swaminathan #define EMLXS_FCT_FCP_CMD_RECEIVED 1 93291a2b48SSukumar Swaminathan #define EMLXS_FCT_ELS_CMD_RECEIVED 2 94291a2b48SSukumar Swaminathan #define EMLXS_FCT_CMD_POSTED 3 95291a2b48SSukumar Swaminathan #define EMLXS_FCT_CMD_WAITQ 4 9682527734SSukumar Swaminathan #define EMLXS_FCT_SEND_CMD_RSP 5 9782527734SSukumar Swaminathan #define EMLXS_FCT_SEND_ELS_RSP 6 9882527734SSukumar Swaminathan #define EMLXS_FCT_SEND_ELS_REQ 7 9982527734SSukumar Swaminathan #define EMLXS_FCT_SEND_CT_REQ 8 10082527734SSukumar Swaminathan #define EMLXS_FCT_RSP_PENDING 9 10182527734SSukumar Swaminathan #define EMLXS_FCT_REQ_PENDING 10 10282527734SSukumar Swaminathan #define EMLXS_FCT_REG_PENDING 11 10382527734SSukumar Swaminathan #define EMLXS_FCT_REG_COMPLETE 12 10482527734SSukumar Swaminathan #define EMLXS_FCT_OWNED 13 10582527734SSukumar Swaminathan #define EMLXS_FCT_SEND_FCP_DATA 14 10682527734SSukumar Swaminathan #define EMLXS_FCT_SEND_FCP_STATUS 15 10782527734SSukumar Swaminathan #define EMLXS_FCT_DATA_PENDING 16 10882527734SSukumar Swaminathan #define EMLXS_FCT_STATUS_PENDING 17 10982527734SSukumar Swaminathan #define EMLXS_FCT_PKT_COMPLETE 18 11082527734SSukumar Swaminathan #define EMLXS_FCT_PKT_FCPRSP_COMPLETE 19 11182527734SSukumar Swaminathan #define EMLXS_FCT_PKT_ELSRSP_COMPLETE 20 11282527734SSukumar Swaminathan #define EMLXS_FCT_PKT_ELSCMD_COMPLETE 21 11382527734SSukumar Swaminathan #define EMLXS_FCT_PKT_CTCMD_COMPLETE 22 11482527734SSukumar Swaminathan #define EMLXS_FCT_REQ_COMPLETE 23 11582527734SSukumar Swaminathan #define EMLXS_FCT_CLOSE_PENDING 24 11682527734SSukumar Swaminathan #define EMLXS_FCT_ABORT_PENDING 25 11782527734SSukumar Swaminathan #define EMLXS_FCT_ABORT_DONE 26 11882527734SSukumar Swaminathan #define EMLXS_FCT_IO_DONE 27 11982527734SSukumar Swaminathan 12082527734SSukumar Swaminathan #define EMLXS_FCT_IOCB_ISSUED 256 /* For tracing only */ 12182527734SSukumar Swaminathan #define EMLXS_FCT_IOCB_COMPLETE 257 /* For tracing only */ 122291a2b48SSukumar Swaminathan 123291a2b48SSukumar Swaminathan stmf_data_buf_t *fct_buf; 124291a2b48SSukumar Swaminathan 125291a2b48SSukumar Swaminathan #endif /* SFCT_SUPPORT */ 126291a2b48SSukumar Swaminathan 127291a2b48SSukumar Swaminathan #ifdef SAN_DIAG_SUPPORT 128291a2b48SSukumar Swaminathan hrtime_t sd_start_time; 129291a2b48SSukumar Swaminathan #endif 130291a2b48SSukumar Swaminathan } emlxs_buf_t; 131fcf3ce44SJohn Forte 132fcf3ce44SJohn Forte 133fcf3ce44SJohn Forte 134291a2b48SSukumar Swaminathan #ifdef FCT_IO_TRACE 13582527734SSukumar Swaminathan #define EMLXS_FCT_STATE_CHG(_fct_cmd, _cmd_sbp, _state) \ 13682527734SSukumar Swaminathan (_cmd_sbp)->fct_state = _state; \ 13782527734SSukumar Swaminathan emlxs_fct_io_trace((_cmd_sbp)->port, _fct_cmd, _state) 138291a2b48SSukumar Swaminathan #else 139291a2b48SSukumar Swaminathan /* define to set fct_state */ 14082527734SSukumar Swaminathan #define EMLXS_FCT_STATE_CHG(_fct_cmd, _cmd_sbp, _state) \ 14182527734SSukumar Swaminathan (_cmd_sbp)->fct_state = _state 142291a2b48SSukumar Swaminathan #endif /* FCT_IO_TRACE */ 143fcf3ce44SJohn Forte 144fcf3ce44SJohn Forte 145fcf3ce44SJohn Forte /* pkt_flags */ 146fcf3ce44SJohn Forte #define PACKET_IN_COMPLETION 0x00000001 147fcf3ce44SJohn Forte #define PACKET_IN_TXQ 0x00000002 148fcf3ce44SJohn Forte #define PACKET_IN_CHIPQ 0x00000004 149fcf3ce44SJohn Forte #define PACKET_IN_DONEQ 0x00000008 150fcf3ce44SJohn Forte 151fcf3ce44SJohn Forte #define PACKET_FCP_RESET 0x00000030 152fcf3ce44SJohn Forte #define PACKET_FCP_TGT_RESET 0x00000010 153fcf3ce44SJohn Forte #define PACKET_FCP_LUN_RESET 0x00000020 154fcf3ce44SJohn Forte #define PACKET_POLLED 0x00000040 155fcf3ce44SJohn Forte 156fcf3ce44SJohn Forte #ifdef EMLXS_I386 157fcf3ce44SJohn Forte #define PACKET_FCP_SWAPPED 0x00000100 158fcf3ce44SJohn Forte #define PACKET_ELS_SWAPPED 0x00000200 159fcf3ce44SJohn Forte #define PACKET_CT_SWAPPED 0x00000400 160fcf3ce44SJohn Forte #define PACKET_CSP_SWAPPED 0x00000800 161fcf3ce44SJohn Forte #endif /* EMLXS_I386 */ 162fcf3ce44SJohn Forte 163fcf3ce44SJohn Forte #define PACKET_STALE 0x00001000 164fcf3ce44SJohn Forte 165fcf3ce44SJohn Forte #define PACKET_IN_TIMEOUT 0x00010000 166fcf3ce44SJohn Forte #define PACKET_IN_FLUSH 0x00020000 167fcf3ce44SJohn Forte #define PACKET_IN_ABORT 0x00040000 168e2ca2865SSukumar Swaminathan #define PACKET_XRI_CLOSED 0x00080000 /* An XRI abort/close was issued */ 169fcf3ce44SJohn Forte 170fcf3ce44SJohn Forte #define PACKET_CHIP_COMP 0x00100000 171fcf3ce44SJohn Forte #define PACKET_COMPLETED 0x00200000 17282527734SSukumar Swaminathan #define PACKET_ULP_OWNED 0x00400000 173fcf3ce44SJohn Forte 174fcf3ce44SJohn Forte #define PACKET_STATE_VALID 0x01000000 175fcf3ce44SJohn Forte #define PACKET_FCP_RSP_VALID 0x02000000 176fcf3ce44SJohn Forte #define PACKET_ELS_RSP_VALID 0x04000000 177fcf3ce44SJohn Forte #define PACKET_CT_RSP_VALID 0x08000000 178fcf3ce44SJohn Forte 179fcf3ce44SJohn Forte #define PACKET_DELAY_REQUIRED 0x10000000 180fcf3ce44SJohn Forte #define PACKET_ALLOCATED 0x40000000 181fcf3ce44SJohn Forte #define PACKET_VALID 0x80000000 182fcf3ce44SJohn Forte 183fcf3ce44SJohn Forte 184fcf3ce44SJohn Forte #define STALE_PACKET ((emlxs_buf_t *)0xFFFFFFFF) 185fcf3ce44SJohn Forte 186fcf3ce44SJohn Forte 187fcf3ce44SJohn Forte /* 188fcf3ce44SJohn Forte * From fc_error.h pkt_reason (except for state = NPORT_RJT, FABRIC_RJT, 189fcf3ce44SJohn Forte * NPORT_BSY, FABRIC_BSY, LS_RJT, BA_RJT, FS_RJT) 190fcf3ce44SJohn Forte * 191fcf3ce44SJohn Forte * FCA unique error codes can begin after FC_REASON_FCA_UNIQUE. 192fcf3ce44SJohn Forte * Each FCA defines its own set with values greater >= 0x7F 193fcf3ce44SJohn Forte */ 194fcf3ce44SJohn Forte #define FC_REASON_FCA_DEFINED 0x100 195fcf3ce44SJohn Forte 196fcf3ce44SJohn Forte 197fcf3ce44SJohn Forte /* 198fcf3ce44SJohn Forte * Device VPD save area 199fcf3ce44SJohn Forte */ 200fcf3ce44SJohn Forte 201291a2b48SSukumar Swaminathan typedef struct emlxs_vpd 202291a2b48SSukumar Swaminathan { 203291a2b48SSukumar Swaminathan uint32_t biuRev; 204291a2b48SSukumar Swaminathan uint32_t smRev; 205291a2b48SSukumar Swaminathan uint32_t smFwRev; 206291a2b48SSukumar Swaminathan uint32_t endecRev; 207291a2b48SSukumar Swaminathan uint16_t rBit; 208291a2b48SSukumar Swaminathan uint8_t fcphHigh; 209291a2b48SSukumar Swaminathan uint8_t fcphLow; 210291a2b48SSukumar Swaminathan uint8_t feaLevelHigh; 211291a2b48SSukumar Swaminathan uint8_t feaLevelLow; 212291a2b48SSukumar Swaminathan 213291a2b48SSukumar Swaminathan uint32_t postKernRev; 214291a2b48SSukumar Swaminathan char postKernName[32]; 215291a2b48SSukumar Swaminathan 216291a2b48SSukumar Swaminathan uint32_t opFwRev; 217291a2b48SSukumar Swaminathan char opFwName[32]; 218291a2b48SSukumar Swaminathan char opFwLabel[32]; 219291a2b48SSukumar Swaminathan 220291a2b48SSukumar Swaminathan uint32_t sli1FwRev; 221291a2b48SSukumar Swaminathan char sli1FwName[32]; 222291a2b48SSukumar Swaminathan char sli1FwLabel[32]; 223291a2b48SSukumar Swaminathan 224291a2b48SSukumar Swaminathan uint32_t sli2FwRev; 225291a2b48SSukumar Swaminathan char sli2FwName[32]; 226291a2b48SSukumar Swaminathan char sli2FwLabel[32]; 227291a2b48SSukumar Swaminathan 228291a2b48SSukumar Swaminathan uint32_t sli3FwRev; 229291a2b48SSukumar Swaminathan char sli3FwName[32]; 230291a2b48SSukumar Swaminathan char sli3FwLabel[32]; 231291a2b48SSukumar Swaminathan 232291a2b48SSukumar Swaminathan uint32_t sli4FwRev; 233291a2b48SSukumar Swaminathan char sli4FwName[32]; 234291a2b48SSukumar Swaminathan char sli4FwLabel[32]; 235291a2b48SSukumar Swaminathan 236291a2b48SSukumar Swaminathan char fw_version[32]; 237291a2b48SSukumar Swaminathan char fw_label[32]; 238291a2b48SSukumar Swaminathan 239291a2b48SSukumar Swaminathan char fcode_version[32]; 240291a2b48SSukumar Swaminathan char boot_version[32]; 241291a2b48SSukumar Swaminathan 242291a2b48SSukumar Swaminathan char serial_num[32]; 243291a2b48SSukumar Swaminathan char part_num[32]; 244291a2b48SSukumar Swaminathan char port_num[20]; 245291a2b48SSukumar Swaminathan char eng_change[32]; 246291a2b48SSukumar Swaminathan char manufacturer[80]; 247291a2b48SSukumar Swaminathan char model[80]; 248291a2b48SSukumar Swaminathan char model_desc[256]; 249291a2b48SSukumar Swaminathan char prog_types[256]; 250291a2b48SSukumar Swaminathan char id[80]; 251291a2b48SSukumar Swaminathan 252291a2b48SSukumar Swaminathan uint32_t port_index; 253*a9800bebSGarrett D'Amore uint16_t link_speed; 254fcf3ce44SJohn Forte } emlxs_vpd_t; 255fcf3ce44SJohn Forte 256fcf3ce44SJohn Forte 257291a2b48SSukumar Swaminathan typedef struct emlxs_queue 258291a2b48SSukumar Swaminathan { 259*a9800bebSGarrett D'Amore void *q_first; /* queue first element */ 260*a9800bebSGarrett D'Amore void *q_last; /* queue last element */ 261291a2b48SSukumar Swaminathan uint16_t q_cnt; /* current length of queue */ 262291a2b48SSukumar Swaminathan uint16_t q_max; /* max length queue can get */ 263fcf3ce44SJohn Forte } emlxs_queue_t; 264fcf3ce44SJohn Forte typedef emlxs_queue_t Q; 265fcf3ce44SJohn Forte 266fcf3ce44SJohn Forte 267fcf3ce44SJohn Forte 268fcf3ce44SJohn Forte /* 269fcf3ce44SJohn Forte * This structure is used when allocating a buffer pool. 270fcf3ce44SJohn Forte * Note: this should be identical to gasket buf_info (fldl.h). 271fcf3ce44SJohn Forte */ 272291a2b48SSukumar Swaminathan typedef struct emlxs_buf_info 273291a2b48SSukumar Swaminathan { 274291a2b48SSukumar Swaminathan int32_t size; /* Specifies the number of bytes to allocate. */ 275291a2b48SSukumar Swaminathan int32_t align; /* The desired address boundary. */ 276fcf3ce44SJohn Forte 277291a2b48SSukumar Swaminathan int32_t flags; 278fcf3ce44SJohn Forte 279fcf3ce44SJohn Forte #define FC_MBUF_DMA 0x01 /* blocks are for DMA */ 280fcf3ce44SJohn Forte #define FC_MBUF_PHYSONLY 0x02 /* For malloc - map a given virtual */ 281291a2b48SSukumar Swaminathan /* address to physical address (skip */ 282291a2b48SSukumar Swaminathan /* the malloc). */ 283291a2b48SSukumar Swaminathan /* For free - just unmap the given */ 284fcf3ce44SJohn Forte /* physical address (skip the free). */ 285fcf3ce44SJohn Forte #define FC_MBUF_IOCTL 0x04 /* called from dfc_ioctl */ 286fcf3ce44SJohn Forte #define FC_MBUF_UNLOCK 0x08 /* called with driver unlocked */ 287291a2b48SSukumar Swaminathan #define FC_MBUF_SNGLSG 0x10 /* allocate a single contiguous */ 288291a2b48SSukumar Swaminathan /* physical memory */ 289fcf3ce44SJohn Forte #define FC_MBUF_DMA32 0x20 290fcf3ce44SJohn Forte 291291a2b48SSukumar Swaminathan uint64_t phys; /* specifies physical buffer pointer */ 292291a2b48SSukumar Swaminathan void *virt; /* specifies virtual buffer pointer */ 293291a2b48SSukumar Swaminathan void *data_handle; 294291a2b48SSukumar Swaminathan void *dma_handle; 295fcf3ce44SJohn Forte } emlxs_buf_info_t; 296fcf3ce44SJohn Forte typedef emlxs_buf_info_t MBUF_INFO; 297fcf3ce44SJohn Forte 298fcf3ce44SJohn Forte 299fcf3ce44SJohn Forte #define EMLXS_MAX_HBQ 16 /* Max HBQs handled by firmware */ 300fcf3ce44SJohn Forte #define EMLXS_ELS_HBQ_ID 0 301fcf3ce44SJohn Forte #define EMLXS_IP_HBQ_ID 1 302fcf3ce44SJohn Forte #define EMLXS_CT_HBQ_ID 2 303fcf3ce44SJohn Forte #define EMLXS_FCT_HBQ_ID 3 304fcf3ce44SJohn Forte 305fcf3ce44SJohn Forte #ifdef SFCT_SUPPORT 306fcf3ce44SJohn Forte #define EMLXS_NUM_HBQ 4 /* Number of HBQs supported by driver */ 307fcf3ce44SJohn Forte #else 308fcf3ce44SJohn Forte #define EMLXS_NUM_HBQ 3 /* Number of HBQs supported by driver */ 309291a2b48SSukumar Swaminathan #endif /* SFCT_SUPPORT */ 310fcf3ce44SJohn Forte 311fcf3ce44SJohn Forte 31282527734SSukumar Swaminathan /* 31382527734SSukumar Swaminathan * An IO Channel is a object that comprises a xmit/cmpl 31482527734SSukumar Swaminathan * path for IOs. 31582527734SSukumar Swaminathan * For SLI3, an IO path maps to a ring (cmd/rsp) 31682527734SSukumar Swaminathan * For SLI4, an IO path map to a queue pair (WQ/CQ) 31782527734SSukumar Swaminathan */ 31882527734SSukumar Swaminathan typedef struct emlxs_channel 31982527734SSukumar Swaminathan { 32082527734SSukumar Swaminathan struct emlxs_hba *hba; /* ptr to hba for channel */ 32182527734SSukumar Swaminathan void *iopath; /* ptr to SLI3/4 io path */ 32282527734SSukumar Swaminathan 32382527734SSukumar Swaminathan kmutex_t rsp_lock; 32482527734SSukumar Swaminathan IOCBQ *rsp_head; /* deferred completion head */ 32582527734SSukumar Swaminathan IOCBQ *rsp_tail; /* deferred completion tail */ 32682527734SSukumar Swaminathan emlxs_thread_t intr_thread; 32782527734SSukumar Swaminathan 32882527734SSukumar Swaminathan 32982527734SSukumar Swaminathan uint16_t channelno; 33082527734SSukumar Swaminathan uint16_t chan_flag; 33182527734SSukumar Swaminathan 33282527734SSukumar Swaminathan #define EMLXS_NEEDS_TRIGGER 1 33382527734SSukumar Swaminathan 33482527734SSukumar Swaminathan /* Protected by EMLXS_TX_CHANNEL_LOCK */ 33582527734SSukumar Swaminathan emlxs_queue_t nodeq; /* Node service queue */ 33682527734SSukumar Swaminathan 33782527734SSukumar Swaminathan kmutex_t channel_cmd_lock; 33882527734SSukumar Swaminathan uint32_t timeout; 33982527734SSukumar Swaminathan 34082527734SSukumar Swaminathan /* Channel command counters */ 34182527734SSukumar Swaminathan uint32_t ulpSendCmd; 34282527734SSukumar Swaminathan uint32_t ulpCmplCmd; 34382527734SSukumar Swaminathan uint32_t hbaSendCmd; 34482527734SSukumar Swaminathan uint32_t hbaCmplCmd; 34582527734SSukumar Swaminathan uint32_t hbaSendCmd_sbp; 34682527734SSukumar Swaminathan uint32_t hbaCmplCmd_sbp; 34782527734SSukumar Swaminathan 34882527734SSukumar Swaminathan } emlxs_channel_t; 34982527734SSukumar Swaminathan typedef emlxs_channel_t CHANNEL; 35082527734SSukumar Swaminathan 35182527734SSukumar Swaminathan /* 35282527734SSukumar Swaminathan * Should be able to handle max number of io paths for a 35382527734SSukumar Swaminathan * SLI4 HBA (EMLXS_MAX_WQS) or for a SLI3 HBA (MAX_RINGS) 35482527734SSukumar Swaminathan */ 35582527734SSukumar Swaminathan #define MAX_CHANNEL EMLXS_MSI_MAX_INTRS 356fcf3ce44SJohn Forte 357fcf3ce44SJohn Forte 358fcf3ce44SJohn Forte /* Structure used to access adapter rings */ 359291a2b48SSukumar Swaminathan typedef struct emlxs_ring 360291a2b48SSukumar Swaminathan { 361291a2b48SSukumar Swaminathan void *fc_cmdringaddr; /* virtual offset for cmd */ 362291a2b48SSukumar Swaminathan /* rings */ 363291a2b48SSukumar Swaminathan void *fc_rspringaddr; /* virtual offset for rsp */ 364291a2b48SSukumar Swaminathan /* rings */ 365291a2b48SSukumar Swaminathan 366*a9800bebSGarrett D'Amore void *fc_mpon; /* index ptr for match */ 367291a2b48SSukumar Swaminathan /* structure */ 368*a9800bebSGarrett D'Amore void *fc_mpoff; /* index ptr for match */ 369291a2b48SSukumar Swaminathan /* structure */ 37082527734SSukumar Swaminathan struct emlxs_hba *hba; /* ptr to hba for ring */ 371291a2b48SSukumar Swaminathan 372291a2b48SSukumar Swaminathan uint8_t fc_numCiocb; /* number of command iocb's */ 373291a2b48SSukumar Swaminathan /* per ring */ 374291a2b48SSukumar Swaminathan uint8_t fc_numRiocb; /* number of response iocb's */ 375291a2b48SSukumar Swaminathan /* per ring */ 376291a2b48SSukumar Swaminathan uint8_t fc_rspidx; /* current index in response */ 377291a2b48SSukumar Swaminathan /* ring */ 378291a2b48SSukumar Swaminathan uint8_t fc_cmdidx; /* current index in command */ 379291a2b48SSukumar Swaminathan /* ring */ 380291a2b48SSukumar Swaminathan uint8_t fc_port_rspidx; 381291a2b48SSukumar Swaminathan uint8_t fc_port_cmdidx; 382291a2b48SSukumar Swaminathan uint8_t ringno; 383291a2b48SSukumar Swaminathan 384291a2b48SSukumar Swaminathan uint16_t fc_missbufcnt; /* buf cnt we need to repost */ 38582527734SSukumar Swaminathan CHANNEL *channelp; 386291a2b48SSukumar Swaminathan 387fcf3ce44SJohn Forte 388fcf3ce44SJohn Forte } emlxs_ring_t; 389fcf3ce44SJohn Forte typedef emlxs_ring_t RING; 390fcf3ce44SJohn Forte 391fcf3ce44SJohn Forte 392291a2b48SSukumar Swaminathan #ifdef SAN_DIAG_SUPPORT 393291a2b48SSukumar Swaminathan /* 394291a2b48SSukumar Swaminathan * Although right now it's just 1 field, SAN Diag anticipates that this 395291a2b48SSukumar Swaminathan * structure will grow in the future. 396291a2b48SSukumar Swaminathan */ 397291a2b48SSukumar Swaminathan typedef struct sd_timestat_level0 { 398291a2b48SSukumar Swaminathan int count; 399291a2b48SSukumar Swaminathan } sd_timestat_level0_t; 400291a2b48SSukumar Swaminathan #endif 401291a2b48SSukumar Swaminathan 402291a2b48SSukumar Swaminathan typedef struct emlxs_node 403291a2b48SSukumar Swaminathan { 404291a2b48SSukumar Swaminathan struct emlxs_node *nlp_list_next; 405291a2b48SSukumar Swaminathan struct emlxs_node *nlp_list_prev; 406fcf3ce44SJohn Forte 407291a2b48SSukumar Swaminathan NAME_TYPE nlp_portname; /* port name */ 408291a2b48SSukumar Swaminathan NAME_TYPE nlp_nodename; /* node name */ 409fcf3ce44SJohn Forte 410291a2b48SSukumar Swaminathan uint32_t nlp_DID; /* fibre channel D_ID */ 411291a2b48SSukumar Swaminathan uint32_t nlp_oldDID; 412fcf3ce44SJohn Forte 413291a2b48SSukumar Swaminathan uint16_t nlp_Rpi; /* login id returned by */ 414291a2b48SSukumar Swaminathan /* REG_LOGIN */ 415291a2b48SSukumar Swaminathan uint16_t nlp_Xri; /* login id returned by */ 416291a2b48SSukumar Swaminathan /* REG_LOGIN */ 417fcf3ce44SJohn Forte 418291a2b48SSukumar Swaminathan uint8_t nlp_fcp_info; /* Remote class info */ 419fcf3ce44SJohn Forte 420fcf3ce44SJohn Forte /* nlp_fcp_info */ 421fcf3ce44SJohn Forte #define NLP_FCP_TGT_DEVICE 0x10 /* FCP TGT device */ 422fcf3ce44SJohn Forte #define NLP_FCP_INI_DEVICE 0x20 /* FCP Initiator device */ 423fcf3ce44SJohn Forte #define NLP_FCP_2_DEVICE 0x40 /* FCP-2 TGT device */ 424291a2b48SSukumar Swaminathan #define NLP_EMLX_VPORT 0x80 /* Virtual port */ 425fcf3ce44SJohn Forte 42682527734SSukumar Swaminathan uint32_t nlp_force_rscn; 427291a2b48SSukumar Swaminathan uint32_t nlp_tag; /* Tag used by port_offline */ 428291a2b48SSukumar Swaminathan uint32_t flag; 429fcf3ce44SJohn Forte 430291a2b48SSukumar Swaminathan #define NODE_POOL_ALLOCATED 0x00000001 431fcf3ce44SJohn Forte 432291a2b48SSukumar Swaminathan SERV_PARM sparm; 433fcf3ce44SJohn Forte 43482527734SSukumar Swaminathan /* Protected by EMLXS_TX_CHANNEL_LOCK */ 435291a2b48SSukumar Swaminathan uint32_t nlp_active; /* Node active flag */ 436291a2b48SSukumar Swaminathan uint32_t nlp_base; 43782527734SSukumar Swaminathan uint32_t nlp_flag[MAX_CHANNEL]; /* Node level channel */ 438291a2b48SSukumar Swaminathan /* flags */ 439fcf3ce44SJohn Forte 440fcf3ce44SJohn Forte /* nlp_flag */ 441291a2b48SSukumar Swaminathan #define NLP_CLOSED 0x1 442291a2b48SSukumar Swaminathan #define NLP_OFFLINE 0x2 443291a2b48SSukumar Swaminathan #define NLP_RPI_XRI 0x4 444291a2b48SSukumar Swaminathan 44582527734SSukumar Swaminathan uint32_t nlp_tics[MAX_CHANNEL]; /* gate timeout */ 44682527734SSukumar Swaminathan emlxs_queue_t nlp_tx[MAX_CHANNEL]; /* Transmit Q head */ 44782527734SSukumar Swaminathan emlxs_queue_t nlp_ptx[MAX_CHANNEL]; /* Priority transmit */ 448291a2b48SSukumar Swaminathan /* Queue head */ 44982527734SSukumar Swaminathan void *nlp_next[MAX_CHANNEL]; /* Service Request */ 450291a2b48SSukumar Swaminathan /* Queue pointer used */ 451291a2b48SSukumar Swaminathan /* when node needs */ 452291a2b48SSukumar Swaminathan /* servicing */ 453fcf3ce44SJohn Forte #ifdef DHCHAP_SUPPORT 454291a2b48SSukumar Swaminathan emlxs_node_dhc_t node_dhc; 455fcf3ce44SJohn Forte #endif /* DHCHAP_SUPPORT */ 456fcf3ce44SJohn Forte 457291a2b48SSukumar Swaminathan #ifdef SAN_DIAG_SUPPORT 458291a2b48SSukumar Swaminathan sd_timestat_level0_t sd_dev_bucket[SD_IO_LATENCY_MAX_BUCKETS]; 459291a2b48SSukumar Swaminathan #endif 46082527734SSukumar Swaminathan 461*a9800bebSGarrett D'Amore struct RPIobj *rpip; /* SLI4 only */ 462*a9800bebSGarrett D'Amore #define EMLXS_NODE_TO_RPI(_p, _n) \ 463*a9800bebSGarrett D'Amore ((_n)?((_n->rpip)?_n->rpip:emlxs_rpi_find(_p, _n->nlp_Rpi)):NULL) 46482527734SSukumar Swaminathan 465fcf3ce44SJohn Forte } emlxs_node_t; 466fcf3ce44SJohn Forte typedef emlxs_node_t NODELIST; 467fcf3ce44SJohn Forte 468fcf3ce44SJohn Forte 469fcf3ce44SJohn Forte 470fcf3ce44SJohn Forte #define NADDR_LEN 6 /* MAC network address length */ 471291a2b48SSukumar Swaminathan typedef struct emlxs_fcip_nethdr 472291a2b48SSukumar Swaminathan { 473291a2b48SSukumar Swaminathan NAME_TYPE fc_destname; /* destination port name */ 474291a2b48SSukumar Swaminathan NAME_TYPE fc_srcname; /* source port name */ 475fcf3ce44SJohn Forte } emlxs_fcip_nethdr_t; 476fcf3ce44SJohn Forte typedef emlxs_fcip_nethdr_t NETHDR; 477fcf3ce44SJohn Forte 478fcf3ce44SJohn Forte 479fcf3ce44SJohn Forte #define MEM_NLP 0 /* memory segment to hold node list entries */ 480fcf3ce44SJohn Forte #define MEM_IOCB 1 /* memory segment to hold iocb commands */ 481291a2b48SSukumar Swaminathan #define MEM_MBOX 2 /* memory segment to hold mailbox cmds */ 482291a2b48SSukumar Swaminathan #define MEM_BPL 3 /* and to hold buffer ptr lists - SLI2 */ 483291a2b48SSukumar Swaminathan #define MEM_BUF 4 /* memory segment to hold buffer data */ 484291a2b48SSukumar Swaminathan #define MEM_ELSBUF 4 /* memory segment to hold buffer data */ 485fcf3ce44SJohn Forte #define MEM_IPBUF 5 /* memory segment to hold IP buffer data */ 486fcf3ce44SJohn Forte #define MEM_CTBUF 6 /* memory segment to hold CT buffer data */ 487fcf3ce44SJohn Forte #define MEM_FCTBUF 7 /* memory segment to hold FCT buffer data */ 488fcf3ce44SJohn Forte 489fcf3ce44SJohn Forte #ifdef SFCT_SUPPORT 490fcf3ce44SJohn Forte #define FC_MAX_SEG 8 491fcf3ce44SJohn Forte #else 492fcf3ce44SJohn Forte #define FC_MAX_SEG 7 493291a2b48SSukumar Swaminathan #endif /* SFCT_SUPPORT */ 494fcf3ce44SJohn Forte 495fcf3ce44SJohn Forte 496fcf3ce44SJohn Forte /* A BPL entry is 12 bytes. Subtract 2 for command and response buffers */ 497291a2b48SSukumar Swaminathan #define BPL_TO_SGLLEN(_bpl) ((_bpl/12)-2) 498291a2b48SSukumar Swaminathan #define MEM_BPL_SIZE 1024 /* Default size */ 499fcf3ce44SJohn Forte 50082527734SSukumar Swaminathan /* A SGL entry is 16 bytes. Subtract 2 for command and response buffers */ 50182527734SSukumar Swaminathan #define SGL_TO_SGLLEN(_sgl) ((_sgl/16)-2) 50262379b58SSukumar Swaminathan #define MEM_SGL_SIZE 4096 /* Default size */ 50382527734SSukumar Swaminathan 504fcf3ce44SJohn Forte #ifdef EMLXS_I386 505fcf3ce44SJohn Forte #define EMLXS_SGLLEN BPL_TO_SGLLEN(MEM_BPL_SIZE) 506fcf3ce44SJohn Forte #else /* EMLXS_SPARC */ 507fcf3ce44SJohn Forte #define EMLXS_SGLLEN 1 508fcf3ce44SJohn Forte #endif /* EMLXS_I386 */ 509fcf3ce44SJohn Forte 510fcf3ce44SJohn Forte #define MEM_BUF_SIZE 1024 511fcf3ce44SJohn Forte #define MEM_BUF_COUNT 64 512fcf3ce44SJohn Forte 513291a2b48SSukumar Swaminathan #define MEM_ELSBUF_SIZE MEM_BUF_SIZE 514291a2b48SSukumar Swaminathan #define MEM_ELSBUF_COUNT hba->max_nodes 515291a2b48SSukumar Swaminathan #define MEM_IPBUF_SIZE 65535 516fcf3ce44SJohn Forte #define MEM_IPBUF_COUNT 60 517fcf3ce44SJohn Forte #define MEM_CTBUF_SIZE MAX_CT_PAYLOAD /* (1024*320) */ 518fcf3ce44SJohn Forte #define MEM_CTBUF_COUNT 8 519291a2b48SSukumar Swaminathan #define MEM_FCTBUF_SIZE 65535 520fcf3ce44SJohn Forte #define MEM_FCTBUF_COUNT 128 521fcf3ce44SJohn Forte 522291a2b48SSukumar Swaminathan typedef struct emlxs_memseg 523291a2b48SSukumar Swaminathan { 524*a9800bebSGarrett D'Amore void *fc_memget_ptr; 525*a9800bebSGarrett D'Amore void *fc_memget_end; 526*a9800bebSGarrett D'Amore void *fc_memput_ptr; 527*a9800bebSGarrett D'Amore void *fc_memput_end; 528291a2b48SSukumar Swaminathan 529*a9800bebSGarrett D'Amore void *fc_memstart_virt; /* beginning address */ 530291a2b48SSukumar Swaminathan /* of memory block */ 531291a2b48SSukumar Swaminathan uint64_t fc_memstart_phys; /* beginning address */ 532291a2b48SSukumar Swaminathan /* of memory block */ 533291a2b48SSukumar Swaminathan ddi_dma_handle_t fc_mem_dma_handle; 534291a2b48SSukumar Swaminathan ddi_acc_handle_t fc_mem_dat_handle; 535291a2b48SSukumar Swaminathan uint32_t fc_total_memsize; 536291a2b48SSukumar Swaminathan uint32_t fc_memsize; /* size of mem blks */ 537291a2b48SSukumar Swaminathan uint32_t fc_numblks; /* no of mem blks */ 538291a2b48SSukumar Swaminathan uint32_t fc_memget_cnt; /* no of mem get blks */ 539291a2b48SSukumar Swaminathan uint32_t fc_memput_cnt; /* no of mem put blks */ 54082527734SSukumar Swaminathan uint32_t fc_memflag; /* emlxs_buf_info_t FLAGS */ 54182527734SSukumar Swaminathan uint32_t fc_reserved; /* used with priority flag */ 54282527734SSukumar Swaminathan uint32_t fc_memalign; 54382527734SSukumar Swaminathan uint32_t fc_memtag; 54482527734SSukumar Swaminathan char fc_label[32]; 54582527734SSukumar Swaminathan 546fcf3ce44SJohn Forte } emlxs_memseg_t; 547fcf3ce44SJohn Forte typedef emlxs_memseg_t MEMSEG; 548fcf3ce44SJohn Forte 549fcf3ce44SJohn Forte 550fcf3ce44SJohn Forte /* Board stat counters */ 551291a2b48SSukumar Swaminathan typedef struct emlxs_stats 552291a2b48SSukumar Swaminathan { 553291a2b48SSukumar Swaminathan uint32_t LinkUp; 554291a2b48SSukumar Swaminathan uint32_t LinkDown; 555291a2b48SSukumar Swaminathan uint32_t LinkEvent; 556291a2b48SSukumar Swaminathan uint32_t LinkMultiEvent; 557291a2b48SSukumar Swaminathan 558291a2b48SSukumar Swaminathan uint32_t MboxIssued; 559291a2b48SSukumar Swaminathan uint32_t MboxCompleted; /* MboxError + MbxGood */ 560291a2b48SSukumar Swaminathan uint32_t MboxGood; 561291a2b48SSukumar Swaminathan uint32_t MboxError; 562291a2b48SSukumar Swaminathan uint32_t MboxBusy; 563291a2b48SSukumar Swaminathan uint32_t MboxInvalid; 564291a2b48SSukumar Swaminathan 56582527734SSukumar Swaminathan uint32_t IocbIssued[MAX_CHANNEL]; 56682527734SSukumar Swaminathan uint32_t IocbReceived[MAX_CHANNEL]; 56782527734SSukumar Swaminathan uint32_t IocbTxPut[MAX_CHANNEL]; 56882527734SSukumar Swaminathan uint32_t IocbTxGet[MAX_CHANNEL]; 56982527734SSukumar Swaminathan uint32_t IocbRingFull[MAX_CHANNEL]; 570291a2b48SSukumar Swaminathan uint32_t IocbThrottled; 571291a2b48SSukumar Swaminathan 572291a2b48SSukumar Swaminathan uint32_t IntrEvent[8]; 573291a2b48SSukumar Swaminathan 574291a2b48SSukumar Swaminathan uint32_t FcpIssued; 575291a2b48SSukumar Swaminathan uint32_t FcpCompleted; /* FcpGood + FcpError */ 576291a2b48SSukumar Swaminathan uint32_t FcpGood; 577291a2b48SSukumar Swaminathan uint32_t FcpError; 578291a2b48SSukumar Swaminathan 579291a2b48SSukumar Swaminathan uint32_t FcpEvent; /* FcpStray + FcpCompleted */ 580291a2b48SSukumar Swaminathan uint32_t FcpStray; 581fcf3ce44SJohn Forte #ifdef SFCT_SUPPORT 582291a2b48SSukumar Swaminathan uint32_t FctRingEvent; 583291a2b48SSukumar Swaminathan uint32_t FctRingError; 584291a2b48SSukumar Swaminathan uint32_t FctRingDropped; 585291a2b48SSukumar Swaminathan #endif /* SFCT_SUPPORT */ 586291a2b48SSukumar Swaminathan 587291a2b48SSukumar Swaminathan uint32_t ElsEvent; /* ElsStray + ElsCmplt (cmd + rsp) */ 588291a2b48SSukumar Swaminathan uint32_t ElsStray; 589291a2b48SSukumar Swaminathan 590291a2b48SSukumar Swaminathan uint32_t ElsCmdIssued; 591291a2b48SSukumar Swaminathan uint32_t ElsCmdCompleted; /* ElsCmdGood + ElsCmdError */ 592291a2b48SSukumar Swaminathan uint32_t ElsCmdGood; 593291a2b48SSukumar Swaminathan uint32_t ElsCmdError; 594291a2b48SSukumar Swaminathan 595291a2b48SSukumar Swaminathan uint32_t ElsRspIssued; 596291a2b48SSukumar Swaminathan uint32_t ElsRspCompleted; 597291a2b48SSukumar Swaminathan 598291a2b48SSukumar Swaminathan uint32_t ElsRcvEvent; /* ElsRcvErr + ElsRcvDrop + ElsCmdRcv */ 599291a2b48SSukumar Swaminathan uint32_t ElsRcvError; 600291a2b48SSukumar Swaminathan uint32_t ElsRcvDropped; 601291a2b48SSukumar Swaminathan uint32_t ElsCmdReceived; /* ElsRscnRcv + ElsPlogiRcv + ... */ 602291a2b48SSukumar Swaminathan uint32_t ElsRscnReceived; 603291a2b48SSukumar Swaminathan uint32_t ElsFlogiReceived; 604291a2b48SSukumar Swaminathan uint32_t ElsPlogiReceived; 605291a2b48SSukumar Swaminathan uint32_t ElsPrliReceived; 606291a2b48SSukumar Swaminathan uint32_t ElsPrloReceived; 607291a2b48SSukumar Swaminathan uint32_t ElsLogoReceived; 608291a2b48SSukumar Swaminathan uint32_t ElsAdiscReceived; 609291a2b48SSukumar Swaminathan uint32_t ElsAuthReceived; 610291a2b48SSukumar Swaminathan uint32_t ElsGenReceived; 611291a2b48SSukumar Swaminathan 612291a2b48SSukumar Swaminathan uint32_t CtEvent; /* CtStray + CtCompleted (cmd + rsp) */ 613291a2b48SSukumar Swaminathan uint32_t CtStray; 614291a2b48SSukumar Swaminathan 615291a2b48SSukumar Swaminathan uint32_t CtCmdIssued; 616291a2b48SSukumar Swaminathan uint32_t CtCmdCompleted; /* CtCmdGood + CtCmdError */ 617291a2b48SSukumar Swaminathan uint32_t CtCmdGood; 618291a2b48SSukumar Swaminathan uint32_t CtCmdError; 619291a2b48SSukumar Swaminathan 620291a2b48SSukumar Swaminathan uint32_t CtRspIssued; 621291a2b48SSukumar Swaminathan uint32_t CtRspCompleted; 622291a2b48SSukumar Swaminathan 623291a2b48SSukumar Swaminathan uint32_t CtRcvEvent; /* CtRcvError + CtRcvDrop + CtCmdRcvd */ 624291a2b48SSukumar Swaminathan uint32_t CtRcvError; 625291a2b48SSukumar Swaminathan uint32_t CtRcvDropped; 626291a2b48SSukumar Swaminathan uint32_t CtCmdReceived; 627291a2b48SSukumar Swaminathan 628291a2b48SSukumar Swaminathan uint32_t IpEvent; /* IpStray + IpSeqCmpl + IpBcastCmpl */ 629291a2b48SSukumar Swaminathan uint32_t IpStray; 630291a2b48SSukumar Swaminathan 631291a2b48SSukumar Swaminathan uint32_t IpSeqIssued; 632291a2b48SSukumar Swaminathan uint32_t IpSeqCompleted; /* IpSeqGood + IpSeqError */ 633291a2b48SSukumar Swaminathan uint32_t IpSeqGood; 634291a2b48SSukumar Swaminathan uint32_t IpSeqError; 635291a2b48SSukumar Swaminathan 636291a2b48SSukumar Swaminathan uint32_t IpBcastIssued; 637291a2b48SSukumar Swaminathan uint32_t IpBcastCompleted; /* IpBcastGood + IpBcastError */ 638291a2b48SSukumar Swaminathan uint32_t IpBcastGood; 639291a2b48SSukumar Swaminathan uint32_t IpBcastError; 640291a2b48SSukumar Swaminathan 641291a2b48SSukumar Swaminathan uint32_t IpRcvEvent; /* IpDrop + IpSeqRcv + IpBcastRcv */ 642291a2b48SSukumar Swaminathan uint32_t IpDropped; 643291a2b48SSukumar Swaminathan uint32_t IpSeqReceived; 644291a2b48SSukumar Swaminathan uint32_t IpBcastReceived; 645291a2b48SSukumar Swaminathan 646291a2b48SSukumar Swaminathan uint32_t IpUbPosted; 647291a2b48SSukumar Swaminathan uint32_t ElsUbPosted; 648291a2b48SSukumar Swaminathan uint32_t CtUbPosted; 649fcf3ce44SJohn Forte #ifdef SFCT_SUPPORT 650291a2b48SSukumar Swaminathan uint32_t FctUbPosted; 651291a2b48SSukumar Swaminathan #endif /* SFCT_SUPPORT */ 652fcf3ce44SJohn Forte 653291a2b48SSukumar Swaminathan uint32_t ResetTime; /* Time of last reset */ 654*a9800bebSGarrett D'Amore 655*a9800bebSGarrett D'Amore uint32_t ElsTestReceived; 656*a9800bebSGarrett D'Amore uint32_t ElsEstcReceived; 657*a9800bebSGarrett D'Amore uint32_t ElsFarprReceived; 658*a9800bebSGarrett D'Amore uint32_t ElsEchoReceived; 659*a9800bebSGarrett D'Amore uint32_t ElsRlsReceived; 660*a9800bebSGarrett D'Amore uint32_t ElsRtvReceived; 661*a9800bebSGarrett D'Amore 662fcf3ce44SJohn Forte } emlxs_stats_t; 663fcf3ce44SJohn Forte 664fcf3ce44SJohn Forte 665291a2b48SSukumar Swaminathan #define FC_MAX_ADPTMSG (8*28) /* max size of a msg from adapter */ 666fcf3ce44SJohn Forte 667fcf3ce44SJohn Forte #define EMLXS_NUM_THREADS 8 668fcf3ce44SJohn Forte #define EMLXS_MIN_TASKS 8 669fcf3ce44SJohn Forte #define EMLXS_MAX_TASKS 8 670fcf3ce44SJohn Forte 671fcf3ce44SJohn Forte #define EMLXS_NUM_HASH_QUES 32 672fcf3ce44SJohn Forte #define EMLXS_DID_HASH(x) ((x) & (EMLXS_NUM_HASH_QUES - 1)) 673fcf3ce44SJohn Forte 674fcf3ce44SJohn Forte 675fcf3ce44SJohn Forte /* pkt_tran_flag */ 676fcf3ce44SJohn Forte #define FC_TRAN_COMPLETED 0x8000 677fcf3ce44SJohn Forte 678fcf3ce44SJohn Forte 679291a2b48SSukumar Swaminathan typedef struct emlxs_dfc_event 680291a2b48SSukumar Swaminathan { 681291a2b48SSukumar Swaminathan uint32_t pid; 682291a2b48SSukumar Swaminathan uint32_t event; 683291a2b48SSukumar Swaminathan uint32_t last_id; 684fcf3ce44SJohn Forte 685291a2b48SSukumar Swaminathan void *dataout; 686291a2b48SSukumar Swaminathan uint32_t size; 687291a2b48SSukumar Swaminathan uint32_t mode; 688fcf3ce44SJohn Forte } emlxs_dfc_event_t; 689fcf3ce44SJohn Forte 690fcf3ce44SJohn Forte 691291a2b48SSukumar Swaminathan typedef struct emlxs_hba_event 692291a2b48SSukumar Swaminathan { 693291a2b48SSukumar Swaminathan uint32_t last_id; 694291a2b48SSukumar Swaminathan uint32_t new; 695291a2b48SSukumar Swaminathan uint32_t missed; 696fcf3ce44SJohn Forte } emlxs_hba_event_t; 697fcf3ce44SJohn Forte 698fcf3ce44SJohn Forte 699fcf3ce44SJohn Forte #ifdef SFCT_SUPPORT 700fcf3ce44SJohn Forte 701fcf3ce44SJohn Forte #define TGTPORTSTAT port->fct_stat 702fcf3ce44SJohn Forte 703fcf3ce44SJohn Forte /* 704fcf3ce44SJohn Forte * FctP2IOXcnt will count IOs by their fcpDL. Counters 705fcf3ce44SJohn Forte * are for buckets of various power of 2 sizes. 706fcf3ce44SJohn Forte * Bucket 0 < 512 > 0 707fcf3ce44SJohn Forte * Bucket 1 >= 512 < 1024 708fcf3ce44SJohn Forte * Bucket 2 >= 1024 < 2048 709fcf3ce44SJohn Forte * Bucket 3 >= 2048 < 4096 710fcf3ce44SJohn Forte * Bucket 4 >= 4096 < 8192 711fcf3ce44SJohn Forte * Bucket 5 >= 8192 < 16K 712fcf3ce44SJohn Forte * Bucket 6 >= 16K < 32K 713fcf3ce44SJohn Forte * Bucket 7 >= 32K < 64K 714fcf3ce44SJohn Forte * Bucket 8 >= 64K < 128K 715fcf3ce44SJohn Forte * Bucket 9 >= 128K < 256K 716fcf3ce44SJohn Forte * Bucket 10 >= 256K < 512K 717fcf3ce44SJohn Forte * Bucket 11 >= 512K < 1MB 718fcf3ce44SJohn Forte * Bucket 12 >= 1MB < 2MB 719fcf3ce44SJohn Forte * Bucket 13 >= 2MB < 4MB 720fcf3ce44SJohn Forte * Bucket 14 >= 4MB < 8MB 721fcf3ce44SJohn Forte * Bucket 15 >= 8MB 722fcf3ce44SJohn Forte */ 723291a2b48SSukumar Swaminathan #define MAX_TGTPORT_IOCNT 16 724fcf3ce44SJohn Forte 725fcf3ce44SJohn Forte 726fcf3ce44SJohn Forte /* 727fcf3ce44SJohn Forte * These routines will bump the right counter, based on 728fcf3ce44SJohn Forte * the size of the IO inputed, with the least number of 729fcf3ce44SJohn Forte * comparisions. A max of 5 comparisions is only needed 730fcf3ce44SJohn Forte * to classify the IO in one of 16 ranges. A binary search 731fcf3ce44SJohn Forte * to locate the high bit in the size is used. 732fcf3ce44SJohn Forte */ 73382527734SSukumar Swaminathan #define EMLXS_BUMP_RDIOCTR(port, cnt) \ 734291a2b48SSukumar Swaminathan { \ 735291a2b48SSukumar Swaminathan /* Use binary search to find the first high bit */ \ 736291a2b48SSukumar Swaminathan if (cnt & 0xffff0000) { \ 737291a2b48SSukumar Swaminathan if (cnt & 0xff800000) { \ 738291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[15]++; \ 739291a2b48SSukumar Swaminathan } \ 740291a2b48SSukumar Swaminathan else { \ 741291a2b48SSukumar Swaminathan /* It must be 0x007f0000 */ \ 742291a2b48SSukumar Swaminathan if (cnt & 0x00700000) { \ 743291a2b48SSukumar Swaminathan if (cnt & 0x00400000) { \ 744291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[14]++; \ 745291a2b48SSukumar Swaminathan } \ 746291a2b48SSukumar Swaminathan else { \ 747291a2b48SSukumar Swaminathan /* it must be 0x00300000 */ \ 748291a2b48SSukumar Swaminathan if (cnt & 0x00200000) { \ 749291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[13]++; \ 750291a2b48SSukumar Swaminathan } \ 751291a2b48SSukumar Swaminathan else { \ 752291a2b48SSukumar Swaminathan /* It must be 0x00100000 */ \ 753291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[12]++; \ 754291a2b48SSukumar Swaminathan } \ 755291a2b48SSukumar Swaminathan } \ 756291a2b48SSukumar Swaminathan } \ 757291a2b48SSukumar Swaminathan else { \ 758291a2b48SSukumar Swaminathan /* It must be 0x000f0000 */ \ 759291a2b48SSukumar Swaminathan if (cnt & 0x000c0000) { \ 760291a2b48SSukumar Swaminathan if (cnt & 0x00080000) { \ 761fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IORcnt[11]++; \ 762291a2b48SSukumar Swaminathan } \ 763291a2b48SSukumar Swaminathan else { \ 764291a2b48SSukumar Swaminathan /* It must be 0x00040000 */ \ 765fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IORcnt[10]++; \ 766291a2b48SSukumar Swaminathan } \ 767291a2b48SSukumar Swaminathan } \ 768291a2b48SSukumar Swaminathan else { \ 769291a2b48SSukumar Swaminathan /* It must be 0x00030000 */ \ 770291a2b48SSukumar Swaminathan if (cnt & 0x00020000) { \ 771291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[9]++; \ 772291a2b48SSukumar Swaminathan } \ 773291a2b48SSukumar Swaminathan else { \ 774291a2b48SSukumar Swaminathan /* It must be 0x00010000 */ \ 775291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[8]++; \ 776291a2b48SSukumar Swaminathan } \ 777291a2b48SSukumar Swaminathan } \ 778291a2b48SSukumar Swaminathan } \ 779291a2b48SSukumar Swaminathan } \ 780291a2b48SSukumar Swaminathan } \ 781291a2b48SSukumar Swaminathan else { \ 782291a2b48SSukumar Swaminathan if (cnt & 0x0000fe00) { \ 783291a2b48SSukumar Swaminathan if (cnt & 0x0000f000) { \ 784291a2b48SSukumar Swaminathan if (cnt & 0x0000c000) { \ 785291a2b48SSukumar Swaminathan if (cnt & 0x00008000) { \ 786291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[7]++; \ 787291a2b48SSukumar Swaminathan } \ 788291a2b48SSukumar Swaminathan else { \ 789291a2b48SSukumar Swaminathan /* It must be 0x00004000 */ \ 790291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[6]++; \ 791291a2b48SSukumar Swaminathan } \ 792291a2b48SSukumar Swaminathan } \ 793291a2b48SSukumar Swaminathan else { \ 794291a2b48SSukumar Swaminathan /* It must be 0x00000300 */ \ 795291a2b48SSukumar Swaminathan if (cnt & 0x00000200) { \ 796291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[5]++; \ 797291a2b48SSukumar Swaminathan } \ 798291a2b48SSukumar Swaminathan else { \ 799291a2b48SSukumar Swaminathan /* It must be 0x00000100 */ \ 800291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[4]++; \ 801291a2b48SSukumar Swaminathan } \ 802291a2b48SSukumar Swaminathan } \ 803291a2b48SSukumar Swaminathan } \ 804291a2b48SSukumar Swaminathan else { \ 805291a2b48SSukumar Swaminathan /* It must be 0x00000e00 */ \ 806291a2b48SSukumar Swaminathan if (cnt & 0x00000800) { \ 807291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[3]++; \ 808291a2b48SSukumar Swaminathan } \ 809291a2b48SSukumar Swaminathan else { \ 810291a2b48SSukumar Swaminathan /* It must be 0x00000600 */ \ 811291a2b48SSukumar Swaminathan if (cnt & 0x00000400) { \ 812291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[2]++; \ 813291a2b48SSukumar Swaminathan } \ 814291a2b48SSukumar Swaminathan else { \ 815291a2b48SSukumar Swaminathan /* It must be 0x00000200 */ \ 816291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[1]++; \ 817291a2b48SSukumar Swaminathan } \ 818291a2b48SSukumar Swaminathan } \ 819291a2b48SSukumar Swaminathan } \ 820291a2b48SSukumar Swaminathan } \ 821291a2b48SSukumar Swaminathan else { \ 822291a2b48SSukumar Swaminathan /* It must be 0x000001ff */ \ 823291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[0]++; \ 824291a2b48SSukumar Swaminathan } \ 825291a2b48SSukumar Swaminathan } \ 826fcf3ce44SJohn Forte } 827fcf3ce44SJohn Forte 828291a2b48SSukumar Swaminathan 82982527734SSukumar Swaminathan #define EMLXS_BUMP_WRIOCTR(port, cnt) \ 830291a2b48SSukumar Swaminathan { \ 831291a2b48SSukumar Swaminathan /* Use binary search to find the first high bit */ \ 832291a2b48SSukumar Swaminathan if (cnt & 0xffff0000) { \ 833291a2b48SSukumar Swaminathan if (cnt & 0xff800000) { \ 834291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IOWcnt[15]++; \ 835291a2b48SSukumar Swaminathan } \ 836291a2b48SSukumar Swaminathan else { \ 837291a2b48SSukumar Swaminathan /* It must be 0x007f0000 */ \ 838291a2b48SSukumar Swaminathan if (cnt & 0x00700000) { \ 839291a2b48SSukumar Swaminathan if (cnt & 0x00400000) { \ 840291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IOWcnt[14]++; \ 841291a2b48SSukumar Swaminathan } \ 842291a2b48SSukumar Swaminathan else { \ 843291a2b48SSukumar Swaminathan /* It must be 0x00300000 */ \ 844291a2b48SSukumar Swaminathan if (cnt & 0x00200000) { \ 845fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[13]++; \ 846291a2b48SSukumar Swaminathan } \ 847291a2b48SSukumar Swaminathan else { \ 848291a2b48SSukumar Swaminathan /* It must be 0x00100000 */ \ 849fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[12]++; \ 850291a2b48SSukumar Swaminathan } \ 851291a2b48SSukumar Swaminathan } \ 852291a2b48SSukumar Swaminathan } \ 853291a2b48SSukumar Swaminathan else { \ 854291a2b48SSukumar Swaminathan /* It must be 0x000f0000 */ \ 855291a2b48SSukumar Swaminathan if (cnt & 0x000c0000) { \ 856291a2b48SSukumar Swaminathan if (cnt & 0x00080000) { \ 857fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[11]++; \ 858291a2b48SSukumar Swaminathan } \ 859291a2b48SSukumar Swaminathan else { \ 860291a2b48SSukumar Swaminathan /* it must be 0x00040000 */ \ 861fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[10]++; \ 862291a2b48SSukumar Swaminathan } \ 863291a2b48SSukumar Swaminathan } \ 864291a2b48SSukumar Swaminathan else { \ 865291a2b48SSukumar Swaminathan /* It must be 0x00030000 */ \ 866291a2b48SSukumar Swaminathan if (cnt & 0x00020000) { \ 867fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[9]++; \ 868291a2b48SSukumar Swaminathan } \ 869291a2b48SSukumar Swaminathan else { \ 870291a2b48SSukumar Swaminathan /* It must be 0x00010000 */ \ 871fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[8]++; \ 872291a2b48SSukumar Swaminathan } \ 873291a2b48SSukumar Swaminathan } \ 874291a2b48SSukumar Swaminathan } \ 875291a2b48SSukumar Swaminathan } \ 876291a2b48SSukumar Swaminathan } \ 877291a2b48SSukumar Swaminathan else { \ 878291a2b48SSukumar Swaminathan if (cnt & 0x0000fe00) { \ 879291a2b48SSukumar Swaminathan if (cnt & 0x0000f000) { \ 880291a2b48SSukumar Swaminathan if (cnt & 0x0000c000) { \ 881291a2b48SSukumar Swaminathan if (cnt & 0x00008000) { \ 882fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[7]++; \ 883291a2b48SSukumar Swaminathan } \ 884291a2b48SSukumar Swaminathan else { \ 885291a2b48SSukumar Swaminathan /* It must be 0x00004000 */ \ 886fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[6]++; \ 887291a2b48SSukumar Swaminathan } \ 888291a2b48SSukumar Swaminathan } \ 889291a2b48SSukumar Swaminathan else { \ 890291a2b48SSukumar Swaminathan /* It must be 0x00000300 */ \ 891291a2b48SSukumar Swaminathan if (cnt & 0x00000200) { \ 892fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[5]++; \ 893291a2b48SSukumar Swaminathan } \ 894291a2b48SSukumar Swaminathan else { \ 895291a2b48SSukumar Swaminathan /* It must be 0x00000100 */ \ 896fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[4]++; \ 897291a2b48SSukumar Swaminathan } \ 898291a2b48SSukumar Swaminathan } \ 899291a2b48SSukumar Swaminathan } \ 900291a2b48SSukumar Swaminathan else { \ 901291a2b48SSukumar Swaminathan /* It must be 0x00000e00 */ \ 902291a2b48SSukumar Swaminathan if (cnt & 0x00000800) { \ 903291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IOWcnt[3]++; \ 904291a2b48SSukumar Swaminathan } \ 905291a2b48SSukumar Swaminathan else { \ 906291a2b48SSukumar Swaminathan /* It must be 0x00000600 */ \ 907291a2b48SSukumar Swaminathan if (cnt & 0x00000400) { \ 908fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[2]++; \ 909291a2b48SSukumar Swaminathan } \ 910291a2b48SSukumar Swaminathan else { \ 911291a2b48SSukumar Swaminathan /* It must be 0x00000200 */ \ 912fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[1]++; \ 913291a2b48SSukumar Swaminathan } \ 914291a2b48SSukumar Swaminathan } \ 915291a2b48SSukumar Swaminathan } \ 916291a2b48SSukumar Swaminathan } \ 917291a2b48SSukumar Swaminathan else { \ 918291a2b48SSukumar Swaminathan /* It must be 0x000001ff */ \ 919291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IOWcnt[0]++; \ 920291a2b48SSukumar Swaminathan } \ 921291a2b48SSukumar Swaminathan } \ 922fcf3ce44SJohn Forte } 923fcf3ce44SJohn Forte 924291a2b48SSukumar Swaminathan typedef struct emlxs_tgtport_stat 925291a2b48SSukumar Swaminathan { 926fcf3ce44SJohn Forte /* IO counters */ 927291a2b48SSukumar Swaminathan uint64_t FctP2IOWcnt[MAX_TGTPORT_IOCNT]; /* Writes */ 928291a2b48SSukumar Swaminathan uint64_t FctP2IORcnt[MAX_TGTPORT_IOCNT]; /* Reads */ 929291a2b48SSukumar Swaminathan uint64_t FctIOCmdCnt; /* Other, ie TUR */ 930291a2b48SSukumar Swaminathan uint64_t FctCmdReceived; /* total IOs */ 931291a2b48SSukumar Swaminathan uint64_t FctReadBytes; /* total read bytes */ 932291a2b48SSukumar Swaminathan uint64_t FctWriteBytes; /* total write bytes */ 933fcf3ce44SJohn Forte 934fcf3ce44SJohn Forte /* IOCB handling counters */ 935291a2b48SSukumar Swaminathan uint64_t FctEvent; /* FctStray + FctCompleted */ 936291a2b48SSukumar Swaminathan uint64_t FctCompleted; /* FctCmplGood + FctCmplError */ 937291a2b48SSukumar Swaminathan uint64_t FctCmplGood; 938fcf3ce44SJohn Forte 939291a2b48SSukumar Swaminathan uint32_t FctCmplError; 940291a2b48SSukumar Swaminathan uint32_t FctStray; 941fcf3ce44SJohn Forte 942fcf3ce44SJohn Forte /* Fct event counters */ 943291a2b48SSukumar Swaminathan uint32_t FctRcvDropped; 944291a2b48SSukumar Swaminathan uint32_t FctOverQDepth; 945291a2b48SSukumar Swaminathan uint32_t FctOutstandingIO; 946291a2b48SSukumar Swaminathan uint32_t FctFailedPortRegister; 947291a2b48SSukumar Swaminathan uint32_t FctPortRegister; 948291a2b48SSukumar Swaminathan uint32_t FctPortDeregister; 949291a2b48SSukumar Swaminathan 950291a2b48SSukumar Swaminathan uint32_t FctAbortSent; 951291a2b48SSukumar Swaminathan uint32_t FctNoBuffer; 952291a2b48SSukumar Swaminathan uint32_t FctScsiStatusErr; 953291a2b48SSukumar Swaminathan uint32_t FctScsiQfullErr; 954291a2b48SSukumar Swaminathan uint32_t FctScsiResidOver; 955291a2b48SSukumar Swaminathan uint32_t FctScsiResidUnder; 956291a2b48SSukumar Swaminathan uint32_t FctScsiSenseErr; 957291a2b48SSukumar Swaminathan 958291a2b48SSukumar Swaminathan uint32_t FctFiller1; 959fcf3ce44SJohn Forte } emlxs_tgtport_stat_t; 960291a2b48SSukumar Swaminathan 961291a2b48SSukumar Swaminathan #ifdef FCT_IO_TRACE 962291a2b48SSukumar Swaminathan #define MAX_IO_TRACE 67 963291a2b48SSukumar Swaminathan typedef struct emlxs_iotrace 964291a2b48SSukumar Swaminathan { 965291a2b48SSukumar Swaminathan fct_cmd_t *fct_cmd; 966291a2b48SSukumar Swaminathan uint32_t xri; 967291a2b48SSukumar Swaminathan uint8_t marker; /* 0xff */ 968291a2b48SSukumar Swaminathan uint8_t trc[MAX_IO_TRACE]; /* trc[0] = index */ 969291a2b48SSukumar Swaminathan } emlxs_iotrace_t; 970291a2b48SSukumar Swaminathan #endif /* FCT_IO_TRACE */ 971291a2b48SSukumar Swaminathan #endif /* SFCT_SUPPORT */ 972fcf3ce44SJohn Forte 973fcf3ce44SJohn Forte 974*a9800bebSGarrett D'Amore #include <emlxs_fcf.h> 975*a9800bebSGarrett D'Amore 976fcf3ce44SJohn Forte /* 977291a2b48SSukumar Swaminathan * Port Information Data Structure 978fcf3ce44SJohn Forte */ 979fcf3ce44SJohn Forte 980291a2b48SSukumar Swaminathan typedef struct emlxs_port 981291a2b48SSukumar Swaminathan { 982291a2b48SSukumar Swaminathan struct emlxs_hba *hba; 983fcf3ce44SJohn Forte 984fcf3ce44SJohn Forte /* Virtual port management */ 985*a9800bebSGarrett D'Amore struct VPIobj VPIobj; 986291a2b48SSukumar Swaminathan uint32_t vpi; 987*a9800bebSGarrett D'Amore 988291a2b48SSukumar Swaminathan uint32_t flag; 989fcf3ce44SJohn Forte #define EMLXS_PORT_ENABLE 0x00000001 990fcf3ce44SJohn Forte #define EMLXS_PORT_BOUND 0x00000002 991fcf3ce44SJohn Forte 992*a9800bebSGarrett D'Amore #define EMLXS_PORT_REG_VPI 0x00010000 /* SLI3 */ 993*a9800bebSGarrett D'Amore #define EMLXS_PORT_REG_VPI_CMPL 0x00020000 /* SLI3 */ 994*a9800bebSGarrett D'Amore 995fcf3ce44SJohn Forte #define EMLXS_PORT_IP_UP 0x00000010 996fcf3ce44SJohn Forte #define EMLXS_PORT_CONFIG 0x00000020 997*a9800bebSGarrett D'Amore #define EMLXS_PORT_RESTRICTED 0x00000040 /* Restrict logins */ 998*a9800bebSGarrett D'Amore #define EMLXS_PORT_FLOGI_CMPL 0x00000080 999fcf3ce44SJohn Forte 1000*a9800bebSGarrett D'Amore #define EMLXS_PORT_RESET_MASK 0x0000FFFF /* Flags to keep */ 1001*a9800bebSGarrett D'Amore /* across hard reset */ 1002*a9800bebSGarrett D'Amore #define EMLXS_PORT_LINKDOWN_MASK 0xFFFFFF7F /* Flags to keep */ 1003*a9800bebSGarrett D'Amore /* across link reset */ 1004fcf3ce44SJohn Forte 1005291a2b48SSukumar Swaminathan uint32_t options; 1006*a9800bebSGarrett D'Amore #define EMLXS_OPT_RESTRICT 0x00000001 /* Force restricted */ 1007*a9800bebSGarrett D'Amore /* logins */ 1008*a9800bebSGarrett D'Amore #define EMLXS_OPT_UNRESTRICT 0x00000002 /* Force Unrestricted */ 1009*a9800bebSGarrett D'Amore /* logins */ 1010fcf3ce44SJohn Forte #define EMLXS_OPT_RESTRICT_MASK 0x00000003 1011fcf3ce44SJohn Forte 1012fcf3ce44SJohn Forte 1013fcf3ce44SJohn Forte /* FC world wide names */ 1014291a2b48SSukumar Swaminathan NAME_TYPE wwnn; 1015291a2b48SSukumar Swaminathan NAME_TYPE wwpn; 1016291a2b48SSukumar Swaminathan char snn[256]; 1017291a2b48SSukumar Swaminathan char spn[256]; 1018fcf3ce44SJohn Forte 1019fcf3ce44SJohn Forte /* Common service paramters */ 1020291a2b48SSukumar Swaminathan SERV_PARM sparam; 1021291a2b48SSukumar Swaminathan SERV_PARM fabric_sparam; 1022*a9800bebSGarrett D'Amore SERV_PARM prev_fabric_sparam; 1023fcf3ce44SJohn Forte 1024fcf3ce44SJohn Forte /* fc_id management */ 1025291a2b48SSukumar Swaminathan uint32_t did; 1026291a2b48SSukumar Swaminathan uint32_t prev_did; 1027fcf3ce44SJohn Forte 102882527734SSukumar Swaminathan /* support FC_PORT_GET_P2P_INFO only */ 102982527734SSukumar Swaminathan uint32_t rdid; 103082527734SSukumar Swaminathan 1031fcf3ce44SJohn Forte /* FC_AL management */ 1032291a2b48SSukumar Swaminathan uint8_t lip_type; 1033291a2b48SSukumar Swaminathan uint8_t alpa_map[128]; 1034fcf3ce44SJohn Forte 1035fcf3ce44SJohn Forte /* Node management */ 1036291a2b48SSukumar Swaminathan emlxs_node_t node_base; 1037291a2b48SSukumar Swaminathan uint32_t node_count; 1038291a2b48SSukumar Swaminathan krwlock_t node_rwlock; 1039291a2b48SSukumar Swaminathan emlxs_node_t *node_table[EMLXS_NUM_HASH_QUES]; 1040fcf3ce44SJohn Forte 1041fcf3ce44SJohn Forte /* Polled packet management */ 1042291a2b48SSukumar Swaminathan kcondvar_t pkt_lock_cv; /* pkt polling */ 1043291a2b48SSukumar Swaminathan kmutex_t pkt_lock; /* pkt polling */ 1044fcf3ce44SJohn Forte 1045fcf3ce44SJohn Forte /* ULP */ 1046291a2b48SSukumar Swaminathan uint32_t ulp_statec; 1047291a2b48SSukumar Swaminathan void (*ulp_statec_cb) (); /* Port state change */ 1048291a2b48SSukumar Swaminathan /* callback routine */ 1049291a2b48SSukumar Swaminathan void (*ulp_unsol_cb) (); /* unsolicited event */ 1050291a2b48SSukumar Swaminathan /* callback routine */ 1051291a2b48SSukumar Swaminathan opaque_t ulp_handle; 1052fcf3ce44SJohn Forte 1053fcf3ce44SJohn Forte /* ULP unsolicited buffers */ 1054291a2b48SSukumar Swaminathan kmutex_t ub_lock; 1055291a2b48SSukumar Swaminathan uint32_t ub_count; 1056291a2b48SSukumar Swaminathan emlxs_unsol_buf_t *ub_pool; 105782527734SSukumar Swaminathan uint32_t ub_post[MAX_CHANNEL]; 1058291a2b48SSukumar Swaminathan uint32_t ub_timer; 1059fcf3ce44SJohn Forte 1060291a2b48SSukumar Swaminathan emlxs_ub_priv_t *ub_wait_head; /* Unsolicited IO received */ 1061291a2b48SSukumar Swaminathan /* before link up */ 1062291a2b48SSukumar Swaminathan emlxs_ub_priv_t *ub_wait_tail; /* Unsolicited IO received */ 1063291a2b48SSukumar Swaminathan /* before link up */ 1064fcf3ce44SJohn Forte 1065fcf3ce44SJohn Forte 1066fcf3ce44SJohn Forte #ifdef DHCHAP_SUPPORT 1067291a2b48SSukumar Swaminathan emlxs_port_dhc_t port_dhc; 1068fcf3ce44SJohn Forte #endif /* DHCHAP_SUPPORT */ 1069fcf3ce44SJohn Forte 1070291a2b48SSukumar Swaminathan uint16_t ini_mode; 1071291a2b48SSukumar Swaminathan uint16_t tgt_mode; 1072fcf3ce44SJohn Forte 1073fcf3ce44SJohn Forte #ifdef SFCT_SUPPORT 1074fcf3ce44SJohn Forte 1075fcf3ce44SJohn Forte #define FCT_BUF_COUNT_512 256 1076fcf3ce44SJohn Forte #define FCT_BUF_COUNT_8K 128 1077fcf3ce44SJohn Forte #define FCT_BUF_COUNT_64K 64 1078fcf3ce44SJohn Forte #define FCT_BUF_COUNT_128K 64 1079fcf3ce44SJohn Forte #define FCT_MAX_BUCKETS 16 1080291a2b48SSukumar Swaminathan #define FCT_DMEM_MAX_BUF_SIZE 131072 /* 128K */ 1081291a2b48SSukumar Swaminathan #define FCT_DMEM_MAX_BUF_SEGMENT 8388608 /* 8M */ 1082fcf3ce44SJohn Forte 1083fcf3ce44SJohn Forte struct emlxs_fct_dmem_bucket dmem_bucket[FCT_MAX_BUCKETS]; 1084fcf3ce44SJohn Forte 1085291a2b48SSukumar Swaminathan char cfd_name[24]; 1086291a2b48SSukumar Swaminathan stmf_port_provider_t *port_provider; 1087291a2b48SSukumar Swaminathan fct_local_port_t *fct_port; 1088291a2b48SSukumar Swaminathan uint32_t fct_flags; 1089fcf3ce44SJohn Forte 1090e2ca2865SSukumar Swaminathan #define FCT_STATE_PORT_ONLINE 0x00000001 1091e2ca2865SSukumar Swaminathan #define FCT_STATE_NOT_ACKED 0x00000002 1092e2ca2865SSukumar Swaminathan #define FCT_STATE_LINK_UP 0x00000010 1093e2ca2865SSukumar Swaminathan #define FCT_STATE_LINK_UP_ACKED 0x00000020 1094fcf3ce44SJohn Forte 1095291a2b48SSukumar Swaminathan emlxs_tgtport_stat_t fct_stat; 1096291a2b48SSukumar Swaminathan 1097291a2b48SSukumar Swaminathan /* Used to save fct_cmd for deferred unsol ELS commands, except FLOGI */ 1098291a2b48SSukumar Swaminathan emlxs_buf_t *fct_wait_head; 1099291a2b48SSukumar Swaminathan emlxs_buf_t *fct_wait_tail; 1100291a2b48SSukumar Swaminathan 1101291a2b48SSukumar Swaminathan /* Used to save context for deferred unsol FLOGIs */ 1102291a2b48SSukumar Swaminathan fct_flogi_xchg_t fx; 1103e2ca2865SSukumar Swaminathan 1104291a2b48SSukumar Swaminathan #ifdef FCT_IO_TRACE 1105291a2b48SSukumar Swaminathan emlxs_iotrace_t *iotrace; 1106291a2b48SSukumar Swaminathan uint16_t iotrace_cnt; 1107291a2b48SSukumar Swaminathan uint16_t iotrace_index; 1108291a2b48SSukumar Swaminathan kmutex_t iotrace_mtx; 1109291a2b48SSukumar Swaminathan #endif /* FCT_IO_TRACE */ 1110291a2b48SSukumar Swaminathan 1111291a2b48SSukumar Swaminathan #endif /* SFCT_SUPPORT */ 1112291a2b48SSukumar Swaminathan 1113291a2b48SSukumar Swaminathan #ifdef SAN_DIAG_SUPPORT 1114291a2b48SSukumar Swaminathan uint8_t sd_io_latency_state; 1115291a2b48SSukumar Swaminathan #define SD_INVALID 0x00 1116291a2b48SSukumar Swaminathan #define SD_COLLECTING 0x01 1117291a2b48SSukumar Swaminathan #define SD_STOPPED 0x02 1118291a2b48SSukumar Swaminathan 1119291a2b48SSukumar Swaminathan /* SD event management list */ 112082527734SSukumar Swaminathan uint32_t sd_event_mask; /* bit-mask */ 1121291a2b48SSukumar Swaminathan emlxs_dfc_event_t sd_events[MAX_DFC_EVENTS]; 1122291a2b48SSukumar Swaminathan #endif 1123fcf3ce44SJohn Forte 1124*a9800bebSGarrett D'Amore } emlxs_port_t; 1125fcf3ce44SJohn Forte 1126fcf3ce44SJohn Forte 1127fcf3ce44SJohn Forte /* Host Attn reg */ 112882527734SSukumar Swaminathan #define FC_HA_REG(_hba) ((volatile uint32_t *) \ 112982527734SSukumar Swaminathan ((_hba)->sli.sli3.ha_reg_addr)) 1130fcf3ce44SJohn Forte 1131fcf3ce44SJohn Forte /* Chip Attn reg */ 113282527734SSukumar Swaminathan #define FC_CA_REG(_hba) ((volatile uint32_t *) \ 113382527734SSukumar Swaminathan ((_hba)->sli.sli3.ca_reg_addr)) 1134fcf3ce44SJohn Forte 1135fcf3ce44SJohn Forte /* Host Status reg */ 113682527734SSukumar Swaminathan #define FC_HS_REG(_hba) ((volatile uint32_t *) \ 113782527734SSukumar Swaminathan ((_hba)->sli.sli3.hs_reg_addr)) 1138fcf3ce44SJohn Forte 1139fcf3ce44SJohn Forte /* Host Cntl reg */ 114082527734SSukumar Swaminathan #define FC_HC_REG(_hba) ((volatile uint32_t *) \ 114182527734SSukumar Swaminathan ((_hba)->sli.sli3.hc_reg_addr)) 1142fcf3ce44SJohn Forte 1143fcf3ce44SJohn Forte /* BIU Configuration reg */ 114482527734SSukumar Swaminathan #define FC_BC_REG(_hba) ((volatile uint32_t *) \ 114582527734SSukumar Swaminathan ((_hba)->sli.sli3.bc_reg_addr)) 1146fcf3ce44SJohn Forte 1147fcf3ce44SJohn Forte /* Used by SBUS adapter */ 1148fcf3ce44SJohn Forte /* TITAN Cntl reg */ 114982527734SSukumar Swaminathan #define FC_SHC_REG(_hba) ((volatile uint32_t *) \ 115082527734SSukumar Swaminathan ((_hba)->sli.sli3.shc_reg_addr)) 1151fcf3ce44SJohn Forte 1152fcf3ce44SJohn Forte /* TITAN Status reg */ 115382527734SSukumar Swaminathan #define FC_SHS_REG(_hba) ((volatile uint32_t *) \ 115482527734SSukumar Swaminathan ((_hba)->sli.sli3.shs_reg_addr)) 1155fcf3ce44SJohn Forte 1156fcf3ce44SJohn Forte /* TITAN Update reg */ 115782527734SSukumar Swaminathan #define FC_SHU_REG(_hba) ((volatile uint32_t *) \ 115882527734SSukumar Swaminathan ((_hba)->sli.sli3.shu_reg_addr)) 115982527734SSukumar Swaminathan 116082527734SSukumar Swaminathan /* MPU Semaphore reg */ 116182527734SSukumar Swaminathan #define FC_SEMA_REG(_hba) ((volatile uint32_t *)\ 116282527734SSukumar Swaminathan ((_hba)->sli.sli4.MPUEPSemaphore_reg_addr)) 116382527734SSukumar Swaminathan 116482527734SSukumar Swaminathan /* Bootstrap Mailbox Doorbell reg */ 116582527734SSukumar Swaminathan #define FC_MBDB_REG(_hba) ((volatile uint32_t *) \ 116682527734SSukumar Swaminathan ((_hba)->sli.sli4.MBDB_reg_addr)) 116782527734SSukumar Swaminathan 116882527734SSukumar Swaminathan /* MQ Doorbell reg */ 116982527734SSukumar Swaminathan #define FC_MQDB_REG(_hba) ((volatile uint32_t *) \ 117082527734SSukumar Swaminathan ((_hba)->sli.sli4.MQDB_reg_addr)) 1171fcf3ce44SJohn Forte 117282527734SSukumar Swaminathan /* CQ Doorbell reg */ 117382527734SSukumar Swaminathan #define FC_CQDB_REG(_hba) ((volatile uint32_t *) \ 117482527734SSukumar Swaminathan ((_hba)->sli.sli4.CQDB_reg_addr)) 1175fcf3ce44SJohn Forte 117682527734SSukumar Swaminathan /* WQ Doorbell reg */ 117782527734SSukumar Swaminathan #define FC_WQDB_REG(_hba) ((volatile uint32_t *) \ 117882527734SSukumar Swaminathan ((_hba)->sli.sli4.WQDB_reg_addr)) 1179fcf3ce44SJohn Forte 118082527734SSukumar Swaminathan /* RQ Doorbell reg */ 118182527734SSukumar Swaminathan #define FC_RQDB_REG(_hba) ((volatile uint32_t *) \ 118282527734SSukumar Swaminathan ((_hba)->sli.sli4.RQDB_reg_addr)) 118382527734SSukumar Swaminathan 118482527734SSukumar Swaminathan 118582527734SSukumar Swaminathan #define FC_SLIM2_MAILBOX(_hba) ((MAILBOX *)(_hba)->sli.sli3.slim2.virt) 118682527734SSukumar Swaminathan 118782527734SSukumar Swaminathan #define FC_SLIM1_MAILBOX(_hba) ((MAILBOX *)(_hba)->sli.sli3.slim_addr) 1188fcf3ce44SJohn Forte 1189fcf3ce44SJohn Forte #define FC_MAILBOX(_hba) (((_hba)->flag & FC_SLIM2_MODE) ? \ 1190291a2b48SSukumar Swaminathan FC_SLIM2_MAILBOX(_hba) : FC_SLIM1_MAILBOX(_hba)) 1191291a2b48SSukumar Swaminathan 1192291a2b48SSukumar Swaminathan #define WRITE_CSR_REG(_hba, _regp, _value) ddi_put32(\ 119382527734SSukumar Swaminathan (_hba)->sli.sli3.csr_acc_handle, (uint32_t *)(_regp), \ 119482527734SSukumar Swaminathan (uint32_t)(_value)) 1195291a2b48SSukumar Swaminathan 1196291a2b48SSukumar Swaminathan #define READ_CSR_REG(_hba, _regp) ddi_get32(\ 119782527734SSukumar Swaminathan (_hba)->sli.sli3.csr_acc_handle, (uint32_t *)(_regp)) 1198291a2b48SSukumar Swaminathan 1199291a2b48SSukumar Swaminathan #define WRITE_SLIM_ADDR(_hba, _regp, _value) ddi_put32(\ 120082527734SSukumar Swaminathan (_hba)->sli.sli3.slim_acc_handle, (uint32_t *)(_regp), \ 120182527734SSukumar Swaminathan (uint32_t)(_value)) 1202291a2b48SSukumar Swaminathan 1203291a2b48SSukumar Swaminathan #define READ_SLIM_ADDR(_hba, _regp) ddi_get32(\ 120482527734SSukumar Swaminathan (_hba)->sli.sli3.slim_acc_handle, (uint32_t *)(_regp)) 1205291a2b48SSukumar Swaminathan 1206291a2b48SSukumar Swaminathan #define WRITE_SLIM_COPY(_hba, _bufp, _slimp, _wcnt) ddi_rep_put32(\ 120782527734SSukumar Swaminathan (_hba)->sli.sli3.slim_acc_handle, (uint32_t *)(_bufp), \ 120882527734SSukumar Swaminathan (uint32_t *)(_slimp), (_wcnt), DDI_DEV_AUTOINCR) 1209291a2b48SSukumar Swaminathan 1210291a2b48SSukumar Swaminathan #define READ_SLIM_COPY(_hba, _bufp, _slimp, _wcnt) ddi_rep_get32(\ 121182527734SSukumar Swaminathan (_hba)->sli.sli3.slim_acc_handle, (uint32_t *)(_bufp), \ 121282527734SSukumar Swaminathan (uint32_t *)(_slimp), (_wcnt), DDI_DEV_AUTOINCR) 1213fcf3ce44SJohn Forte 1214fcf3ce44SJohn Forte /* Used by SBUS adapter */ 1215291a2b48SSukumar Swaminathan #define WRITE_SBUS_CSR_REG(_hba, _regp, _value) ddi_put32(\ 121682527734SSukumar Swaminathan (_hba)->sli.sli3.sbus_csr_handle, (uint32_t *)(_regp), \ 121782527734SSukumar Swaminathan (uint32_t)(_value)) 1218291a2b48SSukumar Swaminathan 1219291a2b48SSukumar Swaminathan #define READ_SBUS_CSR_REG(_hba, _regp) ddi_get32(\ 122082527734SSukumar Swaminathan (_hba)->sli.sli3.sbus_csr_handle, (uint32_t *)(_regp)) 1221291a2b48SSukumar Swaminathan 1222291a2b48SSukumar Swaminathan #define SBUS_WRITE_FLASH_COPY(_hba, _offset, _value) ddi_put8(\ 122382527734SSukumar Swaminathan (_hba)->sli.sli3.sbus_flash_acc_handle, \ 122482527734SSukumar Swaminathan (uint8_t *)((volatile uint8_t *)(_hba)->sli.sli3.sbus_flash_addr + \ 122582527734SSukumar Swaminathan (_offset)), (uint8_t)(_value)) 1226fcf3ce44SJohn Forte 1227291a2b48SSukumar Swaminathan #define SBUS_READ_FLASH_COPY(_hba, _offset) ddi_get8(\ 122882527734SSukumar Swaminathan (_hba)->sli.sli3.sbus_flash_acc_handle, \ 122982527734SSukumar Swaminathan (uint8_t *)((volatile uint8_t *)(_hba)->sli.sli3.sbus_flash_addr + \ 123082527734SSukumar Swaminathan (_offset))) 123182527734SSukumar Swaminathan 123282527734SSukumar Swaminathan /* SLI4 registers */ 123382527734SSukumar Swaminathan #define WRITE_BAR1_REG(_hba, _regp, _value) ddi_put32(\ 123482527734SSukumar Swaminathan (_hba)->sli.sli4.bar1_acc_handle, (uint32_t *)(_regp), \ 123582527734SSukumar Swaminathan (uint32_t)(_value)) 123682527734SSukumar Swaminathan 123782527734SSukumar Swaminathan #define READ_BAR1_REG(_hba, _regp) ddi_get32(\ 123882527734SSukumar Swaminathan (_hba)->sli.sli4.bar1_acc_handle, (uint32_t *)(_regp)) 123982527734SSukumar Swaminathan 124082527734SSukumar Swaminathan #define WRITE_BAR2_REG(_hba, _regp, _value) ddi_put32(\ 124182527734SSukumar Swaminathan (_hba)->sli.sli4.bar2_acc_handle, (uint32_t *)(_regp), \ 124282527734SSukumar Swaminathan (uint32_t)(_value)) 1243fcf3ce44SJohn Forte 124482527734SSukumar Swaminathan #define READ_BAR2_REG(_hba, _regp) ddi_get32(\ 124582527734SSukumar Swaminathan (_hba)->sli.sli4.bar2_acc_handle, (uint32_t *)(_regp)) 124682527734SSukumar Swaminathan 124782527734SSukumar Swaminathan 124882527734SSukumar Swaminathan #define EMLXS_STATE_CHANGE(_hba, _state)\ 1249fcf3ce44SJohn Forte { \ 1250fcf3ce44SJohn Forte mutex_enter(&EMLXS_PORT_LOCK); \ 125182527734SSukumar Swaminathan EMLXS_STATE_CHANGE_LOCKED((_hba), (_state)); \ 1252fcf3ce44SJohn Forte mutex_exit(&EMLXS_PORT_LOCK); \ 1253fcf3ce44SJohn Forte } 1254fcf3ce44SJohn Forte 1255fcf3ce44SJohn Forte /* Used when EMLXS_PORT_LOCK is already held */ 125682527734SSukumar Swaminathan #define EMLXS_STATE_CHANGE_LOCKED(_hba, _state) \ 1257fcf3ce44SJohn Forte { \ 1258fcf3ce44SJohn Forte if ((_hba)->state != (_state)) \ 1259fcf3ce44SJohn Forte { \ 1260fcf3ce44SJohn Forte uint32_t _st = _state; \ 1261fcf3ce44SJohn Forte EMLXS_MSGF(EMLXS_CONTEXT, \ 1262fcf3ce44SJohn Forte &emlxs_state_msg, "%s --> %s", \ 1263fcf3ce44SJohn Forte emlxs_ffstate_xlate((_hba)->state), \ 1264fcf3ce44SJohn Forte emlxs_ffstate_xlate(_state)); \ 126582527734SSukumar Swaminathan (_hba)->state = (_state); \ 126682527734SSukumar Swaminathan if ((_st) == FC_ERROR) \ 1267fcf3ce44SJohn Forte { \ 1268fcf3ce44SJohn Forte (_hba)->flag |= FC_HARDWARE_ERROR; \ 1269fcf3ce44SJohn Forte } \ 1270fcf3ce44SJohn Forte } \ 1271fcf3ce44SJohn Forte } 1272fcf3ce44SJohn Forte 127382527734SSukumar Swaminathan #ifdef FMA_SUPPORT 127482527734SSukumar Swaminathan #define EMLXS_CHK_ACC_HANDLE(_hba, _acc) \ 127582527734SSukumar Swaminathan if (emlxs_fm_check_acc_handle(_hba, _acc) != DDI_FM_OK) { \ 127682527734SSukumar Swaminathan EMLXS_MSGF(EMLXS_CONTEXT, \ 127782527734SSukumar Swaminathan &emlxs_invalid_access_handle_msg, NULL); \ 127882527734SSukumar Swaminathan } 127982527734SSukumar Swaminathan #endif /* FMA_SUPPORT */ 128082527734SSukumar Swaminathan 1281fcf3ce44SJohn Forte /* 1282fcf3ce44SJohn Forte * This is the HBA control area for the adapter 1283fcf3ce44SJohn Forte */ 1284fcf3ce44SJohn Forte 1285fcf3ce44SJohn Forte #ifdef MODSYM_SUPPORT 1286fcf3ce44SJohn Forte 1287291a2b48SSukumar Swaminathan typedef struct emlxs_modsym 1288291a2b48SSukumar Swaminathan { 1289291a2b48SSukumar Swaminathan ddi_modhandle_t mod_fctl; /* For Leadville */ 1290fcf3ce44SJohn Forte 1291fcf3ce44SJohn Forte /* Leadville (fctl) */ 1292291a2b48SSukumar Swaminathan int (*fc_fca_attach)(dev_info_t *, fc_fca_tran_t *); 1293291a2b48SSukumar Swaminathan int (*fc_fca_detach)(dev_info_t *); 1294291a2b48SSukumar Swaminathan int (*fc_fca_init)(struct dev_ops *); 1295fcf3ce44SJohn Forte 1296fcf3ce44SJohn Forte #ifdef SFCT_SUPPORT 129782527734SSukumar Swaminathan uint32_t fct_modopen; 129882527734SSukumar Swaminathan uint32_t reserved; /* Padding for alignment */ 129982527734SSukumar Swaminathan 1300291a2b48SSukumar Swaminathan ddi_modhandle_t mod_fct; /* For Comstar */ 1301291a2b48SSukumar Swaminathan ddi_modhandle_t mod_stmf; /* For Comstar */ 1302fcf3ce44SJohn Forte 1303fcf3ce44SJohn Forte /* Comstar (fct) */ 1304291a2b48SSukumar Swaminathan void* (*fct_alloc)(fct_struct_id_t, int, int); 1305291a2b48SSukumar Swaminathan void (*fct_free)(void *); 1306291a2b48SSukumar Swaminathan void* (*fct_scsi_task_alloc)(void *, uint16_t, uint32_t, uint8_t *, 1307291a2b48SSukumar Swaminathan uint16_t, uint16_t); 1308291a2b48SSukumar Swaminathan int (*fct_register_local_port)(fct_local_port_t *); 1309291a2b48SSukumar Swaminathan void (*fct_deregister_local_port)(fct_local_port_t *); 1310291a2b48SSukumar Swaminathan void (*fct_handle_event)(fct_local_port_t *, int, uint32_t, caddr_t); 1311291a2b48SSukumar Swaminathan void (*fct_post_rcvd_cmd)(fct_cmd_t *, stmf_data_buf_t *); 1312291a2b48SSukumar Swaminathan void (*fct_ctl)(void *, int, void *); 1313291a2b48SSukumar Swaminathan void (*fct_queue_cmd_for_termination)(fct_cmd_t *, fct_status_t); 1314291a2b48SSukumar Swaminathan void (*fct_send_response_done)(fct_cmd_t *, fct_status_t, uint32_t); 1315291a2b48SSukumar Swaminathan void (*fct_send_cmd_done)(fct_cmd_t *, fct_status_t, uint32_t); 1316291a2b48SSukumar Swaminathan void (*fct_scsi_data_xfer_done)(fct_cmd_t *, stmf_data_buf_t *, 1317291a2b48SSukumar Swaminathan uint32_t); 1318291a2b48SSukumar Swaminathan fct_status_t (*fct_port_shutdown) 1319291a2b48SSukumar Swaminathan (fct_local_port_t *, uint32_t, char *); 1320291a2b48SSukumar Swaminathan fct_status_t (*fct_port_initialize) 1321291a2b48SSukumar Swaminathan (fct_local_port_t *, uint32_t, char *); 1322291a2b48SSukumar Swaminathan void (*fct_cmd_fca_aborted) 1323291a2b48SSukumar Swaminathan (fct_cmd_t *, fct_status_t, int); 1324291a2b48SSukumar Swaminathan fct_status_t (*fct_handle_rcvd_flogi) 1325291a2b48SSukumar Swaminathan (fct_local_port_t *, fct_flogi_xchg_t *); 1326fcf3ce44SJohn Forte 1327fcf3ce44SJohn Forte /* Comstar (stmf) */ 1328291a2b48SSukumar Swaminathan void* (*stmf_alloc)(stmf_struct_id_t, int, int); 1329291a2b48SSukumar Swaminathan void (*stmf_free)(void *); 1330291a2b48SSukumar Swaminathan void (*stmf_deregister_port_provider) (stmf_port_provider_t *); 1331291a2b48SSukumar Swaminathan int (*stmf_register_port_provider) (stmf_port_provider_t *); 1332291a2b48SSukumar Swaminathan #endif /* SFCT_SUPPORT */ 1333fcf3ce44SJohn Forte } emlxs_modsym_t; 1334fcf3ce44SJohn Forte extern emlxs_modsym_t emlxs_modsym; 1335fcf3ce44SJohn Forte 1336291a2b48SSukumar Swaminathan #define MODSYM(_f) emlxs_modsym._f 1337fcf3ce44SJohn Forte 1338fcf3ce44SJohn Forte #else 1339fcf3ce44SJohn Forte 1340291a2b48SSukumar Swaminathan #define MODSYM(_f) _f 1341fcf3ce44SJohn Forte 1342291a2b48SSukumar Swaminathan #endif /* MODSYM_SUPPORT */ 1343fcf3ce44SJohn Forte 1344fcf3ce44SJohn Forte 1345fcf3ce44SJohn Forte 134682527734SSukumar Swaminathan typedef struct RPIHdrTmplate 134782527734SSukumar Swaminathan { 134882527734SSukumar Swaminathan uint32_t Word[16]; /* 64 bytes */ 134982527734SSukumar Swaminathan } RPIHdrTmplate_t; 135082527734SSukumar Swaminathan 1351*a9800bebSGarrett D'Amore 135282527734SSukumar Swaminathan typedef struct EQ_DESC 135382527734SSukumar Swaminathan { 135482527734SSukumar Swaminathan uint16_t host_index; 135582527734SSukumar Swaminathan uint16_t max_index; 135682527734SSukumar Swaminathan uint16_t qid; 135782527734SSukumar Swaminathan uint16_t msix_vector; 135882527734SSukumar Swaminathan kmutex_t lastwq_lock; 135982527734SSukumar Swaminathan uint16_t lastwq; 136082527734SSukumar Swaminathan MBUF_INFO addr; 136182527734SSukumar Swaminathan } EQ_DESC_t; 136282527734SSukumar Swaminathan 1363*a9800bebSGarrett D'Amore 136482527734SSukumar Swaminathan typedef struct CQ_DESC 136582527734SSukumar Swaminathan { 136682527734SSukumar Swaminathan uint16_t host_index; 136782527734SSukumar Swaminathan uint16_t max_index; 136882527734SSukumar Swaminathan uint16_t qid; 136982527734SSukumar Swaminathan uint16_t eqid; 137082527734SSukumar Swaminathan uint16_t type; 137182527734SSukumar Swaminathan #define EMLXS_CQ_TYPE_GROUP1 1 /* associated with a MQ and async events */ 137282527734SSukumar Swaminathan #define EMLXS_CQ_TYPE_GROUP2 2 /* associated with a WQ and RQ */ 137382527734SSukumar Swaminathan uint16_t rsvd; 137482527734SSukumar Swaminathan 137582527734SSukumar Swaminathan MBUF_INFO addr; 137682527734SSukumar Swaminathan CHANNEL *channelp; /* ptr to CHANNEL associated with CQ */ 137782527734SSukumar Swaminathan 137882527734SSukumar Swaminathan } CQ_DESC_t; 137982527734SSukumar Swaminathan 1380*a9800bebSGarrett D'Amore 138182527734SSukumar Swaminathan typedef struct WQ_DESC 138282527734SSukumar Swaminathan { 138382527734SSukumar Swaminathan uint16_t host_index; 138482527734SSukumar Swaminathan uint16_t max_index; 138582527734SSukumar Swaminathan uint16_t port_index; 138682527734SSukumar Swaminathan uint16_t release_depth; 138782527734SSukumar Swaminathan #define WQE_RELEASE_DEPTH (8 * EMLXS_NUM_WQ_PAGES) 138882527734SSukumar Swaminathan uint16_t qid; 138982527734SSukumar Swaminathan uint16_t cqid; 139082527734SSukumar Swaminathan MBUF_INFO addr; 139182527734SSukumar Swaminathan } WQ_DESC_t; 139282527734SSukumar Swaminathan 1393*a9800bebSGarrett D'Amore 139482527734SSukumar Swaminathan typedef struct RQ_DESC 139582527734SSukumar Swaminathan { 139682527734SSukumar Swaminathan uint16_t host_index; 139782527734SSukumar Swaminathan uint16_t max_index; 139882527734SSukumar Swaminathan uint16_t qid; 139982527734SSukumar Swaminathan uint16_t cqid; 140082527734SSukumar Swaminathan 140182527734SSukumar Swaminathan MBUF_INFO addr; 1402b3660a96SSukumar Swaminathan MBUF_INFO rqb[RQ_DEPTH]; 140382527734SSukumar Swaminathan 140482527734SSukumar Swaminathan kmutex_t lock; 140582527734SSukumar Swaminathan 140682527734SSukumar Swaminathan } RQ_DESC_t; 140782527734SSukumar Swaminathan 140882527734SSukumar Swaminathan 140982527734SSukumar Swaminathan typedef struct RXQ_DESC 141082527734SSukumar Swaminathan { 141182527734SSukumar Swaminathan kmutex_t lock; 141282527734SSukumar Swaminathan emlxs_queue_t active; 141382527734SSukumar Swaminathan 141482527734SSukumar Swaminathan } RXQ_DESC_t; 141582527734SSukumar Swaminathan 141682527734SSukumar Swaminathan 141782527734SSukumar Swaminathan typedef struct MQ_DESC 141882527734SSukumar Swaminathan { 141982527734SSukumar Swaminathan uint16_t host_index; 142082527734SSukumar Swaminathan uint16_t max_index; 142182527734SSukumar Swaminathan uint16_t qid; 142282527734SSukumar Swaminathan uint16_t cqid; 142382527734SSukumar Swaminathan MBUF_INFO addr; 142482527734SSukumar Swaminathan } MQ_DESC_t; 142582527734SSukumar Swaminathan 1426*a9800bebSGarrett D'Amore 142782527734SSukumar Swaminathan /* Define the number of queues the driver will be using */ 142882527734SSukumar Swaminathan #define EMLXS_MAX_EQS EMLXS_MSI_MAX_INTRS 142982527734SSukumar Swaminathan #define EMLXS_MAX_WQS EMLXS_MSI_MAX_INTRS 143082527734SSukumar Swaminathan #define EMLXS_MAX_RQS 2 /* ONLY 1 pair is allowed */ 143182527734SSukumar Swaminathan #define EMLXS_MAX_MQS 1 143282527734SSukumar Swaminathan 143382527734SSukumar Swaminathan /* One CQ for each WQ & (RQ pair) plus one for the MQ */ 143482527734SSukumar Swaminathan #define EMLXS_MAX_CQS (EMLXS_MAX_WQS + (EMLXS_MAX_RQS/2) + 1) 143582527734SSukumar Swaminathan 143682527734SSukumar Swaminathan /* The First CQ created is ALWAYS for mbox / event handling */ 143782527734SSukumar Swaminathan #define EMLXS_CQ_MBOX 0 143882527734SSukumar Swaminathan 143982527734SSukumar Swaminathan /* The Second CQ created is ALWAYS for unsol rcv handling */ 144082527734SSukumar Swaminathan /* At this time we are allowing ONLY 1 pair of RQs */ 144182527734SSukumar Swaminathan #define EMLXS_CQ_RCV 1 144282527734SSukumar Swaminathan 144382527734SSukumar Swaminathan /* The remaining CQs are for WQ completions */ 144482527734SSukumar Swaminathan #define EMLXS_CQ_OFFSET_WQ 2 144582527734SSukumar Swaminathan 144682527734SSukumar Swaminathan 144782527734SSukumar Swaminathan /* FCFI RQ Configuration */ 144882527734SSukumar Swaminathan #define EMLXS_FCFI_RQ0_INDEX 0 144982527734SSukumar Swaminathan #define EMLXS_FCFI_RQ0_RMASK 0 /* match all */ 145082527734SSukumar Swaminathan #define EMLXS_FCFI_RQ0_RCTL 0 /* match all */ 145182527734SSukumar Swaminathan #define EMLXS_FCFI_RQ0_TMASK 0 /* match all */ 145282527734SSukumar Swaminathan #define EMLXS_FCFI_RQ0_TYPE 0 /* match all */ 145382527734SSukumar Swaminathan 145482527734SSukumar Swaminathan /* Define the maximum value for a Queue Id */ 145582527734SSukumar Swaminathan #define EMLXS_MAX_EQ_IDS 256 145682527734SSukumar Swaminathan #define EMLXS_MAX_CQ_IDS 1024 145782527734SSukumar Swaminathan #define EMLXS_MAX_WQ_IDS 1024 145882527734SSukumar Swaminathan #define EMLXS_MAX_RQ_IDS 4 145982527734SSukumar Swaminathan 146082527734SSukumar Swaminathan #define EMLXS_RXQ_ELS 0 146182527734SSukumar Swaminathan #define EMLXS_RXQ_CT 1 146282527734SSukumar Swaminathan #define EMLXS_MAX_RXQS 2 146382527734SSukumar Swaminathan 1464291a2b48SSukumar Swaminathan #define PCI_CONFIG_SIZE 0x80 1465fcf3ce44SJohn Forte 146682527734SSukumar Swaminathan typedef struct emlxs_sli3 146782527734SSukumar Swaminathan { 146882527734SSukumar Swaminathan /* SLIM management */ 146982527734SSukumar Swaminathan MATCHMAP slim2; 147082527734SSukumar Swaminathan 147182527734SSukumar Swaminathan /* HBQ management */ 147282527734SSukumar Swaminathan uint32_t hbq_count; /* Total number of HBQs */ 147382527734SSukumar Swaminathan /* configured */ 147482527734SSukumar Swaminathan HBQ_INIT_t hbq_table[EMLXS_NUM_HBQ]; 147582527734SSukumar Swaminathan 147682527734SSukumar Swaminathan /* Adapter memory management */ 147782527734SSukumar Swaminathan caddr_t csr_addr; 147882527734SSukumar Swaminathan caddr_t slim_addr; 147982527734SSukumar Swaminathan ddi_acc_handle_t csr_acc_handle; 148082527734SSukumar Swaminathan ddi_acc_handle_t slim_acc_handle; 148182527734SSukumar Swaminathan 148282527734SSukumar Swaminathan /* SBUS adapter management */ 148382527734SSukumar Swaminathan caddr_t sbus_flash_addr; /* Virt addr of R/W */ 148482527734SSukumar Swaminathan /* Flash */ 148582527734SSukumar Swaminathan caddr_t sbus_core_addr; /* Virt addr of TITAN */ 148682527734SSukumar Swaminathan /* CORE */ 148782527734SSukumar Swaminathan caddr_t sbus_csr_addr; /* Virt addr of TITAN */ 148882527734SSukumar Swaminathan /* CSR */ 148982527734SSukumar Swaminathan ddi_acc_handle_t sbus_flash_acc_handle; 149082527734SSukumar Swaminathan ddi_acc_handle_t sbus_core_acc_handle; 149182527734SSukumar Swaminathan ddi_acc_handle_t sbus_csr_handle; 149282527734SSukumar Swaminathan 149382527734SSukumar Swaminathan /* SLI 2/3 Adapter register management */ 149482527734SSukumar Swaminathan uint32_t *bc_reg_addr; /* virtual offset for BIU */ 149582527734SSukumar Swaminathan /* config reg */ 149682527734SSukumar Swaminathan uint32_t *ha_reg_addr; /* virtual offset for host */ 149782527734SSukumar Swaminathan /* attn reg */ 149882527734SSukumar Swaminathan uint32_t *hc_reg_addr; /* virtual offset for host */ 149982527734SSukumar Swaminathan /* ctl reg */ 150082527734SSukumar Swaminathan uint32_t *ca_reg_addr; /* virtual offset for FF */ 150182527734SSukumar Swaminathan /* attn reg */ 150282527734SSukumar Swaminathan uint32_t *hs_reg_addr; /* virtual offset for */ 150382527734SSukumar Swaminathan /* status reg */ 150482527734SSukumar Swaminathan uint32_t *shc_reg_addr; /* virtual offset for SBUS */ 150582527734SSukumar Swaminathan /* Ctrl reg */ 150682527734SSukumar Swaminathan uint32_t *shs_reg_addr; /* virtual offset for SBUS */ 150782527734SSukumar Swaminathan /* Status reg */ 150882527734SSukumar Swaminathan uint32_t *shu_reg_addr; /* virtual offset for SBUS */ 150982527734SSukumar Swaminathan /* Update reg */ 151082527734SSukumar Swaminathan uint16_t hgp_ring_offset; 151182527734SSukumar Swaminathan uint16_t hgp_hbq_offset; 151282527734SSukumar Swaminathan uint16_t iocb_cmd_size; 151382527734SSukumar Swaminathan uint16_t iocb_rsp_size; 151482527734SSukumar Swaminathan uint32_t hc_copy; /* local copy of HC register */ 151582527734SSukumar Swaminathan 151682527734SSukumar Swaminathan /* Ring management */ 151782527734SSukumar Swaminathan uint32_t ring_count; 151882527734SSukumar Swaminathan emlxs_ring_t ring[MAX_RINGS]; 151982527734SSukumar Swaminathan kmutex_t ring_cmd_lock[MAX_RINGS]; 152082527734SSukumar Swaminathan uint8_t ring_masks[4]; /* number of masks/rings used */ 152182527734SSukumar Swaminathan uint8_t ring_rval[6]; 152282527734SSukumar Swaminathan uint8_t ring_rmask[6]; 152382527734SSukumar Swaminathan uint8_t ring_tval[6]; 152482527734SSukumar Swaminathan uint8_t ring_tmask[6]; 152582527734SSukumar Swaminathan 152682527734SSukumar Swaminathan /* Protected by EMLXS_FCTAB_LOCK */ 152782527734SSukumar Swaminathan #ifdef EMLXS_SPARC 152882527734SSukumar Swaminathan MEMSEG fcp_bpl_seg; 152982527734SSukumar Swaminathan MATCHMAP **fcp_bpl_table; /* iotag table for */ 153082527734SSukumar Swaminathan /* bpl buffers */ 153182527734SSukumar Swaminathan #endif /* EMLXS_SPARC */ 153282527734SSukumar Swaminathan uint32_t mem_bpl_size; 153382527734SSukumar Swaminathan } emlxs_sli3_t; 153482527734SSukumar Swaminathan 153582527734SSukumar Swaminathan typedef struct emlxs_sli4 153682527734SSukumar Swaminathan { 153782527734SSukumar Swaminathan MATCHMAP bootstrapmb; 153882527734SSukumar Swaminathan caddr_t bar1_addr; 153982527734SSukumar Swaminathan caddr_t bar2_addr; 154082527734SSukumar Swaminathan ddi_acc_handle_t bar1_acc_handle; 154182527734SSukumar Swaminathan ddi_acc_handle_t bar2_acc_handle; 154282527734SSukumar Swaminathan 154382527734SSukumar Swaminathan /* SLI4 Adapter register management */ 154482527734SSukumar Swaminathan uint32_t *MPUEPSemaphore_reg_addr; 154582527734SSukumar Swaminathan uint32_t *MBDB_reg_addr; 154682527734SSukumar Swaminathan 154782527734SSukumar Swaminathan uint32_t *CQDB_reg_addr; 154882527734SSukumar Swaminathan uint32_t *MQDB_reg_addr; 154982527734SSukumar Swaminathan uint32_t *WQDB_reg_addr; 155082527734SSukumar Swaminathan uint32_t *RQDB_reg_addr; 155182527734SSukumar Swaminathan 155282527734SSukumar Swaminathan uint32_t flag; 1553*a9800bebSGarrett D'Amore #define EMLXS_SLI4_INTR_ENABLED 0x00000001 1554*a9800bebSGarrett D'Amore #define EMLXS_SLI4_HW_ERROR 0x00000002 1555*a9800bebSGarrett D'Amore #define EMLXS_SLI4_DOWN_LINK 0x00000004 155682527734SSukumar Swaminathan 155782527734SSukumar Swaminathan uint16_t XRICount; 155882527734SSukumar Swaminathan uint16_t XRIBase; 155982527734SSukumar Swaminathan uint16_t RPICount; 156082527734SSukumar Swaminathan uint16_t RPIBase; 156182527734SSukumar Swaminathan uint16_t VPICount; 156282527734SSukumar Swaminathan uint16_t VPIBase; 156382527734SSukumar Swaminathan uint16_t VFICount; 156482527734SSukumar Swaminathan uint16_t VFIBase; 156582527734SSukumar Swaminathan uint16_t FCFICount; 156682527734SSukumar Swaminathan 1567*a9800bebSGarrett D'Amore kmutex_t fcf_lock; 1568*a9800bebSGarrett D'Amore FCFTable_t fcftab; 1569*a9800bebSGarrett D'Amore VFIobj_t *VFI_table; 157082527734SSukumar Swaminathan 157182527734SSukumar Swaminathan /* Save Config Region 23 info */ 157282527734SSukumar Swaminathan tlv_fcoe_t cfgFCOE; 157382527734SSukumar Swaminathan tlv_fcfconnectlist_t cfgFCF; 157482527734SSukumar Swaminathan 1575b3660a96SSukumar Swaminathan MBUF_INFO slim2; 157682527734SSukumar Swaminathan MBUF_INFO dump_region; 157782527734SSukumar Swaminathan #define EMLXS_DUMP_REGION_SIZE 1024 157882527734SSukumar Swaminathan 157982527734SSukumar Swaminathan RPIobj_t *RPIp; 158082527734SSukumar Swaminathan MBUF_INFO HeaderTmplate; 158182527734SSukumar Swaminathan XRIobj_t *XRIp; 1582b3660a96SSukumar Swaminathan 1583b3660a96SSukumar Swaminathan /* Double linked list for available XRIs */ 1584b3660a96SSukumar Swaminathan XRIobj_t *XRIfree_f; 1585b3660a96SSukumar Swaminathan XRIobj_t *XRIfree_b; 158682527734SSukumar Swaminathan uint32_t xrif_count; 158782527734SSukumar Swaminathan uint32_t mem_sgl_size; 158882527734SSukumar Swaminathan 158982527734SSukumar Swaminathan /* Double linked list for XRIs in use */ 159082527734SSukumar Swaminathan XRIobj_t *XRIinuse_f; 159182527734SSukumar Swaminathan XRIobj_t *XRIinuse_b; 159282527734SSukumar Swaminathan uint32_t xria_count; 159382527734SSukumar Swaminathan 1594*a9800bebSGarrett D'Amore kmutex_t que_lock[EMLXS_MAX_WQS]; 159582527734SSukumar Swaminathan EQ_DESC_t eq[EMLXS_MAX_EQS]; 159682527734SSukumar Swaminathan CQ_DESC_t cq[EMLXS_MAX_CQS]; 159782527734SSukumar Swaminathan WQ_DESC_t wq[EMLXS_MAX_WQS]; 159882527734SSukumar Swaminathan RQ_DESC_t rq[EMLXS_MAX_RQS]; 159982527734SSukumar Swaminathan MQ_DESC_t mq; 160082527734SSukumar Swaminathan 160182527734SSukumar Swaminathan /* Used to map a queue ID to a queue DESC_t */ 160282527734SSukumar Swaminathan uint16_t eq_map[EMLXS_MAX_EQ_IDS]; 160382527734SSukumar Swaminathan uint16_t cq_map[EMLXS_MAX_CQ_IDS]; 160482527734SSukumar Swaminathan uint16_t wq_map[EMLXS_MAX_WQ_IDS]; 160582527734SSukumar Swaminathan uint16_t rq_map[EMLXS_MAX_RQ_IDS]; 160682527734SSukumar Swaminathan 160782527734SSukumar Swaminathan RXQ_DESC_t rxq[EMLXS_MAX_RXQS]; 160882527734SSukumar Swaminathan 1609fe199829SSukumar Swaminathan uint32_t ue_mask_lo; 1610fe199829SSukumar Swaminathan uint32_t ue_mask_hi; 1611*a9800bebSGarrett D'Amore 161282527734SSukumar Swaminathan } emlxs_sli4_t; 161382527734SSukumar Swaminathan 161482527734SSukumar Swaminathan 161582527734SSukumar Swaminathan typedef struct emlxs_sli_api 161682527734SSukumar Swaminathan { 161782527734SSukumar Swaminathan int (*sli_map_hdw)(); 161882527734SSukumar Swaminathan void (*sli_unmap_hdw)(); 161982527734SSukumar Swaminathan int32_t (*sli_online)(); 162082527734SSukumar Swaminathan void (*sli_offline)(); 162182527734SSukumar Swaminathan uint32_t (*sli_hba_reset)(); 162282527734SSukumar Swaminathan void (*sli_hba_kill)(); 162382527734SSukumar Swaminathan void (*sli_issue_iocb_cmd)(); 162482527734SSukumar Swaminathan uint32_t (*sli_issue_mbox_cmd)(); 162582527734SSukumar Swaminathan uint32_t (*sli_prep_fct_iocb)(); 162682527734SSukumar Swaminathan uint32_t (*sli_prep_fcp_iocb)(); 162782527734SSukumar Swaminathan uint32_t (*sli_prep_ip_iocb)(); 162882527734SSukumar Swaminathan uint32_t (*sli_prep_els_iocb)(); 162982527734SSukumar Swaminathan uint32_t (*sli_prep_ct_iocb)(); 163082527734SSukumar Swaminathan void (*sli_poll_intr)(); 163182527734SSukumar Swaminathan int32_t (*sli_intx_intr)(); 163282527734SSukumar Swaminathan uint32_t (*sli_msi_intr)(); 163382527734SSukumar Swaminathan void (*sli_disable_intr)(); 163482527734SSukumar Swaminathan void (*sli_timer)(); 163582527734SSukumar Swaminathan void (*sli_poll_erratt)(); 163682527734SSukumar Swaminathan 163782527734SSukumar Swaminathan } emlxs_sli_api_t; 163882527734SSukumar Swaminathan 163982527734SSukumar Swaminathan 1640291a2b48SSukumar Swaminathan typedef struct emlxs_hba 1641291a2b48SSukumar Swaminathan { 1642291a2b48SSukumar Swaminathan dev_info_t *dip; 1643291a2b48SSukumar Swaminathan int32_t emlxinst; 1644291a2b48SSukumar Swaminathan int32_t ddiinst; 164582527734SSukumar Swaminathan uint8_t pci_function_number; 164682527734SSukumar Swaminathan uint8_t pci_device_number; 164782527734SSukumar Swaminathan uint8_t pci_bus_number; 1648*a9800bebSGarrett D'Amore uint8_t pci_cap_offset[PCI_CAP_MAX_PTR]; 1649*a9800bebSGarrett D'Amore 1650291a2b48SSukumar Swaminathan #ifdef FMA_SUPPORT 1651291a2b48SSukumar Swaminathan int32_t fm_caps; /* FMA capabilities */ 1652291a2b48SSukumar Swaminathan #endif /* FMA_SUPPORT */ 1653291a2b48SSukumar Swaminathan fc_fca_tran_t *fca_tran; 1654fcf3ce44SJohn Forte 165562379b58SSukumar Swaminathan /* DMA attributes */ 165662379b58SSukumar Swaminathan ddi_dma_attr_t dma_attr; 165762379b58SSukumar Swaminathan ddi_dma_attr_t dma_attr_ro; 165862379b58SSukumar Swaminathan ddi_dma_attr_t dma_attr_1sg; 165962379b58SSukumar Swaminathan ddi_dma_attr_t dma_attr_fcip_rsp; 166062379b58SSukumar Swaminathan 1661fcf3ce44SJohn Forte /* HBA Info */ 1662291a2b48SSukumar Swaminathan emlxs_model_t model_info; 1663291a2b48SSukumar Swaminathan emlxs_vpd_t vpd; /* vital product data */ 1664291a2b48SSukumar Swaminathan NAME_TYPE wwnn; 1665291a2b48SSukumar Swaminathan NAME_TYPE wwpn; 1666291a2b48SSukumar Swaminathan char snn[256]; 1667291a2b48SSukumar Swaminathan char spn[256]; 1668291a2b48SSukumar Swaminathan PROG_ID load_list[MAX_LOAD_ENTRY]; 1669291a2b48SSukumar Swaminathan WAKE_UP_PARMS wakeup_parms; 1670291a2b48SSukumar Swaminathan uint32_t max_nodes; 1671291a2b48SSukumar Swaminathan uint32_t io_throttle; 1672291a2b48SSukumar Swaminathan uint32_t io_active; 1673291a2b48SSukumar Swaminathan uint32_t bus_type; 1674291a2b48SSukumar Swaminathan #define PCI_FC 0 1675fcf3ce44SJohn Forte #define SBUS_FC 1 1676fcf3ce44SJohn Forte 1677fcf3ce44SJohn Forte /* Link management */ 1678291a2b48SSukumar Swaminathan uint32_t link_event_tag; 1679291a2b48SSukumar Swaminathan uint8_t topology; 1680291a2b48SSukumar Swaminathan uint8_t linkspeed; 1681b3660a96SSukumar Swaminathan uint16_t qos_linkspeed; 1682291a2b48SSukumar Swaminathan uint32_t linkup_wait_flag; 1683291a2b48SSukumar Swaminathan kcondvar_t linkup_lock_cv; 1684291a2b48SSukumar Swaminathan kmutex_t linkup_lock; 1685fcf3ce44SJohn Forte 1686fcf3ce44SJohn Forte /* Memory Pool management */ 1687291a2b48SSukumar Swaminathan emlxs_memseg_t memseg[FC_MAX_SEG]; /* memory for buffer */ 1688291a2b48SSukumar Swaminathan /* structures */ 1689291a2b48SSukumar Swaminathan kmutex_t memget_lock; /* locks all memory pools get */ 1690291a2b48SSukumar Swaminathan kmutex_t memput_lock; /* locks all memory pools put */ 1691fcf3ce44SJohn Forte 1692fcf3ce44SJohn Forte /* Fibre Channel Service Parameters */ 1693291a2b48SSukumar Swaminathan SERV_PARM sparam; 1694291a2b48SSukumar Swaminathan uint32_t fc_edtov; /* E_D_TOV timer value */ 1695291a2b48SSukumar Swaminathan uint32_t fc_arbtov; /* ARB_TOV timer value */ 1696291a2b48SSukumar Swaminathan uint32_t fc_ratov; /* R_A_TOV timer value */ 1697291a2b48SSukumar Swaminathan uint32_t fc_rttov; /* R_T_TOV timer value */ 1698291a2b48SSukumar Swaminathan uint32_t fc_altov; /* AL_TOV timer value */ 1699291a2b48SSukumar Swaminathan uint32_t fc_crtov; /* C_R_TOV timer value */ 1700291a2b48SSukumar Swaminathan uint32_t fc_citov; /* C_I_TOV timer value */ 1701291a2b48SSukumar Swaminathan 1702fcf3ce44SJohn Forte /* Adapter State management */ 1703291a2b48SSukumar Swaminathan int32_t state; 1704fcf3ce44SJohn Forte #define FC_ERROR 0x01 /* Adapter shutdown */ 1705fcf3ce44SJohn Forte #define FC_KILLED 0x02 /* Adapter interlocked/killed */ 1706fcf3ce44SJohn Forte #define FC_WARM_START 0x03 /* Adapter reset, but not restarted */ 1707fcf3ce44SJohn Forte #define FC_INIT_START 0x10 /* Adapter restarted */ 1708fcf3ce44SJohn Forte #define FC_INIT_NVPARAMS 0x11 1709fcf3ce44SJohn Forte #define FC_INIT_REV 0x12 1710fcf3ce44SJohn Forte #define FC_INIT_CFGPORT 0x13 1711fcf3ce44SJohn Forte #define FC_INIT_CFGRING 0x14 1712fcf3ce44SJohn Forte #define FC_INIT_INITLINK 0x15 1713fcf3ce44SJohn Forte #define FC_LINK_DOWN 0x20 171482527734SSukumar Swaminathan #define FC_LINK_DOWN_PERSIST 0x21 1715fcf3ce44SJohn Forte #define FC_LINK_UP 0x30 1716fcf3ce44SJohn Forte #define FC_CLEAR_LA 0x31 1717fcf3ce44SJohn Forte #define FC_READY 0x40 1718fcf3ce44SJohn Forte 1719291a2b48SSukumar Swaminathan uint32_t flag; 1720fcf3ce44SJohn Forte #define FC_ONLINING_MODE 0x00000001 1721fcf3ce44SJohn Forte #define FC_ONLINE_MODE 0x00000002 1722fcf3ce44SJohn Forte #define FC_OFFLINING_MODE 0x00000004 1723fcf3ce44SJohn Forte #define FC_OFFLINE_MODE 0x00000008 1724fcf3ce44SJohn Forte 1725291a2b48SSukumar Swaminathan #define FC_NPIV_ENABLED 0x00000010 /* NPIV enabled on adapter */ 1726291a2b48SSukumar Swaminathan #define FC_NPIV_SUPPORTED 0x00000020 /* NPIV supported on fabric */ 1727fcf3ce44SJohn Forte #define FC_NPIV_UNSUPPORTED 0x00000040 /* NPIV unsupported on fabric */ 1728fcf3ce44SJohn Forte #define FC_NPIV_LINKUP 0x00000100 /* NPIV enabled, supported, */ 1729fcf3ce44SJohn Forte /* and link is ready */ 1730fcf3ce44SJohn Forte #define FC_NPIV_DELAY_REQUIRED 0x00000200 /* Delay issuing FLOGI/FDISC */ 1731fcf3ce44SJohn Forte /* and NameServer cmds */ 1732fcf3ce44SJohn Forte 173382527734SSukumar Swaminathan #define FC_BOOTSTRAPMB_INIT 0x00000400 173482527734SSukumar Swaminathan #define FC_FIP_SUPPORTED 0x00000800 /* FIP supported */ 173582527734SSukumar Swaminathan 1736fcf3ce44SJohn Forte #define FC_FABRIC_ATTACHED 0x00001000 1737fcf3ce44SJohn Forte #define FC_PT_TO_PT 0x00002000 1738fcf3ce44SJohn Forte #define FC_BYPASSED_MODE 0x00004000 1739291a2b48SSukumar Swaminathan #define FC_MENLO_MODE 0x00008000 /* Menlo maintenance mode */ 1740291a2b48SSukumar Swaminathan 1741291a2b48SSukumar Swaminathan #define FC_DUMP_SAFE 0x00010000 /* Safe to DUMP */ 1742291a2b48SSukumar Swaminathan #define FC_DUMP_ACTIVE 0x00020000 /* DUMP in progress */ 1743*a9800bebSGarrett D'Amore #define FC_NEW_FABRIC 0x00040000 1744fcf3ce44SJohn Forte 1745fcf3ce44SJohn Forte #define FC_SLIM2_MODE 0x00100000 /* SLIM in host memory */ 1746fcf3ce44SJohn Forte #define FC_INTERLOCKED 0x00200000 1747fcf3ce44SJohn Forte #define FC_HBQ_ENABLED 0x00400000 1748fcf3ce44SJohn Forte #define FC_ASYNC_EVENTS 0x00800000 1749fcf3ce44SJohn Forte 1750fcf3ce44SJohn Forte #define FC_ILB_MODE 0x01000000 1751fcf3ce44SJohn Forte #define FC_ELB_MODE 0x02000000 1752fcf3ce44SJohn Forte #define FC_LOOPBACK_MODE 0x03000000 /* Loopback Mode Mask */ 1753291a2b48SSukumar Swaminathan #define FC_DUMP 0x04000000 /* DUMP in progress */ 1754fcf3ce44SJohn Forte #define FC_SHUTDOWN 0x08000000 /* SHUTDOWN in progress */ 1755fcf3ce44SJohn Forte 1756291a2b48SSukumar Swaminathan #define FC_OVERTEMP_EVENT 0x10000000 /* FC_ERROR reason: */ 1757291a2b48SSukumar Swaminathan /* over temperature event */ 1758291a2b48SSukumar Swaminathan #define FC_MBOX_TIMEOUT 0x20000000 /* FC_ERROR reason: */ 1759291a2b48SSukumar Swaminathan /* mailbox timeout event */ 1760b3660a96SSukumar Swaminathan #define FC_DMA_CHECK_ERROR 0x40000000 /* Shared memory (slim,..) */ 1761b3660a96SSukumar Swaminathan /* DMA handle went bad */ 1762fcf3ce44SJohn Forte #define FC_HARDWARE_ERROR 0x80000000 /* FC_ERROR state triggered */ 1763fcf3ce44SJohn Forte 176482527734SSukumar Swaminathan #define FC_RESET_MASK 0x00030C1F /* Bits to protect during */ 1765291a2b48SSukumar Swaminathan /* a hard reset */ 176682527734SSukumar Swaminathan #define FC_LINKDOWN_MASK 0xFFF30C1F /* Bits to protect during */ 1767291a2b48SSukumar Swaminathan /* a linkdown */ 1768fcf3ce44SJohn Forte 17696a573d82SSukumar Swaminathan uint32_t fw_timer; 17706a573d82SSukumar Swaminathan uint32_t fw_flag; 17716a573d82SSukumar Swaminathan #define FW_UPDATE_NEEDED 0x00000001 17726a573d82SSukumar Swaminathan #define FW_UPDATE_KERNEL 0x00000002 17736a573d82SSukumar Swaminathan 177482527734SSukumar Swaminathan uint32_t temperature; /* Last reported temperature */ 1775fcf3ce44SJohn Forte 1776fcf3ce44SJohn Forte /* SBUS adapter management */ 1777291a2b48SSukumar Swaminathan caddr_t sbus_pci_addr; /* Virt addr of TITAN */ 1778291a2b48SSukumar Swaminathan /* pci config */ 1779fcf3ce44SJohn Forte ddi_acc_handle_t sbus_pci_handle; 1780fcf3ce44SJohn Forte 178182527734SSukumar Swaminathan /* PCI BUS adapter management */ 178282527734SSukumar Swaminathan caddr_t pci_addr; 178382527734SSukumar Swaminathan ddi_acc_handle_t pci_acc_handle; 178482527734SSukumar Swaminathan 178582527734SSukumar Swaminathan uint32_t sli_mode; 178682527734SSukumar Swaminathan #define EMLXS_HBA_SLI1_MODE 1 178782527734SSukumar Swaminathan #define EMLXS_HBA_SLI2_MODE 2 178882527734SSukumar Swaminathan #define EMLXS_HBA_SLI3_MODE 3 178982527734SSukumar Swaminathan #define EMLXS_HBA_SLI4_MODE 4 179082527734SSukumar Swaminathan 179182527734SSukumar Swaminathan /* SLI private data */ 179282527734SSukumar Swaminathan union { 179382527734SSukumar Swaminathan emlxs_sli3_t sli3; 179482527734SSukumar Swaminathan emlxs_sli4_t sli4; 179582527734SSukumar Swaminathan } sli; 179682527734SSukumar Swaminathan 179782527734SSukumar Swaminathan /* SLI API entry point routines */ 179882527734SSukumar Swaminathan emlxs_sli_api_t sli_api; 1799291a2b48SSukumar Swaminathan 1800291a2b48SSukumar Swaminathan uint32_t io_poll_count; /* Number of poll commands */ 1801291a2b48SSukumar Swaminathan /* in progress */ 1802fcf3ce44SJohn Forte 1803fcf3ce44SJohn Forte /* IO Completion management */ 1804291a2b48SSukumar Swaminathan uint32_t iodone_count; /* Number of IO's on done Q */ 1805fcf3ce44SJohn Forte /* Protected by EMLXS_PORT_LOCK */ 1806291a2b48SSukumar Swaminathan emlxs_buf_t *iodone_list; /* fc_packet being deferred */ 1807291a2b48SSukumar Swaminathan emlxs_buf_t *iodone_tail; /* fc_packet being deferred */ 1808291a2b48SSukumar Swaminathan emlxs_thread_t iodone_thread; 1809bb63f56eSSukumar Swaminathan emlxs_thread_t *spawn_thread_head; 1810bb63f56eSSukumar Swaminathan emlxs_thread_t *spawn_thread_tail; 1811bb63f56eSSukumar Swaminathan kmutex_t spawn_lock; 1812bb63f56eSSukumar Swaminathan uint32_t spawn_open; 1813fcf3ce44SJohn Forte 181482527734SSukumar Swaminathan /* IO Channel management */ 181582527734SSukumar Swaminathan int32_t chan_count; 181682527734SSukumar Swaminathan emlxs_channel_t chan[MAX_CHANNEL]; 181782527734SSukumar Swaminathan kmutex_t channel_tx_lock; 181882527734SSukumar Swaminathan uint8_t channel_fcp; /* Default channel to use for FCP IO */ 181982527734SSukumar Swaminathan #define CHANNEL_FCT channel_fcp 182082527734SSukumar Swaminathan uint8_t channel_ip; /* Default channel to use for IP IO */ 182182527734SSukumar Swaminathan uint8_t channel_els; /* Default channel to use for ELS IO */ 182282527734SSukumar Swaminathan uint8_t channel_ct; /* Default channel to use for CT IO */ 182382527734SSukumar Swaminathan 182482527734SSukumar Swaminathan /* IOTag management */ 182582527734SSukumar Swaminathan emlxs_buf_t **fc_table; /* sc_buf pointers indexed by */ 182682527734SSukumar Swaminathan /* iotag */ 182782527734SSukumar Swaminathan uint16_t fc_iotag; /* used to identify I/Os */ 182882527734SSukumar Swaminathan uint16_t fc_oor_iotag; /* OutOfRange (fc_table) iotags */ 182982527734SSukumar Swaminathan /* typically used for Abort/close */ 183082527734SSukumar Swaminathan #define EMLXS_MAX_ABORT_TAG 0x7fff 183182527734SSukumar Swaminathan uint16_t max_iotag; /* ALL IOCBs except aborts */ 183282527734SSukumar Swaminathan kmutex_t iotag_lock; 183382527734SSukumar Swaminathan uint32_t io_count; /* No of IO holding */ 183482527734SSukumar Swaminathan /* regular iotag */ 183582527734SSukumar Swaminathan uint32_t channel_tx_count; /* No of IO on tx Q */ 1836fcf3ce44SJohn Forte 1837fcf3ce44SJohn Forte /* Mailbox Management */ 1838291a2b48SSukumar Swaminathan uint32_t mbox_queue_flag; 1839291a2b48SSukumar Swaminathan emlxs_queue_t mbox_queue; 1840*a9800bebSGarrett D'Amore void *mbox_mqe; /* active mbox mqe */ 1841*a9800bebSGarrett D'Amore void *mbox_mbq; /* active MAILBOXQ */ 1842291a2b48SSukumar Swaminathan kcondvar_t mbox_lock_cv; /* MBX_SLEEP */ 1843291a2b48SSukumar Swaminathan kmutex_t mbox_lock; /* MBX_SLEEP */ 1844291a2b48SSukumar Swaminathan uint32_t mbox_timer; 1845fcf3ce44SJohn Forte 1846fcf3ce44SJohn Forte /* Interrupt management */ 1847291a2b48SSukumar Swaminathan void *intr_arg; 1848291a2b48SSukumar Swaminathan uint32_t intr_unclaimed; 1849291a2b48SSukumar Swaminathan uint32_t intr_autoClear; 1850291a2b48SSukumar Swaminathan uint32_t intr_flags; 1851fcf3ce44SJohn Forte #define EMLXS_INTX_INITED 0x0001 1852fcf3ce44SJohn Forte #define EMLXS_INTX_ADDED 0x0002 1853fcf3ce44SJohn Forte #define EMLXS_MSI_ENABLED 0x0010 1854fcf3ce44SJohn Forte #define EMLXS_MSI_INITED 0x0020 1855fcf3ce44SJohn Forte #define EMLXS_MSI_ADDED 0x0040 1856291a2b48SSukumar Swaminathan #define EMLXS_INTR_INITED (EMLXS_INTX_INITED|EMLXS_MSI_INITED) 1857291a2b48SSukumar Swaminathan #define EMLXS_INTR_ADDED (EMLXS_INTX_ADDED|EMLXS_MSI_ADDED) 1858fcf3ce44SJohn Forte 1859fcf3ce44SJohn Forte #ifdef MSI_SUPPORT 1860fcf3ce44SJohn Forte ddi_intr_handle_t *intr_htable; 1861291a2b48SSukumar Swaminathan uint32_t *intr_pri; 1862291a2b48SSukumar Swaminathan int32_t *intr_cap; 1863291a2b48SSukumar Swaminathan uint32_t intr_count; 1864291a2b48SSukumar Swaminathan uint32_t intr_type; 1865291a2b48SSukumar Swaminathan uint32_t intr_cond; 1866291a2b48SSukumar Swaminathan uint32_t intr_map[EMLXS_MSI_MAX_INTRS]; 1867291a2b48SSukumar Swaminathan uint32_t intr_mask; 1868fcf3ce44SJohn Forte 1869*a9800bebSGarrett D'Amore kmutex_t msiid_lock; /* for last_msiid */ 1870*a9800bebSGarrett D'Amore int last_msiid; 1871fcf3ce44SJohn Forte 1872291a2b48SSukumar Swaminathan kmutex_t intr_lock[EMLXS_MSI_MAX_INTRS]; 1873*a9800bebSGarrett D'Amore int chan2msi[MAX_CHANNEL]; 1874*a9800bebSGarrett D'Amore /* Index is the channel id */ 1875*a9800bebSGarrett D'Amore int msi2chan[EMLXS_MSI_MAX_INTRS]; 1876*a9800bebSGarrett D'Amore /* Index is the MSX-X msg id */ 1877fcf3ce44SJohn Forte #endif /* MSI_SUPPORT */ 1878fcf3ce44SJohn Forte 1879291a2b48SSukumar Swaminathan uint32_t heartbeat_timer; 1880291a2b48SSukumar Swaminathan uint32_t heartbeat_flag; 1881291a2b48SSukumar Swaminathan uint32_t heartbeat_active; 1882fcf3ce44SJohn Forte 1883fcf3ce44SJohn Forte /* IOCTL management */ 1884291a2b48SSukumar Swaminathan kmutex_t ioctl_lock; 1885291a2b48SSukumar Swaminathan uint32_t ioctl_flags; 1886fcf3ce44SJohn Forte #define EMLXS_OPEN 0x00000001 1887fcf3ce44SJohn Forte #define EMLXS_OPEN_EXCLUSIVE 0x00000002 1888fcf3ce44SJohn Forte 1889fcf3ce44SJohn Forte /* Timer management */ 1890291a2b48SSukumar Swaminathan kcondvar_t timer_lock_cv; 1891291a2b48SSukumar Swaminathan kmutex_t timer_lock; 1892291a2b48SSukumar Swaminathan timeout_id_t timer_id; 1893291a2b48SSukumar Swaminathan uint32_t timer_tics; 1894291a2b48SSukumar Swaminathan uint32_t timer_flags; 1895fcf3ce44SJohn Forte #define EMLXS_TIMER_STARTED 0x0000001 1896fcf3ce44SJohn Forte #define EMLXS_TIMER_BUSY 0x0000002 1897fcf3ce44SJohn Forte #define EMLXS_TIMER_KILL 0x0000004 1898fcf3ce44SJohn Forte #define EMLXS_TIMER_ENDED 0x0000008 1899fcf3ce44SJohn Forte 1900fcf3ce44SJohn Forte /* Misc Timers */ 1901291a2b48SSukumar Swaminathan uint32_t linkup_timer; 1902291a2b48SSukumar Swaminathan uint32_t discovery_timer; 1903291a2b48SSukumar Swaminathan uint32_t pkt_timer; 1904fcf3ce44SJohn Forte 1905fcf3ce44SJohn Forte /* Power Management */ 1906291a2b48SSukumar Swaminathan uint32_t pm_state; 1907fcf3ce44SJohn Forte /* pm_state */ 1908fcf3ce44SJohn Forte #define EMLXS_PM_IN_ATTACH 0x00000001 1909fcf3ce44SJohn Forte #define EMLXS_PM_IN_DETACH 0x00000002 1910fcf3ce44SJohn Forte #define EMLXS_PM_IN_SOL_CB 0x00000010 1911fcf3ce44SJohn Forte #define EMLXS_PM_IN_UNSOL_CB 0x00000020 1912fcf3ce44SJohn Forte #define EMLXS_PM_IN_LINK_RESET 0x00000100 1913fcf3ce44SJohn Forte #define EMLXS_PM_IN_HARD_RESET 0x00000200 1914fcf3ce44SJohn Forte #define EMLXS_PM_SUSPENDED 0x01000000 1915fcf3ce44SJohn Forte 1916291a2b48SSukumar Swaminathan uint32_t pm_level; 1917fcf3ce44SJohn Forte /* pm_level */ 1918fcf3ce44SJohn Forte #define EMLXS_PM_ADAPTER_DOWN 0 1919fcf3ce44SJohn Forte #define EMLXS_PM_ADAPTER_UP 1 1920fcf3ce44SJohn Forte 1921291a2b48SSukumar Swaminathan uint32_t pm_busy; 1922291a2b48SSukumar Swaminathan kmutex_t pm_lock; 1923291a2b48SSukumar Swaminathan uint8_t pm_config[PCI_CONFIG_SIZE]; 1924fcf3ce44SJohn Forte #ifdef IDLE_TIMER 1925291a2b48SSukumar Swaminathan uint32_t pm_idle_timer; 1926291a2b48SSukumar Swaminathan uint32_t pm_active; /* Only used by timer */ 1927fcf3ce44SJohn Forte #endif /* IDLE_TIMER */ 1928fcf3ce44SJohn Forte 1929fcf3ce44SJohn Forte /* Loopback management */ 1930291a2b48SSukumar Swaminathan uint32_t loopback_tics; 1931291a2b48SSukumar Swaminathan void *loopback_pkt; 1932fcf3ce44SJohn Forte 1933fcf3ce44SJohn Forte /* Event management */ 193482527734SSukumar Swaminathan emlxs_event_queue_t event_queue; 193582527734SSukumar Swaminathan uint32_t event_mask; 193682527734SSukumar Swaminathan uint32_t event_timer; 1937fcf3ce44SJohn Forte emlxs_dfc_event_t dfc_event[MAX_DFC_EVENTS]; 1938fcf3ce44SJohn Forte emlxs_hba_event_t hba_event; 1939fcf3ce44SJohn Forte 1940fcf3ce44SJohn Forte /* Parameter management */ 1941291a2b48SSukumar Swaminathan emlxs_config_t config[NUM_CFG_PARAM]; 1942fcf3ce44SJohn Forte 1943fcf3ce44SJohn Forte /* Driver stat management */ 1944291a2b48SSukumar Swaminathan kstat_t *kstat; 1945291a2b48SSukumar Swaminathan emlxs_stats_t stats; 1946fcf3ce44SJohn Forte 1947fcf3ce44SJohn Forte /* Log management */ 1948291a2b48SSukumar Swaminathan emlxs_msg_log_t log; 1949fcf3ce44SJohn Forte 1950fcf3ce44SJohn Forte /* Port managment */ 195182527734SSukumar Swaminathan uint32_t vpi_base; 1952291a2b48SSukumar Swaminathan uint32_t vpi_max; 1953291a2b48SSukumar Swaminathan uint32_t vpi_high; 1954291a2b48SSukumar Swaminathan uint32_t num_of_ports; 1955fcf3ce44SJohn Forte 1956291a2b48SSukumar Swaminathan kmutex_t port_lock; /* locks port, nodes, rings */ 1957291a2b48SSukumar Swaminathan emlxs_port_t port[MAX_VPORTS + 1]; /* port specific info */ 1958291a2b48SSukumar Swaminathan /* Last one is for */ 1959291a2b48SSukumar Swaminathan /* NPIV ready test */ 1960fcf3ce44SJohn Forte 1961fcf3ce44SJohn Forte #ifdef DHCHAP_SUPPORT 1962291a2b48SSukumar Swaminathan kmutex_t dhc_lock; 1963291a2b48SSukumar Swaminathan kmutex_t auth_lock; 1964291a2b48SSukumar Swaminathan emlxs_auth_cfg_t auth_cfg; /* Default auth_cfg. */ 1965291a2b48SSukumar Swaminathan /* Points to list of entries. */ 1966291a2b48SSukumar Swaminathan /* Protected by auth_lock */ 1967291a2b48SSukumar Swaminathan uint32_t auth_cfg_count; 1968291a2b48SSukumar Swaminathan emlxs_auth_key_t auth_key; /* Default auth_key. */ 1969291a2b48SSukumar Swaminathan /* Points to list of entries. */ 1970291a2b48SSukumar Swaminathan /* Protected by auth_lock */ 1971291a2b48SSukumar Swaminathan uint32_t auth_key_count; 1972291a2b48SSukumar Swaminathan uint32_t rdn_flag; 1973fcf3ce44SJohn Forte #endif /* DHCHAP_SUPPORT */ 1974fcf3ce44SJohn Forte 1975291a2b48SSukumar Swaminathan uint16_t ini_mode; 1976291a2b48SSukumar Swaminathan uint16_t tgt_mode; 1977fcf3ce44SJohn Forte 1978fcf3ce44SJohn Forte #ifdef TEST_SUPPORT 1979291a2b48SSukumar Swaminathan uint32_t underrun_counter; 1980291a2b48SSukumar Swaminathan #endif /* TEST_SUPPORT */ 1981291a2b48SSukumar Swaminathan 1982291a2b48SSukumar Swaminathan #ifdef MODFW_SUPPORT 1983291a2b48SSukumar Swaminathan ddi_modhandle_t fw_modhandle; 1984291a2b48SSukumar Swaminathan #endif /* MODFW_SUPPORT */ 1985291a2b48SSukumar Swaminathan 1986291a2b48SSukumar Swaminathan #ifdef DUMP_SUPPORT 1987291a2b48SSukumar Swaminathan emlxs_file_t dump_txtfile; 1988291a2b48SSukumar Swaminathan emlxs_file_t dump_dmpfile; 1989291a2b48SSukumar Swaminathan emlxs_file_t dump_ceefile; 1990291a2b48SSukumar Swaminathan kmutex_t dump_lock; 1991291a2b48SSukumar Swaminathan #define EMLXS_DUMP_LOCK hba->dump_lock 1992291a2b48SSukumar Swaminathan #define EMLXS_TXT_FILE 1 1993291a2b48SSukumar Swaminathan #define EMLXS_DMP_FILE 2 1994291a2b48SSukumar Swaminathan #define EMLXS_CEE_FILE 3 1995291a2b48SSukumar Swaminathan 1996291a2b48SSukumar Swaminathan #define EMLXS_DRV_DUMP 0 1997291a2b48SSukumar Swaminathan #define EMLXS_TEMP_DUMP 1 1998291a2b48SSukumar Swaminathan #define EMLXS_USER_DUMP 2 1999291a2b48SSukumar Swaminathan 2000291a2b48SSukumar Swaminathan #endif /* DUMP_SUPPORT */ 2001291a2b48SSukumar Swaminathan 2002fcf3ce44SJohn Forte } emlxs_hba_t; 2003fcf3ce44SJohn Forte 200482527734SSukumar Swaminathan #define EMLXS_SLI_MAP_HDW (hba->sli_api.sli_map_hdw) 200582527734SSukumar Swaminathan #define EMLXS_SLI_UNMAP_HDW (hba->sli_api.sli_unmap_hdw) 200682527734SSukumar Swaminathan #define EMLXS_SLI_ONLINE (hba->sli_api.sli_online) 200782527734SSukumar Swaminathan #define EMLXS_SLI_OFFLINE (hba->sli_api.sli_offline) 200882527734SSukumar Swaminathan #define EMLXS_SLI_HBA_RESET (hba->sli_api.sli_hba_reset) 200982527734SSukumar Swaminathan #define EMLXS_SLI_HBA_KILL (hba->sli_api.sli_hba_kill) 201082527734SSukumar Swaminathan #define EMLXS_SLI_ISSUE_IOCB_CMD (hba->sli_api.sli_issue_iocb_cmd) 201182527734SSukumar Swaminathan #define EMLXS_SLI_ISSUE_MBOX_CMD (hba->sli_api.sli_issue_mbox_cmd) 201282527734SSukumar Swaminathan #define EMLXS_SLI_PREP_FCT_IOCB (hba->sli_api.sli_prep_fct_iocb) 201382527734SSukumar Swaminathan #define EMLXS_SLI_PREP_FCP_IOCB (hba->sli_api.sli_prep_fcp_iocb) 201482527734SSukumar Swaminathan #define EMLXS_SLI_PREP_IP_IOCB (hba->sli_api.sli_prep_ip_iocb) 201582527734SSukumar Swaminathan #define EMLXS_SLI_PREP_ELS_IOCB (hba->sli_api.sli_prep_els_iocb) 201682527734SSukumar Swaminathan #define EMLXS_SLI_PREP_CT_IOCB (hba->sli_api.sli_prep_ct_iocb) 201782527734SSukumar Swaminathan #define EMLXS_SLI_POLL_INTR (hba->sli_api.sli_poll_intr) 201882527734SSukumar Swaminathan #define EMLXS_SLI_INTX_INTR (hba->sli_api.sli_intx_intr) 201982527734SSukumar Swaminathan #define EMLXS_SLI_MSI_INTR (hba->sli_api.sli_msi_intr) 202082527734SSukumar Swaminathan #define EMLXS_SLI_DISABLE_INTR (hba->sli_api.sli_disable_intr) 202182527734SSukumar Swaminathan #define EMLXS_SLI_TIMER (hba->sli_api.sli_timer) 202282527734SSukumar Swaminathan #define EMLXS_SLI_POLL_ERRATT (hba->sli_api.sli_poll_erratt) 2023291a2b48SSukumar Swaminathan 2024291a2b48SSukumar Swaminathan #define EMLXS_HBA_T 1 /* flag emlxs_hba_t is already typedefed */ 2025fcf3ce44SJohn Forte 2026fcf3ce44SJohn Forte #ifdef MSI_SUPPORT 2027291a2b48SSukumar Swaminathan #define EMLXS_INTR_INIT(_hba, _m) emlxs_msi_init(_hba, _m) 2028291a2b48SSukumar Swaminathan #define EMLXS_INTR_UNINIT(_hba) emlxs_msi_uninit(_hba) 2029291a2b48SSukumar Swaminathan #define EMLXS_INTR_ADD(_hba) emlxs_msi_add(_hba) 2030291a2b48SSukumar Swaminathan #define EMLXS_INTR_REMOVE(_hba) emlxs_msi_remove(_hba) 2031fcf3ce44SJohn Forte #else 2032291a2b48SSukumar Swaminathan #define EMLXS_INTR_INIT(_hba, _m) emlxs_intx_init(_hba, _m) 2033291a2b48SSukumar Swaminathan #define EMLXS_INTR_UNINIT(_hba) emlxs_intx_uninit(_hba) 2034291a2b48SSukumar Swaminathan #define EMLXS_INTR_ADD(_hba) emlxs_intx_add(_hba) 2035291a2b48SSukumar Swaminathan #define EMLXS_INTR_REMOVE(_hba) emlxs_intx_remove(_hba) 2036fcf3ce44SJohn Forte #endif /* MSI_SUPPORT */ 2037fcf3ce44SJohn Forte 2038fcf3ce44SJohn Forte 2039fcf3ce44SJohn Forte /* Power Management Component */ 2040291a2b48SSukumar Swaminathan #define EMLXS_PM_ADAPTER 0 2041291a2b48SSukumar Swaminathan 2042291a2b48SSukumar Swaminathan 2043291a2b48SSukumar Swaminathan #define DRV_TIME (uint32_t)(ddi_get_time() - emlxs_device.drv_timestamp) 2044291a2b48SSukumar Swaminathan 2045291a2b48SSukumar Swaminathan #define HBA port->hba 2046291a2b48SSukumar Swaminathan #define PPORT hba->port[0] 2047291a2b48SSukumar Swaminathan #define VPORT(x) hba->port[x] 2048291a2b48SSukumar Swaminathan #define EMLXS_TIMER_LOCK hba->timer_lock 2049291a2b48SSukumar Swaminathan #define VPD hba->vpd 2050291a2b48SSukumar Swaminathan #define CFG hba->config[0] 2051291a2b48SSukumar Swaminathan #define LOG hba->log 205282527734SSukumar Swaminathan #define EVENTQ hba->event_queue 2053291a2b48SSukumar Swaminathan #define EMLXS_MBOX_LOCK hba->mbox_lock 2054291a2b48SSukumar Swaminathan #define EMLXS_MBOX_CV hba->mbox_lock_cv 2055291a2b48SSukumar Swaminathan #define EMLXS_LINKUP_LOCK hba->linkup_lock 2056291a2b48SSukumar Swaminathan #define EMLXS_LINKUP_CV hba->linkup_lock_cv 205782527734SSukumar Swaminathan #define EMLXS_TX_CHANNEL_LOCK hba->channel_tx_lock /* ring txq lock */ 2058291a2b48SSukumar Swaminathan #define EMLXS_MEMGET_LOCK hba->memget_lock /* mempool get lock */ 2059291a2b48SSukumar Swaminathan #define EMLXS_MEMPUT_LOCK hba->memput_lock /* mempool put lock */ 2060291a2b48SSukumar Swaminathan #define EMLXS_IOCTL_LOCK hba->ioctl_lock /* ioctl lock */ 2061d08970deSSukumar Swaminathan #define EMLXS_SPAWN_LOCK hba->spawn_lock /* spawn lock */ 2062d08970deSSukumar Swaminathan #define EMLXS_PM_LOCK hba->pm_lock /* pm lock */ 2063291a2b48SSukumar Swaminathan #define HBASTATS hba->stats 206482527734SSukumar Swaminathan #define EMLXS_CMD_RING_LOCK(n) hba->sli.sli3.ring_cmd_lock[n] 2065*a9800bebSGarrett D'Amore 2066*a9800bebSGarrett D'Amore #define EMLXS_QUE_LOCK(n) hba->sli.sli4.que_lock[n] 2067*a9800bebSGarrett D'Amore #define EMLXS_MSIID_LOCK hba->msiid_lock 2068*a9800bebSGarrett D'Amore 206982527734SSukumar Swaminathan #define EMLXS_FCTAB_LOCK hba->iotag_lock 2070*a9800bebSGarrett D'Amore 2071*a9800bebSGarrett D'Amore #define EMLXS_FCF_LOCK hba->sli.sli4.fcf_lock 2072*a9800bebSGarrett D'Amore 2073291a2b48SSukumar Swaminathan #define EMLXS_PORT_LOCK hba->port_lock /* locks ports, */ 2074fcf3ce44SJohn Forte /* nodes, rings */ 2075291a2b48SSukumar Swaminathan #define EMLXS_INTR_LOCK(_id) hba->intr_lock[_id] /* locks intr threads */ 2076fcf3ce44SJohn Forte 2077291a2b48SSukumar Swaminathan #define EMLXS_PKT_LOCK port->pkt_lock /* used for pkt */ 2078291a2b48SSukumar Swaminathan /* polling */ 2079291a2b48SSukumar Swaminathan #define EMLXS_PKT_CV port->pkt_lock_cv /* Used for pkt */ 2080291a2b48SSukumar Swaminathan /* polling */ 2081291a2b48SSukumar Swaminathan #define EMLXS_UB_LOCK port->ub_lock /* locks unsolicited */ 2082fcf3ce44SJohn Forte /* buffer pool */ 2083fcf3ce44SJohn Forte 208482527734SSukumar Swaminathan /* These SWAPs will swap on any platform */ 208582527734SSukumar Swaminathan #define SWAP32_BUFFER(_b, _c) emlxs_swap32_buffer(_b, _c) 208682527734SSukumar Swaminathan #define SWAP32_BCOPY(_s, _d, _c) emlxs_swap32_bcopy(_s, _d, _c) 2087fcf3ce44SJohn Forte 208882527734SSukumar Swaminathan #define SWAP64(_x) ((((uint64_t)(_x) & 0xFF)<<56) | \ 208982527734SSukumar Swaminathan (((uint64_t)(_x) & 0xFF00)<<40) | \ 209082527734SSukumar Swaminathan (((uint64_t)(_x) & 0xFF0000)<<24) | \ 209182527734SSukumar Swaminathan (((uint64_t)(_x) & 0xFF000000)<<8) | \ 209282527734SSukumar Swaminathan (((uint64_t)(_x) & 0xFF00000000)>>8) | \ 209382527734SSukumar Swaminathan (((uint64_t)(_x) & 0xFF0000000000)>>24) | \ 209482527734SSukumar Swaminathan (((uint64_t)(_x) & 0xFF000000000000)>>40) | \ 209582527734SSukumar Swaminathan (((uint64_t)(_x) & 0xFF00000000000000)>>56)) 2096fcf3ce44SJohn Forte 209782527734SSukumar Swaminathan #define SWAP32(_x) ((((uint32_t)(_x) & 0xFF)<<24) | \ 209882527734SSukumar Swaminathan (((uint32_t)(_x) & 0xFF00)<<8) | \ 209982527734SSukumar Swaminathan (((uint32_t)(_x) & 0xFF0000)>>8) | \ 210082527734SSukumar Swaminathan (((uint32_t)(_x) & 0xFF000000)>>24)) 2101fcf3ce44SJohn Forte 210282527734SSukumar Swaminathan #define SWAP16(_x) ((((uint16_t)(_x) & 0xFF)<<8) | \ 210382527734SSukumar Swaminathan (((uint16_t)(_x) & 0xFF00)>>8)) 2104fcf3ce44SJohn Forte 210582527734SSukumar Swaminathan #define SWAP24_LO(_x) ((((uint32_t)(_x) & 0xFF)<<16) | \ 210682527734SSukumar Swaminathan ((uint32_t)(_x) & 0xFF00FF00) | \ 210782527734SSukumar Swaminathan (((uint32_t)(_x) & 0x00FF0000)>>16)) 2108fcf3ce44SJohn Forte 210982527734SSukumar Swaminathan #define SWAP24_HI(_x) (((uint32_t)(_x) & 0x00FF00FF) | \ 211082527734SSukumar Swaminathan (((uint32_t)(_x) & 0x0000FF00)<<16) | \ 211182527734SSukumar Swaminathan (((uint32_t)(_x) & 0xFF000000)>>16)) 2112fcf3ce44SJohn Forte 211382527734SSukumar Swaminathan /* These LE_SWAPs will only swap on a LE platform */ 211482527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 211582527734SSukumar Swaminathan #define LE_SWAP32_BUFFER(_b, _c) SWAP32_BUFFER(_b, _c) 211682527734SSukumar Swaminathan #define LE_SWAP32_BCOPY(_s, _d, _c) SWAP32_BCOPY(_s, _d, _c) 211782527734SSukumar Swaminathan #define LE_SWAP64(_x) SWAP64(_x) 211882527734SSukumar Swaminathan #define LE_SWAP32(_x) SWAP32(_x) 211982527734SSukumar Swaminathan #define LE_SWAP16(_x) SWAP16(_x) 212082527734SSukumar Swaminathan #define LE_SWAP24_LO(_x) SWAP24_LO(X) 212182527734SSukumar Swaminathan #define LE_SWAP24_HI(_x) SWAP24_HI(X) 2122fcf3ce44SJohn Forte 212382527734SSukumar Swaminathan #if (EMLXS_MODREVX == EMLXS_MODREV2X) 212482527734SSukumar Swaminathan #undef LE_SWAP24_LO 212582527734SSukumar Swaminathan #define LE_SWAP24_LO(_x) (_x) 212682527734SSukumar Swaminathan #undef LE_SWAP24_HI 212782527734SSukumar Swaminathan #define LE_SWAP24_HI(_x) (_x) 212882527734SSukumar Swaminathan #endif /* EMLXS_MODREV2X */ 2129291a2b48SSukumar Swaminathan 213082527734SSukumar Swaminathan #else /* BIG ENDIAN */ 213182527734SSukumar Swaminathan #define LE_SWAP32_BUFFER(_b, _c) 213282527734SSukumar Swaminathan #define LE_SWAP32_BCOPY(_s, _d, _c) bcopy(_s, _d, _c) 213382527734SSukumar Swaminathan #define LE_SWAP64(_x) (_x) 213482527734SSukumar Swaminathan #define LE_SWAP32(_x) (_x) 213582527734SSukumar Swaminathan #define LE_SWAP16(_x) (_x) 213682527734SSukumar Swaminathan #define LE_SWAP24_LO(_x) (_x) 213782527734SSukumar Swaminathan #define LE_SWAP24_HI(_x) (_x) 213882527734SSukumar Swaminathan #endif /* EMLXS_LITTLE_ENDIAN */ 213982527734SSukumar Swaminathan 214082527734SSukumar Swaminathan /* These BE_SWAPs will only swap on a BE platform */ 214182527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 214282527734SSukumar Swaminathan #define BE_SWAP32_BUFFER(_b, _c) SWAP32_BUFFER(_b, _c) 214382527734SSukumar Swaminathan #define BE_SWAP32_BCOPY(_s, _d, _c) SWAP32_BCOPY(_s, _d, _c) 214482527734SSukumar Swaminathan #define BE_SWAP64(_x) SWAP64(_x) 214582527734SSukumar Swaminathan #define BE_SWAP32(_x) SWAP32(_x) 214682527734SSukumar Swaminathan #define BE_SWAP16(_x) SWAP16(_x) 214782527734SSukumar Swaminathan #else /* LITTLE ENDIAN */ 214882527734SSukumar Swaminathan #define BE_SWAP32_BUFFER(_b, _c) 214982527734SSukumar Swaminathan #define BE_SWAP32_BCOPY(_s, _d, _c) bcopy(_s, _d, _c) 215082527734SSukumar Swaminathan #define BE_SWAP64(_x) (_x) 215182527734SSukumar Swaminathan #define BE_SWAP32(_x) (_x) 215282527734SSukumar Swaminathan #define BE_SWAP16(_x) (_x) 215382527734SSukumar Swaminathan #endif /* EMLXS_BIG_ENDIAN */ 2154fcf3ce44SJohn Forte 2155fcf3ce44SJohn Forte #ifdef __cplusplus 2156fcf3ce44SJohn Forte } 2157fcf3ce44SJohn Forte #endif 2158fcf3ce44SJohn Forte 2159fcf3ce44SJohn Forte #endif /* _EMLXS_FC_H */ 2160