1fcf3ce44SJohn Forte /* 2fcf3ce44SJohn Forte * CDDL HEADER START 3fcf3ce44SJohn Forte * 4fcf3ce44SJohn Forte * The contents of this file are subject to the terms of the 5fcf3ce44SJohn Forte * Common Development and Distribution License (the "License"). 6fcf3ce44SJohn Forte * You may not use this file except in compliance with the License. 7fcf3ce44SJohn Forte * 8*8f23e9faSHans Rosenfeld * You can obtain a copy of the license at 9*8f23e9faSHans Rosenfeld * http://www.opensource.org/licenses/cddl1.txt. 10fcf3ce44SJohn Forte * See the License for the specific language governing permissions 11fcf3ce44SJohn Forte * and limitations under the License. 12fcf3ce44SJohn Forte * 13fcf3ce44SJohn Forte * When distributing Covered Code, include this CDDL HEADER in each 14fcf3ce44SJohn Forte * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15fcf3ce44SJohn Forte * If applicable, add the following below this CDDL HEADER, with the 16fcf3ce44SJohn Forte * fields enclosed by brackets "[]" replaced with your own identifying 17fcf3ce44SJohn Forte * information: Portions Copyright [yyyy] [name of copyright owner] 18fcf3ce44SJohn Forte * 19fcf3ce44SJohn Forte * CDDL HEADER END 20fcf3ce44SJohn Forte */ 21fcf3ce44SJohn Forte 22fcf3ce44SJohn Forte /* 23*8f23e9faSHans Rosenfeld * Copyright (c) 2004-2012 Emulex. All rights reserved. 2482527734SSukumar Swaminathan * Use is subject to license terms. 25fcf3ce44SJohn Forte */ 26fcf3ce44SJohn Forte 27fcf3ce44SJohn Forte #ifndef _EMLXS_FC_H 28fcf3ce44SJohn Forte #define _EMLXS_FC_H 29fcf3ce44SJohn Forte 30fcf3ce44SJohn Forte #ifdef __cplusplus 31fcf3ce44SJohn Forte extern "C" { 32fcf3ce44SJohn Forte #endif 33fcf3ce44SJohn Forte 34291a2b48SSukumar Swaminathan typedef struct emlxs_buf 35291a2b48SSukumar Swaminathan { 36291a2b48SSukumar Swaminathan fc_packet_t *pkt; /* scsi_pkt reference */ 37291a2b48SSukumar Swaminathan struct emlxs_port *port; /* pointer to port */ 38291a2b48SSukumar Swaminathan void *bmp; /* Save the buffer pointer */ 39291a2b48SSukumar Swaminathan /* list for later use. */ 40291a2b48SSukumar Swaminathan struct emlxs_buf *fc_fwd; /* Use it by chip_Q */ 41291a2b48SSukumar Swaminathan struct emlxs_buf *fc_bkwd; /* Use it by chip_Q */ 42291a2b48SSukumar Swaminathan struct emlxs_buf *next; /* Use it when the iodone */ 43a9800bebSGarrett D'Amore struct emlxs_node *node; 4482527734SSukumar Swaminathan void *channel; /* Save channel and used by */ 45291a2b48SSukumar Swaminathan /* abort */ 4682527734SSukumar Swaminathan struct emlxs_buf *fpkt; /* Flush pkt pointer */ 47a9800bebSGarrett D'Amore struct XRIobj *xrip; /* Exchange resource */ 48291a2b48SSukumar Swaminathan IOCBQ iocbq; 49291a2b48SSukumar Swaminathan kmutex_t mtx; 50291a2b48SSukumar Swaminathan uint32_t pkt_flags; 51291a2b48SSukumar Swaminathan uint32_t iotag; /* iotag for this cmd */ 52291a2b48SSukumar Swaminathan uint32_t ticks; /* save the timeout ticks */ 53291a2b48SSukumar Swaminathan /* for the fc_packet_t */ 54291a2b48SSukumar Swaminathan uint32_t abort_attempts; 55a9800bebSGarrett D'Amore uint32_t lun; 56a9800bebSGarrett D'Amore #define EMLXS_LUN_NONE 0xFFFFFFFF 57a9800bebSGarrett D'Amore 58291a2b48SSukumar Swaminathan uint32_t class; /* Save class and used by */ 59291a2b48SSukumar Swaminathan /* abort */ 60291a2b48SSukumar Swaminathan uint32_t ucmd; /* Unsolicted command that */ 61291a2b48SSukumar Swaminathan /* this packet is responding */ 62291a2b48SSukumar Swaminathan /* to, if any */ 63291a2b48SSukumar Swaminathan int32_t flush_count; /* Valid only in flush pkts */ 64291a2b48SSukumar Swaminathan uint32_t did; 65fcf3ce44SJohn Forte 66fcf3ce44SJohn Forte #ifdef SFCT_SUPPORT 67291a2b48SSukumar Swaminathan kmutex_t fct_mtx; 68291a2b48SSukumar Swaminathan fc_packet_t *fct_pkt; 69291a2b48SSukumar Swaminathan fct_cmd_t *fct_cmd; 70fcf3ce44SJohn Forte 71291a2b48SSukumar Swaminathan uint8_t fct_type; 72fcf3ce44SJohn Forte 73fcf3ce44SJohn Forte #define EMLXS_FCT_ELS_CMD 0x01 /* Unsolicted */ 74fcf3ce44SJohn Forte #define EMLXS_FCT_ELS_REQ 0x02 /* Solicited */ 75fcf3ce44SJohn Forte #define EMLXS_FCT_ELS_RSP 0x04 76fcf3ce44SJohn Forte #define EMLXS_FCT_CT_REQ 0x08 /* Solicited */ 77fcf3ce44SJohn Forte #define EMLXS_FCT_FCP_CMD 0x10 /* Unsolicted */ 78fcf3ce44SJohn Forte #define EMLXS_FCT_FCP_DATA 0x20 79fcf3ce44SJohn Forte #define EMLXS_FCT_FCP_STATUS 0x40 80fcf3ce44SJohn Forte 81fcf3ce44SJohn Forte 82291a2b48SSukumar Swaminathan uint8_t fct_flags; 83fcf3ce44SJohn Forte 84fcf3ce44SJohn Forte #define EMLXS_FCT_SEND_STATUS 0x01 8582527734SSukumar Swaminathan #define EMLXS_FCT_ABORT_INP 0x02 8682527734SSukumar Swaminathan #define EMLXS_FCT_IO_INP 0x04 87a9800bebSGarrett D'Amore #define EMLXS_FCT_PLOGI_RECEIVED 0x10 88a9800bebSGarrett D'Amore #define EMLXS_FCT_REGISTERED 0x20 89291a2b48SSukumar Swaminathan 90291a2b48SSukumar Swaminathan uint16_t fct_state; 91291a2b48SSukumar Swaminathan 92291a2b48SSukumar Swaminathan #define EMLXS_FCT_FCP_CMD_RECEIVED 1 93291a2b48SSukumar Swaminathan #define EMLXS_FCT_ELS_CMD_RECEIVED 2 94291a2b48SSukumar Swaminathan #define EMLXS_FCT_CMD_POSTED 3 95291a2b48SSukumar Swaminathan #define EMLXS_FCT_CMD_WAITQ 4 9682527734SSukumar Swaminathan #define EMLXS_FCT_SEND_CMD_RSP 5 9782527734SSukumar Swaminathan #define EMLXS_FCT_SEND_ELS_RSP 6 9882527734SSukumar Swaminathan #define EMLXS_FCT_SEND_ELS_REQ 7 9982527734SSukumar Swaminathan #define EMLXS_FCT_SEND_CT_REQ 8 10082527734SSukumar Swaminathan #define EMLXS_FCT_RSP_PENDING 9 10182527734SSukumar Swaminathan #define EMLXS_FCT_REQ_PENDING 10 10282527734SSukumar Swaminathan #define EMLXS_FCT_REG_PENDING 11 10382527734SSukumar Swaminathan #define EMLXS_FCT_REG_COMPLETE 12 10482527734SSukumar Swaminathan #define EMLXS_FCT_OWNED 13 10582527734SSukumar Swaminathan #define EMLXS_FCT_SEND_FCP_DATA 14 10682527734SSukumar Swaminathan #define EMLXS_FCT_SEND_FCP_STATUS 15 10782527734SSukumar Swaminathan #define EMLXS_FCT_DATA_PENDING 16 10882527734SSukumar Swaminathan #define EMLXS_FCT_STATUS_PENDING 17 10982527734SSukumar Swaminathan #define EMLXS_FCT_PKT_COMPLETE 18 11082527734SSukumar Swaminathan #define EMLXS_FCT_PKT_FCPRSP_COMPLETE 19 11182527734SSukumar Swaminathan #define EMLXS_FCT_PKT_ELSRSP_COMPLETE 20 11282527734SSukumar Swaminathan #define EMLXS_FCT_PKT_ELSCMD_COMPLETE 21 11382527734SSukumar Swaminathan #define EMLXS_FCT_PKT_CTCMD_COMPLETE 22 11482527734SSukumar Swaminathan #define EMLXS_FCT_REQ_COMPLETE 23 11582527734SSukumar Swaminathan #define EMLXS_FCT_CLOSE_PENDING 24 11682527734SSukumar Swaminathan #define EMLXS_FCT_ABORT_PENDING 25 11782527734SSukumar Swaminathan #define EMLXS_FCT_ABORT_DONE 26 11882527734SSukumar Swaminathan #define EMLXS_FCT_IO_DONE 27 11982527734SSukumar Swaminathan 12082527734SSukumar Swaminathan #define EMLXS_FCT_IOCB_ISSUED 256 /* For tracing only */ 12182527734SSukumar Swaminathan #define EMLXS_FCT_IOCB_COMPLETE 257 /* For tracing only */ 122291a2b48SSukumar Swaminathan 123291a2b48SSukumar Swaminathan stmf_data_buf_t *fct_buf; 124291a2b48SSukumar Swaminathan 125291a2b48SSukumar Swaminathan #endif /* SFCT_SUPPORT */ 126291a2b48SSukumar Swaminathan 127291a2b48SSukumar Swaminathan #ifdef SAN_DIAG_SUPPORT 128291a2b48SSukumar Swaminathan hrtime_t sd_start_time; 129*8f23e9faSHans Rosenfeld #endif /* SAN_DIAG_SUPPORT */ 130*8f23e9faSHans Rosenfeld 131291a2b48SSukumar Swaminathan } emlxs_buf_t; 132fcf3ce44SJohn Forte 133fcf3ce44SJohn Forte 134fcf3ce44SJohn Forte 135291a2b48SSukumar Swaminathan #ifdef FCT_IO_TRACE 13682527734SSukumar Swaminathan #define EMLXS_FCT_STATE_CHG(_fct_cmd, _cmd_sbp, _state) \ 13782527734SSukumar Swaminathan (_cmd_sbp)->fct_state = _state; \ 13882527734SSukumar Swaminathan emlxs_fct_io_trace((_cmd_sbp)->port, _fct_cmd, _state) 139291a2b48SSukumar Swaminathan #else 140291a2b48SSukumar Swaminathan /* define to set fct_state */ 14182527734SSukumar Swaminathan #define EMLXS_FCT_STATE_CHG(_fct_cmd, _cmd_sbp, _state) \ 14282527734SSukumar Swaminathan (_cmd_sbp)->fct_state = _state 143291a2b48SSukumar Swaminathan #endif /* FCT_IO_TRACE */ 144fcf3ce44SJohn Forte 145fcf3ce44SJohn Forte 146fcf3ce44SJohn Forte /* pkt_flags */ 147fcf3ce44SJohn Forte #define PACKET_IN_COMPLETION 0x00000001 148fcf3ce44SJohn Forte #define PACKET_IN_TXQ 0x00000002 149fcf3ce44SJohn Forte #define PACKET_IN_CHIPQ 0x00000004 150fcf3ce44SJohn Forte #define PACKET_IN_DONEQ 0x00000008 151fcf3ce44SJohn Forte 152fcf3ce44SJohn Forte #define PACKET_FCP_RESET 0x00000030 153fcf3ce44SJohn Forte #define PACKET_FCP_TGT_RESET 0x00000010 154fcf3ce44SJohn Forte #define PACKET_FCP_LUN_RESET 0x00000020 155fcf3ce44SJohn Forte #define PACKET_POLLED 0x00000040 156fcf3ce44SJohn Forte 157fcf3ce44SJohn Forte #ifdef EMLXS_I386 158fcf3ce44SJohn Forte #define PACKET_FCP_SWAPPED 0x00000100 159fcf3ce44SJohn Forte #define PACKET_ELS_SWAPPED 0x00000200 160fcf3ce44SJohn Forte #define PACKET_CT_SWAPPED 0x00000400 161fcf3ce44SJohn Forte #define PACKET_CSP_SWAPPED 0x00000800 162fcf3ce44SJohn Forte #endif /* EMLXS_I386 */ 163fcf3ce44SJohn Forte 164fcf3ce44SJohn Forte #define PACKET_STALE 0x00001000 165fcf3ce44SJohn Forte 166fcf3ce44SJohn Forte #define PACKET_IN_TIMEOUT 0x00010000 167fcf3ce44SJohn Forte #define PACKET_IN_FLUSH 0x00020000 168fcf3ce44SJohn Forte #define PACKET_IN_ABORT 0x00040000 169e2ca2865SSukumar Swaminathan #define PACKET_XRI_CLOSED 0x00080000 /* An XRI abort/close was issued */ 170fcf3ce44SJohn Forte 171fcf3ce44SJohn Forte #define PACKET_CHIP_COMP 0x00100000 172fcf3ce44SJohn Forte #define PACKET_COMPLETED 0x00200000 17382527734SSukumar Swaminathan #define PACKET_ULP_OWNED 0x00400000 174fcf3ce44SJohn Forte 175fcf3ce44SJohn Forte #define PACKET_STATE_VALID 0x01000000 176fcf3ce44SJohn Forte #define PACKET_FCP_RSP_VALID 0x02000000 177fcf3ce44SJohn Forte #define PACKET_ELS_RSP_VALID 0x04000000 178fcf3ce44SJohn Forte #define PACKET_CT_RSP_VALID 0x08000000 179fcf3ce44SJohn Forte 180fcf3ce44SJohn Forte #define PACKET_DELAY_REQUIRED 0x10000000 181fcf3ce44SJohn Forte #define PACKET_ALLOCATED 0x40000000 182fcf3ce44SJohn Forte #define PACKET_VALID 0x80000000 183fcf3ce44SJohn Forte 184fcf3ce44SJohn Forte 185fcf3ce44SJohn Forte #define STALE_PACKET ((emlxs_buf_t *)0xFFFFFFFF) 186fcf3ce44SJohn Forte 187fcf3ce44SJohn Forte 188fcf3ce44SJohn Forte /* 189fcf3ce44SJohn Forte * From fc_error.h pkt_reason (except for state = NPORT_RJT, FABRIC_RJT, 190fcf3ce44SJohn Forte * NPORT_BSY, FABRIC_BSY, LS_RJT, BA_RJT, FS_RJT) 191fcf3ce44SJohn Forte * 192fcf3ce44SJohn Forte * FCA unique error codes can begin after FC_REASON_FCA_UNIQUE. 193fcf3ce44SJohn Forte * Each FCA defines its own set with values greater >= 0x7F 194fcf3ce44SJohn Forte */ 195fcf3ce44SJohn Forte #define FC_REASON_FCA_DEFINED 0x100 196fcf3ce44SJohn Forte 197fcf3ce44SJohn Forte 198fcf3ce44SJohn Forte /* 199fcf3ce44SJohn Forte * Device VPD save area 200fcf3ce44SJohn Forte */ 201fcf3ce44SJohn Forte 202291a2b48SSukumar Swaminathan typedef struct emlxs_vpd 203291a2b48SSukumar Swaminathan { 204291a2b48SSukumar Swaminathan uint32_t biuRev; 205291a2b48SSukumar Swaminathan uint32_t smRev; 206291a2b48SSukumar Swaminathan uint32_t smFwRev; 207291a2b48SSukumar Swaminathan uint32_t endecRev; 208291a2b48SSukumar Swaminathan uint16_t rBit; 209291a2b48SSukumar Swaminathan uint8_t fcphHigh; 210291a2b48SSukumar Swaminathan uint8_t fcphLow; 211291a2b48SSukumar Swaminathan uint8_t feaLevelHigh; 212291a2b48SSukumar Swaminathan uint8_t feaLevelLow; 213291a2b48SSukumar Swaminathan 214291a2b48SSukumar Swaminathan uint32_t postKernRev; 215291a2b48SSukumar Swaminathan char postKernName[32]; 216291a2b48SSukumar Swaminathan 217291a2b48SSukumar Swaminathan uint32_t opFwRev; 218291a2b48SSukumar Swaminathan char opFwName[32]; 219291a2b48SSukumar Swaminathan char opFwLabel[32]; 220291a2b48SSukumar Swaminathan 221291a2b48SSukumar Swaminathan uint32_t sli1FwRev; 222291a2b48SSukumar Swaminathan char sli1FwName[32]; 223291a2b48SSukumar Swaminathan char sli1FwLabel[32]; 224291a2b48SSukumar Swaminathan 225291a2b48SSukumar Swaminathan uint32_t sli2FwRev; 226291a2b48SSukumar Swaminathan char sli2FwName[32]; 227291a2b48SSukumar Swaminathan char sli2FwLabel[32]; 228291a2b48SSukumar Swaminathan 229291a2b48SSukumar Swaminathan uint32_t sli3FwRev; 230291a2b48SSukumar Swaminathan char sli3FwName[32]; 231291a2b48SSukumar Swaminathan char sli3FwLabel[32]; 232291a2b48SSukumar Swaminathan 233291a2b48SSukumar Swaminathan uint32_t sli4FwRev; 234291a2b48SSukumar Swaminathan char sli4FwName[32]; 235291a2b48SSukumar Swaminathan char sli4FwLabel[32]; 236291a2b48SSukumar Swaminathan 237291a2b48SSukumar Swaminathan char fw_version[32]; 238291a2b48SSukumar Swaminathan char fw_label[32]; 239291a2b48SSukumar Swaminathan 240291a2b48SSukumar Swaminathan char fcode_version[32]; 241291a2b48SSukumar Swaminathan char boot_version[32]; 242291a2b48SSukumar Swaminathan 243291a2b48SSukumar Swaminathan char serial_num[32]; 244291a2b48SSukumar Swaminathan char part_num[32]; 245291a2b48SSukumar Swaminathan char port_num[20]; 246291a2b48SSukumar Swaminathan char eng_change[32]; 247291a2b48SSukumar Swaminathan char manufacturer[80]; 248291a2b48SSukumar Swaminathan char model[80]; 249291a2b48SSukumar Swaminathan char model_desc[256]; 250291a2b48SSukumar Swaminathan char prog_types[256]; 251*8f23e9faSHans Rosenfeld char id[256]; 252291a2b48SSukumar Swaminathan 253291a2b48SSukumar Swaminathan uint32_t port_index; 254a9800bebSGarrett D'Amore uint16_t link_speed; 255fcf3ce44SJohn Forte } emlxs_vpd_t; 256fcf3ce44SJohn Forte 257fcf3ce44SJohn Forte 258291a2b48SSukumar Swaminathan typedef struct emlxs_queue 259291a2b48SSukumar Swaminathan { 260a9800bebSGarrett D'Amore void *q_first; /* queue first element */ 261a9800bebSGarrett D'Amore void *q_last; /* queue last element */ 262291a2b48SSukumar Swaminathan uint16_t q_cnt; /* current length of queue */ 263291a2b48SSukumar Swaminathan uint16_t q_max; /* max length queue can get */ 264fcf3ce44SJohn Forte } emlxs_queue_t; 265fcf3ce44SJohn Forte typedef emlxs_queue_t Q; 266fcf3ce44SJohn Forte 267fcf3ce44SJohn Forte 268fcf3ce44SJohn Forte 269fcf3ce44SJohn Forte /* 270fcf3ce44SJohn Forte * This structure is used when allocating a buffer pool. 271fcf3ce44SJohn Forte * Note: this should be identical to gasket buf_info (fldl.h). 272fcf3ce44SJohn Forte */ 273291a2b48SSukumar Swaminathan typedef struct emlxs_buf_info 274291a2b48SSukumar Swaminathan { 275291a2b48SSukumar Swaminathan int32_t size; /* Specifies the number of bytes to allocate. */ 276291a2b48SSukumar Swaminathan int32_t align; /* The desired address boundary. */ 277fcf3ce44SJohn Forte 278291a2b48SSukumar Swaminathan int32_t flags; 279fcf3ce44SJohn Forte 280fcf3ce44SJohn Forte #define FC_MBUF_DMA 0x01 /* blocks are for DMA */ 281fcf3ce44SJohn Forte #define FC_MBUF_PHYSONLY 0x02 /* For malloc - map a given virtual */ 282291a2b48SSukumar Swaminathan /* address to physical address (skip */ 283291a2b48SSukumar Swaminathan /* the malloc). */ 284291a2b48SSukumar Swaminathan /* For free - just unmap the given */ 285fcf3ce44SJohn Forte /* physical address (skip the free). */ 286fcf3ce44SJohn Forte #define FC_MBUF_IOCTL 0x04 /* called from dfc_ioctl */ 287fcf3ce44SJohn Forte #define FC_MBUF_UNLOCK 0x08 /* called with driver unlocked */ 288291a2b48SSukumar Swaminathan #define FC_MBUF_SNGLSG 0x10 /* allocate a single contiguous */ 289291a2b48SSukumar Swaminathan /* physical memory */ 290fcf3ce44SJohn Forte #define FC_MBUF_DMA32 0x20 291fcf3ce44SJohn Forte 292291a2b48SSukumar Swaminathan uint64_t phys; /* specifies physical buffer pointer */ 293291a2b48SSukumar Swaminathan void *virt; /* specifies virtual buffer pointer */ 294291a2b48SSukumar Swaminathan void *data_handle; 295291a2b48SSukumar Swaminathan void *dma_handle; 296fcf3ce44SJohn Forte } emlxs_buf_info_t; 297fcf3ce44SJohn Forte typedef emlxs_buf_info_t MBUF_INFO; 298fcf3ce44SJohn Forte 299fcf3ce44SJohn Forte 300fcf3ce44SJohn Forte #define EMLXS_MAX_HBQ 16 /* Max HBQs handled by firmware */ 301fcf3ce44SJohn Forte #define EMLXS_ELS_HBQ_ID 0 302fcf3ce44SJohn Forte #define EMLXS_IP_HBQ_ID 1 303fcf3ce44SJohn Forte #define EMLXS_CT_HBQ_ID 2 304fcf3ce44SJohn Forte #define EMLXS_FCT_HBQ_ID 3 305fcf3ce44SJohn Forte 306fcf3ce44SJohn Forte #ifdef SFCT_SUPPORT 307fcf3ce44SJohn Forte #define EMLXS_NUM_HBQ 4 /* Number of HBQs supported by driver */ 308fcf3ce44SJohn Forte #else 309fcf3ce44SJohn Forte #define EMLXS_NUM_HBQ 3 /* Number of HBQs supported by driver */ 310291a2b48SSukumar Swaminathan #endif /* SFCT_SUPPORT */ 311fcf3ce44SJohn Forte 312fcf3ce44SJohn Forte 31382527734SSukumar Swaminathan /* 31482527734SSukumar Swaminathan * An IO Channel is a object that comprises a xmit/cmpl 31582527734SSukumar Swaminathan * path for IOs. 31682527734SSukumar Swaminathan * For SLI3, an IO path maps to a ring (cmd/rsp) 31782527734SSukumar Swaminathan * For SLI4, an IO path map to a queue pair (WQ/CQ) 31882527734SSukumar Swaminathan */ 31982527734SSukumar Swaminathan typedef struct emlxs_channel 32082527734SSukumar Swaminathan { 32182527734SSukumar Swaminathan struct emlxs_hba *hba; /* ptr to hba for channel */ 32282527734SSukumar Swaminathan void *iopath; /* ptr to SLI3/4 io path */ 32382527734SSukumar Swaminathan 32482527734SSukumar Swaminathan kmutex_t rsp_lock; 32582527734SSukumar Swaminathan IOCBQ *rsp_head; /* deferred completion head */ 32682527734SSukumar Swaminathan IOCBQ *rsp_tail; /* deferred completion tail */ 32782527734SSukumar Swaminathan emlxs_thread_t intr_thread; 32882527734SSukumar Swaminathan 32982527734SSukumar Swaminathan 33082527734SSukumar Swaminathan uint16_t channelno; 33182527734SSukumar Swaminathan uint16_t chan_flag; 33282527734SSukumar Swaminathan 33382527734SSukumar Swaminathan #define EMLXS_NEEDS_TRIGGER 1 33482527734SSukumar Swaminathan 33582527734SSukumar Swaminathan /* Protected by EMLXS_TX_CHANNEL_LOCK */ 33682527734SSukumar Swaminathan emlxs_queue_t nodeq; /* Node service queue */ 33782527734SSukumar Swaminathan 33882527734SSukumar Swaminathan kmutex_t channel_cmd_lock; 33982527734SSukumar Swaminathan uint32_t timeout; 34082527734SSukumar Swaminathan 34182527734SSukumar Swaminathan /* Channel command counters */ 34282527734SSukumar Swaminathan uint32_t ulpSendCmd; 34382527734SSukumar Swaminathan uint32_t ulpCmplCmd; 34482527734SSukumar Swaminathan uint32_t hbaSendCmd; 34582527734SSukumar Swaminathan uint32_t hbaCmplCmd; 34682527734SSukumar Swaminathan uint32_t hbaSendCmd_sbp; 34782527734SSukumar Swaminathan uint32_t hbaCmplCmd_sbp; 34882527734SSukumar Swaminathan 34982527734SSukumar Swaminathan } emlxs_channel_t; 35082527734SSukumar Swaminathan typedef emlxs_channel_t CHANNEL; 35182527734SSukumar Swaminathan 35282527734SSukumar Swaminathan /* 35382527734SSukumar Swaminathan * Should be able to handle max number of io paths for a 35482527734SSukumar Swaminathan * SLI4 HBA (EMLXS_MAX_WQS) or for a SLI3 HBA (MAX_RINGS) 35582527734SSukumar Swaminathan */ 35682527734SSukumar Swaminathan #define MAX_CHANNEL EMLXS_MSI_MAX_INTRS 357fcf3ce44SJohn Forte 358fcf3ce44SJohn Forte 359fcf3ce44SJohn Forte /* Structure used to access adapter rings */ 360291a2b48SSukumar Swaminathan typedef struct emlxs_ring 361291a2b48SSukumar Swaminathan { 362291a2b48SSukumar Swaminathan void *fc_cmdringaddr; /* virtual offset for cmd */ 363291a2b48SSukumar Swaminathan /* rings */ 364291a2b48SSukumar Swaminathan void *fc_rspringaddr; /* virtual offset for rsp */ 365291a2b48SSukumar Swaminathan /* rings */ 366291a2b48SSukumar Swaminathan 367a9800bebSGarrett D'Amore void *fc_mpon; /* index ptr for match */ 368291a2b48SSukumar Swaminathan /* structure */ 369a9800bebSGarrett D'Amore void *fc_mpoff; /* index ptr for match */ 370291a2b48SSukumar Swaminathan /* structure */ 37182527734SSukumar Swaminathan struct emlxs_hba *hba; /* ptr to hba for ring */ 372291a2b48SSukumar Swaminathan 373291a2b48SSukumar Swaminathan uint8_t fc_numCiocb; /* number of command iocb's */ 374291a2b48SSukumar Swaminathan /* per ring */ 375291a2b48SSukumar Swaminathan uint8_t fc_numRiocb; /* number of response iocb's */ 376291a2b48SSukumar Swaminathan /* per ring */ 377291a2b48SSukumar Swaminathan uint8_t fc_rspidx; /* current index in response */ 378291a2b48SSukumar Swaminathan /* ring */ 379291a2b48SSukumar Swaminathan uint8_t fc_cmdidx; /* current index in command */ 380291a2b48SSukumar Swaminathan /* ring */ 381291a2b48SSukumar Swaminathan uint8_t fc_port_rspidx; 382291a2b48SSukumar Swaminathan uint8_t fc_port_cmdidx; 383291a2b48SSukumar Swaminathan uint8_t ringno; 384291a2b48SSukumar Swaminathan 385291a2b48SSukumar Swaminathan uint16_t fc_missbufcnt; /* buf cnt we need to repost */ 38682527734SSukumar Swaminathan CHANNEL *channelp; 387291a2b48SSukumar Swaminathan 388fcf3ce44SJohn Forte 389fcf3ce44SJohn Forte } emlxs_ring_t; 390fcf3ce44SJohn Forte typedef emlxs_ring_t RING; 391fcf3ce44SJohn Forte 392fcf3ce44SJohn Forte 393291a2b48SSukumar Swaminathan #ifdef SAN_DIAG_SUPPORT 394291a2b48SSukumar Swaminathan /* 395291a2b48SSukumar Swaminathan * Although right now it's just 1 field, SAN Diag anticipates that this 396291a2b48SSukumar Swaminathan * structure will grow in the future. 397291a2b48SSukumar Swaminathan */ 398291a2b48SSukumar Swaminathan typedef struct sd_timestat_level0 { 399291a2b48SSukumar Swaminathan int count; 400291a2b48SSukumar Swaminathan } sd_timestat_level0_t; 401291a2b48SSukumar Swaminathan #endif 402291a2b48SSukumar Swaminathan 403291a2b48SSukumar Swaminathan typedef struct emlxs_node 404291a2b48SSukumar Swaminathan { 405291a2b48SSukumar Swaminathan struct emlxs_node *nlp_list_next; 406291a2b48SSukumar Swaminathan struct emlxs_node *nlp_list_prev; 407fcf3ce44SJohn Forte 408291a2b48SSukumar Swaminathan NAME_TYPE nlp_portname; /* port name */ 409291a2b48SSukumar Swaminathan NAME_TYPE nlp_nodename; /* node name */ 410fcf3ce44SJohn Forte 411291a2b48SSukumar Swaminathan uint32_t nlp_DID; /* fibre channel D_ID */ 412fcf3ce44SJohn Forte 413291a2b48SSukumar Swaminathan uint16_t nlp_Rpi; /* login id returned by */ 414291a2b48SSukumar Swaminathan /* REG_LOGIN */ 415291a2b48SSukumar Swaminathan uint16_t nlp_Xri; /* login id returned by */ 416291a2b48SSukumar Swaminathan /* REG_LOGIN */ 417fcf3ce44SJohn Forte 418291a2b48SSukumar Swaminathan uint8_t nlp_fcp_info; /* Remote class info */ 419fcf3ce44SJohn Forte 420fcf3ce44SJohn Forte /* nlp_fcp_info */ 421fcf3ce44SJohn Forte #define NLP_FCP_TGT_DEVICE 0x10 /* FCP TGT device */ 422fcf3ce44SJohn Forte #define NLP_FCP_INI_DEVICE 0x20 /* FCP Initiator device */ 423fcf3ce44SJohn Forte #define NLP_FCP_2_DEVICE 0x40 /* FCP-2 TGT device */ 424291a2b48SSukumar Swaminathan #define NLP_EMLX_VPORT 0x80 /* Virtual port */ 425fcf3ce44SJohn Forte 426*8f23e9faSHans Rosenfeld uint8_t dfc_state; 427*8f23e9faSHans Rosenfeld #define EMLXS_SET_DFC_STATE(_n, _state) if (_n && _n->nlp_active)\ 428*8f23e9faSHans Rosenfeld {(_n)->dfc_state = (_state); } 429*8f23e9faSHans Rosenfeld 43082527734SSukumar Swaminathan uint32_t nlp_force_rscn; 431291a2b48SSukumar Swaminathan uint32_t nlp_tag; /* Tag used by port_offline */ 432291a2b48SSukumar Swaminathan uint32_t flag; 433fcf3ce44SJohn Forte 434291a2b48SSukumar Swaminathan #define NODE_POOL_ALLOCATED 0x00000001 435fcf3ce44SJohn Forte 436291a2b48SSukumar Swaminathan SERV_PARM sparm; 437fcf3ce44SJohn Forte 43882527734SSukumar Swaminathan /* Protected by EMLXS_TX_CHANNEL_LOCK */ 439291a2b48SSukumar Swaminathan uint32_t nlp_active; /* Node active flag */ 440291a2b48SSukumar Swaminathan uint32_t nlp_base; 44182527734SSukumar Swaminathan uint32_t nlp_flag[MAX_CHANNEL]; /* Node level channel */ 442291a2b48SSukumar Swaminathan /* flags */ 443fcf3ce44SJohn Forte 444fcf3ce44SJohn Forte /* nlp_flag */ 445291a2b48SSukumar Swaminathan #define NLP_CLOSED 0x1 446291a2b48SSukumar Swaminathan #define NLP_OFFLINE 0x2 447291a2b48SSukumar Swaminathan #define NLP_RPI_XRI 0x4 448291a2b48SSukumar Swaminathan 44982527734SSukumar Swaminathan uint32_t nlp_tics[MAX_CHANNEL]; /* gate timeout */ 45082527734SSukumar Swaminathan emlxs_queue_t nlp_tx[MAX_CHANNEL]; /* Transmit Q head */ 45182527734SSukumar Swaminathan emlxs_queue_t nlp_ptx[MAX_CHANNEL]; /* Priority transmit */ 452291a2b48SSukumar Swaminathan /* Queue head */ 45382527734SSukumar Swaminathan void *nlp_next[MAX_CHANNEL]; /* Service Request */ 454291a2b48SSukumar Swaminathan /* Queue pointer used */ 455291a2b48SSukumar Swaminathan /* when node needs */ 456291a2b48SSukumar Swaminathan /* servicing */ 457fcf3ce44SJohn Forte #ifdef DHCHAP_SUPPORT 458291a2b48SSukumar Swaminathan emlxs_node_dhc_t node_dhc; 459fcf3ce44SJohn Forte #endif /* DHCHAP_SUPPORT */ 460fcf3ce44SJohn Forte 461291a2b48SSukumar Swaminathan #ifdef SAN_DIAG_SUPPORT 462291a2b48SSukumar Swaminathan sd_timestat_level0_t sd_dev_bucket[SD_IO_LATENCY_MAX_BUCKETS]; 463291a2b48SSukumar Swaminathan #endif 46482527734SSukumar Swaminathan 465a9800bebSGarrett D'Amore struct RPIobj *rpip; /* SLI4 only */ 466a9800bebSGarrett D'Amore #define EMLXS_NODE_TO_RPI(_p, _n) \ 467a9800bebSGarrett D'Amore ((_n)?((_n->rpip)?_n->rpip:emlxs_rpi_find(_p, _n->nlp_Rpi)):NULL) 46882527734SSukumar Swaminathan 469*8f23e9faSHans Rosenfeld #ifdef NODE_THROTTLE_SUPPORT 470*8f23e9faSHans Rosenfeld uint32_t io_throttle; 471*8f23e9faSHans Rosenfeld uint32_t io_active; 472*8f23e9faSHans Rosenfeld #endif /* NODE_THROTTLE_SUPPORT */ 473*8f23e9faSHans Rosenfeld 474fcf3ce44SJohn Forte } emlxs_node_t; 475fcf3ce44SJohn Forte typedef emlxs_node_t NODELIST; 476fcf3ce44SJohn Forte 477fcf3ce44SJohn Forte 478fcf3ce44SJohn Forte 479fcf3ce44SJohn Forte #define NADDR_LEN 6 /* MAC network address length */ 480291a2b48SSukumar Swaminathan typedef struct emlxs_fcip_nethdr 481291a2b48SSukumar Swaminathan { 482291a2b48SSukumar Swaminathan NAME_TYPE fc_destname; /* destination port name */ 483291a2b48SSukumar Swaminathan NAME_TYPE fc_srcname; /* source port name */ 484fcf3ce44SJohn Forte } emlxs_fcip_nethdr_t; 485fcf3ce44SJohn Forte typedef emlxs_fcip_nethdr_t NETHDR; 486fcf3ce44SJohn Forte 487fcf3ce44SJohn Forte 488fcf3ce44SJohn Forte #define MEM_NLP 0 /* memory segment to hold node list entries */ 489fcf3ce44SJohn Forte #define MEM_IOCB 1 /* memory segment to hold iocb commands */ 490291a2b48SSukumar Swaminathan #define MEM_MBOX 2 /* memory segment to hold mailbox cmds */ 491291a2b48SSukumar Swaminathan #define MEM_BPL 3 /* and to hold buffer ptr lists - SLI2 */ 492291a2b48SSukumar Swaminathan #define MEM_BUF 4 /* memory segment to hold buffer data */ 493291a2b48SSukumar Swaminathan #define MEM_ELSBUF 4 /* memory segment to hold buffer data */ 494fcf3ce44SJohn Forte #define MEM_IPBUF 5 /* memory segment to hold IP buffer data */ 495fcf3ce44SJohn Forte #define MEM_CTBUF 6 /* memory segment to hold CT buffer data */ 496fcf3ce44SJohn Forte #define MEM_FCTBUF 7 /* memory segment to hold FCT buffer data */ 497fcf3ce44SJohn Forte 498fcf3ce44SJohn Forte #ifdef SFCT_SUPPORT 499fcf3ce44SJohn Forte #define FC_MAX_SEG 8 500*8f23e9faSHans Rosenfeld #define MEM_FCTSEG 10 /* must be greater than FC_MAX_SEG */ 501fcf3ce44SJohn Forte #else 502fcf3ce44SJohn Forte #define FC_MAX_SEG 7 503291a2b48SSukumar Swaminathan #endif /* SFCT_SUPPORT */ 504fcf3ce44SJohn Forte 505fcf3ce44SJohn Forte 506fcf3ce44SJohn Forte /* A BPL entry is 12 bytes. Subtract 2 for command and response buffers */ 507*8f23e9faSHans Rosenfeld #define BPL_TO_SGLLEN(_bpl) ((_bpl/12)-2) 508*8f23e9faSHans Rosenfeld #define MEM_BPL_SIZE 36 /* Default size */ 509fcf3ce44SJohn Forte 51082527734SSukumar Swaminathan /* A SGL entry is 16 bytes. Subtract 2 for command and response buffers */ 511*8f23e9faSHans Rosenfeld #define SGL_TO_SGLLEN(_sgl) ((_sgl/16)-2) 512*8f23e9faSHans Rosenfeld #define MEM_SGL_SIZE 4096 /* Default size */ 513fcf3ce44SJohn Forte 514fcf3ce44SJohn Forte #define MEM_BUF_SIZE 1024 515fcf3ce44SJohn Forte #define MEM_BUF_COUNT 64 516fcf3ce44SJohn Forte 517291a2b48SSukumar Swaminathan #define MEM_ELSBUF_SIZE MEM_BUF_SIZE 518291a2b48SSukumar Swaminathan #define MEM_ELSBUF_COUNT hba->max_nodes 519291a2b48SSukumar Swaminathan #define MEM_IPBUF_SIZE 65535 520fcf3ce44SJohn Forte #define MEM_IPBUF_COUNT 60 521fcf3ce44SJohn Forte #define MEM_CTBUF_SIZE MAX_CT_PAYLOAD /* (1024*320) */ 522fcf3ce44SJohn Forte #define MEM_CTBUF_COUNT 8 523291a2b48SSukumar Swaminathan #define MEM_FCTBUF_SIZE 65535 524fcf3ce44SJohn Forte #define MEM_FCTBUF_COUNT 128 525fcf3ce44SJohn Forte 526291a2b48SSukumar Swaminathan typedef struct emlxs_memseg 527291a2b48SSukumar Swaminathan { 528a9800bebSGarrett D'Amore void *fc_memget_ptr; 529a9800bebSGarrett D'Amore void *fc_memget_end; 530a9800bebSGarrett D'Amore void *fc_memput_ptr; 531a9800bebSGarrett D'Amore void *fc_memput_end; 532291a2b48SSukumar Swaminathan 533291a2b48SSukumar Swaminathan uint32_t fc_total_memsize; 534291a2b48SSukumar Swaminathan uint32_t fc_memsize; /* size of mem blks */ 535291a2b48SSukumar Swaminathan uint32_t fc_numblks; /* no of mem blks */ 536291a2b48SSukumar Swaminathan uint32_t fc_memget_cnt; /* no of mem get blks */ 537291a2b48SSukumar Swaminathan uint32_t fc_memput_cnt; /* no of mem put blks */ 53882527734SSukumar Swaminathan uint32_t fc_memflag; /* emlxs_buf_info_t FLAGS */ 539*8f23e9faSHans Rosenfeld #define FC_MEMSEG_PUT_ENABLED 0x20000000 540*8f23e9faSHans Rosenfeld #define FC_MEMSEG_GET_ENABLED 0x40000000 541*8f23e9faSHans Rosenfeld #define FC_MEMSEG_DYNAMIC 0x80000000 542*8f23e9faSHans Rosenfeld 54382527734SSukumar Swaminathan uint32_t fc_memalign; 54482527734SSukumar Swaminathan uint32_t fc_memtag; 54582527734SSukumar Swaminathan char fc_label[32]; 54682527734SSukumar Swaminathan 547*8f23e9faSHans Rosenfeld uint32_t fc_hi_water; 548*8f23e9faSHans Rosenfeld uint32_t fc_lo_water; 549*8f23e9faSHans Rosenfeld uint32_t fc_step; /* Dyn increment. Zero = static */ 550*8f23e9faSHans Rosenfeld uint32_t fc_low; /* Lowest free count (dyn only) */ 551*8f23e9faSHans Rosenfeld uint32_t fc_last; /* Last fc_numblks (dyn only) */ 552*8f23e9faSHans Rosenfeld 553fcf3ce44SJohn Forte } emlxs_memseg_t; 554fcf3ce44SJohn Forte typedef emlxs_memseg_t MEMSEG; 555fcf3ce44SJohn Forte 556fcf3ce44SJohn Forte 557fcf3ce44SJohn Forte /* Board stat counters */ 558291a2b48SSukumar Swaminathan typedef struct emlxs_stats 559291a2b48SSukumar Swaminathan { 560291a2b48SSukumar Swaminathan uint32_t LinkUp; 561291a2b48SSukumar Swaminathan uint32_t LinkDown; 562291a2b48SSukumar Swaminathan uint32_t LinkEvent; 563291a2b48SSukumar Swaminathan uint32_t LinkMultiEvent; 564291a2b48SSukumar Swaminathan 565291a2b48SSukumar Swaminathan uint32_t MboxIssued; 566291a2b48SSukumar Swaminathan uint32_t MboxCompleted; /* MboxError + MbxGood */ 567291a2b48SSukumar Swaminathan uint32_t MboxGood; 568291a2b48SSukumar Swaminathan uint32_t MboxError; 569291a2b48SSukumar Swaminathan uint32_t MboxBusy; 570291a2b48SSukumar Swaminathan uint32_t MboxInvalid; 571291a2b48SSukumar Swaminathan 57282527734SSukumar Swaminathan uint32_t IocbIssued[MAX_CHANNEL]; 57382527734SSukumar Swaminathan uint32_t IocbReceived[MAX_CHANNEL]; 57482527734SSukumar Swaminathan uint32_t IocbTxPut[MAX_CHANNEL]; 57582527734SSukumar Swaminathan uint32_t IocbTxGet[MAX_CHANNEL]; 57682527734SSukumar Swaminathan uint32_t IocbRingFull[MAX_CHANNEL]; 577291a2b48SSukumar Swaminathan uint32_t IocbThrottled; 578291a2b48SSukumar Swaminathan 579291a2b48SSukumar Swaminathan uint32_t IntrEvent[8]; 580291a2b48SSukumar Swaminathan 581291a2b48SSukumar Swaminathan uint32_t FcpIssued; 582291a2b48SSukumar Swaminathan uint32_t FcpCompleted; /* FcpGood + FcpError */ 583291a2b48SSukumar Swaminathan uint32_t FcpGood; 584291a2b48SSukumar Swaminathan uint32_t FcpError; 585291a2b48SSukumar Swaminathan 586291a2b48SSukumar Swaminathan uint32_t FcpEvent; /* FcpStray + FcpCompleted */ 587291a2b48SSukumar Swaminathan uint32_t FcpStray; 588fcf3ce44SJohn Forte #ifdef SFCT_SUPPORT 589291a2b48SSukumar Swaminathan uint32_t FctRingEvent; 590291a2b48SSukumar Swaminathan uint32_t FctRingError; 591291a2b48SSukumar Swaminathan uint32_t FctRingDropped; 592291a2b48SSukumar Swaminathan #endif /* SFCT_SUPPORT */ 593291a2b48SSukumar Swaminathan 594291a2b48SSukumar Swaminathan uint32_t ElsEvent; /* ElsStray + ElsCmplt (cmd + rsp) */ 595291a2b48SSukumar Swaminathan uint32_t ElsStray; 596291a2b48SSukumar Swaminathan 597291a2b48SSukumar Swaminathan uint32_t ElsCmdIssued; 598291a2b48SSukumar Swaminathan uint32_t ElsCmdCompleted; /* ElsCmdGood + ElsCmdError */ 599291a2b48SSukumar Swaminathan uint32_t ElsCmdGood; 600291a2b48SSukumar Swaminathan uint32_t ElsCmdError; 601291a2b48SSukumar Swaminathan 602291a2b48SSukumar Swaminathan uint32_t ElsRspIssued; 603291a2b48SSukumar Swaminathan uint32_t ElsRspCompleted; 604291a2b48SSukumar Swaminathan 605291a2b48SSukumar Swaminathan uint32_t ElsRcvEvent; /* ElsRcvErr + ElsRcvDrop + ElsCmdRcv */ 606291a2b48SSukumar Swaminathan uint32_t ElsRcvError; 607291a2b48SSukumar Swaminathan uint32_t ElsRcvDropped; 608291a2b48SSukumar Swaminathan uint32_t ElsCmdReceived; /* ElsRscnRcv + ElsPlogiRcv + ... */ 609291a2b48SSukumar Swaminathan uint32_t ElsRscnReceived; 610291a2b48SSukumar Swaminathan uint32_t ElsFlogiReceived; 611291a2b48SSukumar Swaminathan uint32_t ElsPlogiReceived; 612291a2b48SSukumar Swaminathan uint32_t ElsPrliReceived; 613291a2b48SSukumar Swaminathan uint32_t ElsPrloReceived; 614291a2b48SSukumar Swaminathan uint32_t ElsLogoReceived; 615291a2b48SSukumar Swaminathan uint32_t ElsAdiscReceived; 616291a2b48SSukumar Swaminathan uint32_t ElsAuthReceived; 617291a2b48SSukumar Swaminathan uint32_t ElsGenReceived; 618291a2b48SSukumar Swaminathan 619291a2b48SSukumar Swaminathan uint32_t CtEvent; /* CtStray + CtCompleted (cmd + rsp) */ 620291a2b48SSukumar Swaminathan uint32_t CtStray; 621291a2b48SSukumar Swaminathan 622291a2b48SSukumar Swaminathan uint32_t CtCmdIssued; 623291a2b48SSukumar Swaminathan uint32_t CtCmdCompleted; /* CtCmdGood + CtCmdError */ 624291a2b48SSukumar Swaminathan uint32_t CtCmdGood; 625291a2b48SSukumar Swaminathan uint32_t CtCmdError; 626291a2b48SSukumar Swaminathan 627291a2b48SSukumar Swaminathan uint32_t CtRspIssued; 628291a2b48SSukumar Swaminathan uint32_t CtRspCompleted; 629291a2b48SSukumar Swaminathan 630291a2b48SSukumar Swaminathan uint32_t CtRcvEvent; /* CtRcvError + CtRcvDrop + CtCmdRcvd */ 631291a2b48SSukumar Swaminathan uint32_t CtRcvError; 632291a2b48SSukumar Swaminathan uint32_t CtRcvDropped; 633291a2b48SSukumar Swaminathan uint32_t CtCmdReceived; 634291a2b48SSukumar Swaminathan 635291a2b48SSukumar Swaminathan uint32_t IpEvent; /* IpStray + IpSeqCmpl + IpBcastCmpl */ 636291a2b48SSukumar Swaminathan uint32_t IpStray; 637291a2b48SSukumar Swaminathan 638291a2b48SSukumar Swaminathan uint32_t IpSeqIssued; 639291a2b48SSukumar Swaminathan uint32_t IpSeqCompleted; /* IpSeqGood + IpSeqError */ 640291a2b48SSukumar Swaminathan uint32_t IpSeqGood; 641291a2b48SSukumar Swaminathan uint32_t IpSeqError; 642291a2b48SSukumar Swaminathan 643291a2b48SSukumar Swaminathan uint32_t IpBcastIssued; 644291a2b48SSukumar Swaminathan uint32_t IpBcastCompleted; /* IpBcastGood + IpBcastError */ 645291a2b48SSukumar Swaminathan uint32_t IpBcastGood; 646291a2b48SSukumar Swaminathan uint32_t IpBcastError; 647291a2b48SSukumar Swaminathan 648291a2b48SSukumar Swaminathan uint32_t IpRcvEvent; /* IpDrop + IpSeqRcv + IpBcastRcv */ 649291a2b48SSukumar Swaminathan uint32_t IpDropped; 650291a2b48SSukumar Swaminathan uint32_t IpSeqReceived; 651291a2b48SSukumar Swaminathan uint32_t IpBcastReceived; 652291a2b48SSukumar Swaminathan 653291a2b48SSukumar Swaminathan uint32_t IpUbPosted; 654291a2b48SSukumar Swaminathan uint32_t ElsUbPosted; 655291a2b48SSukumar Swaminathan uint32_t CtUbPosted; 656fcf3ce44SJohn Forte #ifdef SFCT_SUPPORT 657291a2b48SSukumar Swaminathan uint32_t FctUbPosted; 658291a2b48SSukumar Swaminathan #endif /* SFCT_SUPPORT */ 659fcf3ce44SJohn Forte 660291a2b48SSukumar Swaminathan uint32_t ResetTime; /* Time of last reset */ 661a9800bebSGarrett D'Amore 662a9800bebSGarrett D'Amore uint32_t ElsTestReceived; 663a9800bebSGarrett D'Amore uint32_t ElsEstcReceived; 664a9800bebSGarrett D'Amore uint32_t ElsFarprReceived; 665a9800bebSGarrett D'Amore uint32_t ElsEchoReceived; 666a9800bebSGarrett D'Amore uint32_t ElsRlsReceived; 667a9800bebSGarrett D'Amore uint32_t ElsRtvReceived; 668a9800bebSGarrett D'Amore 669fcf3ce44SJohn Forte } emlxs_stats_t; 670fcf3ce44SJohn Forte 671fcf3ce44SJohn Forte 672291a2b48SSukumar Swaminathan #define FC_MAX_ADPTMSG (8*28) /* max size of a msg from adapter */ 673fcf3ce44SJohn Forte 674fcf3ce44SJohn Forte #define EMLXS_NUM_THREADS 8 675fcf3ce44SJohn Forte #define EMLXS_MIN_TASKS 8 676fcf3ce44SJohn Forte #define EMLXS_MAX_TASKS 8 677fcf3ce44SJohn Forte 678fcf3ce44SJohn Forte #define EMLXS_NUM_HASH_QUES 32 679fcf3ce44SJohn Forte #define EMLXS_DID_HASH(x) ((x) & (EMLXS_NUM_HASH_QUES - 1)) 680fcf3ce44SJohn Forte 681fcf3ce44SJohn Forte 682fcf3ce44SJohn Forte /* pkt_tran_flag */ 683fcf3ce44SJohn Forte #define FC_TRAN_COMPLETED 0x8000 684fcf3ce44SJohn Forte 685fcf3ce44SJohn Forte 686291a2b48SSukumar Swaminathan typedef struct emlxs_dfc_event 687291a2b48SSukumar Swaminathan { 688291a2b48SSukumar Swaminathan uint32_t pid; 689291a2b48SSukumar Swaminathan uint32_t event; 690291a2b48SSukumar Swaminathan uint32_t last_id; 691fcf3ce44SJohn Forte 692291a2b48SSukumar Swaminathan void *dataout; 693291a2b48SSukumar Swaminathan uint32_t size; 694291a2b48SSukumar Swaminathan uint32_t mode; 695fcf3ce44SJohn Forte } emlxs_dfc_event_t; 696fcf3ce44SJohn Forte 697fcf3ce44SJohn Forte 698291a2b48SSukumar Swaminathan typedef struct emlxs_hba_event 699291a2b48SSukumar Swaminathan { 700291a2b48SSukumar Swaminathan uint32_t last_id; 701291a2b48SSukumar Swaminathan uint32_t new; 702291a2b48SSukumar Swaminathan uint32_t missed; 703fcf3ce44SJohn Forte } emlxs_hba_event_t; 704fcf3ce44SJohn Forte 705fcf3ce44SJohn Forte 706fcf3ce44SJohn Forte #ifdef SFCT_SUPPORT 707fcf3ce44SJohn Forte 708fcf3ce44SJohn Forte #define TGTPORTSTAT port->fct_stat 709fcf3ce44SJohn Forte 710fcf3ce44SJohn Forte /* 711fcf3ce44SJohn Forte * FctP2IOXcnt will count IOs by their fcpDL. Counters 712fcf3ce44SJohn Forte * are for buckets of various power of 2 sizes. 713fcf3ce44SJohn Forte * Bucket 0 < 512 > 0 714fcf3ce44SJohn Forte * Bucket 1 >= 512 < 1024 715fcf3ce44SJohn Forte * Bucket 2 >= 1024 < 2048 716fcf3ce44SJohn Forte * Bucket 3 >= 2048 < 4096 717fcf3ce44SJohn Forte * Bucket 4 >= 4096 < 8192 718fcf3ce44SJohn Forte * Bucket 5 >= 8192 < 16K 719fcf3ce44SJohn Forte * Bucket 6 >= 16K < 32K 720fcf3ce44SJohn Forte * Bucket 7 >= 32K < 64K 721fcf3ce44SJohn Forte * Bucket 8 >= 64K < 128K 722fcf3ce44SJohn Forte * Bucket 9 >= 128K < 256K 723fcf3ce44SJohn Forte * Bucket 10 >= 256K < 512K 724fcf3ce44SJohn Forte * Bucket 11 >= 512K < 1MB 725fcf3ce44SJohn Forte * Bucket 12 >= 1MB < 2MB 726fcf3ce44SJohn Forte * Bucket 13 >= 2MB < 4MB 727fcf3ce44SJohn Forte * Bucket 14 >= 4MB < 8MB 728fcf3ce44SJohn Forte * Bucket 15 >= 8MB 729fcf3ce44SJohn Forte */ 730291a2b48SSukumar Swaminathan #define MAX_TGTPORT_IOCNT 16 731fcf3ce44SJohn Forte 732fcf3ce44SJohn Forte 733fcf3ce44SJohn Forte /* 734fcf3ce44SJohn Forte * These routines will bump the right counter, based on 735fcf3ce44SJohn Forte * the size of the IO inputed, with the least number of 736fcf3ce44SJohn Forte * comparisions. A max of 5 comparisions is only needed 737fcf3ce44SJohn Forte * to classify the IO in one of 16 ranges. A binary search 738fcf3ce44SJohn Forte * to locate the high bit in the size is used. 739fcf3ce44SJohn Forte */ 74082527734SSukumar Swaminathan #define EMLXS_BUMP_RDIOCTR(port, cnt) \ 741291a2b48SSukumar Swaminathan { \ 742291a2b48SSukumar Swaminathan /* Use binary search to find the first high bit */ \ 743291a2b48SSukumar Swaminathan if (cnt & 0xffff0000) { \ 744291a2b48SSukumar Swaminathan if (cnt & 0xff800000) { \ 745291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[15]++; \ 746291a2b48SSukumar Swaminathan } \ 747291a2b48SSukumar Swaminathan else { \ 748291a2b48SSukumar Swaminathan /* It must be 0x007f0000 */ \ 749291a2b48SSukumar Swaminathan if (cnt & 0x00700000) { \ 750291a2b48SSukumar Swaminathan if (cnt & 0x00400000) { \ 751291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[14]++; \ 752291a2b48SSukumar Swaminathan } \ 753291a2b48SSukumar Swaminathan else { \ 754291a2b48SSukumar Swaminathan /* it must be 0x00300000 */ \ 755291a2b48SSukumar Swaminathan if (cnt & 0x00200000) { \ 756291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[13]++; \ 757291a2b48SSukumar Swaminathan } \ 758291a2b48SSukumar Swaminathan else { \ 759291a2b48SSukumar Swaminathan /* It must be 0x00100000 */ \ 760291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[12]++; \ 761291a2b48SSukumar Swaminathan } \ 762291a2b48SSukumar Swaminathan } \ 763291a2b48SSukumar Swaminathan } \ 764291a2b48SSukumar Swaminathan else { \ 765291a2b48SSukumar Swaminathan /* It must be 0x000f0000 */ \ 766291a2b48SSukumar Swaminathan if (cnt & 0x000c0000) { \ 767291a2b48SSukumar Swaminathan if (cnt & 0x00080000) { \ 768fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IORcnt[11]++; \ 769291a2b48SSukumar Swaminathan } \ 770291a2b48SSukumar Swaminathan else { \ 771291a2b48SSukumar Swaminathan /* It must be 0x00040000 */ \ 772fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IORcnt[10]++; \ 773291a2b48SSukumar Swaminathan } \ 774291a2b48SSukumar Swaminathan } \ 775291a2b48SSukumar Swaminathan else { \ 776291a2b48SSukumar Swaminathan /* It must be 0x00030000 */ \ 777291a2b48SSukumar Swaminathan if (cnt & 0x00020000) { \ 778291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[9]++; \ 779291a2b48SSukumar Swaminathan } \ 780291a2b48SSukumar Swaminathan else { \ 781291a2b48SSukumar Swaminathan /* It must be 0x00010000 */ \ 782291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[8]++; \ 783291a2b48SSukumar Swaminathan } \ 784291a2b48SSukumar Swaminathan } \ 785291a2b48SSukumar Swaminathan } \ 786291a2b48SSukumar Swaminathan } \ 787291a2b48SSukumar Swaminathan } \ 788291a2b48SSukumar Swaminathan else { \ 789291a2b48SSukumar Swaminathan if (cnt & 0x0000fe00) { \ 790291a2b48SSukumar Swaminathan if (cnt & 0x0000f000) { \ 791291a2b48SSukumar Swaminathan if (cnt & 0x0000c000) { \ 792291a2b48SSukumar Swaminathan if (cnt & 0x00008000) { \ 793291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[7]++; \ 794291a2b48SSukumar Swaminathan } \ 795291a2b48SSukumar Swaminathan else { \ 796291a2b48SSukumar Swaminathan /* It must be 0x00004000 */ \ 797291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[6]++; \ 798291a2b48SSukumar Swaminathan } \ 799291a2b48SSukumar Swaminathan } \ 800291a2b48SSukumar Swaminathan else { \ 801291a2b48SSukumar Swaminathan /* It must be 0x00000300 */ \ 802291a2b48SSukumar Swaminathan if (cnt & 0x00000200) { \ 803291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[5]++; \ 804291a2b48SSukumar Swaminathan } \ 805291a2b48SSukumar Swaminathan else { \ 806291a2b48SSukumar Swaminathan /* It must be 0x00000100 */ \ 807291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[4]++; \ 808291a2b48SSukumar Swaminathan } \ 809291a2b48SSukumar Swaminathan } \ 810291a2b48SSukumar Swaminathan } \ 811291a2b48SSukumar Swaminathan else { \ 812291a2b48SSukumar Swaminathan /* It must be 0x00000e00 */ \ 813291a2b48SSukumar Swaminathan if (cnt & 0x00000800) { \ 814291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[3]++; \ 815291a2b48SSukumar Swaminathan } \ 816291a2b48SSukumar Swaminathan else { \ 817291a2b48SSukumar Swaminathan /* It must be 0x00000600 */ \ 818291a2b48SSukumar Swaminathan if (cnt & 0x00000400) { \ 819291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[2]++; \ 820291a2b48SSukumar Swaminathan } \ 821291a2b48SSukumar Swaminathan else { \ 822291a2b48SSukumar Swaminathan /* It must be 0x00000200 */ \ 823291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[1]++; \ 824291a2b48SSukumar Swaminathan } \ 825291a2b48SSukumar Swaminathan } \ 826291a2b48SSukumar Swaminathan } \ 827291a2b48SSukumar Swaminathan } \ 828291a2b48SSukumar Swaminathan else { \ 829291a2b48SSukumar Swaminathan /* It must be 0x000001ff */ \ 830291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[0]++; \ 831291a2b48SSukumar Swaminathan } \ 832291a2b48SSukumar Swaminathan } \ 833fcf3ce44SJohn Forte } 834fcf3ce44SJohn Forte 835291a2b48SSukumar Swaminathan 83682527734SSukumar Swaminathan #define EMLXS_BUMP_WRIOCTR(port, cnt) \ 837291a2b48SSukumar Swaminathan { \ 838291a2b48SSukumar Swaminathan /* Use binary search to find the first high bit */ \ 839291a2b48SSukumar Swaminathan if (cnt & 0xffff0000) { \ 840291a2b48SSukumar Swaminathan if (cnt & 0xff800000) { \ 841291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IOWcnt[15]++; \ 842291a2b48SSukumar Swaminathan } \ 843291a2b48SSukumar Swaminathan else { \ 844291a2b48SSukumar Swaminathan /* It must be 0x007f0000 */ \ 845291a2b48SSukumar Swaminathan if (cnt & 0x00700000) { \ 846291a2b48SSukumar Swaminathan if (cnt & 0x00400000) { \ 847291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IOWcnt[14]++; \ 848291a2b48SSukumar Swaminathan } \ 849291a2b48SSukumar Swaminathan else { \ 850291a2b48SSukumar Swaminathan /* It must be 0x00300000 */ \ 851291a2b48SSukumar Swaminathan if (cnt & 0x00200000) { \ 852fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[13]++; \ 853291a2b48SSukumar Swaminathan } \ 854291a2b48SSukumar Swaminathan else { \ 855291a2b48SSukumar Swaminathan /* It must be 0x00100000 */ \ 856fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[12]++; \ 857291a2b48SSukumar Swaminathan } \ 858291a2b48SSukumar Swaminathan } \ 859291a2b48SSukumar Swaminathan } \ 860291a2b48SSukumar Swaminathan else { \ 861291a2b48SSukumar Swaminathan /* It must be 0x000f0000 */ \ 862291a2b48SSukumar Swaminathan if (cnt & 0x000c0000) { \ 863291a2b48SSukumar Swaminathan if (cnt & 0x00080000) { \ 864fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[11]++; \ 865291a2b48SSukumar Swaminathan } \ 866291a2b48SSukumar Swaminathan else { \ 867291a2b48SSukumar Swaminathan /* it must be 0x00040000 */ \ 868fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[10]++; \ 869291a2b48SSukumar Swaminathan } \ 870291a2b48SSukumar Swaminathan } \ 871291a2b48SSukumar Swaminathan else { \ 872291a2b48SSukumar Swaminathan /* It must be 0x00030000 */ \ 873291a2b48SSukumar Swaminathan if (cnt & 0x00020000) { \ 874fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[9]++; \ 875291a2b48SSukumar Swaminathan } \ 876291a2b48SSukumar Swaminathan else { \ 877291a2b48SSukumar Swaminathan /* It must be 0x00010000 */ \ 878fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[8]++; \ 879291a2b48SSukumar Swaminathan } \ 880291a2b48SSukumar Swaminathan } \ 881291a2b48SSukumar Swaminathan } \ 882291a2b48SSukumar Swaminathan } \ 883291a2b48SSukumar Swaminathan } \ 884291a2b48SSukumar Swaminathan else { \ 885291a2b48SSukumar Swaminathan if (cnt & 0x0000fe00) { \ 886291a2b48SSukumar Swaminathan if (cnt & 0x0000f000) { \ 887291a2b48SSukumar Swaminathan if (cnt & 0x0000c000) { \ 888291a2b48SSukumar Swaminathan if (cnt & 0x00008000) { \ 889fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[7]++; \ 890291a2b48SSukumar Swaminathan } \ 891291a2b48SSukumar Swaminathan else { \ 892291a2b48SSukumar Swaminathan /* It must be 0x00004000 */ \ 893fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[6]++; \ 894291a2b48SSukumar Swaminathan } \ 895291a2b48SSukumar Swaminathan } \ 896291a2b48SSukumar Swaminathan else { \ 897291a2b48SSukumar Swaminathan /* It must be 0x00000300 */ \ 898291a2b48SSukumar Swaminathan if (cnt & 0x00000200) { \ 899fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[5]++; \ 900291a2b48SSukumar Swaminathan } \ 901291a2b48SSukumar Swaminathan else { \ 902291a2b48SSukumar Swaminathan /* It must be 0x00000100 */ \ 903fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[4]++; \ 904291a2b48SSukumar Swaminathan } \ 905291a2b48SSukumar Swaminathan } \ 906291a2b48SSukumar Swaminathan } \ 907291a2b48SSukumar Swaminathan else { \ 908291a2b48SSukumar Swaminathan /* It must be 0x00000e00 */ \ 909291a2b48SSukumar Swaminathan if (cnt & 0x00000800) { \ 910291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IOWcnt[3]++; \ 911291a2b48SSukumar Swaminathan } \ 912291a2b48SSukumar Swaminathan else { \ 913291a2b48SSukumar Swaminathan /* It must be 0x00000600 */ \ 914291a2b48SSukumar Swaminathan if (cnt & 0x00000400) { \ 915fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[2]++; \ 916291a2b48SSukumar Swaminathan } \ 917291a2b48SSukumar Swaminathan else { \ 918291a2b48SSukumar Swaminathan /* It must be 0x00000200 */ \ 919fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[1]++; \ 920291a2b48SSukumar Swaminathan } \ 921291a2b48SSukumar Swaminathan } \ 922291a2b48SSukumar Swaminathan } \ 923291a2b48SSukumar Swaminathan } \ 924291a2b48SSukumar Swaminathan else { \ 925291a2b48SSukumar Swaminathan /* It must be 0x000001ff */ \ 926291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IOWcnt[0]++; \ 927291a2b48SSukumar Swaminathan } \ 928291a2b48SSukumar Swaminathan } \ 929fcf3ce44SJohn Forte } 930fcf3ce44SJohn Forte 931291a2b48SSukumar Swaminathan typedef struct emlxs_tgtport_stat 932291a2b48SSukumar Swaminathan { 933fcf3ce44SJohn Forte /* IO counters */ 934291a2b48SSukumar Swaminathan uint64_t FctP2IOWcnt[MAX_TGTPORT_IOCNT]; /* Writes */ 935291a2b48SSukumar Swaminathan uint64_t FctP2IORcnt[MAX_TGTPORT_IOCNT]; /* Reads */ 936291a2b48SSukumar Swaminathan uint64_t FctIOCmdCnt; /* Other, ie TUR */ 937291a2b48SSukumar Swaminathan uint64_t FctCmdReceived; /* total IOs */ 938291a2b48SSukumar Swaminathan uint64_t FctReadBytes; /* total read bytes */ 939291a2b48SSukumar Swaminathan uint64_t FctWriteBytes; /* total write bytes */ 940fcf3ce44SJohn Forte 941fcf3ce44SJohn Forte /* IOCB handling counters */ 942291a2b48SSukumar Swaminathan uint64_t FctEvent; /* FctStray + FctCompleted */ 943291a2b48SSukumar Swaminathan uint64_t FctCompleted; /* FctCmplGood + FctCmplError */ 944291a2b48SSukumar Swaminathan uint64_t FctCmplGood; 945fcf3ce44SJohn Forte 946291a2b48SSukumar Swaminathan uint32_t FctCmplError; 947291a2b48SSukumar Swaminathan uint32_t FctStray; 948fcf3ce44SJohn Forte 949fcf3ce44SJohn Forte /* Fct event counters */ 950291a2b48SSukumar Swaminathan uint32_t FctRcvDropped; 951291a2b48SSukumar Swaminathan uint32_t FctOverQDepth; 952291a2b48SSukumar Swaminathan uint32_t FctOutstandingIO; 953291a2b48SSukumar Swaminathan uint32_t FctFailedPortRegister; 954291a2b48SSukumar Swaminathan uint32_t FctPortRegister; 955291a2b48SSukumar Swaminathan uint32_t FctPortDeregister; 956291a2b48SSukumar Swaminathan 957291a2b48SSukumar Swaminathan uint32_t FctAbortSent; 958291a2b48SSukumar Swaminathan uint32_t FctNoBuffer; 959291a2b48SSukumar Swaminathan uint32_t FctScsiStatusErr; 960291a2b48SSukumar Swaminathan uint32_t FctScsiQfullErr; 961291a2b48SSukumar Swaminathan uint32_t FctScsiResidOver; 962291a2b48SSukumar Swaminathan uint32_t FctScsiResidUnder; 963291a2b48SSukumar Swaminathan uint32_t FctScsiSenseErr; 964291a2b48SSukumar Swaminathan 965291a2b48SSukumar Swaminathan uint32_t FctFiller1; 966fcf3ce44SJohn Forte } emlxs_tgtport_stat_t; 967291a2b48SSukumar Swaminathan 968291a2b48SSukumar Swaminathan #ifdef FCT_IO_TRACE 969291a2b48SSukumar Swaminathan #define MAX_IO_TRACE 67 970291a2b48SSukumar Swaminathan typedef struct emlxs_iotrace 971291a2b48SSukumar Swaminathan { 972291a2b48SSukumar Swaminathan fct_cmd_t *fct_cmd; 973291a2b48SSukumar Swaminathan uint32_t xri; 974291a2b48SSukumar Swaminathan uint8_t marker; /* 0xff */ 975291a2b48SSukumar Swaminathan uint8_t trc[MAX_IO_TRACE]; /* trc[0] = index */ 976291a2b48SSukumar Swaminathan } emlxs_iotrace_t; 977291a2b48SSukumar Swaminathan #endif /* FCT_IO_TRACE */ 978291a2b48SSukumar Swaminathan #endif /* SFCT_SUPPORT */ 979fcf3ce44SJohn Forte 980fcf3ce44SJohn Forte 981a9800bebSGarrett D'Amore #include <emlxs_fcf.h> 982a9800bebSGarrett D'Amore 983fcf3ce44SJohn Forte /* 984291a2b48SSukumar Swaminathan * Port Information Data Structure 985fcf3ce44SJohn Forte */ 986fcf3ce44SJohn Forte 987291a2b48SSukumar Swaminathan typedef struct emlxs_port 988291a2b48SSukumar Swaminathan { 989291a2b48SSukumar Swaminathan struct emlxs_hba *hba; 990fcf3ce44SJohn Forte 991fcf3ce44SJohn Forte /* Virtual port management */ 992a9800bebSGarrett D'Amore struct VPIobj VPIobj; 993*8f23e9faSHans Rosenfeld struct VPIobj *vpip; /* &VPIobj */ 994*8f23e9faSHans Rosenfeld 995*8f23e9faSHans Rosenfeld uint32_t vpi; /* Legacy vpi == vpip->index */ 996*8f23e9faSHans Rosenfeld uint32_t mode; 997*8f23e9faSHans Rosenfeld uint32_t mode_mask; /* User configured */ 998*8f23e9faSHans Rosenfeld #define MODE_NONE 0x00000000 999*8f23e9faSHans Rosenfeld #define MODE_INITIATOR 0x00000001 1000*8f23e9faSHans Rosenfeld #define MODE_TARGET 0x00000002 1001*8f23e9faSHans Rosenfeld #define MODE_ALL 0x00000003 1002a9800bebSGarrett D'Amore 1003291a2b48SSukumar Swaminathan uint32_t flag; 1004*8f23e9faSHans Rosenfeld #define EMLXS_PORT_ENABLED 0x00000001 /* vport setting */ 1005*8f23e9faSHans Rosenfeld #define EMLXS_PORT_CONFIG 0x00000002 /* vport setting */ 1006*8f23e9faSHans Rosenfeld 1007*8f23e9faSHans Rosenfeld #define EMLXS_INI_ENABLED 0x00000010 /* emlxs_mode_init */ 1008*8f23e9faSHans Rosenfeld #define EMLXS_INI_BOUND 0x00000020 /* emlxs_fca_bind_port */ 1009*8f23e9faSHans Rosenfeld #define EMLXS_TGT_ENABLED 0x00000040 /* emlxs_mode_init */ 1010*8f23e9faSHans Rosenfeld #define EMLXS_TGT_BOUND 0x00000080 /* emlxs_fct_bind_port */ 1011*8f23e9faSHans Rosenfeld #define EMLXS_PORT_BOUND (EMLXS_INI_BOUND|EMLXS_TGT_BOUND) 1012*8f23e9faSHans Rosenfeld 1013*8f23e9faSHans Rosenfeld #define EMLXS_PORT_IP_UP 0x00000100 1014*8f23e9faSHans Rosenfeld #define EMLXS_PORT_RESTRICTED 0x00000200 /* Restrict logins */ 1015fcf3ce44SJohn Forte 1016a9800bebSGarrett D'Amore #define EMLXS_PORT_REG_VPI 0x00010000 /* SLI3 */ 1017a9800bebSGarrett D'Amore #define EMLXS_PORT_REG_VPI_CMPL 0x00020000 /* SLI3 */ 1018a9800bebSGarrett D'Amore 1019*8f23e9faSHans Rosenfeld #define EMLXS_PORT_FLOGI_CMPL 0x01000000 /* Fabric login */ 1020*8f23e9faSHans Rosenfeld /* completed */ 1021fcf3ce44SJohn Forte 1022*8f23e9faSHans Rosenfeld #define EMLXS_PORT_RESET_MASK 0x0000FFFF /* Flags to keep */ 1023*8f23e9faSHans Rosenfeld /* across hard reset */ 1024*8f23e9faSHans Rosenfeld #define EMLXS_PORT_LINKDOWN_MASK 0x00FFFFFF /* Flags to keep */ 1025*8f23e9faSHans Rosenfeld /* across link reset */ 1026fcf3ce44SJohn Forte 1027291a2b48SSukumar Swaminathan uint32_t options; 1028a9800bebSGarrett D'Amore #define EMLXS_OPT_RESTRICT 0x00000001 /* Force restricted */ 1029a9800bebSGarrett D'Amore /* logins */ 1030a9800bebSGarrett D'Amore #define EMLXS_OPT_UNRESTRICT 0x00000002 /* Force Unrestricted */ 1031a9800bebSGarrett D'Amore /* logins */ 1032fcf3ce44SJohn Forte #define EMLXS_OPT_RESTRICT_MASK 0x00000003 1033fcf3ce44SJohn Forte 1034fcf3ce44SJohn Forte 1035fcf3ce44SJohn Forte /* FC world wide names */ 1036291a2b48SSukumar Swaminathan NAME_TYPE wwnn; 1037291a2b48SSukumar Swaminathan NAME_TYPE wwpn; 1038291a2b48SSukumar Swaminathan char snn[256]; 1039291a2b48SSukumar Swaminathan char spn[256]; 1040fcf3ce44SJohn Forte 1041fcf3ce44SJohn Forte /* Common service paramters */ 1042291a2b48SSukumar Swaminathan SERV_PARM sparam; 1043291a2b48SSukumar Swaminathan SERV_PARM fabric_sparam; 1044a9800bebSGarrett D'Amore SERV_PARM prev_fabric_sparam; 1045fcf3ce44SJohn Forte 1046fcf3ce44SJohn Forte /* fc_id management */ 1047291a2b48SSukumar Swaminathan uint32_t did; 1048291a2b48SSukumar Swaminathan uint32_t prev_did; 1049fcf3ce44SJohn Forte 105082527734SSukumar Swaminathan /* support FC_PORT_GET_P2P_INFO only */ 105182527734SSukumar Swaminathan uint32_t rdid; 105282527734SSukumar Swaminathan 1053fcf3ce44SJohn Forte /* FC_AL management */ 1054291a2b48SSukumar Swaminathan uint8_t lip_type; 1055*8f23e9faSHans Rosenfeld uint8_t granted_alpa; 1056291a2b48SSukumar Swaminathan uint8_t alpa_map[128]; 1057fcf3ce44SJohn Forte 1058fcf3ce44SJohn Forte /* Node management */ 1059291a2b48SSukumar Swaminathan emlxs_node_t node_base; 1060291a2b48SSukumar Swaminathan uint32_t node_count; 1061291a2b48SSukumar Swaminathan krwlock_t node_rwlock; 1062291a2b48SSukumar Swaminathan emlxs_node_t *node_table[EMLXS_NUM_HASH_QUES]; 1063fcf3ce44SJohn Forte 1064fcf3ce44SJohn Forte /* Polled packet management */ 1065291a2b48SSukumar Swaminathan kcondvar_t pkt_lock_cv; /* pkt polling */ 1066291a2b48SSukumar Swaminathan kmutex_t pkt_lock; /* pkt polling */ 1067fcf3ce44SJohn Forte 1068fcf3ce44SJohn Forte /* ULP */ 1069*8f23e9faSHans Rosenfeld uint32_t ulp_busy; 1070291a2b48SSukumar Swaminathan uint32_t ulp_statec; 1071291a2b48SSukumar Swaminathan void (*ulp_statec_cb) (); /* Port state change */ 1072291a2b48SSukumar Swaminathan /* callback routine */ 1073291a2b48SSukumar Swaminathan void (*ulp_unsol_cb) (); /* unsolicited event */ 1074291a2b48SSukumar Swaminathan /* callback routine */ 1075291a2b48SSukumar Swaminathan opaque_t ulp_handle; 1076fcf3ce44SJohn Forte 1077fcf3ce44SJohn Forte /* ULP unsolicited buffers */ 1078291a2b48SSukumar Swaminathan kmutex_t ub_lock; 1079291a2b48SSukumar Swaminathan uint32_t ub_count; 1080291a2b48SSukumar Swaminathan emlxs_unsol_buf_t *ub_pool; 108182527734SSukumar Swaminathan uint32_t ub_post[MAX_CHANNEL]; 1082291a2b48SSukumar Swaminathan uint32_t ub_timer; 1083fcf3ce44SJohn Forte 1084291a2b48SSukumar Swaminathan emlxs_ub_priv_t *ub_wait_head; /* Unsolicited IO received */ 1085291a2b48SSukumar Swaminathan /* before link up */ 1086291a2b48SSukumar Swaminathan emlxs_ub_priv_t *ub_wait_tail; /* Unsolicited IO received */ 1087291a2b48SSukumar Swaminathan /* before link up */ 1088fcf3ce44SJohn Forte 1089fcf3ce44SJohn Forte #ifdef DHCHAP_SUPPORT 1090291a2b48SSukumar Swaminathan emlxs_port_dhc_t port_dhc; 1091fcf3ce44SJohn Forte #endif /* DHCHAP_SUPPORT */ 1092fcf3ce44SJohn Forte 1093fcf3ce44SJohn Forte #ifdef SFCT_SUPPORT 1094*8f23e9faSHans Rosenfeld emlxs_memseg_t *fct_memseg; /* Array */ 1095*8f23e9faSHans Rosenfeld uint32_t fct_memseg_cnt; 1096*8f23e9faSHans Rosenfeld 1097*8f23e9faSHans Rosenfeld /* Default buffer counts */ 1098*8f23e9faSHans Rosenfeld #define FCT_BUF_COUNT_2K 16 1099*8f23e9faSHans Rosenfeld #define FCT_BUF_COUNT_4K 0 1100*8f23e9faSHans Rosenfeld #define FCT_BUF_COUNT_8K 16 1101*8f23e9faSHans Rosenfeld #define FCT_BUF_COUNT_16K 0 1102*8f23e9faSHans Rosenfeld #define FCT_BUF_COUNT_32K 0 1103*8f23e9faSHans Rosenfeld #define FCT_BUF_COUNT_64K 16 1104*8f23e9faSHans Rosenfeld #define FCT_BUF_COUNT_128K 16 1105*8f23e9faSHans Rosenfeld #define FCT_BUF_COUNT_256K 0 1106fcf3ce44SJohn Forte 1107291a2b48SSukumar Swaminathan char cfd_name[24]; 1108291a2b48SSukumar Swaminathan stmf_port_provider_t *port_provider; 1109291a2b48SSukumar Swaminathan fct_local_port_t *fct_port; 1110*8f23e9faSHans Rosenfeld uint8_t fct_els_only_bmap; 1111291a2b48SSukumar Swaminathan uint32_t fct_flags; 1112fcf3ce44SJohn Forte 1113e2ca2865SSukumar Swaminathan #define FCT_STATE_PORT_ONLINE 0x00000001 1114e2ca2865SSukumar Swaminathan #define FCT_STATE_NOT_ACKED 0x00000002 1115e2ca2865SSukumar Swaminathan #define FCT_STATE_LINK_UP 0x00000010 1116e2ca2865SSukumar Swaminathan #define FCT_STATE_LINK_UP_ACKED 0x00000020 1117*8f23e9faSHans Rosenfeld #define FCT_STATE_FLOGI_CMPL 0x00000040 1118fcf3ce44SJohn Forte 1119291a2b48SSukumar Swaminathan emlxs_tgtport_stat_t fct_stat; 1120291a2b48SSukumar Swaminathan 1121291a2b48SSukumar Swaminathan /* Used to save fct_cmd for deferred unsol ELS commands, except FLOGI */ 1122291a2b48SSukumar Swaminathan emlxs_buf_t *fct_wait_head; 1123291a2b48SSukumar Swaminathan emlxs_buf_t *fct_wait_tail; 1124291a2b48SSukumar Swaminathan 1125291a2b48SSukumar Swaminathan /* Used to save context for deferred unsol FLOGIs */ 1126291a2b48SSukumar Swaminathan fct_flogi_xchg_t fx; 1127e2ca2865SSukumar Swaminathan 1128291a2b48SSukumar Swaminathan #ifdef FCT_IO_TRACE 1129291a2b48SSukumar Swaminathan emlxs_iotrace_t *iotrace; 1130291a2b48SSukumar Swaminathan uint16_t iotrace_cnt; 1131291a2b48SSukumar Swaminathan uint16_t iotrace_index; 1132291a2b48SSukumar Swaminathan kmutex_t iotrace_mtx; 1133291a2b48SSukumar Swaminathan #endif /* FCT_IO_TRACE */ 1134291a2b48SSukumar Swaminathan 1135291a2b48SSukumar Swaminathan #endif /* SFCT_SUPPORT */ 1136291a2b48SSukumar Swaminathan 1137*8f23e9faSHans Rosenfeld uint32_t clean_address_timer; 1138*8f23e9faSHans Rosenfeld emlxs_buf_t *clean_address_sbp; 1139*8f23e9faSHans Rosenfeld 1140291a2b48SSukumar Swaminathan #ifdef SAN_DIAG_SUPPORT 1141291a2b48SSukumar Swaminathan uint8_t sd_io_latency_state; 1142291a2b48SSukumar Swaminathan #define SD_INVALID 0x00 1143291a2b48SSukumar Swaminathan #define SD_COLLECTING 0x01 1144291a2b48SSukumar Swaminathan #define SD_STOPPED 0x02 1145291a2b48SSukumar Swaminathan 1146291a2b48SSukumar Swaminathan /* SD event management list */ 114782527734SSukumar Swaminathan uint32_t sd_event_mask; /* bit-mask */ 1148291a2b48SSukumar Swaminathan emlxs_dfc_event_t sd_events[MAX_DFC_EVENTS]; 1149291a2b48SSukumar Swaminathan #endif 1150fcf3ce44SJohn Forte 1151a9800bebSGarrett D'Amore } emlxs_port_t; 1152fcf3ce44SJohn Forte 1153fcf3ce44SJohn Forte 1154fcf3ce44SJohn Forte /* Host Attn reg */ 115582527734SSukumar Swaminathan #define FC_HA_REG(_hba) ((volatile uint32_t *) \ 115682527734SSukumar Swaminathan ((_hba)->sli.sli3.ha_reg_addr)) 1157fcf3ce44SJohn Forte 1158fcf3ce44SJohn Forte /* Chip Attn reg */ 115982527734SSukumar Swaminathan #define FC_CA_REG(_hba) ((volatile uint32_t *) \ 116082527734SSukumar Swaminathan ((_hba)->sli.sli3.ca_reg_addr)) 1161fcf3ce44SJohn Forte 1162fcf3ce44SJohn Forte /* Host Status reg */ 116382527734SSukumar Swaminathan #define FC_HS_REG(_hba) ((volatile uint32_t *) \ 116482527734SSukumar Swaminathan ((_hba)->sli.sli3.hs_reg_addr)) 1165fcf3ce44SJohn Forte 1166fcf3ce44SJohn Forte /* Host Cntl reg */ 116782527734SSukumar Swaminathan #define FC_HC_REG(_hba) ((volatile uint32_t *) \ 116882527734SSukumar Swaminathan ((_hba)->sli.sli3.hc_reg_addr)) 1169fcf3ce44SJohn Forte 1170fcf3ce44SJohn Forte /* BIU Configuration reg */ 117182527734SSukumar Swaminathan #define FC_BC_REG(_hba) ((volatile uint32_t *) \ 117282527734SSukumar Swaminathan ((_hba)->sli.sli3.bc_reg_addr)) 1173fcf3ce44SJohn Forte 1174fcf3ce44SJohn Forte /* Used by SBUS adapter */ 1175fcf3ce44SJohn Forte /* TITAN Cntl reg */ 117682527734SSukumar Swaminathan #define FC_SHC_REG(_hba) ((volatile uint32_t *) \ 117782527734SSukumar Swaminathan ((_hba)->sli.sli3.shc_reg_addr)) 1178fcf3ce44SJohn Forte 1179fcf3ce44SJohn Forte /* TITAN Status reg */ 118082527734SSukumar Swaminathan #define FC_SHS_REG(_hba) ((volatile uint32_t *) \ 118182527734SSukumar Swaminathan ((_hba)->sli.sli3.shs_reg_addr)) 1182fcf3ce44SJohn Forte 1183fcf3ce44SJohn Forte /* TITAN Update reg */ 118482527734SSukumar Swaminathan #define FC_SHU_REG(_hba) ((volatile uint32_t *) \ 118582527734SSukumar Swaminathan ((_hba)->sli.sli3.shu_reg_addr)) 118682527734SSukumar Swaminathan 118782527734SSukumar Swaminathan /* MPU Semaphore reg */ 118882527734SSukumar Swaminathan #define FC_SEMA_REG(_hba) ((volatile uint32_t *)\ 118982527734SSukumar Swaminathan ((_hba)->sli.sli4.MPUEPSemaphore_reg_addr)) 119082527734SSukumar Swaminathan 119182527734SSukumar Swaminathan /* Bootstrap Mailbox Doorbell reg */ 119282527734SSukumar Swaminathan #define FC_MBDB_REG(_hba) ((volatile uint32_t *) \ 119382527734SSukumar Swaminathan ((_hba)->sli.sli4.MBDB_reg_addr)) 119482527734SSukumar Swaminathan 119582527734SSukumar Swaminathan /* MQ Doorbell reg */ 119682527734SSukumar Swaminathan #define FC_MQDB_REG(_hba) ((volatile uint32_t *) \ 119782527734SSukumar Swaminathan ((_hba)->sli.sli4.MQDB_reg_addr)) 1198fcf3ce44SJohn Forte 119982527734SSukumar Swaminathan /* CQ Doorbell reg */ 120082527734SSukumar Swaminathan #define FC_CQDB_REG(_hba) ((volatile uint32_t *) \ 120182527734SSukumar Swaminathan ((_hba)->sli.sli4.CQDB_reg_addr)) 1202fcf3ce44SJohn Forte 120382527734SSukumar Swaminathan /* WQ Doorbell reg */ 120482527734SSukumar Swaminathan #define FC_WQDB_REG(_hba) ((volatile uint32_t *) \ 120582527734SSukumar Swaminathan ((_hba)->sli.sli4.WQDB_reg_addr)) 1206fcf3ce44SJohn Forte 120782527734SSukumar Swaminathan /* RQ Doorbell reg */ 120882527734SSukumar Swaminathan #define FC_RQDB_REG(_hba) ((volatile uint32_t *) \ 120982527734SSukumar Swaminathan ((_hba)->sli.sli4.RQDB_reg_addr)) 121082527734SSukumar Swaminathan 121182527734SSukumar Swaminathan 121282527734SSukumar Swaminathan #define FC_SLIM2_MAILBOX(_hba) ((MAILBOX *)(_hba)->sli.sli3.slim2.virt) 121382527734SSukumar Swaminathan 121482527734SSukumar Swaminathan #define FC_SLIM1_MAILBOX(_hba) ((MAILBOX *)(_hba)->sli.sli3.slim_addr) 1215fcf3ce44SJohn Forte 1216fcf3ce44SJohn Forte #define FC_MAILBOX(_hba) (((_hba)->flag & FC_SLIM2_MODE) ? \ 1217291a2b48SSukumar Swaminathan FC_SLIM2_MAILBOX(_hba) : FC_SLIM1_MAILBOX(_hba)) 1218291a2b48SSukumar Swaminathan 1219291a2b48SSukumar Swaminathan #define WRITE_CSR_REG(_hba, _regp, _value) ddi_put32(\ 122082527734SSukumar Swaminathan (_hba)->sli.sli3.csr_acc_handle, (uint32_t *)(_regp), \ 122182527734SSukumar Swaminathan (uint32_t)(_value)) 1222291a2b48SSukumar Swaminathan 1223291a2b48SSukumar Swaminathan #define READ_CSR_REG(_hba, _regp) ddi_get32(\ 122482527734SSukumar Swaminathan (_hba)->sli.sli3.csr_acc_handle, (uint32_t *)(_regp)) 1225291a2b48SSukumar Swaminathan 1226291a2b48SSukumar Swaminathan #define WRITE_SLIM_ADDR(_hba, _regp, _value) ddi_put32(\ 122782527734SSukumar Swaminathan (_hba)->sli.sli3.slim_acc_handle, (uint32_t *)(_regp), \ 122882527734SSukumar Swaminathan (uint32_t)(_value)) 1229291a2b48SSukumar Swaminathan 1230291a2b48SSukumar Swaminathan #define READ_SLIM_ADDR(_hba, _regp) ddi_get32(\ 123182527734SSukumar Swaminathan (_hba)->sli.sli3.slim_acc_handle, (uint32_t *)(_regp)) 1232291a2b48SSukumar Swaminathan 1233291a2b48SSukumar Swaminathan #define WRITE_SLIM_COPY(_hba, _bufp, _slimp, _wcnt) ddi_rep_put32(\ 123482527734SSukumar Swaminathan (_hba)->sli.sli3.slim_acc_handle, (uint32_t *)(_bufp), \ 123582527734SSukumar Swaminathan (uint32_t *)(_slimp), (_wcnt), DDI_DEV_AUTOINCR) 1236291a2b48SSukumar Swaminathan 1237291a2b48SSukumar Swaminathan #define READ_SLIM_COPY(_hba, _bufp, _slimp, _wcnt) ddi_rep_get32(\ 123882527734SSukumar Swaminathan (_hba)->sli.sli3.slim_acc_handle, (uint32_t *)(_bufp), \ 123982527734SSukumar Swaminathan (uint32_t *)(_slimp), (_wcnt), DDI_DEV_AUTOINCR) 1240fcf3ce44SJohn Forte 1241fcf3ce44SJohn Forte /* Used by SBUS adapter */ 1242291a2b48SSukumar Swaminathan #define WRITE_SBUS_CSR_REG(_hba, _regp, _value) ddi_put32(\ 124382527734SSukumar Swaminathan (_hba)->sli.sli3.sbus_csr_handle, (uint32_t *)(_regp), \ 124482527734SSukumar Swaminathan (uint32_t)(_value)) 1245291a2b48SSukumar Swaminathan 1246291a2b48SSukumar Swaminathan #define READ_SBUS_CSR_REG(_hba, _regp) ddi_get32(\ 124782527734SSukumar Swaminathan (_hba)->sli.sli3.sbus_csr_handle, (uint32_t *)(_regp)) 1248291a2b48SSukumar Swaminathan 1249291a2b48SSukumar Swaminathan #define SBUS_WRITE_FLASH_COPY(_hba, _offset, _value) ddi_put8(\ 125082527734SSukumar Swaminathan (_hba)->sli.sli3.sbus_flash_acc_handle, \ 125182527734SSukumar Swaminathan (uint8_t *)((volatile uint8_t *)(_hba)->sli.sli3.sbus_flash_addr + \ 125282527734SSukumar Swaminathan (_offset)), (uint8_t)(_value)) 1253fcf3ce44SJohn Forte 1254291a2b48SSukumar Swaminathan #define SBUS_READ_FLASH_COPY(_hba, _offset) ddi_get8(\ 125582527734SSukumar Swaminathan (_hba)->sli.sli3.sbus_flash_acc_handle, \ 125682527734SSukumar Swaminathan (uint8_t *)((volatile uint8_t *)(_hba)->sli.sli3.sbus_flash_addr + \ 125782527734SSukumar Swaminathan (_offset))) 125882527734SSukumar Swaminathan 125982527734SSukumar Swaminathan /* SLI4 registers */ 1260*8f23e9faSHans Rosenfeld #define WRITE_BAR0_REG(_hba, _regp, _value) ddi_put32(\ 1261*8f23e9faSHans Rosenfeld (_hba)->sli.sli4.bar0_acc_handle, (uint32_t *)(_regp), \ 1262*8f23e9faSHans Rosenfeld (uint32_t)(_value)) 1263*8f23e9faSHans Rosenfeld 1264*8f23e9faSHans Rosenfeld #define READ_BAR0_REG(_hba, _regp) ddi_get32(\ 1265*8f23e9faSHans Rosenfeld (_hba)->sli.sli4.bar0_acc_handle, (uint32_t *)(_regp)) 1266*8f23e9faSHans Rosenfeld 126782527734SSukumar Swaminathan #define WRITE_BAR1_REG(_hba, _regp, _value) ddi_put32(\ 126882527734SSukumar Swaminathan (_hba)->sli.sli4.bar1_acc_handle, (uint32_t *)(_regp), \ 126982527734SSukumar Swaminathan (uint32_t)(_value)) 127082527734SSukumar Swaminathan 127182527734SSukumar Swaminathan #define READ_BAR1_REG(_hba, _regp) ddi_get32(\ 127282527734SSukumar Swaminathan (_hba)->sli.sli4.bar1_acc_handle, (uint32_t *)(_regp)) 127382527734SSukumar Swaminathan 127482527734SSukumar Swaminathan #define WRITE_BAR2_REG(_hba, _regp, _value) ddi_put32(\ 127582527734SSukumar Swaminathan (_hba)->sli.sli4.bar2_acc_handle, (uint32_t *)(_regp), \ 127682527734SSukumar Swaminathan (uint32_t)(_value)) 1277fcf3ce44SJohn Forte 127882527734SSukumar Swaminathan #define READ_BAR2_REG(_hba, _regp) ddi_get32(\ 127982527734SSukumar Swaminathan (_hba)->sli.sli4.bar2_acc_handle, (uint32_t *)(_regp)) 128082527734SSukumar Swaminathan 128182527734SSukumar Swaminathan 128282527734SSukumar Swaminathan #define EMLXS_STATE_CHANGE(_hba, _state)\ 1283fcf3ce44SJohn Forte { \ 1284fcf3ce44SJohn Forte mutex_enter(&EMLXS_PORT_LOCK); \ 128582527734SSukumar Swaminathan EMLXS_STATE_CHANGE_LOCKED((_hba), (_state)); \ 1286fcf3ce44SJohn Forte mutex_exit(&EMLXS_PORT_LOCK); \ 1287fcf3ce44SJohn Forte } 1288fcf3ce44SJohn Forte 1289fcf3ce44SJohn Forte /* Used when EMLXS_PORT_LOCK is already held */ 129082527734SSukumar Swaminathan #define EMLXS_STATE_CHANGE_LOCKED(_hba, _state) \ 1291fcf3ce44SJohn Forte { \ 1292fcf3ce44SJohn Forte if ((_hba)->state != (_state)) \ 1293fcf3ce44SJohn Forte { \ 1294fcf3ce44SJohn Forte uint32_t _st = _state; \ 1295fcf3ce44SJohn Forte EMLXS_MSGF(EMLXS_CONTEXT, \ 1296fcf3ce44SJohn Forte &emlxs_state_msg, "%s --> %s", \ 1297fcf3ce44SJohn Forte emlxs_ffstate_xlate((_hba)->state), \ 1298fcf3ce44SJohn Forte emlxs_ffstate_xlate(_state)); \ 129982527734SSukumar Swaminathan (_hba)->state = (_state); \ 130082527734SSukumar Swaminathan if ((_st) == FC_ERROR) \ 1301fcf3ce44SJohn Forte { \ 1302fcf3ce44SJohn Forte (_hba)->flag |= FC_HARDWARE_ERROR; \ 1303fcf3ce44SJohn Forte } \ 1304fcf3ce44SJohn Forte } \ 1305fcf3ce44SJohn Forte } 1306fcf3ce44SJohn Forte 130782527734SSukumar Swaminathan #ifdef FMA_SUPPORT 130882527734SSukumar Swaminathan #define EMLXS_CHK_ACC_HANDLE(_hba, _acc) \ 130982527734SSukumar Swaminathan if (emlxs_fm_check_acc_handle(_hba, _acc) != DDI_FM_OK) { \ 131082527734SSukumar Swaminathan EMLXS_MSGF(EMLXS_CONTEXT, \ 131182527734SSukumar Swaminathan &emlxs_invalid_access_handle_msg, NULL); \ 131282527734SSukumar Swaminathan } 131382527734SSukumar Swaminathan #endif /* FMA_SUPPORT */ 131482527734SSukumar Swaminathan 1315fcf3ce44SJohn Forte /* 1316fcf3ce44SJohn Forte * This is the HBA control area for the adapter 1317fcf3ce44SJohn Forte */ 1318fcf3ce44SJohn Forte 1319fcf3ce44SJohn Forte #ifdef MODSYM_SUPPORT 1320fcf3ce44SJohn Forte 1321291a2b48SSukumar Swaminathan typedef struct emlxs_modsym 1322291a2b48SSukumar Swaminathan { 1323291a2b48SSukumar Swaminathan ddi_modhandle_t mod_fctl; /* For Leadville */ 1324fcf3ce44SJohn Forte 1325fcf3ce44SJohn Forte /* Leadville (fctl) */ 1326291a2b48SSukumar Swaminathan int (*fc_fca_attach)(dev_info_t *, fc_fca_tran_t *); 1327291a2b48SSukumar Swaminathan int (*fc_fca_detach)(dev_info_t *); 1328291a2b48SSukumar Swaminathan int (*fc_fca_init)(struct dev_ops *); 1329fcf3ce44SJohn Forte 1330fcf3ce44SJohn Forte #ifdef SFCT_SUPPORT 133182527734SSukumar Swaminathan uint32_t fct_modopen; 133282527734SSukumar Swaminathan uint32_t reserved; /* Padding for alignment */ 133382527734SSukumar Swaminathan 1334291a2b48SSukumar Swaminathan ddi_modhandle_t mod_fct; /* For Comstar */ 1335291a2b48SSukumar Swaminathan ddi_modhandle_t mod_stmf; /* For Comstar */ 1336fcf3ce44SJohn Forte 1337fcf3ce44SJohn Forte /* Comstar (fct) */ 1338291a2b48SSukumar Swaminathan void* (*fct_alloc)(fct_struct_id_t, int, int); 1339291a2b48SSukumar Swaminathan void (*fct_free)(void *); 1340291a2b48SSukumar Swaminathan void* (*fct_scsi_task_alloc)(void *, uint16_t, uint32_t, uint8_t *, 1341291a2b48SSukumar Swaminathan uint16_t, uint16_t); 1342291a2b48SSukumar Swaminathan int (*fct_register_local_port)(fct_local_port_t *); 1343291a2b48SSukumar Swaminathan void (*fct_deregister_local_port)(fct_local_port_t *); 1344291a2b48SSukumar Swaminathan void (*fct_handle_event)(fct_local_port_t *, int, uint32_t, caddr_t); 1345291a2b48SSukumar Swaminathan void (*fct_post_rcvd_cmd)(fct_cmd_t *, stmf_data_buf_t *); 1346291a2b48SSukumar Swaminathan void (*fct_ctl)(void *, int, void *); 1347291a2b48SSukumar Swaminathan void (*fct_queue_cmd_for_termination)(fct_cmd_t *, fct_status_t); 1348291a2b48SSukumar Swaminathan void (*fct_send_response_done)(fct_cmd_t *, fct_status_t, uint32_t); 1349291a2b48SSukumar Swaminathan void (*fct_send_cmd_done)(fct_cmd_t *, fct_status_t, uint32_t); 1350291a2b48SSukumar Swaminathan void (*fct_scsi_data_xfer_done)(fct_cmd_t *, stmf_data_buf_t *, 1351291a2b48SSukumar Swaminathan uint32_t); 1352291a2b48SSukumar Swaminathan fct_status_t (*fct_port_shutdown) 1353291a2b48SSukumar Swaminathan (fct_local_port_t *, uint32_t, char *); 1354291a2b48SSukumar Swaminathan fct_status_t (*fct_port_initialize) 1355291a2b48SSukumar Swaminathan (fct_local_port_t *, uint32_t, char *); 1356291a2b48SSukumar Swaminathan void (*fct_cmd_fca_aborted) 1357291a2b48SSukumar Swaminathan (fct_cmd_t *, fct_status_t, int); 1358291a2b48SSukumar Swaminathan fct_status_t (*fct_handle_rcvd_flogi) 1359291a2b48SSukumar Swaminathan (fct_local_port_t *, fct_flogi_xchg_t *); 1360fcf3ce44SJohn Forte 1361fcf3ce44SJohn Forte /* Comstar (stmf) */ 1362291a2b48SSukumar Swaminathan void* (*stmf_alloc)(stmf_struct_id_t, int, int); 1363291a2b48SSukumar Swaminathan void (*stmf_free)(void *); 1364291a2b48SSukumar Swaminathan void (*stmf_deregister_port_provider) (stmf_port_provider_t *); 1365291a2b48SSukumar Swaminathan int (*stmf_register_port_provider) (stmf_port_provider_t *); 1366291a2b48SSukumar Swaminathan #endif /* SFCT_SUPPORT */ 1367fcf3ce44SJohn Forte } emlxs_modsym_t; 1368fcf3ce44SJohn Forte extern emlxs_modsym_t emlxs_modsym; 1369fcf3ce44SJohn Forte 1370291a2b48SSukumar Swaminathan #define MODSYM(_f) emlxs_modsym._f 1371fcf3ce44SJohn Forte 1372fcf3ce44SJohn Forte #else 1373fcf3ce44SJohn Forte 1374291a2b48SSukumar Swaminathan #define MODSYM(_f) _f 1375fcf3ce44SJohn Forte 1376291a2b48SSukumar Swaminathan #endif /* MODSYM_SUPPORT */ 1377fcf3ce44SJohn Forte 1378fcf3ce44SJohn Forte 1379fcf3ce44SJohn Forte 138082527734SSukumar Swaminathan typedef struct RPIHdrTmplate 138182527734SSukumar Swaminathan { 138282527734SSukumar Swaminathan uint32_t Word[16]; /* 64 bytes */ 138382527734SSukumar Swaminathan } RPIHdrTmplate_t; 138482527734SSukumar Swaminathan 1385a9800bebSGarrett D'Amore 138682527734SSukumar Swaminathan typedef struct EQ_DESC 138782527734SSukumar Swaminathan { 138882527734SSukumar Swaminathan uint16_t host_index; 138982527734SSukumar Swaminathan uint16_t max_index; 139082527734SSukumar Swaminathan uint16_t qid; 139182527734SSukumar Swaminathan uint16_t msix_vector; 139282527734SSukumar Swaminathan kmutex_t lastwq_lock; 139382527734SSukumar Swaminathan uint16_t lastwq; 139482527734SSukumar Swaminathan MBUF_INFO addr; 1395*8f23e9faSHans Rosenfeld 1396*8f23e9faSHans Rosenfeld /* Statistics */ 1397*8f23e9faSHans Rosenfeld uint32_t max_proc; 1398*8f23e9faSHans Rosenfeld uint32_t isr_count; 1399*8f23e9faSHans Rosenfeld uint32_t num_proc; 140082527734SSukumar Swaminathan } EQ_DESC_t; 140182527734SSukumar Swaminathan 1402a9800bebSGarrett D'Amore 140382527734SSukumar Swaminathan typedef struct CQ_DESC 140482527734SSukumar Swaminathan { 140582527734SSukumar Swaminathan uint16_t host_index; 140682527734SSukumar Swaminathan uint16_t max_index; 140782527734SSukumar Swaminathan uint16_t qid; 140882527734SSukumar Swaminathan uint16_t eqid; 140982527734SSukumar Swaminathan uint16_t type; 141082527734SSukumar Swaminathan #define EMLXS_CQ_TYPE_GROUP1 1 /* associated with a MQ and async events */ 141182527734SSukumar Swaminathan #define EMLXS_CQ_TYPE_GROUP2 2 /* associated with a WQ and RQ */ 141282527734SSukumar Swaminathan uint16_t rsvd; 141382527734SSukumar Swaminathan 141482527734SSukumar Swaminathan MBUF_INFO addr; 141582527734SSukumar Swaminathan CHANNEL *channelp; /* ptr to CHANNEL associated with CQ */ 141682527734SSukumar Swaminathan 1417*8f23e9faSHans Rosenfeld /* Statistics */ 1418*8f23e9faSHans Rosenfeld uint32_t max_proc; 1419*8f23e9faSHans Rosenfeld uint32_t isr_count; 1420*8f23e9faSHans Rosenfeld uint32_t num_proc; 142182527734SSukumar Swaminathan } CQ_DESC_t; 142282527734SSukumar Swaminathan 1423a9800bebSGarrett D'Amore 142482527734SSukumar Swaminathan typedef struct WQ_DESC 142582527734SSukumar Swaminathan { 142682527734SSukumar Swaminathan uint16_t host_index; 142782527734SSukumar Swaminathan uint16_t max_index; 142882527734SSukumar Swaminathan uint16_t port_index; 142982527734SSukumar Swaminathan uint16_t release_depth; 143082527734SSukumar Swaminathan #define WQE_RELEASE_DEPTH (8 * EMLXS_NUM_WQ_PAGES) 143182527734SSukumar Swaminathan uint16_t qid; 143282527734SSukumar Swaminathan uint16_t cqid; 143382527734SSukumar Swaminathan MBUF_INFO addr; 1434*8f23e9faSHans Rosenfeld 1435*8f23e9faSHans Rosenfeld /* Statistics */ 1436*8f23e9faSHans Rosenfeld uint32_t num_proc; 1437*8f23e9faSHans Rosenfeld uint32_t num_busy; 143882527734SSukumar Swaminathan } WQ_DESC_t; 143982527734SSukumar Swaminathan 1440a9800bebSGarrett D'Amore 144182527734SSukumar Swaminathan typedef struct RQ_DESC 144282527734SSukumar Swaminathan { 144382527734SSukumar Swaminathan uint16_t host_index; 144482527734SSukumar Swaminathan uint16_t max_index; 144582527734SSukumar Swaminathan uint16_t qid; 144682527734SSukumar Swaminathan uint16_t cqid; 144782527734SSukumar Swaminathan 144882527734SSukumar Swaminathan MBUF_INFO addr; 1449b3660a96SSukumar Swaminathan MBUF_INFO rqb[RQ_DEPTH]; 145082527734SSukumar Swaminathan 145182527734SSukumar Swaminathan kmutex_t lock; 145282527734SSukumar Swaminathan 1453*8f23e9faSHans Rosenfeld /* Statistics */ 1454*8f23e9faSHans Rosenfeld uint32_t num_proc; 145582527734SSukumar Swaminathan } RQ_DESC_t; 145682527734SSukumar Swaminathan 145782527734SSukumar Swaminathan 145882527734SSukumar Swaminathan typedef struct RXQ_DESC 145982527734SSukumar Swaminathan { 146082527734SSukumar Swaminathan kmutex_t lock; 146182527734SSukumar Swaminathan emlxs_queue_t active; 146282527734SSukumar Swaminathan 146382527734SSukumar Swaminathan } RXQ_DESC_t; 146482527734SSukumar Swaminathan 146582527734SSukumar Swaminathan 146682527734SSukumar Swaminathan typedef struct MQ_DESC 146782527734SSukumar Swaminathan { 146882527734SSukumar Swaminathan uint16_t host_index; 146982527734SSukumar Swaminathan uint16_t max_index; 147082527734SSukumar Swaminathan uint16_t qid; 147182527734SSukumar Swaminathan uint16_t cqid; 147282527734SSukumar Swaminathan MBUF_INFO addr; 147382527734SSukumar Swaminathan } MQ_DESC_t; 147482527734SSukumar Swaminathan 1475a9800bebSGarrett D'Amore 147682527734SSukumar Swaminathan /* Define the number of queues the driver will be using */ 147782527734SSukumar Swaminathan #define EMLXS_MAX_EQS EMLXS_MSI_MAX_INTRS 1478*8f23e9faSHans Rosenfeld #define EMLXS_MAX_WQS EMLXS_MAX_WQS_PER_EQ * EMLXS_MAX_EQS 147982527734SSukumar Swaminathan #define EMLXS_MAX_RQS 2 /* ONLY 1 pair is allowed */ 148082527734SSukumar Swaminathan #define EMLXS_MAX_MQS 1 148182527734SSukumar Swaminathan 148282527734SSukumar Swaminathan /* One CQ for each WQ & (RQ pair) plus one for the MQ */ 148382527734SSukumar Swaminathan #define EMLXS_MAX_CQS (EMLXS_MAX_WQS + (EMLXS_MAX_RQS/2) + 1) 148482527734SSukumar Swaminathan 148582527734SSukumar Swaminathan /* The First CQ created is ALWAYS for mbox / event handling */ 148682527734SSukumar Swaminathan #define EMLXS_CQ_MBOX 0 148782527734SSukumar Swaminathan 148882527734SSukumar Swaminathan /* The Second CQ created is ALWAYS for unsol rcv handling */ 148982527734SSukumar Swaminathan /* At this time we are allowing ONLY 1 pair of RQs */ 149082527734SSukumar Swaminathan #define EMLXS_CQ_RCV 1 149182527734SSukumar Swaminathan 149282527734SSukumar Swaminathan /* The remaining CQs are for WQ completions */ 149382527734SSukumar Swaminathan #define EMLXS_CQ_OFFSET_WQ 2 149482527734SSukumar Swaminathan 149582527734SSukumar Swaminathan 149682527734SSukumar Swaminathan /* FCFI RQ Configuration */ 149782527734SSukumar Swaminathan #define EMLXS_FCFI_RQ0_INDEX 0 149882527734SSukumar Swaminathan #define EMLXS_FCFI_RQ0_RMASK 0 /* match all */ 149982527734SSukumar Swaminathan #define EMLXS_FCFI_RQ0_RCTL 0 /* match all */ 150082527734SSukumar Swaminathan #define EMLXS_FCFI_RQ0_TMASK 0 /* match all */ 150182527734SSukumar Swaminathan #define EMLXS_FCFI_RQ0_TYPE 0 /* match all */ 150282527734SSukumar Swaminathan 150382527734SSukumar Swaminathan #define EMLXS_RXQ_ELS 0 150482527734SSukumar Swaminathan #define EMLXS_RXQ_CT 1 150582527734SSukumar Swaminathan #define EMLXS_MAX_RXQS 2 150682527734SSukumar Swaminathan 1507291a2b48SSukumar Swaminathan #define PCI_CONFIG_SIZE 0x80 1508fcf3ce44SJohn Forte 150982527734SSukumar Swaminathan typedef struct emlxs_sli3 151082527734SSukumar Swaminathan { 151182527734SSukumar Swaminathan /* SLIM management */ 151282527734SSukumar Swaminathan MATCHMAP slim2; 151382527734SSukumar Swaminathan 151482527734SSukumar Swaminathan /* HBQ management */ 151582527734SSukumar Swaminathan uint32_t hbq_count; /* Total number of HBQs */ 151682527734SSukumar Swaminathan /* configured */ 151782527734SSukumar Swaminathan HBQ_INIT_t hbq_table[EMLXS_NUM_HBQ]; 151882527734SSukumar Swaminathan 151982527734SSukumar Swaminathan /* Adapter memory management */ 152082527734SSukumar Swaminathan caddr_t csr_addr; 152182527734SSukumar Swaminathan caddr_t slim_addr; 152282527734SSukumar Swaminathan ddi_acc_handle_t csr_acc_handle; 152382527734SSukumar Swaminathan ddi_acc_handle_t slim_acc_handle; 152482527734SSukumar Swaminathan 152582527734SSukumar Swaminathan /* SBUS adapter management */ 152682527734SSukumar Swaminathan caddr_t sbus_flash_addr; /* Virt addr of R/W */ 152782527734SSukumar Swaminathan /* Flash */ 152882527734SSukumar Swaminathan caddr_t sbus_core_addr; /* Virt addr of TITAN */ 152982527734SSukumar Swaminathan /* CORE */ 153082527734SSukumar Swaminathan caddr_t sbus_csr_addr; /* Virt addr of TITAN */ 153182527734SSukumar Swaminathan /* CSR */ 153282527734SSukumar Swaminathan ddi_acc_handle_t sbus_flash_acc_handle; 153382527734SSukumar Swaminathan ddi_acc_handle_t sbus_core_acc_handle; 153482527734SSukumar Swaminathan ddi_acc_handle_t sbus_csr_handle; 153582527734SSukumar Swaminathan 153682527734SSukumar Swaminathan /* SLI 2/3 Adapter register management */ 153782527734SSukumar Swaminathan uint32_t *bc_reg_addr; /* virtual offset for BIU */ 153882527734SSukumar Swaminathan /* config reg */ 153982527734SSukumar Swaminathan uint32_t *ha_reg_addr; /* virtual offset for host */ 154082527734SSukumar Swaminathan /* attn reg */ 154182527734SSukumar Swaminathan uint32_t *hc_reg_addr; /* virtual offset for host */ 154282527734SSukumar Swaminathan /* ctl reg */ 154382527734SSukumar Swaminathan uint32_t *ca_reg_addr; /* virtual offset for FF */ 154482527734SSukumar Swaminathan /* attn reg */ 154582527734SSukumar Swaminathan uint32_t *hs_reg_addr; /* virtual offset for */ 154682527734SSukumar Swaminathan /* status reg */ 154782527734SSukumar Swaminathan uint32_t *shc_reg_addr; /* virtual offset for SBUS */ 154882527734SSukumar Swaminathan /* Ctrl reg */ 154982527734SSukumar Swaminathan uint32_t *shs_reg_addr; /* virtual offset for SBUS */ 155082527734SSukumar Swaminathan /* Status reg */ 155182527734SSukumar Swaminathan uint32_t *shu_reg_addr; /* virtual offset for SBUS */ 155282527734SSukumar Swaminathan /* Update reg */ 155382527734SSukumar Swaminathan uint16_t hgp_ring_offset; 155482527734SSukumar Swaminathan uint16_t hgp_hbq_offset; 155582527734SSukumar Swaminathan uint16_t iocb_cmd_size; 155682527734SSukumar Swaminathan uint16_t iocb_rsp_size; 155782527734SSukumar Swaminathan uint32_t hc_copy; /* local copy of HC register */ 155882527734SSukumar Swaminathan 155982527734SSukumar Swaminathan /* Ring management */ 156082527734SSukumar Swaminathan uint32_t ring_count; 156182527734SSukumar Swaminathan emlxs_ring_t ring[MAX_RINGS]; 156282527734SSukumar Swaminathan kmutex_t ring_cmd_lock[MAX_RINGS]; 156382527734SSukumar Swaminathan uint8_t ring_masks[4]; /* number of masks/rings used */ 156482527734SSukumar Swaminathan uint8_t ring_rval[6]; 156582527734SSukumar Swaminathan uint8_t ring_rmask[6]; 156682527734SSukumar Swaminathan uint8_t ring_tval[6]; 156782527734SSukumar Swaminathan uint8_t ring_tmask[6]; 156882527734SSukumar Swaminathan 156982527734SSukumar Swaminathan /* Protected by EMLXS_FCTAB_LOCK */ 1570*8f23e9faSHans Rosenfeld MATCHMAP **bpl_table; /* iotag table for */ 157182527734SSukumar Swaminathan /* bpl buffers */ 157282527734SSukumar Swaminathan uint32_t mem_bpl_size; 157382527734SSukumar Swaminathan } emlxs_sli3_t; 157482527734SSukumar Swaminathan 157582527734SSukumar Swaminathan typedef struct emlxs_sli4 157682527734SSukumar Swaminathan { 157782527734SSukumar Swaminathan MATCHMAP bootstrapmb; 1578*8f23e9faSHans Rosenfeld caddr_t bar0_addr; 157982527734SSukumar Swaminathan caddr_t bar1_addr; 158082527734SSukumar Swaminathan caddr_t bar2_addr; 1581*8f23e9faSHans Rosenfeld ddi_acc_handle_t bar0_acc_handle; 158282527734SSukumar Swaminathan ddi_acc_handle_t bar1_acc_handle; 158382527734SSukumar Swaminathan ddi_acc_handle_t bar2_acc_handle; 158482527734SSukumar Swaminathan 158582527734SSukumar Swaminathan /* SLI4 Adapter register management */ 158682527734SSukumar Swaminathan uint32_t *MPUEPSemaphore_reg_addr; 158782527734SSukumar Swaminathan uint32_t *MBDB_reg_addr; 158882527734SSukumar Swaminathan 158982527734SSukumar Swaminathan uint32_t *CQDB_reg_addr; 159082527734SSukumar Swaminathan uint32_t *MQDB_reg_addr; 159182527734SSukumar Swaminathan uint32_t *WQDB_reg_addr; 159282527734SSukumar Swaminathan uint32_t *RQDB_reg_addr; 1593*8f23e9faSHans Rosenfeld uint32_t *SEMA_reg_addr; 1594*8f23e9faSHans Rosenfeld uint32_t *STATUS_reg_addr; 1595*8f23e9faSHans Rosenfeld uint32_t *CNTL_reg_addr; 1596*8f23e9faSHans Rosenfeld uint32_t *ERR1_reg_addr; 1597*8f23e9faSHans Rosenfeld uint32_t *ERR2_reg_addr; 1598*8f23e9faSHans Rosenfeld uint32_t *PHYSDEV_reg_addr; 159982527734SSukumar Swaminathan 160082527734SSukumar Swaminathan uint32_t flag; 1601a9800bebSGarrett D'Amore #define EMLXS_SLI4_INTR_ENABLED 0x00000001 1602a9800bebSGarrett D'Amore #define EMLXS_SLI4_HW_ERROR 0x00000002 1603a9800bebSGarrett D'Amore #define EMLXS_SLI4_DOWN_LINK 0x00000004 1604*8f23e9faSHans Rosenfeld #define EMLXS_SLI4_PHON 0x00000008 1605*8f23e9faSHans Rosenfeld #define EMLXS_SLI4_PHWQ 0x00000010 1606*8f23e9faSHans Rosenfeld #define EMLXS_SLI4_NULL_XRI 0x00000020 1607*8f23e9faSHans Rosenfeld 1608*8f23e9faSHans Rosenfeld #define EMLXS_SLI4_FCF_INIT 0x10000000 1609*8f23e9faSHans Rosenfeld #define EMLXS_SLI4_FCOE_MODE 0x80000000 1610*8f23e9faSHans Rosenfeld 1611*8f23e9faSHans Rosenfeld #define SLI4_FCOE_MODE (hba->sli.sli4.flag & EMLXS_SLI4_FCOE_MODE) 1612*8f23e9faSHans Rosenfeld #define SLI4_FC_MODE (!SLI4_FCOE_MODE) 1613*8f23e9faSHans Rosenfeld 1614*8f23e9faSHans Rosenfeld 161582527734SSukumar Swaminathan 161682527734SSukumar Swaminathan uint16_t XRICount; 1617*8f23e9faSHans Rosenfeld uint16_t XRIExtCount; 1618*8f23e9faSHans Rosenfeld uint16_t XRIExtSize; 1619*8f23e9faSHans Rosenfeld uint16_t XRIBase[MAX_EXTENTS]; 1620*8f23e9faSHans Rosenfeld 162182527734SSukumar Swaminathan uint16_t RPICount; 1622*8f23e9faSHans Rosenfeld uint16_t RPIExtCount; 1623*8f23e9faSHans Rosenfeld uint16_t RPIExtSize; 1624*8f23e9faSHans Rosenfeld uint16_t RPIBase[MAX_EXTENTS]; 1625*8f23e9faSHans Rosenfeld 162682527734SSukumar Swaminathan uint16_t VPICount; 1627*8f23e9faSHans Rosenfeld uint16_t VPIExtCount; 1628*8f23e9faSHans Rosenfeld uint16_t VPIExtSize; 1629*8f23e9faSHans Rosenfeld uint16_t VPIBase[MAX_EXTENTS]; 1630*8f23e9faSHans Rosenfeld 163182527734SSukumar Swaminathan uint16_t VFICount; 1632*8f23e9faSHans Rosenfeld uint16_t VFIExtCount; 1633*8f23e9faSHans Rosenfeld uint16_t VFIExtSize; 1634*8f23e9faSHans Rosenfeld uint16_t VFIBase[MAX_EXTENTS]; 1635*8f23e9faSHans Rosenfeld 163682527734SSukumar Swaminathan uint16_t FCFICount; 163782527734SSukumar Swaminathan 1638a9800bebSGarrett D'Amore kmutex_t fcf_lock; 1639a9800bebSGarrett D'Amore FCFTable_t fcftab; 1640a9800bebSGarrett D'Amore VFIobj_t *VFI_table; 164182527734SSukumar Swaminathan 164282527734SSukumar Swaminathan /* Save Config Region 23 info */ 164382527734SSukumar Swaminathan tlv_fcoe_t cfgFCOE; 164482527734SSukumar Swaminathan tlv_fcfconnectlist_t cfgFCF; 164582527734SSukumar Swaminathan 1646b3660a96SSukumar Swaminathan MBUF_INFO slim2; 164782527734SSukumar Swaminathan MBUF_INFO dump_region; 164882527734SSukumar Swaminathan #define EMLXS_DUMP_REGION_SIZE 1024 164982527734SSukumar Swaminathan 165082527734SSukumar Swaminathan RPIobj_t *RPIp; 165182527734SSukumar Swaminathan MBUF_INFO HeaderTmplate; 165282527734SSukumar Swaminathan XRIobj_t *XRIp; 1653b3660a96SSukumar Swaminathan 1654b3660a96SSukumar Swaminathan /* Double linked list for available XRIs */ 1655b3660a96SSukumar Swaminathan XRIobj_t *XRIfree_f; 1656b3660a96SSukumar Swaminathan XRIobj_t *XRIfree_b; 165782527734SSukumar Swaminathan uint32_t xrif_count; 165882527734SSukumar Swaminathan uint32_t mem_sgl_size; 165982527734SSukumar Swaminathan 166082527734SSukumar Swaminathan /* Double linked list for XRIs in use */ 166182527734SSukumar Swaminathan XRIobj_t *XRIinuse_f; 166282527734SSukumar Swaminathan XRIobj_t *XRIinuse_b; 166382527734SSukumar Swaminathan uint32_t xria_count; 166482527734SSukumar Swaminathan 1665a9800bebSGarrett D'Amore kmutex_t que_lock[EMLXS_MAX_WQS]; 166682527734SSukumar Swaminathan EQ_DESC_t eq[EMLXS_MAX_EQS]; 166782527734SSukumar Swaminathan CQ_DESC_t cq[EMLXS_MAX_CQS]; 166882527734SSukumar Swaminathan WQ_DESC_t wq[EMLXS_MAX_WQS]; 166982527734SSukumar Swaminathan RQ_DESC_t rq[EMLXS_MAX_RQS]; 167082527734SSukumar Swaminathan RXQ_DESC_t rxq[EMLXS_MAX_RXQS]; 1671*8f23e9faSHans Rosenfeld MQ_DESC_t mq; 1672*8f23e9faSHans Rosenfeld uint32_t que_stat_timer; 167382527734SSukumar Swaminathan 1674fe199829SSukumar Swaminathan uint32_t ue_mask_lo; 1675fe199829SSukumar Swaminathan uint32_t ue_mask_hi; 1676a9800bebSGarrett D'Amore 1677*8f23e9faSHans Rosenfeld sli_params_t param; 1678*8f23e9faSHans Rosenfeld 1679*8f23e9faSHans Rosenfeld uint8_t port_name[4]; 1680*8f23e9faSHans Rosenfeld uint32_t link_number; 1681*8f23e9faSHans Rosenfeld 168282527734SSukumar Swaminathan } emlxs_sli4_t; 168382527734SSukumar Swaminathan 168482527734SSukumar Swaminathan 168582527734SSukumar Swaminathan typedef struct emlxs_sli_api 168682527734SSukumar Swaminathan { 168782527734SSukumar Swaminathan int (*sli_map_hdw)(); 168882527734SSukumar Swaminathan void (*sli_unmap_hdw)(); 168982527734SSukumar Swaminathan int32_t (*sli_online)(); 169082527734SSukumar Swaminathan void (*sli_offline)(); 169182527734SSukumar Swaminathan uint32_t (*sli_hba_reset)(); 169282527734SSukumar Swaminathan void (*sli_hba_kill)(); 169382527734SSukumar Swaminathan void (*sli_issue_iocb_cmd)(); 169482527734SSukumar Swaminathan uint32_t (*sli_issue_mbox_cmd)(); 169582527734SSukumar Swaminathan uint32_t (*sli_prep_fct_iocb)(); 169682527734SSukumar Swaminathan uint32_t (*sli_prep_fcp_iocb)(); 169782527734SSukumar Swaminathan uint32_t (*sli_prep_ip_iocb)(); 169882527734SSukumar Swaminathan uint32_t (*sli_prep_els_iocb)(); 169982527734SSukumar Swaminathan uint32_t (*sli_prep_ct_iocb)(); 170082527734SSukumar Swaminathan void (*sli_poll_intr)(); 170182527734SSukumar Swaminathan int32_t (*sli_intx_intr)(); 170282527734SSukumar Swaminathan uint32_t (*sli_msi_intr)(); 170382527734SSukumar Swaminathan void (*sli_disable_intr)(); 170482527734SSukumar Swaminathan void (*sli_timer)(); 170582527734SSukumar Swaminathan void (*sli_poll_erratt)(); 1706*8f23e9faSHans Rosenfeld uint32_t (*sli_reg_did)(); 1707*8f23e9faSHans Rosenfeld uint32_t (*sli_unreg_node)(); 170882527734SSukumar Swaminathan 170982527734SSukumar Swaminathan } emlxs_sli_api_t; 171082527734SSukumar Swaminathan 171182527734SSukumar Swaminathan 1712291a2b48SSukumar Swaminathan typedef struct emlxs_hba 1713291a2b48SSukumar Swaminathan { 1714291a2b48SSukumar Swaminathan dev_info_t *dip; 1715291a2b48SSukumar Swaminathan int32_t emlxinst; 1716291a2b48SSukumar Swaminathan int32_t ddiinst; 171782527734SSukumar Swaminathan uint8_t pci_function_number; 171882527734SSukumar Swaminathan uint8_t pci_device_number; 171982527734SSukumar Swaminathan uint8_t pci_bus_number; 1720a9800bebSGarrett D'Amore uint8_t pci_cap_offset[PCI_CAP_MAX_PTR]; 1721*8f23e9faSHans Rosenfeld uint16_t pci_ecap_offset[PCI_EXT_CAP_MAX_PTR]; 1722a9800bebSGarrett D'Amore 1723291a2b48SSukumar Swaminathan #ifdef FMA_SUPPORT 1724291a2b48SSukumar Swaminathan int32_t fm_caps; /* FMA capabilities */ 1725291a2b48SSukumar Swaminathan #endif /* FMA_SUPPORT */ 1726291a2b48SSukumar Swaminathan fc_fca_tran_t *fca_tran; 1727fcf3ce44SJohn Forte 172862379b58SSukumar Swaminathan /* DMA attributes */ 172962379b58SSukumar Swaminathan ddi_dma_attr_t dma_attr; 173062379b58SSukumar Swaminathan ddi_dma_attr_t dma_attr_ro; 173162379b58SSukumar Swaminathan ddi_dma_attr_t dma_attr_1sg; 173262379b58SSukumar Swaminathan ddi_dma_attr_t dma_attr_fcip_rsp; 173362379b58SSukumar Swaminathan 1734fcf3ce44SJohn Forte /* HBA Info */ 1735291a2b48SSukumar Swaminathan emlxs_model_t model_info; 1736291a2b48SSukumar Swaminathan emlxs_vpd_t vpd; /* vital product data */ 1737291a2b48SSukumar Swaminathan NAME_TYPE wwnn; 1738291a2b48SSukumar Swaminathan NAME_TYPE wwpn; 1739291a2b48SSukumar Swaminathan char snn[256]; 1740291a2b48SSukumar Swaminathan char spn[256]; 1741291a2b48SSukumar Swaminathan PROG_ID load_list[MAX_LOAD_ENTRY]; 1742291a2b48SSukumar Swaminathan WAKE_UP_PARMS wakeup_parms; 1743291a2b48SSukumar Swaminathan uint32_t max_nodes; 1744291a2b48SSukumar Swaminathan uint32_t io_throttle; 1745291a2b48SSukumar Swaminathan uint32_t io_active; 1746291a2b48SSukumar Swaminathan uint32_t bus_type; 1747291a2b48SSukumar Swaminathan #define PCI_FC 0 1748fcf3ce44SJohn Forte #define SBUS_FC 1 1749*8f23e9faSHans Rosenfeld uint32_t sli_intf; 1750*8f23e9faSHans Rosenfeld #define SLI_INTF_VALID_MASK 0xe0000000 1751*8f23e9faSHans Rosenfeld #define SLI_INTF_VALID 0xc0000000 1752*8f23e9faSHans Rosenfeld 1753*8f23e9faSHans Rosenfeld #define SLI_INTF_HINT2_MASK 0x1f000000 1754*8f23e9faSHans Rosenfeld #define SLI_INTF_HINT2_0 0x00000000 1755*8f23e9faSHans Rosenfeld 1756*8f23e9faSHans Rosenfeld #define SLI_INTF_HINT1_MASK 0x00ff0000 1757*8f23e9faSHans Rosenfeld #define SLI_INTF_HINT1_0 0x00000000 1758*8f23e9faSHans Rosenfeld #define SLI_INTF_HINT1_1 0x00010000 1759*8f23e9faSHans Rosenfeld #define SLI_INTF_HINT1_2 0x00020000 1760*8f23e9faSHans Rosenfeld 1761*8f23e9faSHans Rosenfeld #define SLI_INTF_IF_TYPE_MASK 0x0000f000 1762*8f23e9faSHans Rosenfeld #define SLI_INTF_IF_TYPE_0 0x00000000 1763*8f23e9faSHans Rosenfeld #define SLI_INTF_IF_TYPE_1 0x00001000 1764*8f23e9faSHans Rosenfeld #define SLI_INTF_IF_TYPE_2 0x00002000 1765*8f23e9faSHans Rosenfeld #define SLI_INTF_IF_TYPE_3 0x00003000 1766*8f23e9faSHans Rosenfeld 1767*8f23e9faSHans Rosenfeld #define SLI_INTF_FAMILY_MASK 0x00000f00 1768*8f23e9faSHans Rosenfeld #define SLI_INTF_FAMILY_BE2 0x00000000 1769*8f23e9faSHans Rosenfeld #define SLI_INTF_FAMILY_BE3 0x00000100 1770*8f23e9faSHans Rosenfeld #define SLI_INTF_FAMILY_LANCER_A 0x00000a00 1771*8f23e9faSHans Rosenfeld #define SLI_INTF_FAMILY_LANCER_B 0x00000b00 1772*8f23e9faSHans Rosenfeld 1773*8f23e9faSHans Rosenfeld #define SLI_INTF_SLI_REV_MASK 0x000000f0 1774*8f23e9faSHans Rosenfeld #define SLI_INTF_SLI_REV_NONE 0x00000000 1775*8f23e9faSHans Rosenfeld #define SLI_INTF_SLI_REV_3 0x00000030 1776*8f23e9faSHans Rosenfeld #define SLI_INTF_SLI_REV_4 0x00000040 1777*8f23e9faSHans Rosenfeld 1778*8f23e9faSHans Rosenfeld #define SLI_INTF_RESERVED1 0x0000000e 1779*8f23e9faSHans Rosenfeld 1780*8f23e9faSHans Rosenfeld #define SLI_INTF_FUNC_TYPE_MASK 0x00000001 1781*8f23e9faSHans Rosenfeld #define SLI_INTF_FUNC_PF 0x00000000 1782*8f23e9faSHans Rosenfeld #define SLI_INTF_FUNC_VF 0x00000001 1783fcf3ce44SJohn Forte 1784fcf3ce44SJohn Forte /* Link management */ 1785291a2b48SSukumar Swaminathan uint32_t link_event_tag; 1786291a2b48SSukumar Swaminathan uint8_t topology; 1787291a2b48SSukumar Swaminathan uint8_t linkspeed; 1788b3660a96SSukumar Swaminathan uint16_t qos_linkspeed; 1789291a2b48SSukumar Swaminathan uint32_t linkup_wait_flag; 1790291a2b48SSukumar Swaminathan kcondvar_t linkup_lock_cv; 1791291a2b48SSukumar Swaminathan kmutex_t linkup_lock; 1792fcf3ce44SJohn Forte 1793fcf3ce44SJohn Forte /* Memory Pool management */ 1794291a2b48SSukumar Swaminathan emlxs_memseg_t memseg[FC_MAX_SEG]; /* memory for buffer */ 1795291a2b48SSukumar Swaminathan /* structures */ 1796291a2b48SSukumar Swaminathan kmutex_t memget_lock; /* locks all memory pools get */ 1797291a2b48SSukumar Swaminathan kmutex_t memput_lock; /* locks all memory pools put */ 1798*8f23e9faSHans Rosenfeld uint32_t mem_timer; 1799fcf3ce44SJohn Forte 1800fcf3ce44SJohn Forte /* Fibre Channel Service Parameters */ 1801291a2b48SSukumar Swaminathan SERV_PARM sparam; 1802291a2b48SSukumar Swaminathan uint32_t fc_edtov; /* E_D_TOV timer value */ 1803291a2b48SSukumar Swaminathan uint32_t fc_arbtov; /* ARB_TOV timer value */ 1804291a2b48SSukumar Swaminathan uint32_t fc_ratov; /* R_A_TOV timer value */ 1805291a2b48SSukumar Swaminathan uint32_t fc_rttov; /* R_T_TOV timer value */ 1806291a2b48SSukumar Swaminathan uint32_t fc_altov; /* AL_TOV timer value */ 1807291a2b48SSukumar Swaminathan uint32_t fc_crtov; /* C_R_TOV timer value */ 1808291a2b48SSukumar Swaminathan uint32_t fc_citov; /* C_I_TOV timer value */ 1809291a2b48SSukumar Swaminathan 1810fcf3ce44SJohn Forte /* Adapter State management */ 1811291a2b48SSukumar Swaminathan int32_t state; 1812fcf3ce44SJohn Forte #define FC_ERROR 0x01 /* Adapter shutdown */ 1813fcf3ce44SJohn Forte #define FC_KILLED 0x02 /* Adapter interlocked/killed */ 1814fcf3ce44SJohn Forte #define FC_WARM_START 0x03 /* Adapter reset, but not restarted */ 1815fcf3ce44SJohn Forte #define FC_INIT_START 0x10 /* Adapter restarted */ 1816fcf3ce44SJohn Forte #define FC_INIT_NVPARAMS 0x11 1817fcf3ce44SJohn Forte #define FC_INIT_REV 0x12 1818fcf3ce44SJohn Forte #define FC_INIT_CFGPORT 0x13 1819fcf3ce44SJohn Forte #define FC_INIT_CFGRING 0x14 1820fcf3ce44SJohn Forte #define FC_INIT_INITLINK 0x15 1821fcf3ce44SJohn Forte #define FC_LINK_DOWN 0x20 182282527734SSukumar Swaminathan #define FC_LINK_DOWN_PERSIST 0x21 1823fcf3ce44SJohn Forte #define FC_LINK_UP 0x30 1824fcf3ce44SJohn Forte #define FC_CLEAR_LA 0x31 1825fcf3ce44SJohn Forte #define FC_READY 0x40 1826fcf3ce44SJohn Forte 1827291a2b48SSukumar Swaminathan uint32_t flag; 1828fcf3ce44SJohn Forte #define FC_ONLINING_MODE 0x00000001 1829fcf3ce44SJohn Forte #define FC_ONLINE_MODE 0x00000002 1830fcf3ce44SJohn Forte #define FC_OFFLINING_MODE 0x00000004 1831fcf3ce44SJohn Forte #define FC_OFFLINE_MODE 0x00000008 1832fcf3ce44SJohn Forte 1833291a2b48SSukumar Swaminathan #define FC_NPIV_ENABLED 0x00000010 /* NPIV enabled on adapter */ 1834291a2b48SSukumar Swaminathan #define FC_NPIV_SUPPORTED 0x00000020 /* NPIV supported on fabric */ 1835fcf3ce44SJohn Forte #define FC_NPIV_UNSUPPORTED 0x00000040 /* NPIV unsupported on fabric */ 1836fcf3ce44SJohn Forte #define FC_NPIV_LINKUP 0x00000100 /* NPIV enabled, supported, */ 1837fcf3ce44SJohn Forte /* and link is ready */ 1838fcf3ce44SJohn Forte #define FC_NPIV_DELAY_REQUIRED 0x00000200 /* Delay issuing FLOGI/FDISC */ 1839fcf3ce44SJohn Forte /* and NameServer cmds */ 1840fcf3ce44SJohn Forte 184182527734SSukumar Swaminathan #define FC_BOOTSTRAPMB_INIT 0x00000400 184282527734SSukumar Swaminathan #define FC_FIP_SUPPORTED 0x00000800 /* FIP supported */ 184382527734SSukumar Swaminathan 1844fcf3ce44SJohn Forte #define FC_FABRIC_ATTACHED 0x00001000 1845fcf3ce44SJohn Forte #define FC_PT_TO_PT 0x00002000 1846fcf3ce44SJohn Forte #define FC_BYPASSED_MODE 0x00004000 1847291a2b48SSukumar Swaminathan #define FC_MENLO_MODE 0x00008000 /* Menlo maintenance mode */ 1848291a2b48SSukumar Swaminathan 1849291a2b48SSukumar Swaminathan #define FC_DUMP_SAFE 0x00010000 /* Safe to DUMP */ 1850291a2b48SSukumar Swaminathan #define FC_DUMP_ACTIVE 0x00020000 /* DUMP in progress */ 1851a9800bebSGarrett D'Amore #define FC_NEW_FABRIC 0x00040000 1852fcf3ce44SJohn Forte 1853fcf3ce44SJohn Forte #define FC_SLIM2_MODE 0x00100000 /* SLIM in host memory */ 1854fcf3ce44SJohn Forte #define FC_INTERLOCKED 0x00200000 1855fcf3ce44SJohn Forte #define FC_HBQ_ENABLED 0x00400000 1856fcf3ce44SJohn Forte #define FC_ASYNC_EVENTS 0x00800000 1857fcf3ce44SJohn Forte 1858fcf3ce44SJohn Forte #define FC_ILB_MODE 0x01000000 1859fcf3ce44SJohn Forte #define FC_ELB_MODE 0x02000000 1860fcf3ce44SJohn Forte #define FC_LOOPBACK_MODE 0x03000000 /* Loopback Mode Mask */ 1861291a2b48SSukumar Swaminathan #define FC_DUMP 0x04000000 /* DUMP in progress */ 1862fcf3ce44SJohn Forte #define FC_SHUTDOWN 0x08000000 /* SHUTDOWN in progress */ 1863fcf3ce44SJohn Forte 1864291a2b48SSukumar Swaminathan #define FC_OVERTEMP_EVENT 0x10000000 /* FC_ERROR reason: */ 1865291a2b48SSukumar Swaminathan /* over temperature event */ 1866291a2b48SSukumar Swaminathan #define FC_MBOX_TIMEOUT 0x20000000 /* FC_ERROR reason: */ 1867291a2b48SSukumar Swaminathan /* mailbox timeout event */ 1868b3660a96SSukumar Swaminathan #define FC_DMA_CHECK_ERROR 0x40000000 /* Shared memory (slim,..) */ 1869b3660a96SSukumar Swaminathan /* DMA handle went bad */ 1870fcf3ce44SJohn Forte #define FC_HARDWARE_ERROR 0x80000000 /* FC_ERROR state triggered */ 1871fcf3ce44SJohn Forte 187282527734SSukumar Swaminathan #define FC_RESET_MASK 0x00030C1F /* Bits to protect during */ 1873291a2b48SSukumar Swaminathan /* a hard reset */ 187482527734SSukumar Swaminathan #define FC_LINKDOWN_MASK 0xFFF30C1F /* Bits to protect during */ 1875291a2b48SSukumar Swaminathan /* a linkdown */ 1876fcf3ce44SJohn Forte 18776a573d82SSukumar Swaminathan uint32_t fw_timer; 18786a573d82SSukumar Swaminathan uint32_t fw_flag; 18796a573d82SSukumar Swaminathan #define FW_UPDATE_NEEDED 0x00000001 18806a573d82SSukumar Swaminathan #define FW_UPDATE_KERNEL 0x00000002 18816a573d82SSukumar Swaminathan 188282527734SSukumar Swaminathan uint32_t temperature; /* Last reported temperature */ 1883fcf3ce44SJohn Forte 1884fcf3ce44SJohn Forte /* SBUS adapter management */ 1885291a2b48SSukumar Swaminathan caddr_t sbus_pci_addr; /* Virt addr of TITAN */ 1886291a2b48SSukumar Swaminathan /* pci config */ 1887fcf3ce44SJohn Forte ddi_acc_handle_t sbus_pci_handle; 1888fcf3ce44SJohn Forte 188982527734SSukumar Swaminathan /* PCI BUS adapter management */ 189082527734SSukumar Swaminathan caddr_t pci_addr; 189182527734SSukumar Swaminathan ddi_acc_handle_t pci_acc_handle; 189282527734SSukumar Swaminathan 189382527734SSukumar Swaminathan uint32_t sli_mode; 189482527734SSukumar Swaminathan #define EMLXS_HBA_SLI1_MODE 1 189582527734SSukumar Swaminathan #define EMLXS_HBA_SLI2_MODE 2 189682527734SSukumar Swaminathan #define EMLXS_HBA_SLI3_MODE 3 189782527734SSukumar Swaminathan #define EMLXS_HBA_SLI4_MODE 4 189882527734SSukumar Swaminathan 189982527734SSukumar Swaminathan /* SLI private data */ 190082527734SSukumar Swaminathan union { 190182527734SSukumar Swaminathan emlxs_sli3_t sli3; 190282527734SSukumar Swaminathan emlxs_sli4_t sli4; 190382527734SSukumar Swaminathan } sli; 190482527734SSukumar Swaminathan 190582527734SSukumar Swaminathan /* SLI API entry point routines */ 190682527734SSukumar Swaminathan emlxs_sli_api_t sli_api; 1907291a2b48SSukumar Swaminathan 1908291a2b48SSukumar Swaminathan uint32_t io_poll_count; /* Number of poll commands */ 1909291a2b48SSukumar Swaminathan /* in progress */ 1910fcf3ce44SJohn Forte 1911fcf3ce44SJohn Forte /* IO Completion management */ 1912291a2b48SSukumar Swaminathan uint32_t iodone_count; /* Number of IO's on done Q */ 1913fcf3ce44SJohn Forte /* Protected by EMLXS_PORT_LOCK */ 1914291a2b48SSukumar Swaminathan emlxs_buf_t *iodone_list; /* fc_packet being deferred */ 1915291a2b48SSukumar Swaminathan emlxs_buf_t *iodone_tail; /* fc_packet being deferred */ 1916291a2b48SSukumar Swaminathan emlxs_thread_t iodone_thread; 1917bb63f56eSSukumar Swaminathan emlxs_thread_t *spawn_thread_head; 1918bb63f56eSSukumar Swaminathan emlxs_thread_t *spawn_thread_tail; 1919bb63f56eSSukumar Swaminathan kmutex_t spawn_lock; 1920bb63f56eSSukumar Swaminathan uint32_t spawn_open; 1921fcf3ce44SJohn Forte 192282527734SSukumar Swaminathan /* IO Channel management */ 192382527734SSukumar Swaminathan int32_t chan_count; 192482527734SSukumar Swaminathan emlxs_channel_t chan[MAX_CHANNEL]; 192582527734SSukumar Swaminathan kmutex_t channel_tx_lock; 192682527734SSukumar Swaminathan uint8_t channel_fcp; /* Default channel to use for FCP IO */ 192782527734SSukumar Swaminathan #define CHANNEL_FCT channel_fcp 192882527734SSukumar Swaminathan uint8_t channel_ip; /* Default channel to use for IP IO */ 192982527734SSukumar Swaminathan uint8_t channel_els; /* Default channel to use for ELS IO */ 193082527734SSukumar Swaminathan uint8_t channel_ct; /* Default channel to use for CT IO */ 193182527734SSukumar Swaminathan 193282527734SSukumar Swaminathan /* IOTag management */ 193382527734SSukumar Swaminathan emlxs_buf_t **fc_table; /* sc_buf pointers indexed by */ 193482527734SSukumar Swaminathan /* iotag */ 193582527734SSukumar Swaminathan uint16_t fc_iotag; /* used to identify I/Os */ 193682527734SSukumar Swaminathan uint16_t fc_oor_iotag; /* OutOfRange (fc_table) iotags */ 193782527734SSukumar Swaminathan /* typically used for Abort/close */ 193882527734SSukumar Swaminathan #define EMLXS_MAX_ABORT_TAG 0x7fff 193982527734SSukumar Swaminathan uint16_t max_iotag; /* ALL IOCBs except aborts */ 194082527734SSukumar Swaminathan kmutex_t iotag_lock; 194182527734SSukumar Swaminathan uint32_t io_count; /* No of IO holding */ 194282527734SSukumar Swaminathan /* regular iotag */ 194382527734SSukumar Swaminathan uint32_t channel_tx_count; /* No of IO on tx Q */ 1944fcf3ce44SJohn Forte 1945fcf3ce44SJohn Forte /* Mailbox Management */ 1946291a2b48SSukumar Swaminathan uint32_t mbox_queue_flag; 1947291a2b48SSukumar Swaminathan emlxs_queue_t mbox_queue; 1948a9800bebSGarrett D'Amore void *mbox_mqe; /* active mbox mqe */ 1949a9800bebSGarrett D'Amore void *mbox_mbq; /* active MAILBOXQ */ 1950291a2b48SSukumar Swaminathan kcondvar_t mbox_lock_cv; /* MBX_SLEEP */ 1951291a2b48SSukumar Swaminathan kmutex_t mbox_lock; /* MBX_SLEEP */ 1952291a2b48SSukumar Swaminathan uint32_t mbox_timer; 1953fcf3ce44SJohn Forte 1954fcf3ce44SJohn Forte /* Interrupt management */ 1955291a2b48SSukumar Swaminathan void *intr_arg; 1956291a2b48SSukumar Swaminathan uint32_t intr_unclaimed; 1957291a2b48SSukumar Swaminathan uint32_t intr_autoClear; 1958*8f23e9faSHans Rosenfeld uint32_t intr_busy_cnt; 1959*8f23e9faSHans Rosenfeld 1960291a2b48SSukumar Swaminathan uint32_t intr_flags; 1961fcf3ce44SJohn Forte #define EMLXS_INTX_INITED 0x0001 1962fcf3ce44SJohn Forte #define EMLXS_INTX_ADDED 0x0002 1963fcf3ce44SJohn Forte #define EMLXS_MSI_ENABLED 0x0010 1964fcf3ce44SJohn Forte #define EMLXS_MSI_INITED 0x0020 1965fcf3ce44SJohn Forte #define EMLXS_MSI_ADDED 0x0040 1966291a2b48SSukumar Swaminathan #define EMLXS_INTR_INITED (EMLXS_INTX_INITED|EMLXS_MSI_INITED) 1967291a2b48SSukumar Swaminathan #define EMLXS_INTR_ADDED (EMLXS_INTX_ADDED|EMLXS_MSI_ADDED) 1968fcf3ce44SJohn Forte 1969fcf3ce44SJohn Forte #ifdef MSI_SUPPORT 1970fcf3ce44SJohn Forte ddi_intr_handle_t *intr_htable; 1971291a2b48SSukumar Swaminathan uint32_t *intr_pri; 1972291a2b48SSukumar Swaminathan int32_t *intr_cap; 1973291a2b48SSukumar Swaminathan uint32_t intr_count; 1974291a2b48SSukumar Swaminathan uint32_t intr_type; 1975291a2b48SSukumar Swaminathan uint32_t intr_cond; 1976291a2b48SSukumar Swaminathan uint32_t intr_map[EMLXS_MSI_MAX_INTRS]; 1977291a2b48SSukumar Swaminathan uint32_t intr_mask; 1978fcf3ce44SJohn Forte 1979a9800bebSGarrett D'Amore kmutex_t msiid_lock; /* for last_msiid */ 1980a9800bebSGarrett D'Amore int last_msiid; 1981fcf3ce44SJohn Forte 1982291a2b48SSukumar Swaminathan kmutex_t intr_lock[EMLXS_MSI_MAX_INTRS]; 1983a9800bebSGarrett D'Amore int chan2msi[MAX_CHANNEL]; 1984a9800bebSGarrett D'Amore /* Index is the channel id */ 1985a9800bebSGarrett D'Amore int msi2chan[EMLXS_MSI_MAX_INTRS]; 1986a9800bebSGarrett D'Amore /* Index is the MSX-X msg id */ 1987fcf3ce44SJohn Forte #endif /* MSI_SUPPORT */ 1988fcf3ce44SJohn Forte 1989291a2b48SSukumar Swaminathan uint32_t heartbeat_timer; 1990291a2b48SSukumar Swaminathan uint32_t heartbeat_flag; 1991291a2b48SSukumar Swaminathan uint32_t heartbeat_active; 1992fcf3ce44SJohn Forte 1993fcf3ce44SJohn Forte /* IOCTL management */ 1994291a2b48SSukumar Swaminathan kmutex_t ioctl_lock; 1995291a2b48SSukumar Swaminathan uint32_t ioctl_flags; 1996fcf3ce44SJohn Forte #define EMLXS_OPEN 0x00000001 1997fcf3ce44SJohn Forte #define EMLXS_OPEN_EXCLUSIVE 0x00000002 1998fcf3ce44SJohn Forte 1999fcf3ce44SJohn Forte /* Timer management */ 2000291a2b48SSukumar Swaminathan kcondvar_t timer_lock_cv; 2001291a2b48SSukumar Swaminathan kmutex_t timer_lock; 2002291a2b48SSukumar Swaminathan timeout_id_t timer_id; 2003291a2b48SSukumar Swaminathan uint32_t timer_tics; 2004291a2b48SSukumar Swaminathan uint32_t timer_flags; 2005fcf3ce44SJohn Forte #define EMLXS_TIMER_STARTED 0x0000001 2006fcf3ce44SJohn Forte #define EMLXS_TIMER_BUSY 0x0000002 2007fcf3ce44SJohn Forte #define EMLXS_TIMER_KILL 0x0000004 2008fcf3ce44SJohn Forte #define EMLXS_TIMER_ENDED 0x0000008 2009fcf3ce44SJohn Forte 2010fcf3ce44SJohn Forte /* Misc Timers */ 2011291a2b48SSukumar Swaminathan uint32_t linkup_timer; 2012291a2b48SSukumar Swaminathan uint32_t discovery_timer; 2013291a2b48SSukumar Swaminathan uint32_t pkt_timer; 2014fcf3ce44SJohn Forte 2015fcf3ce44SJohn Forte /* Power Management */ 2016291a2b48SSukumar Swaminathan uint32_t pm_state; 2017fcf3ce44SJohn Forte /* pm_state */ 2018fcf3ce44SJohn Forte #define EMLXS_PM_IN_ATTACH 0x00000001 2019fcf3ce44SJohn Forte #define EMLXS_PM_IN_DETACH 0x00000002 2020fcf3ce44SJohn Forte #define EMLXS_PM_IN_SOL_CB 0x00000010 2021fcf3ce44SJohn Forte #define EMLXS_PM_IN_UNSOL_CB 0x00000020 2022fcf3ce44SJohn Forte #define EMLXS_PM_IN_LINK_RESET 0x00000100 2023fcf3ce44SJohn Forte #define EMLXS_PM_IN_HARD_RESET 0x00000200 2024fcf3ce44SJohn Forte #define EMLXS_PM_SUSPENDED 0x01000000 2025fcf3ce44SJohn Forte 2026291a2b48SSukumar Swaminathan uint32_t pm_level; 2027fcf3ce44SJohn Forte /* pm_level */ 2028fcf3ce44SJohn Forte #define EMLXS_PM_ADAPTER_DOWN 0 2029fcf3ce44SJohn Forte #define EMLXS_PM_ADAPTER_UP 1 2030fcf3ce44SJohn Forte 2031291a2b48SSukumar Swaminathan uint32_t pm_busy; 2032291a2b48SSukumar Swaminathan kmutex_t pm_lock; 2033291a2b48SSukumar Swaminathan uint8_t pm_config[PCI_CONFIG_SIZE]; 2034fcf3ce44SJohn Forte #ifdef IDLE_TIMER 2035291a2b48SSukumar Swaminathan uint32_t pm_idle_timer; 2036291a2b48SSukumar Swaminathan uint32_t pm_active; /* Only used by timer */ 2037fcf3ce44SJohn Forte #endif /* IDLE_TIMER */ 2038fcf3ce44SJohn Forte 2039fcf3ce44SJohn Forte /* Loopback management */ 2040291a2b48SSukumar Swaminathan uint32_t loopback_tics; 2041291a2b48SSukumar Swaminathan void *loopback_pkt; 2042fcf3ce44SJohn Forte 2043fcf3ce44SJohn Forte /* Event management */ 204482527734SSukumar Swaminathan emlxs_event_queue_t event_queue; 204582527734SSukumar Swaminathan uint32_t event_mask; 204682527734SSukumar Swaminathan uint32_t event_timer; 2047fcf3ce44SJohn Forte emlxs_dfc_event_t dfc_event[MAX_DFC_EVENTS]; 2048fcf3ce44SJohn Forte emlxs_hba_event_t hba_event; 2049fcf3ce44SJohn Forte 2050fcf3ce44SJohn Forte /* Parameter management */ 2051291a2b48SSukumar Swaminathan emlxs_config_t config[NUM_CFG_PARAM]; 2052fcf3ce44SJohn Forte 2053fcf3ce44SJohn Forte /* Driver stat management */ 2054291a2b48SSukumar Swaminathan kstat_t *kstat; 2055291a2b48SSukumar Swaminathan emlxs_stats_t stats; 2056fcf3ce44SJohn Forte 2057fcf3ce44SJohn Forte /* Log management */ 2058291a2b48SSukumar Swaminathan emlxs_msg_log_t log; 2059fcf3ce44SJohn Forte 2060fcf3ce44SJohn Forte /* Port managment */ 2061291a2b48SSukumar Swaminathan uint32_t vpi_max; 2062291a2b48SSukumar Swaminathan uint32_t vpi_high; 2063291a2b48SSukumar Swaminathan uint32_t num_of_ports; 2064fcf3ce44SJohn Forte 2065291a2b48SSukumar Swaminathan kmutex_t port_lock; /* locks port, nodes, rings */ 2066291a2b48SSukumar Swaminathan emlxs_port_t port[MAX_VPORTS + 1]; /* port specific info */ 2067291a2b48SSukumar Swaminathan /* Last one is for */ 2068291a2b48SSukumar Swaminathan /* NPIV ready test */ 2069fcf3ce44SJohn Forte 2070fcf3ce44SJohn Forte #ifdef DHCHAP_SUPPORT 2071291a2b48SSukumar Swaminathan kmutex_t dhc_lock; 2072291a2b48SSukumar Swaminathan kmutex_t auth_lock; 2073291a2b48SSukumar Swaminathan emlxs_auth_cfg_t auth_cfg; /* Default auth_cfg. */ 2074291a2b48SSukumar Swaminathan /* Points to list of entries. */ 2075291a2b48SSukumar Swaminathan /* Protected by auth_lock */ 2076291a2b48SSukumar Swaminathan uint32_t auth_cfg_count; 2077291a2b48SSukumar Swaminathan emlxs_auth_key_t auth_key; /* Default auth_key. */ 2078291a2b48SSukumar Swaminathan /* Points to list of entries. */ 2079291a2b48SSukumar Swaminathan /* Protected by auth_lock */ 2080291a2b48SSukumar Swaminathan uint32_t auth_key_count; 2081291a2b48SSukumar Swaminathan uint32_t rdn_flag; 2082fcf3ce44SJohn Forte #endif /* DHCHAP_SUPPORT */ 2083fcf3ce44SJohn Forte 2084fcf3ce44SJohn Forte #ifdef TEST_SUPPORT 2085291a2b48SSukumar Swaminathan uint32_t underrun_counter; 2086291a2b48SSukumar Swaminathan #endif /* TEST_SUPPORT */ 2087291a2b48SSukumar Swaminathan 2088291a2b48SSukumar Swaminathan #ifdef MODFW_SUPPORT 2089291a2b48SSukumar Swaminathan ddi_modhandle_t fw_modhandle; 2090291a2b48SSukumar Swaminathan #endif /* MODFW_SUPPORT */ 2091291a2b48SSukumar Swaminathan 2092291a2b48SSukumar Swaminathan #ifdef DUMP_SUPPORT 2093291a2b48SSukumar Swaminathan emlxs_file_t dump_txtfile; 2094291a2b48SSukumar Swaminathan emlxs_file_t dump_dmpfile; 2095291a2b48SSukumar Swaminathan emlxs_file_t dump_ceefile; 2096291a2b48SSukumar Swaminathan kmutex_t dump_lock; 2097291a2b48SSukumar Swaminathan #define EMLXS_DUMP_LOCK hba->dump_lock 2098291a2b48SSukumar Swaminathan #define EMLXS_TXT_FILE 1 2099291a2b48SSukumar Swaminathan #define EMLXS_DMP_FILE 2 2100291a2b48SSukumar Swaminathan #define EMLXS_CEE_FILE 3 2101291a2b48SSukumar Swaminathan 2102291a2b48SSukumar Swaminathan #define EMLXS_DRV_DUMP 0 2103291a2b48SSukumar Swaminathan #define EMLXS_TEMP_DUMP 1 2104291a2b48SSukumar Swaminathan #define EMLXS_USER_DUMP 2 2105291a2b48SSukumar Swaminathan 2106291a2b48SSukumar Swaminathan #endif /* DUMP_SUPPORT */ 2107291a2b48SSukumar Swaminathan 2108*8f23e9faSHans Rosenfeld uint32_t reset_request; 2109*8f23e9faSHans Rosenfeld #define FC_LINK_RESET 1 2110*8f23e9faSHans Rosenfeld #define FC_PORT_RESET 2 2111*8f23e9faSHans Rosenfeld 2112*8f23e9faSHans Rosenfeld uint32_t reset_state; 2113*8f23e9faSHans Rosenfeld #define FC_LINK_RESET_INP 1 2114*8f23e9faSHans Rosenfeld #define FC_PORT_RESET_INP 2 2115*8f23e9faSHans Rosenfeld 2116fcf3ce44SJohn Forte } emlxs_hba_t; 2117fcf3ce44SJohn Forte 211882527734SSukumar Swaminathan #define EMLXS_SLI_MAP_HDW (hba->sli_api.sli_map_hdw) 211982527734SSukumar Swaminathan #define EMLXS_SLI_UNMAP_HDW (hba->sli_api.sli_unmap_hdw) 212082527734SSukumar Swaminathan #define EMLXS_SLI_ONLINE (hba->sli_api.sli_online) 212182527734SSukumar Swaminathan #define EMLXS_SLI_OFFLINE (hba->sli_api.sli_offline) 212282527734SSukumar Swaminathan #define EMLXS_SLI_HBA_RESET (hba->sli_api.sli_hba_reset) 212382527734SSukumar Swaminathan #define EMLXS_SLI_HBA_KILL (hba->sli_api.sli_hba_kill) 212482527734SSukumar Swaminathan #define EMLXS_SLI_ISSUE_IOCB_CMD (hba->sli_api.sli_issue_iocb_cmd) 212582527734SSukumar Swaminathan #define EMLXS_SLI_ISSUE_MBOX_CMD (hba->sli_api.sli_issue_mbox_cmd) 212682527734SSukumar Swaminathan #define EMLXS_SLI_PREP_FCT_IOCB (hba->sli_api.sli_prep_fct_iocb) 212782527734SSukumar Swaminathan #define EMLXS_SLI_PREP_FCP_IOCB (hba->sli_api.sli_prep_fcp_iocb) 212882527734SSukumar Swaminathan #define EMLXS_SLI_PREP_IP_IOCB (hba->sli_api.sli_prep_ip_iocb) 212982527734SSukumar Swaminathan #define EMLXS_SLI_PREP_ELS_IOCB (hba->sli_api.sli_prep_els_iocb) 213082527734SSukumar Swaminathan #define EMLXS_SLI_PREP_CT_IOCB (hba->sli_api.sli_prep_ct_iocb) 213182527734SSukumar Swaminathan #define EMLXS_SLI_POLL_INTR (hba->sli_api.sli_poll_intr) 213282527734SSukumar Swaminathan #define EMLXS_SLI_INTX_INTR (hba->sli_api.sli_intx_intr) 213382527734SSukumar Swaminathan #define EMLXS_SLI_MSI_INTR (hba->sli_api.sli_msi_intr) 213482527734SSukumar Swaminathan #define EMLXS_SLI_DISABLE_INTR (hba->sli_api.sli_disable_intr) 213582527734SSukumar Swaminathan #define EMLXS_SLI_TIMER (hba->sli_api.sli_timer) 213682527734SSukumar Swaminathan #define EMLXS_SLI_POLL_ERRATT (hba->sli_api.sli_poll_erratt) 2137*8f23e9faSHans Rosenfeld #define EMLXS_SLI_REG_DID (hba->sli_api.sli_reg_did) 2138*8f23e9faSHans Rosenfeld #define EMLXS_SLI_UNREG_NODE (hba->sli_api.sli_unreg_node) 2139291a2b48SSukumar Swaminathan 2140291a2b48SSukumar Swaminathan #define EMLXS_HBA_T 1 /* flag emlxs_hba_t is already typedefed */ 2141fcf3ce44SJohn Forte 2142fcf3ce44SJohn Forte #ifdef MSI_SUPPORT 2143291a2b48SSukumar Swaminathan #define EMLXS_INTR_INIT(_hba, _m) emlxs_msi_init(_hba, _m) 2144291a2b48SSukumar Swaminathan #define EMLXS_INTR_UNINIT(_hba) emlxs_msi_uninit(_hba) 2145291a2b48SSukumar Swaminathan #define EMLXS_INTR_ADD(_hba) emlxs_msi_add(_hba) 2146291a2b48SSukumar Swaminathan #define EMLXS_INTR_REMOVE(_hba) emlxs_msi_remove(_hba) 2147fcf3ce44SJohn Forte #else 2148291a2b48SSukumar Swaminathan #define EMLXS_INTR_INIT(_hba, _m) emlxs_intx_init(_hba, _m) 2149291a2b48SSukumar Swaminathan #define EMLXS_INTR_UNINIT(_hba) emlxs_intx_uninit(_hba) 2150291a2b48SSukumar Swaminathan #define EMLXS_INTR_ADD(_hba) emlxs_intx_add(_hba) 2151291a2b48SSukumar Swaminathan #define EMLXS_INTR_REMOVE(_hba) emlxs_intx_remove(_hba) 2152fcf3ce44SJohn Forte #endif /* MSI_SUPPORT */ 2153fcf3ce44SJohn Forte 2154fcf3ce44SJohn Forte 2155fcf3ce44SJohn Forte /* Power Management Component */ 2156291a2b48SSukumar Swaminathan #define EMLXS_PM_ADAPTER 0 2157291a2b48SSukumar Swaminathan 2158291a2b48SSukumar Swaminathan 2159291a2b48SSukumar Swaminathan #define DRV_TIME (uint32_t)(ddi_get_time() - emlxs_device.drv_timestamp) 2160291a2b48SSukumar Swaminathan 2161291a2b48SSukumar Swaminathan #define HBA port->hba 2162291a2b48SSukumar Swaminathan #define PPORT hba->port[0] 2163291a2b48SSukumar Swaminathan #define VPORT(x) hba->port[x] 2164291a2b48SSukumar Swaminathan #define EMLXS_TIMER_LOCK hba->timer_lock 2165291a2b48SSukumar Swaminathan #define VPD hba->vpd 2166291a2b48SSukumar Swaminathan #define CFG hba->config[0] 2167291a2b48SSukumar Swaminathan #define LOG hba->log 216882527734SSukumar Swaminathan #define EVENTQ hba->event_queue 2169291a2b48SSukumar Swaminathan #define EMLXS_MBOX_LOCK hba->mbox_lock 2170291a2b48SSukumar Swaminathan #define EMLXS_MBOX_CV hba->mbox_lock_cv 2171291a2b48SSukumar Swaminathan #define EMLXS_LINKUP_LOCK hba->linkup_lock 2172291a2b48SSukumar Swaminathan #define EMLXS_LINKUP_CV hba->linkup_lock_cv 217382527734SSukumar Swaminathan #define EMLXS_TX_CHANNEL_LOCK hba->channel_tx_lock /* ring txq lock */ 2174291a2b48SSukumar Swaminathan #define EMLXS_MEMGET_LOCK hba->memget_lock /* mempool get lock */ 2175291a2b48SSukumar Swaminathan #define EMLXS_MEMPUT_LOCK hba->memput_lock /* mempool put lock */ 2176291a2b48SSukumar Swaminathan #define EMLXS_IOCTL_LOCK hba->ioctl_lock /* ioctl lock */ 2177d08970deSSukumar Swaminathan #define EMLXS_SPAWN_LOCK hba->spawn_lock /* spawn lock */ 2178d08970deSSukumar Swaminathan #define EMLXS_PM_LOCK hba->pm_lock /* pm lock */ 2179291a2b48SSukumar Swaminathan #define HBASTATS hba->stats 218082527734SSukumar Swaminathan #define EMLXS_CMD_RING_LOCK(n) hba->sli.sli3.ring_cmd_lock[n] 2181a9800bebSGarrett D'Amore 2182a9800bebSGarrett D'Amore #define EMLXS_QUE_LOCK(n) hba->sli.sli4.que_lock[n] 2183a9800bebSGarrett D'Amore #define EMLXS_MSIID_LOCK hba->msiid_lock 2184a9800bebSGarrett D'Amore 218582527734SSukumar Swaminathan #define EMLXS_FCTAB_LOCK hba->iotag_lock 2186a9800bebSGarrett D'Amore 2187a9800bebSGarrett D'Amore #define EMLXS_FCF_LOCK hba->sli.sli4.fcf_lock 2188a9800bebSGarrett D'Amore 2189291a2b48SSukumar Swaminathan #define EMLXS_PORT_LOCK hba->port_lock /* locks ports, */ 2190fcf3ce44SJohn Forte /* nodes, rings */ 2191291a2b48SSukumar Swaminathan #define EMLXS_INTR_LOCK(_id) hba->intr_lock[_id] /* locks intr threads */ 2192fcf3ce44SJohn Forte 2193291a2b48SSukumar Swaminathan #define EMLXS_PKT_LOCK port->pkt_lock /* used for pkt */ 2194291a2b48SSukumar Swaminathan /* polling */ 2195291a2b48SSukumar Swaminathan #define EMLXS_PKT_CV port->pkt_lock_cv /* Used for pkt */ 2196291a2b48SSukumar Swaminathan /* polling */ 2197291a2b48SSukumar Swaminathan #define EMLXS_UB_LOCK port->ub_lock /* locks unsolicited */ 2198fcf3ce44SJohn Forte /* buffer pool */ 2199fcf3ce44SJohn Forte 220082527734SSukumar Swaminathan /* These SWAPs will swap on any platform */ 220182527734SSukumar Swaminathan #define SWAP32_BUFFER(_b, _c) emlxs_swap32_buffer(_b, _c) 220282527734SSukumar Swaminathan #define SWAP32_BCOPY(_s, _d, _c) emlxs_swap32_bcopy(_s, _d, _c) 2203fcf3ce44SJohn Forte 220482527734SSukumar Swaminathan #define SWAP64(_x) ((((uint64_t)(_x) & 0xFF)<<56) | \ 220582527734SSukumar Swaminathan (((uint64_t)(_x) & 0xFF00)<<40) | \ 220682527734SSukumar Swaminathan (((uint64_t)(_x) & 0xFF0000)<<24) | \ 220782527734SSukumar Swaminathan (((uint64_t)(_x) & 0xFF000000)<<8) | \ 220882527734SSukumar Swaminathan (((uint64_t)(_x) & 0xFF00000000)>>8) | \ 220982527734SSukumar Swaminathan (((uint64_t)(_x) & 0xFF0000000000)>>24) | \ 221082527734SSukumar Swaminathan (((uint64_t)(_x) & 0xFF000000000000)>>40) | \ 221182527734SSukumar Swaminathan (((uint64_t)(_x) & 0xFF00000000000000)>>56)) 2212fcf3ce44SJohn Forte 221382527734SSukumar Swaminathan #define SWAP32(_x) ((((uint32_t)(_x) & 0xFF)<<24) | \ 221482527734SSukumar Swaminathan (((uint32_t)(_x) & 0xFF00)<<8) | \ 221582527734SSukumar Swaminathan (((uint32_t)(_x) & 0xFF0000)>>8) | \ 221682527734SSukumar Swaminathan (((uint32_t)(_x) & 0xFF000000)>>24)) 2217fcf3ce44SJohn Forte 221882527734SSukumar Swaminathan #define SWAP16(_x) ((((uint16_t)(_x) & 0xFF)<<8) | \ 221982527734SSukumar Swaminathan (((uint16_t)(_x) & 0xFF00)>>8)) 2220fcf3ce44SJohn Forte 222182527734SSukumar Swaminathan #define SWAP24_LO(_x) ((((uint32_t)(_x) & 0xFF)<<16) | \ 222282527734SSukumar Swaminathan ((uint32_t)(_x) & 0xFF00FF00) | \ 222382527734SSukumar Swaminathan (((uint32_t)(_x) & 0x00FF0000)>>16)) 2224fcf3ce44SJohn Forte 222582527734SSukumar Swaminathan #define SWAP24_HI(_x) (((uint32_t)(_x) & 0x00FF00FF) | \ 222682527734SSukumar Swaminathan (((uint32_t)(_x) & 0x0000FF00)<<16) | \ 222782527734SSukumar Swaminathan (((uint32_t)(_x) & 0xFF000000)>>16)) 2228fcf3ce44SJohn Forte 222982527734SSukumar Swaminathan /* These LE_SWAPs will only swap on a LE platform */ 223082527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 223182527734SSukumar Swaminathan #define LE_SWAP32_BUFFER(_b, _c) SWAP32_BUFFER(_b, _c) 223282527734SSukumar Swaminathan #define LE_SWAP32_BCOPY(_s, _d, _c) SWAP32_BCOPY(_s, _d, _c) 223382527734SSukumar Swaminathan #define LE_SWAP64(_x) SWAP64(_x) 223482527734SSukumar Swaminathan #define LE_SWAP32(_x) SWAP32(_x) 223582527734SSukumar Swaminathan #define LE_SWAP16(_x) SWAP16(_x) 223682527734SSukumar Swaminathan #define LE_SWAP24_LO(_x) SWAP24_LO(X) 223782527734SSukumar Swaminathan #define LE_SWAP24_HI(_x) SWAP24_HI(X) 2238fcf3ce44SJohn Forte 223982527734SSukumar Swaminathan #if (EMLXS_MODREVX == EMLXS_MODREV2X) 224082527734SSukumar Swaminathan #undef LE_SWAP24_LO 224182527734SSukumar Swaminathan #define LE_SWAP24_LO(_x) (_x) 224282527734SSukumar Swaminathan #undef LE_SWAP24_HI 224382527734SSukumar Swaminathan #define LE_SWAP24_HI(_x) (_x) 224482527734SSukumar Swaminathan #endif /* EMLXS_MODREV2X */ 2245291a2b48SSukumar Swaminathan 224682527734SSukumar Swaminathan #else /* BIG ENDIAN */ 224782527734SSukumar Swaminathan #define LE_SWAP32_BUFFER(_b, _c) 224882527734SSukumar Swaminathan #define LE_SWAP32_BCOPY(_s, _d, _c) bcopy(_s, _d, _c) 224982527734SSukumar Swaminathan #define LE_SWAP64(_x) (_x) 225082527734SSukumar Swaminathan #define LE_SWAP32(_x) (_x) 225182527734SSukumar Swaminathan #define LE_SWAP16(_x) (_x) 225282527734SSukumar Swaminathan #define LE_SWAP24_LO(_x) (_x) 225382527734SSukumar Swaminathan #define LE_SWAP24_HI(_x) (_x) 225482527734SSukumar Swaminathan #endif /* EMLXS_LITTLE_ENDIAN */ 225582527734SSukumar Swaminathan 225682527734SSukumar Swaminathan /* These BE_SWAPs will only swap on a BE platform */ 225782527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 225882527734SSukumar Swaminathan #define BE_SWAP32_BUFFER(_b, _c) SWAP32_BUFFER(_b, _c) 225982527734SSukumar Swaminathan #define BE_SWAP32_BCOPY(_s, _d, _c) SWAP32_BCOPY(_s, _d, _c) 226082527734SSukumar Swaminathan #define BE_SWAP64(_x) SWAP64(_x) 226182527734SSukumar Swaminathan #define BE_SWAP32(_x) SWAP32(_x) 226282527734SSukumar Swaminathan #define BE_SWAP16(_x) SWAP16(_x) 226382527734SSukumar Swaminathan #else /* LITTLE ENDIAN */ 226482527734SSukumar Swaminathan #define BE_SWAP32_BUFFER(_b, _c) 226582527734SSukumar Swaminathan #define BE_SWAP32_BCOPY(_s, _d, _c) bcopy(_s, _d, _c) 226682527734SSukumar Swaminathan #define BE_SWAP64(_x) (_x) 226782527734SSukumar Swaminathan #define BE_SWAP32(_x) (_x) 226882527734SSukumar Swaminathan #define BE_SWAP16(_x) (_x) 226982527734SSukumar Swaminathan #endif /* EMLXS_BIG_ENDIAN */ 2270fcf3ce44SJohn Forte 2271*8f23e9faSHans Rosenfeld #define EMLXS_DFC_RESET_ALL 0x10 2272*8f23e9faSHans Rosenfeld #define EMLXS_DFC_RESET_ALL_FORCE_DUMP 0x11 2273*8f23e9faSHans Rosenfeld 2274fcf3ce44SJohn Forte #ifdef __cplusplus 2275fcf3ce44SJohn Forte } 2276fcf3ce44SJohn Forte #endif 2277fcf3ce44SJohn Forte 2278fcf3ce44SJohn Forte #endif /* _EMLXS_FC_H */ 2279