1fcf3ce44SJohn Forte /* 2fcf3ce44SJohn Forte * CDDL HEADER START 3fcf3ce44SJohn Forte * 4fcf3ce44SJohn Forte * The contents of this file are subject to the terms of the 5fcf3ce44SJohn Forte * Common Development and Distribution License (the "License"). 6fcf3ce44SJohn Forte * You may not use this file except in compliance with the License. 7fcf3ce44SJohn Forte * 8fcf3ce44SJohn Forte * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9fcf3ce44SJohn Forte * or http://www.opensolaris.org/os/licensing. 10fcf3ce44SJohn Forte * See the License for the specific language governing permissions 11fcf3ce44SJohn Forte * and limitations under the License. 12fcf3ce44SJohn Forte * 13fcf3ce44SJohn Forte * When distributing Covered Code, include this CDDL HEADER in each 14fcf3ce44SJohn Forte * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15fcf3ce44SJohn Forte * If applicable, add the following below this CDDL HEADER, with the 16fcf3ce44SJohn Forte * fields enclosed by brackets "[]" replaced with your own identifying 17fcf3ce44SJohn Forte * information: Portions Copyright [yyyy] [name of copyright owner] 18fcf3ce44SJohn Forte * 19fcf3ce44SJohn Forte * CDDL HEADER END 20fcf3ce44SJohn Forte */ 21fcf3ce44SJohn Forte 22fcf3ce44SJohn Forte /* 23291a2b48SSukumar Swaminathan * Copyright 2009 Emulex. All rights reserved. 24*82527734SSukumar Swaminathan * Use is subject to license terms. 25fcf3ce44SJohn Forte */ 26fcf3ce44SJohn Forte 27fcf3ce44SJohn Forte #ifndef _EMLXS_FC_H 28fcf3ce44SJohn Forte #define _EMLXS_FC_H 29fcf3ce44SJohn Forte 30fcf3ce44SJohn Forte #ifdef __cplusplus 31fcf3ce44SJohn Forte extern "C" { 32fcf3ce44SJohn Forte #endif 33fcf3ce44SJohn Forte 34291a2b48SSukumar Swaminathan typedef struct emlxs_buf 35291a2b48SSukumar Swaminathan { 36291a2b48SSukumar Swaminathan fc_packet_t *pkt; /* scsi_pkt reference */ 37291a2b48SSukumar Swaminathan struct emlxs_port *port; /* pointer to port */ 38291a2b48SSukumar Swaminathan void *bmp; /* Save the buffer pointer */ 39291a2b48SSukumar Swaminathan /* list for later use. */ 40291a2b48SSukumar Swaminathan struct emlxs_buf *fc_fwd; /* Use it by chip_Q */ 41291a2b48SSukumar Swaminathan struct emlxs_buf *fc_bkwd; /* Use it by chip_Q */ 42291a2b48SSukumar Swaminathan struct emlxs_buf *next; /* Use it when the iodone */ 43291a2b48SSukumar Swaminathan void *node; /* Save node and used by */ 44291a2b48SSukumar Swaminathan /* abort */ 45*82527734SSukumar Swaminathan void *channel; /* Save channel and used by */ 46291a2b48SSukumar Swaminathan /* abort */ 47*82527734SSukumar Swaminathan struct emlxs_buf *fpkt; /* Flush pkt pointer */ 48*82527734SSukumar Swaminathan struct XRIobject *xp; /* Exchange resource */ 49291a2b48SSukumar Swaminathan IOCBQ iocbq; 50291a2b48SSukumar Swaminathan kmutex_t mtx; 51291a2b48SSukumar Swaminathan uint32_t pkt_flags; 52291a2b48SSukumar Swaminathan uint32_t iotag; /* iotag for this cmd */ 53291a2b48SSukumar Swaminathan uint32_t ticks; /* save the timeout ticks */ 54291a2b48SSukumar Swaminathan /* for the fc_packet_t */ 55291a2b48SSukumar Swaminathan uint32_t abort_attempts; 56291a2b48SSukumar Swaminathan uint32_t lun; /* Save LUN id and used by */ 57291a2b48SSukumar Swaminathan /* abort */ 58291a2b48SSukumar Swaminathan uint32_t class; /* Save class and used by */ 59291a2b48SSukumar Swaminathan /* abort */ 60291a2b48SSukumar Swaminathan uint32_t ucmd; /* Unsolicted command that */ 61291a2b48SSukumar Swaminathan /* this packet is responding */ 62291a2b48SSukumar Swaminathan /* to, if any */ 63291a2b48SSukumar Swaminathan int32_t flush_count; /* Valid only in flush pkts */ 64291a2b48SSukumar Swaminathan uint32_t did; 65fcf3ce44SJohn Forte 66fcf3ce44SJohn Forte #ifdef SFCT_SUPPORT 67291a2b48SSukumar Swaminathan kmutex_t fct_mtx; 68291a2b48SSukumar Swaminathan fc_packet_t *fct_pkt; 69291a2b48SSukumar Swaminathan fct_cmd_t *fct_cmd; 70fcf3ce44SJohn Forte 71291a2b48SSukumar Swaminathan uint8_t fct_type; 72fcf3ce44SJohn Forte 73fcf3ce44SJohn Forte #define EMLXS_FCT_ELS_CMD 0x01 /* Unsolicted */ 74fcf3ce44SJohn Forte #define EMLXS_FCT_ELS_REQ 0x02 /* Solicited */ 75fcf3ce44SJohn Forte #define EMLXS_FCT_ELS_RSP 0x04 76fcf3ce44SJohn Forte #define EMLXS_FCT_CT_REQ 0x08 /* Solicited */ 77fcf3ce44SJohn Forte #define EMLXS_FCT_FCP_CMD 0x10 /* Unsolicted */ 78fcf3ce44SJohn Forte #define EMLXS_FCT_FCP_DATA 0x20 79fcf3ce44SJohn Forte #define EMLXS_FCT_FCP_STATUS 0x40 80fcf3ce44SJohn Forte 81fcf3ce44SJohn Forte 82291a2b48SSukumar Swaminathan uint8_t fct_flags; 83fcf3ce44SJohn Forte 84fcf3ce44SJohn Forte #define EMLXS_FCT_SEND_STATUS 0x01 85*82527734SSukumar Swaminathan #define EMLXS_FCT_ABORT_INP 0x02 86*82527734SSukumar Swaminathan #define EMLXS_FCT_IO_INP 0x04 87fcf3ce44SJohn Forte #define EMLXS_FCT_REGISTERED 0x10 88291a2b48SSukumar Swaminathan #define EMLXS_FCT_PLOGI_RECEIVED 0x20 89291a2b48SSukumar Swaminathan #define EMLXS_FCT_FLOGI 0x40 90291a2b48SSukumar Swaminathan 91291a2b48SSukumar Swaminathan uint16_t fct_state; 92291a2b48SSukumar Swaminathan 93291a2b48SSukumar Swaminathan #define EMLXS_FCT_FCP_CMD_RECEIVED 1 94291a2b48SSukumar Swaminathan #define EMLXS_FCT_ELS_CMD_RECEIVED 2 95291a2b48SSukumar Swaminathan #define EMLXS_FCT_CMD_POSTED 3 96291a2b48SSukumar Swaminathan #define EMLXS_FCT_CMD_WAITQ 4 97*82527734SSukumar Swaminathan #define EMLXS_FCT_SEND_CMD_RSP 5 98*82527734SSukumar Swaminathan #define EMLXS_FCT_SEND_ELS_RSP 6 99*82527734SSukumar Swaminathan #define EMLXS_FCT_SEND_ELS_REQ 7 100*82527734SSukumar Swaminathan #define EMLXS_FCT_SEND_CT_REQ 8 101*82527734SSukumar Swaminathan #define EMLXS_FCT_RSP_PENDING 9 102*82527734SSukumar Swaminathan #define EMLXS_FCT_REQ_PENDING 10 103*82527734SSukumar Swaminathan #define EMLXS_FCT_REG_PENDING 11 104*82527734SSukumar Swaminathan #define EMLXS_FCT_REG_COMPLETE 12 105*82527734SSukumar Swaminathan #define EMLXS_FCT_OWNED 13 106*82527734SSukumar Swaminathan #define EMLXS_FCT_SEND_FCP_DATA 14 107*82527734SSukumar Swaminathan #define EMLXS_FCT_SEND_FCP_STATUS 15 108*82527734SSukumar Swaminathan #define EMLXS_FCT_DATA_PENDING 16 109*82527734SSukumar Swaminathan #define EMLXS_FCT_STATUS_PENDING 17 110*82527734SSukumar Swaminathan #define EMLXS_FCT_PKT_COMPLETE 18 111*82527734SSukumar Swaminathan #define EMLXS_FCT_PKT_FCPRSP_COMPLETE 19 112*82527734SSukumar Swaminathan #define EMLXS_FCT_PKT_ELSRSP_COMPLETE 20 113*82527734SSukumar Swaminathan #define EMLXS_FCT_PKT_ELSCMD_COMPLETE 21 114*82527734SSukumar Swaminathan #define EMLXS_FCT_PKT_CTCMD_COMPLETE 22 115*82527734SSukumar Swaminathan #define EMLXS_FCT_REQ_COMPLETE 23 116*82527734SSukumar Swaminathan #define EMLXS_FCT_CLOSE_PENDING 24 117*82527734SSukumar Swaminathan #define EMLXS_FCT_ABORT_PENDING 25 118*82527734SSukumar Swaminathan #define EMLXS_FCT_ABORT_DONE 26 119*82527734SSukumar Swaminathan #define EMLXS_FCT_IO_DONE 27 120*82527734SSukumar Swaminathan 121*82527734SSukumar Swaminathan #define EMLXS_FCT_IOCB_ISSUED 256 /* For tracing only */ 122*82527734SSukumar Swaminathan #define EMLXS_FCT_IOCB_COMPLETE 257 /* For tracing only */ 123291a2b48SSukumar Swaminathan 124291a2b48SSukumar Swaminathan stmf_data_buf_t *fct_buf; 125291a2b48SSukumar Swaminathan 126291a2b48SSukumar Swaminathan #endif /* SFCT_SUPPORT */ 127291a2b48SSukumar Swaminathan 128291a2b48SSukumar Swaminathan #ifdef SAN_DIAG_SUPPORT 129291a2b48SSukumar Swaminathan hrtime_t sd_start_time; 130291a2b48SSukumar Swaminathan #endif 131291a2b48SSukumar Swaminathan } emlxs_buf_t; 132fcf3ce44SJohn Forte 133fcf3ce44SJohn Forte 134fcf3ce44SJohn Forte 135291a2b48SSukumar Swaminathan #ifdef FCT_IO_TRACE 136*82527734SSukumar Swaminathan #define EMLXS_FCT_STATE_CHG(_fct_cmd, _cmd_sbp, _state) \ 137*82527734SSukumar Swaminathan (_cmd_sbp)->fct_state = _state; \ 138*82527734SSukumar Swaminathan emlxs_fct_io_trace((_cmd_sbp)->port, _fct_cmd, _state) 139291a2b48SSukumar Swaminathan #else 140291a2b48SSukumar Swaminathan /* define to set fct_state */ 141*82527734SSukumar Swaminathan #define EMLXS_FCT_STATE_CHG(_fct_cmd, _cmd_sbp, _state) \ 142*82527734SSukumar Swaminathan (_cmd_sbp)->fct_state = _state 143291a2b48SSukumar Swaminathan #endif /* FCT_IO_TRACE */ 144fcf3ce44SJohn Forte 145fcf3ce44SJohn Forte 146fcf3ce44SJohn Forte /* pkt_flags */ 147fcf3ce44SJohn Forte #define PACKET_IN_COMPLETION 0x00000001 148fcf3ce44SJohn Forte #define PACKET_IN_TXQ 0x00000002 149fcf3ce44SJohn Forte #define PACKET_IN_CHIPQ 0x00000004 150fcf3ce44SJohn Forte #define PACKET_IN_DONEQ 0x00000008 151fcf3ce44SJohn Forte 152fcf3ce44SJohn Forte #define PACKET_FCP_RESET 0x00000030 153fcf3ce44SJohn Forte #define PACKET_FCP_TGT_RESET 0x00000010 154fcf3ce44SJohn Forte #define PACKET_FCP_LUN_RESET 0x00000020 155fcf3ce44SJohn Forte #define PACKET_POLLED 0x00000040 156fcf3ce44SJohn Forte 157fcf3ce44SJohn Forte #ifdef EMLXS_I386 158fcf3ce44SJohn Forte #define PACKET_FCP_SWAPPED 0x00000100 159fcf3ce44SJohn Forte #define PACKET_ELS_SWAPPED 0x00000200 160fcf3ce44SJohn Forte #define PACKET_CT_SWAPPED 0x00000400 161fcf3ce44SJohn Forte #define PACKET_CSP_SWAPPED 0x00000800 162fcf3ce44SJohn Forte #endif /* EMLXS_I386 */ 163fcf3ce44SJohn Forte 164fcf3ce44SJohn Forte #define PACKET_STALE 0x00001000 165fcf3ce44SJohn Forte 166fcf3ce44SJohn Forte #define PACKET_IN_TIMEOUT 0x00010000 167fcf3ce44SJohn Forte #define PACKET_IN_FLUSH 0x00020000 168fcf3ce44SJohn Forte #define PACKET_IN_ABORT 0x00040000 169291a2b48SSukumar Swaminathan #define PACKET_XRI_CLOSED 0x00080000 /* An XRI abort or */ 170291a2b48SSukumar Swaminathan /* XRI close was issued */ 171fcf3ce44SJohn Forte 172fcf3ce44SJohn Forte #define PACKET_CHIP_COMP 0x00100000 173fcf3ce44SJohn Forte #define PACKET_COMPLETED 0x00200000 174*82527734SSukumar Swaminathan #define PACKET_ULP_OWNED 0x00400000 175fcf3ce44SJohn Forte 176fcf3ce44SJohn Forte #define PACKET_STATE_VALID 0x01000000 177fcf3ce44SJohn Forte #define PACKET_FCP_RSP_VALID 0x02000000 178fcf3ce44SJohn Forte #define PACKET_ELS_RSP_VALID 0x04000000 179fcf3ce44SJohn Forte #define PACKET_CT_RSP_VALID 0x08000000 180fcf3ce44SJohn Forte 181fcf3ce44SJohn Forte #define PACKET_DELAY_REQUIRED 0x10000000 182fcf3ce44SJohn Forte #define PACKET_ALLOCATED 0x40000000 183fcf3ce44SJohn Forte #define PACKET_VALID 0x80000000 184fcf3ce44SJohn Forte 185fcf3ce44SJohn Forte 186fcf3ce44SJohn Forte #define STALE_PACKET ((emlxs_buf_t *)0xFFFFFFFF) 187fcf3ce44SJohn Forte 188fcf3ce44SJohn Forte 189fcf3ce44SJohn Forte /* 190fcf3ce44SJohn Forte * From fc_error.h pkt_reason (except for state = NPORT_RJT, FABRIC_RJT, 191fcf3ce44SJohn Forte * NPORT_BSY, FABRIC_BSY, LS_RJT, BA_RJT, FS_RJT) 192fcf3ce44SJohn Forte * 193fcf3ce44SJohn Forte * FCA unique error codes can begin after FC_REASON_FCA_UNIQUE. 194fcf3ce44SJohn Forte * Each FCA defines its own set with values greater >= 0x7F 195fcf3ce44SJohn Forte */ 196fcf3ce44SJohn Forte #define FC_REASON_FCA_DEFINED 0x100 197fcf3ce44SJohn Forte 198fcf3ce44SJohn Forte 199fcf3ce44SJohn Forte /* 200fcf3ce44SJohn Forte * Device VPD save area 201fcf3ce44SJohn Forte */ 202fcf3ce44SJohn Forte 203291a2b48SSukumar Swaminathan typedef struct emlxs_vpd 204291a2b48SSukumar Swaminathan { 205291a2b48SSukumar Swaminathan uint32_t biuRev; 206291a2b48SSukumar Swaminathan uint32_t smRev; 207291a2b48SSukumar Swaminathan uint32_t smFwRev; 208291a2b48SSukumar Swaminathan uint32_t endecRev; 209291a2b48SSukumar Swaminathan uint16_t rBit; 210291a2b48SSukumar Swaminathan uint8_t fcphHigh; 211291a2b48SSukumar Swaminathan uint8_t fcphLow; 212291a2b48SSukumar Swaminathan uint8_t feaLevelHigh; 213291a2b48SSukumar Swaminathan uint8_t feaLevelLow; 214291a2b48SSukumar Swaminathan 215291a2b48SSukumar Swaminathan uint32_t postKernRev; 216291a2b48SSukumar Swaminathan char postKernName[32]; 217291a2b48SSukumar Swaminathan 218291a2b48SSukumar Swaminathan uint32_t opFwRev; 219291a2b48SSukumar Swaminathan char opFwName[32]; 220291a2b48SSukumar Swaminathan char opFwLabel[32]; 221291a2b48SSukumar Swaminathan 222291a2b48SSukumar Swaminathan uint32_t sli1FwRev; 223291a2b48SSukumar Swaminathan char sli1FwName[32]; 224291a2b48SSukumar Swaminathan char sli1FwLabel[32]; 225291a2b48SSukumar Swaminathan 226291a2b48SSukumar Swaminathan uint32_t sli2FwRev; 227291a2b48SSukumar Swaminathan char sli2FwName[32]; 228291a2b48SSukumar Swaminathan char sli2FwLabel[32]; 229291a2b48SSukumar Swaminathan 230291a2b48SSukumar Swaminathan uint32_t sli3FwRev; 231291a2b48SSukumar Swaminathan char sli3FwName[32]; 232291a2b48SSukumar Swaminathan char sli3FwLabel[32]; 233291a2b48SSukumar Swaminathan 234291a2b48SSukumar Swaminathan uint32_t sli4FwRev; 235291a2b48SSukumar Swaminathan char sli4FwName[32]; 236291a2b48SSukumar Swaminathan char sli4FwLabel[32]; 237291a2b48SSukumar Swaminathan 238291a2b48SSukumar Swaminathan char fw_version[32]; 239291a2b48SSukumar Swaminathan char fw_label[32]; 240291a2b48SSukumar Swaminathan 241291a2b48SSukumar Swaminathan char fcode_version[32]; 242291a2b48SSukumar Swaminathan char boot_version[32]; 243291a2b48SSukumar Swaminathan 244291a2b48SSukumar Swaminathan char serial_num[32]; 245291a2b48SSukumar Swaminathan char part_num[32]; 246291a2b48SSukumar Swaminathan char port_num[20]; 247291a2b48SSukumar Swaminathan char eng_change[32]; 248291a2b48SSukumar Swaminathan char manufacturer[80]; 249291a2b48SSukumar Swaminathan char model[80]; 250291a2b48SSukumar Swaminathan char model_desc[256]; 251291a2b48SSukumar Swaminathan char prog_types[256]; 252291a2b48SSukumar Swaminathan char id[80]; 253291a2b48SSukumar Swaminathan 254291a2b48SSukumar Swaminathan uint32_t port_index; 255291a2b48SSukumar Swaminathan uint8_t link_speed; 256fcf3ce44SJohn Forte } emlxs_vpd_t; 257fcf3ce44SJohn Forte 258fcf3ce44SJohn Forte 259291a2b48SSukumar Swaminathan typedef struct emlxs_queue 260291a2b48SSukumar Swaminathan { 261291a2b48SSukumar Swaminathan uint8_t *q_first; /* queue first element */ 262291a2b48SSukumar Swaminathan uint8_t *q_last; /* queue last element */ 263291a2b48SSukumar Swaminathan uint16_t q_cnt; /* current length of queue */ 264291a2b48SSukumar Swaminathan uint16_t q_max; /* max length queue can get */ 265fcf3ce44SJohn Forte } emlxs_queue_t; 266fcf3ce44SJohn Forte typedef emlxs_queue_t Q; 267fcf3ce44SJohn Forte 268fcf3ce44SJohn Forte 269fcf3ce44SJohn Forte 270fcf3ce44SJohn Forte /* 271fcf3ce44SJohn Forte * This structure is used when allocating a buffer pool. 272fcf3ce44SJohn Forte * Note: this should be identical to gasket buf_info (fldl.h). 273fcf3ce44SJohn Forte */ 274291a2b48SSukumar Swaminathan typedef struct emlxs_buf_info 275291a2b48SSukumar Swaminathan { 276291a2b48SSukumar Swaminathan int32_t size; /* Specifies the number of bytes to allocate. */ 277291a2b48SSukumar Swaminathan int32_t align; /* The desired address boundary. */ 278fcf3ce44SJohn Forte 279291a2b48SSukumar Swaminathan int32_t flags; 280fcf3ce44SJohn Forte 281fcf3ce44SJohn Forte #define FC_MBUF_DMA 0x01 /* blocks are for DMA */ 282fcf3ce44SJohn Forte #define FC_MBUF_PHYSONLY 0x02 /* For malloc - map a given virtual */ 283291a2b48SSukumar Swaminathan /* address to physical address (skip */ 284291a2b48SSukumar Swaminathan /* the malloc). */ 285291a2b48SSukumar Swaminathan /* For free - just unmap the given */ 286fcf3ce44SJohn Forte /* physical address (skip the free). */ 287fcf3ce44SJohn Forte #define FC_MBUF_IOCTL 0x04 /* called from dfc_ioctl */ 288fcf3ce44SJohn Forte #define FC_MBUF_UNLOCK 0x08 /* called with driver unlocked */ 289291a2b48SSukumar Swaminathan #define FC_MBUF_SNGLSG 0x10 /* allocate a single contiguous */ 290291a2b48SSukumar Swaminathan /* physical memory */ 291fcf3ce44SJohn Forte #define FC_MBUF_DMA32 0x20 292fcf3ce44SJohn Forte 293291a2b48SSukumar Swaminathan uint64_t phys; /* specifies physical buffer pointer */ 294291a2b48SSukumar Swaminathan void *virt; /* specifies virtual buffer pointer */ 295291a2b48SSukumar Swaminathan void *data_handle; 296291a2b48SSukumar Swaminathan void *dma_handle; 297fcf3ce44SJohn Forte } emlxs_buf_info_t; 298fcf3ce44SJohn Forte typedef emlxs_buf_info_t MBUF_INFO; 299fcf3ce44SJohn Forte 300fcf3ce44SJohn Forte 301fcf3ce44SJohn Forte #define EMLXS_MAX_HBQ 16 /* Max HBQs handled by firmware */ 302fcf3ce44SJohn Forte #define EMLXS_ELS_HBQ_ID 0 303fcf3ce44SJohn Forte #define EMLXS_IP_HBQ_ID 1 304fcf3ce44SJohn Forte #define EMLXS_CT_HBQ_ID 2 305fcf3ce44SJohn Forte #define EMLXS_FCT_HBQ_ID 3 306fcf3ce44SJohn Forte 307fcf3ce44SJohn Forte #ifdef SFCT_SUPPORT 308fcf3ce44SJohn Forte #define EMLXS_NUM_HBQ 4 /* Number of HBQs supported by driver */ 309fcf3ce44SJohn Forte #else 310fcf3ce44SJohn Forte #define EMLXS_NUM_HBQ 3 /* Number of HBQs supported by driver */ 311291a2b48SSukumar Swaminathan #endif /* SFCT_SUPPORT */ 312fcf3ce44SJohn Forte 313fcf3ce44SJohn Forte 314*82527734SSukumar Swaminathan /* 315*82527734SSukumar Swaminathan * An IO Channel is a object that comprises a xmit/cmpl 316*82527734SSukumar Swaminathan * path for IOs. 317*82527734SSukumar Swaminathan * For SLI3, an IO path maps to a ring (cmd/rsp) 318*82527734SSukumar Swaminathan * For SLI4, an IO path map to a queue pair (WQ/CQ) 319*82527734SSukumar Swaminathan */ 320*82527734SSukumar Swaminathan typedef struct emlxs_channel 321*82527734SSukumar Swaminathan { 322*82527734SSukumar Swaminathan struct emlxs_hba *hba; /* ptr to hba for channel */ 323*82527734SSukumar Swaminathan void *iopath; /* ptr to SLI3/4 io path */ 324*82527734SSukumar Swaminathan 325*82527734SSukumar Swaminathan kmutex_t rsp_lock; 326*82527734SSukumar Swaminathan IOCBQ *rsp_head; /* deferred completion head */ 327*82527734SSukumar Swaminathan IOCBQ *rsp_tail; /* deferred completion tail */ 328*82527734SSukumar Swaminathan emlxs_thread_t intr_thread; 329*82527734SSukumar Swaminathan 330*82527734SSukumar Swaminathan 331*82527734SSukumar Swaminathan uint16_t channelno; 332*82527734SSukumar Swaminathan uint16_t chan_flag; 333*82527734SSukumar Swaminathan 334*82527734SSukumar Swaminathan #define EMLXS_NEEDS_TRIGGER 1 335*82527734SSukumar Swaminathan 336*82527734SSukumar Swaminathan /* Protected by EMLXS_TX_CHANNEL_LOCK */ 337*82527734SSukumar Swaminathan emlxs_queue_t nodeq; /* Node service queue */ 338*82527734SSukumar Swaminathan 339*82527734SSukumar Swaminathan kmutex_t channel_cmd_lock; 340*82527734SSukumar Swaminathan uint32_t timeout; 341*82527734SSukumar Swaminathan 342*82527734SSukumar Swaminathan /* Channel command counters */ 343*82527734SSukumar Swaminathan uint32_t ulpSendCmd; 344*82527734SSukumar Swaminathan uint32_t ulpCmplCmd; 345*82527734SSukumar Swaminathan uint32_t hbaSendCmd; 346*82527734SSukumar Swaminathan uint32_t hbaCmplCmd; 347*82527734SSukumar Swaminathan uint32_t hbaSendCmd_sbp; 348*82527734SSukumar Swaminathan uint32_t hbaCmplCmd_sbp; 349*82527734SSukumar Swaminathan 350*82527734SSukumar Swaminathan } emlxs_channel_t; 351*82527734SSukumar Swaminathan typedef emlxs_channel_t CHANNEL; 352*82527734SSukumar Swaminathan 353*82527734SSukumar Swaminathan /* 354*82527734SSukumar Swaminathan * Should be able to handle max number of io paths for a 355*82527734SSukumar Swaminathan * SLI4 HBA (EMLXS_MAX_WQS) or for a SLI3 HBA (MAX_RINGS) 356*82527734SSukumar Swaminathan */ 357*82527734SSukumar Swaminathan #define MAX_CHANNEL EMLXS_MSI_MAX_INTRS 358fcf3ce44SJohn Forte 359fcf3ce44SJohn Forte 360fcf3ce44SJohn Forte /* Structure used to access adapter rings */ 361291a2b48SSukumar Swaminathan typedef struct emlxs_ring 362291a2b48SSukumar Swaminathan { 363291a2b48SSukumar Swaminathan void *fc_cmdringaddr; /* virtual offset for cmd */ 364291a2b48SSukumar Swaminathan /* rings */ 365291a2b48SSukumar Swaminathan void *fc_rspringaddr; /* virtual offset for rsp */ 366291a2b48SSukumar Swaminathan /* rings */ 367291a2b48SSukumar Swaminathan 368291a2b48SSukumar Swaminathan uint8_t *fc_mpon; /* index ptr for match */ 369291a2b48SSukumar Swaminathan /* structure */ 370291a2b48SSukumar Swaminathan uint8_t *fc_mpoff; /* index ptr for match */ 371291a2b48SSukumar Swaminathan /* structure */ 372*82527734SSukumar Swaminathan struct emlxs_hba *hba; /* ptr to hba for ring */ 373291a2b48SSukumar Swaminathan 374291a2b48SSukumar Swaminathan uint8_t fc_numCiocb; /* number of command iocb's */ 375291a2b48SSukumar Swaminathan /* per ring */ 376291a2b48SSukumar Swaminathan uint8_t fc_numRiocb; /* number of response iocb's */ 377291a2b48SSukumar Swaminathan /* per ring */ 378291a2b48SSukumar Swaminathan uint8_t fc_rspidx; /* current index in response */ 379291a2b48SSukumar Swaminathan /* ring */ 380291a2b48SSukumar Swaminathan uint8_t fc_cmdidx; /* current index in command */ 381291a2b48SSukumar Swaminathan /* ring */ 382291a2b48SSukumar Swaminathan uint8_t fc_port_rspidx; 383291a2b48SSukumar Swaminathan uint8_t fc_port_cmdidx; 384291a2b48SSukumar Swaminathan uint8_t ringno; 385291a2b48SSukumar Swaminathan 386291a2b48SSukumar Swaminathan uint16_t fc_missbufcnt; /* buf cnt we need to repost */ 387*82527734SSukumar Swaminathan CHANNEL *channelp; 388291a2b48SSukumar Swaminathan 389fcf3ce44SJohn Forte 390fcf3ce44SJohn Forte } emlxs_ring_t; 391fcf3ce44SJohn Forte typedef emlxs_ring_t RING; 392fcf3ce44SJohn Forte 393fcf3ce44SJohn Forte 394291a2b48SSukumar Swaminathan #ifdef SAN_DIAG_SUPPORT 395291a2b48SSukumar Swaminathan /* 396291a2b48SSukumar Swaminathan * Although right now it's just 1 field, SAN Diag anticipates that this 397291a2b48SSukumar Swaminathan * structure will grow in the future. 398291a2b48SSukumar Swaminathan */ 399291a2b48SSukumar Swaminathan typedef struct sd_timestat_level0 { 400291a2b48SSukumar Swaminathan int count; 401291a2b48SSukumar Swaminathan } sd_timestat_level0_t; 402291a2b48SSukumar Swaminathan #endif 403291a2b48SSukumar Swaminathan 404291a2b48SSukumar Swaminathan typedef struct emlxs_node 405291a2b48SSukumar Swaminathan { 406291a2b48SSukumar Swaminathan struct emlxs_node *nlp_list_next; 407291a2b48SSukumar Swaminathan struct emlxs_node *nlp_list_prev; 408fcf3ce44SJohn Forte 409291a2b48SSukumar Swaminathan NAME_TYPE nlp_portname; /* port name */ 410291a2b48SSukumar Swaminathan NAME_TYPE nlp_nodename; /* node name */ 411fcf3ce44SJohn Forte 412291a2b48SSukumar Swaminathan uint32_t nlp_DID; /* fibre channel D_ID */ 413291a2b48SSukumar Swaminathan uint32_t nlp_oldDID; 414fcf3ce44SJohn Forte 415291a2b48SSukumar Swaminathan uint16_t nlp_Rpi; /* login id returned by */ 416291a2b48SSukumar Swaminathan /* REG_LOGIN */ 417291a2b48SSukumar Swaminathan uint16_t nlp_Xri; /* login id returned by */ 418291a2b48SSukumar Swaminathan /* REG_LOGIN */ 419fcf3ce44SJohn Forte 420291a2b48SSukumar Swaminathan uint8_t nlp_fcp_info; /* Remote class info */ 421fcf3ce44SJohn Forte 422fcf3ce44SJohn Forte /* nlp_fcp_info */ 423fcf3ce44SJohn Forte #define NLP_FCP_TGT_DEVICE 0x10 /* FCP TGT device */ 424fcf3ce44SJohn Forte #define NLP_FCP_INI_DEVICE 0x20 /* FCP Initiator device */ 425fcf3ce44SJohn Forte #define NLP_FCP_2_DEVICE 0x40 /* FCP-2 TGT device */ 426291a2b48SSukumar Swaminathan #define NLP_EMLX_VPORT 0x80 /* Virtual port */ 427fcf3ce44SJohn Forte 428*82527734SSukumar Swaminathan uint32_t nlp_force_rscn; 429291a2b48SSukumar Swaminathan uint32_t nlp_tag; /* Tag used by port_offline */ 430291a2b48SSukumar Swaminathan uint32_t flag; 431fcf3ce44SJohn Forte 432291a2b48SSukumar Swaminathan #define NODE_POOL_ALLOCATED 0x00000001 433fcf3ce44SJohn Forte 434291a2b48SSukumar Swaminathan SERV_PARM sparm; 435fcf3ce44SJohn Forte 436*82527734SSukumar Swaminathan /* Protected by EMLXS_TX_CHANNEL_LOCK */ 437291a2b48SSukumar Swaminathan uint32_t nlp_active; /* Node active flag */ 438291a2b48SSukumar Swaminathan uint32_t nlp_base; 439*82527734SSukumar Swaminathan uint32_t nlp_flag[MAX_CHANNEL]; /* Node level channel */ 440291a2b48SSukumar Swaminathan /* flags */ 441fcf3ce44SJohn Forte 442fcf3ce44SJohn Forte /* nlp_flag */ 443291a2b48SSukumar Swaminathan #define NLP_CLOSED 0x1 444291a2b48SSukumar Swaminathan #define NLP_OFFLINE 0x2 445291a2b48SSukumar Swaminathan #define NLP_RPI_XRI 0x4 446291a2b48SSukumar Swaminathan 447*82527734SSukumar Swaminathan uint32_t nlp_tics[MAX_CHANNEL]; /* gate timeout */ 448*82527734SSukumar Swaminathan emlxs_queue_t nlp_tx[MAX_CHANNEL]; /* Transmit Q head */ 449*82527734SSukumar Swaminathan emlxs_queue_t nlp_ptx[MAX_CHANNEL]; /* Priority transmit */ 450291a2b48SSukumar Swaminathan /* Queue head */ 451*82527734SSukumar Swaminathan void *nlp_next[MAX_CHANNEL]; /* Service Request */ 452291a2b48SSukumar Swaminathan /* Queue pointer used */ 453291a2b48SSukumar Swaminathan /* when node needs */ 454291a2b48SSukumar Swaminathan /* servicing */ 455fcf3ce44SJohn Forte #ifdef DHCHAP_SUPPORT 456291a2b48SSukumar Swaminathan emlxs_node_dhc_t node_dhc; 457fcf3ce44SJohn Forte #endif /* DHCHAP_SUPPORT */ 458fcf3ce44SJohn Forte 459291a2b48SSukumar Swaminathan #ifdef SAN_DIAG_SUPPORT 460291a2b48SSukumar Swaminathan sd_timestat_level0_t sd_dev_bucket[SD_IO_LATENCY_MAX_BUCKETS]; 461291a2b48SSukumar Swaminathan #endif 462*82527734SSukumar Swaminathan 463*82527734SSukumar Swaminathan struct RPIobject *RPIp; /* SLI4 only */ 464*82527734SSukumar Swaminathan #define EMLXS_NODE_TO_RPI(_h, _n) \ 465*82527734SSukumar Swaminathan ((_n)?((_n->RPIp)?_n->RPIp:emlxs_sli4_find_rpi(_h, _n->nlp_Rpi)):NULL) 466*82527734SSukumar Swaminathan 467fcf3ce44SJohn Forte } emlxs_node_t; 468fcf3ce44SJohn Forte typedef emlxs_node_t NODELIST; 469fcf3ce44SJohn Forte 470fcf3ce44SJohn Forte 471fcf3ce44SJohn Forte 472fcf3ce44SJohn Forte #define NADDR_LEN 6 /* MAC network address length */ 473291a2b48SSukumar Swaminathan typedef struct emlxs_fcip_nethdr 474291a2b48SSukumar Swaminathan { 475291a2b48SSukumar Swaminathan NAME_TYPE fc_destname; /* destination port name */ 476291a2b48SSukumar Swaminathan NAME_TYPE fc_srcname; /* source port name */ 477fcf3ce44SJohn Forte } emlxs_fcip_nethdr_t; 478fcf3ce44SJohn Forte typedef emlxs_fcip_nethdr_t NETHDR; 479fcf3ce44SJohn Forte 480fcf3ce44SJohn Forte 481fcf3ce44SJohn Forte #define MEM_NLP 0 /* memory segment to hold node list entries */ 482fcf3ce44SJohn Forte #define MEM_IOCB 1 /* memory segment to hold iocb commands */ 483291a2b48SSukumar Swaminathan #define MEM_MBOX 2 /* memory segment to hold mailbox cmds */ 484291a2b48SSukumar Swaminathan #define MEM_BPL 3 /* and to hold buffer ptr lists - SLI2 */ 485291a2b48SSukumar Swaminathan #define MEM_BUF 4 /* memory segment to hold buffer data */ 486291a2b48SSukumar Swaminathan #define MEM_ELSBUF 4 /* memory segment to hold buffer data */ 487fcf3ce44SJohn Forte #define MEM_IPBUF 5 /* memory segment to hold IP buffer data */ 488fcf3ce44SJohn Forte #define MEM_CTBUF 6 /* memory segment to hold CT buffer data */ 489fcf3ce44SJohn Forte #define MEM_FCTBUF 7 /* memory segment to hold FCT buffer data */ 490fcf3ce44SJohn Forte 491fcf3ce44SJohn Forte #ifdef SFCT_SUPPORT 492fcf3ce44SJohn Forte #define FC_MAX_SEG 8 493fcf3ce44SJohn Forte #else 494fcf3ce44SJohn Forte #define FC_MAX_SEG 7 495291a2b48SSukumar Swaminathan #endif /* SFCT_SUPPORT */ 496fcf3ce44SJohn Forte 497fcf3ce44SJohn Forte 498fcf3ce44SJohn Forte /* A BPL entry is 12 bytes. Subtract 2 for command and response buffers */ 499291a2b48SSukumar Swaminathan #define BPL_TO_SGLLEN(_bpl) ((_bpl/12)-2) 500291a2b48SSukumar Swaminathan #define MEM_BPL_SIZE 1024 /* Default size */ 501fcf3ce44SJohn Forte 502*82527734SSukumar Swaminathan /* A SGL entry is 16 bytes. Subtract 2 for command and response buffers */ 503*82527734SSukumar Swaminathan #define SGL_TO_SGLLEN(_sgl) ((_sgl/16)-2) 504*82527734SSukumar Swaminathan #define MEM_SGL_SIZE 1024 /* Default size */ 505*82527734SSukumar Swaminathan 506fcf3ce44SJohn Forte #ifdef EMLXS_I386 507fcf3ce44SJohn Forte #define EMLXS_SGLLEN BPL_TO_SGLLEN(MEM_BPL_SIZE) 508fcf3ce44SJohn Forte #else /* EMLXS_SPARC */ 509fcf3ce44SJohn Forte #define EMLXS_SGLLEN 1 510fcf3ce44SJohn Forte #endif /* EMLXS_I386 */ 511fcf3ce44SJohn Forte 512fcf3ce44SJohn Forte #define MEM_BUF_SIZE 1024 513fcf3ce44SJohn Forte #define MEM_BUF_COUNT 64 514fcf3ce44SJohn Forte 515291a2b48SSukumar Swaminathan #define MEM_ELSBUF_SIZE MEM_BUF_SIZE 516291a2b48SSukumar Swaminathan #define MEM_ELSBUF_COUNT hba->max_nodes 517291a2b48SSukumar Swaminathan #define MEM_IPBUF_SIZE 65535 518fcf3ce44SJohn Forte #define MEM_IPBUF_COUNT 60 519fcf3ce44SJohn Forte #define MEM_CTBUF_SIZE MAX_CT_PAYLOAD /* (1024*320) */ 520fcf3ce44SJohn Forte #define MEM_CTBUF_COUNT 8 521291a2b48SSukumar Swaminathan #define MEM_FCTBUF_SIZE 65535 522fcf3ce44SJohn Forte #define MEM_FCTBUF_COUNT 128 523fcf3ce44SJohn Forte 524291a2b48SSukumar Swaminathan typedef struct emlxs_memseg 525291a2b48SSukumar Swaminathan { 526291a2b48SSukumar Swaminathan uint8_t *fc_memget_ptr; 527291a2b48SSukumar Swaminathan uint8_t *fc_memget_end; 528291a2b48SSukumar Swaminathan uint8_t *fc_memput_ptr; 529291a2b48SSukumar Swaminathan uint8_t *fc_memput_end; 530291a2b48SSukumar Swaminathan 531291a2b48SSukumar Swaminathan uint8_t *fc_memstart_virt; /* beginning address */ 532291a2b48SSukumar Swaminathan /* of memory block */ 533291a2b48SSukumar Swaminathan uint64_t fc_memstart_phys; /* beginning address */ 534291a2b48SSukumar Swaminathan /* of memory block */ 535291a2b48SSukumar Swaminathan ddi_dma_handle_t fc_mem_dma_handle; 536291a2b48SSukumar Swaminathan ddi_acc_handle_t fc_mem_dat_handle; 537291a2b48SSukumar Swaminathan uint32_t fc_total_memsize; 538291a2b48SSukumar Swaminathan uint32_t fc_memsize; /* size of mem blks */ 539291a2b48SSukumar Swaminathan uint32_t fc_numblks; /* no of mem blks */ 540291a2b48SSukumar Swaminathan uint32_t fc_memget_cnt; /* no of mem get blks */ 541291a2b48SSukumar Swaminathan uint32_t fc_memput_cnt; /* no of mem put blks */ 542*82527734SSukumar Swaminathan uint32_t fc_memflag; /* emlxs_buf_info_t FLAGS */ 543*82527734SSukumar Swaminathan uint32_t fc_reserved; /* used with priority flag */ 544*82527734SSukumar Swaminathan uint32_t fc_memalign; 545*82527734SSukumar Swaminathan uint32_t fc_memtag; 546*82527734SSukumar Swaminathan char fc_label[32]; 547*82527734SSukumar Swaminathan 548fcf3ce44SJohn Forte } emlxs_memseg_t; 549fcf3ce44SJohn Forte typedef emlxs_memseg_t MEMSEG; 550fcf3ce44SJohn Forte 551fcf3ce44SJohn Forte 552fcf3ce44SJohn Forte /* Board stat counters */ 553291a2b48SSukumar Swaminathan typedef struct emlxs_stats 554291a2b48SSukumar Swaminathan { 555291a2b48SSukumar Swaminathan uint32_t LinkUp; 556291a2b48SSukumar Swaminathan uint32_t LinkDown; 557291a2b48SSukumar Swaminathan uint32_t LinkEvent; 558291a2b48SSukumar Swaminathan uint32_t LinkMultiEvent; 559291a2b48SSukumar Swaminathan 560291a2b48SSukumar Swaminathan uint32_t MboxIssued; 561291a2b48SSukumar Swaminathan uint32_t MboxCompleted; /* MboxError + MbxGood */ 562291a2b48SSukumar Swaminathan uint32_t MboxGood; 563291a2b48SSukumar Swaminathan uint32_t MboxError; 564291a2b48SSukumar Swaminathan uint32_t MboxBusy; 565291a2b48SSukumar Swaminathan uint32_t MboxInvalid; 566291a2b48SSukumar Swaminathan 567*82527734SSukumar Swaminathan uint32_t IocbIssued[MAX_CHANNEL]; 568*82527734SSukumar Swaminathan uint32_t IocbReceived[MAX_CHANNEL]; 569*82527734SSukumar Swaminathan uint32_t IocbTxPut[MAX_CHANNEL]; 570*82527734SSukumar Swaminathan uint32_t IocbTxGet[MAX_CHANNEL]; 571*82527734SSukumar Swaminathan uint32_t IocbRingFull[MAX_CHANNEL]; 572291a2b48SSukumar Swaminathan uint32_t IocbThrottled; 573291a2b48SSukumar Swaminathan 574291a2b48SSukumar Swaminathan uint32_t IntrEvent[8]; 575291a2b48SSukumar Swaminathan 576291a2b48SSukumar Swaminathan uint32_t FcpIssued; 577291a2b48SSukumar Swaminathan uint32_t FcpCompleted; /* FcpGood + FcpError */ 578291a2b48SSukumar Swaminathan uint32_t FcpGood; 579291a2b48SSukumar Swaminathan uint32_t FcpError; 580291a2b48SSukumar Swaminathan 581291a2b48SSukumar Swaminathan uint32_t FcpEvent; /* FcpStray + FcpCompleted */ 582291a2b48SSukumar Swaminathan uint32_t FcpStray; 583fcf3ce44SJohn Forte #ifdef SFCT_SUPPORT 584291a2b48SSukumar Swaminathan uint32_t FctRingEvent; 585291a2b48SSukumar Swaminathan uint32_t FctRingError; 586291a2b48SSukumar Swaminathan uint32_t FctRingDropped; 587291a2b48SSukumar Swaminathan #endif /* SFCT_SUPPORT */ 588291a2b48SSukumar Swaminathan 589291a2b48SSukumar Swaminathan uint32_t ElsEvent; /* ElsStray + ElsCmplt (cmd + rsp) */ 590291a2b48SSukumar Swaminathan uint32_t ElsStray; 591291a2b48SSukumar Swaminathan 592291a2b48SSukumar Swaminathan uint32_t ElsCmdIssued; 593291a2b48SSukumar Swaminathan uint32_t ElsCmdCompleted; /* ElsCmdGood + ElsCmdError */ 594291a2b48SSukumar Swaminathan uint32_t ElsCmdGood; 595291a2b48SSukumar Swaminathan uint32_t ElsCmdError; 596291a2b48SSukumar Swaminathan 597291a2b48SSukumar Swaminathan uint32_t ElsRspIssued; 598291a2b48SSukumar Swaminathan uint32_t ElsRspCompleted; 599291a2b48SSukumar Swaminathan 600291a2b48SSukumar Swaminathan uint32_t ElsRcvEvent; /* ElsRcvErr + ElsRcvDrop + ElsCmdRcv */ 601291a2b48SSukumar Swaminathan uint32_t ElsRcvError; 602291a2b48SSukumar Swaminathan uint32_t ElsRcvDropped; 603291a2b48SSukumar Swaminathan uint32_t ElsCmdReceived; /* ElsRscnRcv + ElsPlogiRcv + ... */ 604291a2b48SSukumar Swaminathan uint32_t ElsRscnReceived; 605291a2b48SSukumar Swaminathan uint32_t ElsFlogiReceived; 606291a2b48SSukumar Swaminathan uint32_t ElsPlogiReceived; 607291a2b48SSukumar Swaminathan uint32_t ElsPrliReceived; 608291a2b48SSukumar Swaminathan uint32_t ElsPrloReceived; 609291a2b48SSukumar Swaminathan uint32_t ElsLogoReceived; 610291a2b48SSukumar Swaminathan uint32_t ElsAdiscReceived; 611291a2b48SSukumar Swaminathan uint32_t ElsAuthReceived; 612291a2b48SSukumar Swaminathan uint32_t ElsGenReceived; 613291a2b48SSukumar Swaminathan 614291a2b48SSukumar Swaminathan uint32_t CtEvent; /* CtStray + CtCompleted (cmd + rsp) */ 615291a2b48SSukumar Swaminathan uint32_t CtStray; 616291a2b48SSukumar Swaminathan 617291a2b48SSukumar Swaminathan uint32_t CtCmdIssued; 618291a2b48SSukumar Swaminathan uint32_t CtCmdCompleted; /* CtCmdGood + CtCmdError */ 619291a2b48SSukumar Swaminathan uint32_t CtCmdGood; 620291a2b48SSukumar Swaminathan uint32_t CtCmdError; 621291a2b48SSukumar Swaminathan 622291a2b48SSukumar Swaminathan uint32_t CtRspIssued; 623291a2b48SSukumar Swaminathan uint32_t CtRspCompleted; 624291a2b48SSukumar Swaminathan 625291a2b48SSukumar Swaminathan uint32_t CtRcvEvent; /* CtRcvError + CtRcvDrop + CtCmdRcvd */ 626291a2b48SSukumar Swaminathan uint32_t CtRcvError; 627291a2b48SSukumar Swaminathan uint32_t CtRcvDropped; 628291a2b48SSukumar Swaminathan uint32_t CtCmdReceived; 629291a2b48SSukumar Swaminathan 630291a2b48SSukumar Swaminathan uint32_t IpEvent; /* IpStray + IpSeqCmpl + IpBcastCmpl */ 631291a2b48SSukumar Swaminathan uint32_t IpStray; 632291a2b48SSukumar Swaminathan 633291a2b48SSukumar Swaminathan uint32_t IpSeqIssued; 634291a2b48SSukumar Swaminathan uint32_t IpSeqCompleted; /* IpSeqGood + IpSeqError */ 635291a2b48SSukumar Swaminathan uint32_t IpSeqGood; 636291a2b48SSukumar Swaminathan uint32_t IpSeqError; 637291a2b48SSukumar Swaminathan 638291a2b48SSukumar Swaminathan uint32_t IpBcastIssued; 639291a2b48SSukumar Swaminathan uint32_t IpBcastCompleted; /* IpBcastGood + IpBcastError */ 640291a2b48SSukumar Swaminathan uint32_t IpBcastGood; 641291a2b48SSukumar Swaminathan uint32_t IpBcastError; 642291a2b48SSukumar Swaminathan 643291a2b48SSukumar Swaminathan uint32_t IpRcvEvent; /* IpDrop + IpSeqRcv + IpBcastRcv */ 644291a2b48SSukumar Swaminathan uint32_t IpDropped; 645291a2b48SSukumar Swaminathan uint32_t IpSeqReceived; 646291a2b48SSukumar Swaminathan uint32_t IpBcastReceived; 647291a2b48SSukumar Swaminathan 648291a2b48SSukumar Swaminathan uint32_t IpUbPosted; 649291a2b48SSukumar Swaminathan uint32_t ElsUbPosted; 650291a2b48SSukumar Swaminathan uint32_t CtUbPosted; 651fcf3ce44SJohn Forte #ifdef SFCT_SUPPORT 652291a2b48SSukumar Swaminathan uint32_t FctUbPosted; 653291a2b48SSukumar Swaminathan #endif /* SFCT_SUPPORT */ 654fcf3ce44SJohn Forte 655291a2b48SSukumar Swaminathan uint32_t ResetTime; /* Time of last reset */ 656fcf3ce44SJohn Forte } emlxs_stats_t; 657fcf3ce44SJohn Forte 658fcf3ce44SJohn Forte 659291a2b48SSukumar Swaminathan #define FC_MAX_ADPTMSG (8*28) /* max size of a msg from adapter */ 660fcf3ce44SJohn Forte 661fcf3ce44SJohn Forte #define EMLXS_NUM_THREADS 8 662fcf3ce44SJohn Forte #define EMLXS_MIN_TASKS 8 663fcf3ce44SJohn Forte #define EMLXS_MAX_TASKS 8 664fcf3ce44SJohn Forte 665fcf3ce44SJohn Forte #define EMLXS_NUM_HASH_QUES 32 666fcf3ce44SJohn Forte #define EMLXS_DID_HASH(x) ((x) & (EMLXS_NUM_HASH_QUES - 1)) 667fcf3ce44SJohn Forte 668fcf3ce44SJohn Forte 669fcf3ce44SJohn Forte /* pkt_tran_flag */ 670fcf3ce44SJohn Forte #define FC_TRAN_COMPLETED 0x8000 671fcf3ce44SJohn Forte 672fcf3ce44SJohn Forte 673291a2b48SSukumar Swaminathan typedef struct emlxs_dfc_event 674291a2b48SSukumar Swaminathan { 675291a2b48SSukumar Swaminathan uint32_t pid; 676291a2b48SSukumar Swaminathan uint32_t event; 677291a2b48SSukumar Swaminathan uint32_t last_id; 678fcf3ce44SJohn Forte 679291a2b48SSukumar Swaminathan void *dataout; 680291a2b48SSukumar Swaminathan uint32_t size; 681291a2b48SSukumar Swaminathan uint32_t mode; 682fcf3ce44SJohn Forte } emlxs_dfc_event_t; 683fcf3ce44SJohn Forte 684fcf3ce44SJohn Forte 685291a2b48SSukumar Swaminathan typedef struct emlxs_hba_event 686291a2b48SSukumar Swaminathan { 687291a2b48SSukumar Swaminathan uint32_t last_id; 688291a2b48SSukumar Swaminathan uint32_t new; 689291a2b48SSukumar Swaminathan uint32_t missed; 690fcf3ce44SJohn Forte } emlxs_hba_event_t; 691fcf3ce44SJohn Forte 692fcf3ce44SJohn Forte 693fcf3ce44SJohn Forte #ifdef SFCT_SUPPORT 694fcf3ce44SJohn Forte 695fcf3ce44SJohn Forte #define TGTPORTSTAT port->fct_stat 696fcf3ce44SJohn Forte 697fcf3ce44SJohn Forte /* 698fcf3ce44SJohn Forte * FctP2IOXcnt will count IOs by their fcpDL. Counters 699fcf3ce44SJohn Forte * are for buckets of various power of 2 sizes. 700fcf3ce44SJohn Forte * Bucket 0 < 512 > 0 701fcf3ce44SJohn Forte * Bucket 1 >= 512 < 1024 702fcf3ce44SJohn Forte * Bucket 2 >= 1024 < 2048 703fcf3ce44SJohn Forte * Bucket 3 >= 2048 < 4096 704fcf3ce44SJohn Forte * Bucket 4 >= 4096 < 8192 705fcf3ce44SJohn Forte * Bucket 5 >= 8192 < 16K 706fcf3ce44SJohn Forte * Bucket 6 >= 16K < 32K 707fcf3ce44SJohn Forte * Bucket 7 >= 32K < 64K 708fcf3ce44SJohn Forte * Bucket 8 >= 64K < 128K 709fcf3ce44SJohn Forte * Bucket 9 >= 128K < 256K 710fcf3ce44SJohn Forte * Bucket 10 >= 256K < 512K 711fcf3ce44SJohn Forte * Bucket 11 >= 512K < 1MB 712fcf3ce44SJohn Forte * Bucket 12 >= 1MB < 2MB 713fcf3ce44SJohn Forte * Bucket 13 >= 2MB < 4MB 714fcf3ce44SJohn Forte * Bucket 14 >= 4MB < 8MB 715fcf3ce44SJohn Forte * Bucket 15 >= 8MB 716fcf3ce44SJohn Forte */ 717291a2b48SSukumar Swaminathan #define MAX_TGTPORT_IOCNT 16 718fcf3ce44SJohn Forte 719fcf3ce44SJohn Forte 720fcf3ce44SJohn Forte /* 721fcf3ce44SJohn Forte * These routines will bump the right counter, based on 722fcf3ce44SJohn Forte * the size of the IO inputed, with the least number of 723fcf3ce44SJohn Forte * comparisions. A max of 5 comparisions is only needed 724fcf3ce44SJohn Forte * to classify the IO in one of 16 ranges. A binary search 725fcf3ce44SJohn Forte * to locate the high bit in the size is used. 726fcf3ce44SJohn Forte */ 727*82527734SSukumar Swaminathan #define EMLXS_BUMP_RDIOCTR(port, cnt) \ 728291a2b48SSukumar Swaminathan { \ 729291a2b48SSukumar Swaminathan /* Use binary search to find the first high bit */ \ 730291a2b48SSukumar Swaminathan if (cnt & 0xffff0000) { \ 731291a2b48SSukumar Swaminathan if (cnt & 0xff800000) { \ 732291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[15]++; \ 733291a2b48SSukumar Swaminathan } \ 734291a2b48SSukumar Swaminathan else { \ 735291a2b48SSukumar Swaminathan /* It must be 0x007f0000 */ \ 736291a2b48SSukumar Swaminathan if (cnt & 0x00700000) { \ 737291a2b48SSukumar Swaminathan if (cnt & 0x00400000) { \ 738291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[14]++; \ 739291a2b48SSukumar Swaminathan } \ 740291a2b48SSukumar Swaminathan else { \ 741291a2b48SSukumar Swaminathan /* it must be 0x00300000 */ \ 742291a2b48SSukumar Swaminathan if (cnt & 0x00200000) { \ 743291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[13]++; \ 744291a2b48SSukumar Swaminathan } \ 745291a2b48SSukumar Swaminathan else { \ 746291a2b48SSukumar Swaminathan /* It must be 0x00100000 */ \ 747291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[12]++; \ 748291a2b48SSukumar Swaminathan } \ 749291a2b48SSukumar Swaminathan } \ 750291a2b48SSukumar Swaminathan } \ 751291a2b48SSukumar Swaminathan else { \ 752291a2b48SSukumar Swaminathan /* It must be 0x000f0000 */ \ 753291a2b48SSukumar Swaminathan if (cnt & 0x000c0000) { \ 754291a2b48SSukumar Swaminathan if (cnt & 0x00080000) { \ 755fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IORcnt[11]++; \ 756291a2b48SSukumar Swaminathan } \ 757291a2b48SSukumar Swaminathan else { \ 758291a2b48SSukumar Swaminathan /* It must be 0x00040000 */ \ 759fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IORcnt[10]++; \ 760291a2b48SSukumar Swaminathan } \ 761291a2b48SSukumar Swaminathan } \ 762291a2b48SSukumar Swaminathan else { \ 763291a2b48SSukumar Swaminathan /* It must be 0x00030000 */ \ 764291a2b48SSukumar Swaminathan if (cnt & 0x00020000) { \ 765291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[9]++; \ 766291a2b48SSukumar Swaminathan } \ 767291a2b48SSukumar Swaminathan else { \ 768291a2b48SSukumar Swaminathan /* It must be 0x00010000 */ \ 769291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[8]++; \ 770291a2b48SSukumar Swaminathan } \ 771291a2b48SSukumar Swaminathan } \ 772291a2b48SSukumar Swaminathan } \ 773291a2b48SSukumar Swaminathan } \ 774291a2b48SSukumar Swaminathan } \ 775291a2b48SSukumar Swaminathan else { \ 776291a2b48SSukumar Swaminathan if (cnt & 0x0000fe00) { \ 777291a2b48SSukumar Swaminathan if (cnt & 0x0000f000) { \ 778291a2b48SSukumar Swaminathan if (cnt & 0x0000c000) { \ 779291a2b48SSukumar Swaminathan if (cnt & 0x00008000) { \ 780291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[7]++; \ 781291a2b48SSukumar Swaminathan } \ 782291a2b48SSukumar Swaminathan else { \ 783291a2b48SSukumar Swaminathan /* It must be 0x00004000 */ \ 784291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[6]++; \ 785291a2b48SSukumar Swaminathan } \ 786291a2b48SSukumar Swaminathan } \ 787291a2b48SSukumar Swaminathan else { \ 788291a2b48SSukumar Swaminathan /* It must be 0x00000300 */ \ 789291a2b48SSukumar Swaminathan if (cnt & 0x00000200) { \ 790291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[5]++; \ 791291a2b48SSukumar Swaminathan } \ 792291a2b48SSukumar Swaminathan else { \ 793291a2b48SSukumar Swaminathan /* It must be 0x00000100 */ \ 794291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[4]++; \ 795291a2b48SSukumar Swaminathan } \ 796291a2b48SSukumar Swaminathan } \ 797291a2b48SSukumar Swaminathan } \ 798291a2b48SSukumar Swaminathan else { \ 799291a2b48SSukumar Swaminathan /* It must be 0x00000e00 */ \ 800291a2b48SSukumar Swaminathan if (cnt & 0x00000800) { \ 801291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[3]++; \ 802291a2b48SSukumar Swaminathan } \ 803291a2b48SSukumar Swaminathan else { \ 804291a2b48SSukumar Swaminathan /* It must be 0x00000600 */ \ 805291a2b48SSukumar Swaminathan if (cnt & 0x00000400) { \ 806291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[2]++; \ 807291a2b48SSukumar Swaminathan } \ 808291a2b48SSukumar Swaminathan else { \ 809291a2b48SSukumar Swaminathan /* It must be 0x00000200 */ \ 810291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[1]++; \ 811291a2b48SSukumar Swaminathan } \ 812291a2b48SSukumar Swaminathan } \ 813291a2b48SSukumar Swaminathan } \ 814291a2b48SSukumar Swaminathan } \ 815291a2b48SSukumar Swaminathan else { \ 816291a2b48SSukumar Swaminathan /* It must be 0x000001ff */ \ 817291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IORcnt[0]++; \ 818291a2b48SSukumar Swaminathan } \ 819291a2b48SSukumar Swaminathan } \ 820fcf3ce44SJohn Forte } 821fcf3ce44SJohn Forte 822291a2b48SSukumar Swaminathan 823*82527734SSukumar Swaminathan #define EMLXS_BUMP_WRIOCTR(port, cnt) \ 824291a2b48SSukumar Swaminathan { \ 825291a2b48SSukumar Swaminathan /* Use binary search to find the first high bit */ \ 826291a2b48SSukumar Swaminathan if (cnt & 0xffff0000) { \ 827291a2b48SSukumar Swaminathan if (cnt & 0xff800000) { \ 828291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IOWcnt[15]++; \ 829291a2b48SSukumar Swaminathan } \ 830291a2b48SSukumar Swaminathan else { \ 831291a2b48SSukumar Swaminathan /* It must be 0x007f0000 */ \ 832291a2b48SSukumar Swaminathan if (cnt & 0x00700000) { \ 833291a2b48SSukumar Swaminathan if (cnt & 0x00400000) { \ 834291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IOWcnt[14]++; \ 835291a2b48SSukumar Swaminathan } \ 836291a2b48SSukumar Swaminathan else { \ 837291a2b48SSukumar Swaminathan /* It must be 0x00300000 */ \ 838291a2b48SSukumar Swaminathan if (cnt & 0x00200000) { \ 839fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[13]++; \ 840291a2b48SSukumar Swaminathan } \ 841291a2b48SSukumar Swaminathan else { \ 842291a2b48SSukumar Swaminathan /* It must be 0x00100000 */ \ 843fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[12]++; \ 844291a2b48SSukumar Swaminathan } \ 845291a2b48SSukumar Swaminathan } \ 846291a2b48SSukumar Swaminathan } \ 847291a2b48SSukumar Swaminathan else { \ 848291a2b48SSukumar Swaminathan /* It must be 0x000f0000 */ \ 849291a2b48SSukumar Swaminathan if (cnt & 0x000c0000) { \ 850291a2b48SSukumar Swaminathan if (cnt & 0x00080000) { \ 851fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[11]++; \ 852291a2b48SSukumar Swaminathan } \ 853291a2b48SSukumar Swaminathan else { \ 854291a2b48SSukumar Swaminathan /* it must be 0x00040000 */ \ 855fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[10]++; \ 856291a2b48SSukumar Swaminathan } \ 857291a2b48SSukumar Swaminathan } \ 858291a2b48SSukumar Swaminathan else { \ 859291a2b48SSukumar Swaminathan /* It must be 0x00030000 */ \ 860291a2b48SSukumar Swaminathan if (cnt & 0x00020000) { \ 861fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[9]++; \ 862291a2b48SSukumar Swaminathan } \ 863291a2b48SSukumar Swaminathan else { \ 864291a2b48SSukumar Swaminathan /* It must be 0x00010000 */ \ 865fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[8]++; \ 866291a2b48SSukumar Swaminathan } \ 867291a2b48SSukumar Swaminathan } \ 868291a2b48SSukumar Swaminathan } \ 869291a2b48SSukumar Swaminathan } \ 870291a2b48SSukumar Swaminathan } \ 871291a2b48SSukumar Swaminathan else { \ 872291a2b48SSukumar Swaminathan if (cnt & 0x0000fe00) { \ 873291a2b48SSukumar Swaminathan if (cnt & 0x0000f000) { \ 874291a2b48SSukumar Swaminathan if (cnt & 0x0000c000) { \ 875291a2b48SSukumar Swaminathan if (cnt & 0x00008000) { \ 876fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[7]++; \ 877291a2b48SSukumar Swaminathan } \ 878291a2b48SSukumar Swaminathan else { \ 879291a2b48SSukumar Swaminathan /* It must be 0x00004000 */ \ 880fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[6]++; \ 881291a2b48SSukumar Swaminathan } \ 882291a2b48SSukumar Swaminathan } \ 883291a2b48SSukumar Swaminathan else { \ 884291a2b48SSukumar Swaminathan /* It must be 0x00000300 */ \ 885291a2b48SSukumar Swaminathan if (cnt & 0x00000200) { \ 886fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[5]++; \ 887291a2b48SSukumar Swaminathan } \ 888291a2b48SSukumar Swaminathan else { \ 889291a2b48SSukumar Swaminathan /* It must be 0x00000100 */ \ 890fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[4]++; \ 891291a2b48SSukumar Swaminathan } \ 892291a2b48SSukumar Swaminathan } \ 893291a2b48SSukumar Swaminathan } \ 894291a2b48SSukumar Swaminathan else { \ 895291a2b48SSukumar Swaminathan /* It must be 0x00000e00 */ \ 896291a2b48SSukumar Swaminathan if (cnt & 0x00000800) { \ 897291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IOWcnt[3]++; \ 898291a2b48SSukumar Swaminathan } \ 899291a2b48SSukumar Swaminathan else { \ 900291a2b48SSukumar Swaminathan /* It must be 0x00000600 */ \ 901291a2b48SSukumar Swaminathan if (cnt & 0x00000400) { \ 902fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[2]++; \ 903291a2b48SSukumar Swaminathan } \ 904291a2b48SSukumar Swaminathan else { \ 905291a2b48SSukumar Swaminathan /* It must be 0x00000200 */ \ 906fcf3ce44SJohn Forte TGTPORTSTAT.FctP2IOWcnt[1]++; \ 907291a2b48SSukumar Swaminathan } \ 908291a2b48SSukumar Swaminathan } \ 909291a2b48SSukumar Swaminathan } \ 910291a2b48SSukumar Swaminathan } \ 911291a2b48SSukumar Swaminathan else { \ 912291a2b48SSukumar Swaminathan /* It must be 0x000001ff */ \ 913291a2b48SSukumar Swaminathan TGTPORTSTAT.FctP2IOWcnt[0]++; \ 914291a2b48SSukumar Swaminathan } \ 915291a2b48SSukumar Swaminathan } \ 916fcf3ce44SJohn Forte } 917fcf3ce44SJohn Forte 918291a2b48SSukumar Swaminathan typedef struct emlxs_tgtport_stat 919291a2b48SSukumar Swaminathan { 920fcf3ce44SJohn Forte /* IO counters */ 921291a2b48SSukumar Swaminathan uint64_t FctP2IOWcnt[MAX_TGTPORT_IOCNT]; /* Writes */ 922291a2b48SSukumar Swaminathan uint64_t FctP2IORcnt[MAX_TGTPORT_IOCNT]; /* Reads */ 923291a2b48SSukumar Swaminathan uint64_t FctIOCmdCnt; /* Other, ie TUR */ 924291a2b48SSukumar Swaminathan uint64_t FctCmdReceived; /* total IOs */ 925291a2b48SSukumar Swaminathan uint64_t FctReadBytes; /* total read bytes */ 926291a2b48SSukumar Swaminathan uint64_t FctWriteBytes; /* total write bytes */ 927fcf3ce44SJohn Forte 928fcf3ce44SJohn Forte /* IOCB handling counters */ 929291a2b48SSukumar Swaminathan uint64_t FctEvent; /* FctStray + FctCompleted */ 930291a2b48SSukumar Swaminathan uint64_t FctCompleted; /* FctCmplGood + FctCmplError */ 931291a2b48SSukumar Swaminathan uint64_t FctCmplGood; 932fcf3ce44SJohn Forte 933291a2b48SSukumar Swaminathan uint32_t FctCmplError; 934291a2b48SSukumar Swaminathan uint32_t FctStray; 935fcf3ce44SJohn Forte 936fcf3ce44SJohn Forte /* Fct event counters */ 937291a2b48SSukumar Swaminathan uint32_t FctRcvDropped; 938291a2b48SSukumar Swaminathan uint32_t FctOverQDepth; 939291a2b48SSukumar Swaminathan uint32_t FctOutstandingIO; 940291a2b48SSukumar Swaminathan uint32_t FctFailedPortRegister; 941291a2b48SSukumar Swaminathan uint32_t FctPortRegister; 942291a2b48SSukumar Swaminathan uint32_t FctPortDeregister; 943291a2b48SSukumar Swaminathan 944291a2b48SSukumar Swaminathan uint32_t FctAbortSent; 945291a2b48SSukumar Swaminathan uint32_t FctNoBuffer; 946291a2b48SSukumar Swaminathan uint32_t FctScsiStatusErr; 947291a2b48SSukumar Swaminathan uint32_t FctScsiQfullErr; 948291a2b48SSukumar Swaminathan uint32_t FctScsiResidOver; 949291a2b48SSukumar Swaminathan uint32_t FctScsiResidUnder; 950291a2b48SSukumar Swaminathan uint32_t FctScsiSenseErr; 951291a2b48SSukumar Swaminathan 952291a2b48SSukumar Swaminathan uint32_t FctFiller1; 953fcf3ce44SJohn Forte } emlxs_tgtport_stat_t; 954291a2b48SSukumar Swaminathan 955291a2b48SSukumar Swaminathan #ifdef FCT_IO_TRACE 956291a2b48SSukumar Swaminathan #define MAX_IO_TRACE 67 957291a2b48SSukumar Swaminathan typedef struct emlxs_iotrace 958291a2b48SSukumar Swaminathan { 959291a2b48SSukumar Swaminathan fct_cmd_t *fct_cmd; 960291a2b48SSukumar Swaminathan uint32_t xri; 961291a2b48SSukumar Swaminathan uint8_t marker; /* 0xff */ 962291a2b48SSukumar Swaminathan uint8_t trc[MAX_IO_TRACE]; /* trc[0] = index */ 963291a2b48SSukumar Swaminathan } emlxs_iotrace_t; 964291a2b48SSukumar Swaminathan #endif /* FCT_IO_TRACE */ 965291a2b48SSukumar Swaminathan #endif /* SFCT_SUPPORT */ 966fcf3ce44SJohn Forte 967fcf3ce44SJohn Forte 968fcf3ce44SJohn Forte /* 969291a2b48SSukumar Swaminathan * Port Information Data Structure 970fcf3ce44SJohn Forte */ 971fcf3ce44SJohn Forte 972291a2b48SSukumar Swaminathan typedef struct emlxs_port 973291a2b48SSukumar Swaminathan { 974291a2b48SSukumar Swaminathan struct emlxs_hba *hba; 975fcf3ce44SJohn Forte 976fcf3ce44SJohn Forte /* Virtual port management */ 977291a2b48SSukumar Swaminathan uint32_t vpi; 978291a2b48SSukumar Swaminathan uint32_t flag; 979fcf3ce44SJohn Forte #define EMLXS_PORT_ENABLE 0x00000001 980fcf3ce44SJohn Forte #define EMLXS_PORT_BOUND 0x00000002 981fcf3ce44SJohn Forte 982fcf3ce44SJohn Forte #define EMLXS_PORT_REGISTERED 0x00010000 /* VPI registered */ 983*82527734SSukumar Swaminathan #define EMLXS_PORT_INIT_VPI_CMPL 0x00020000 /* Init VPI - SLI4 */ 984*82527734SSukumar Swaminathan #define EMLXS_PORT_REG_VPI_CMPL 0x00040000 /* Reg VPI - SLI4 */ 985fcf3ce44SJohn Forte #define EMLXS_PORT_IP_UP 0x00000010 986fcf3ce44SJohn Forte #define EMLXS_PORT_CONFIG 0x00000020 987291a2b48SSukumar Swaminathan #define EMLXS_PORT_RESTRICTED 0x00000040 /* Restrict logins */ 988291a2b48SSukumar Swaminathan /* flag */ 989291a2b48SSukumar Swaminathan #define EMLXS_PORT_FLOGI_CMPL 0x00000080 /* Fabric login */ 990291a2b48SSukumar Swaminathan /* completed */ 991fcf3ce44SJohn Forte 992291a2b48SSukumar Swaminathan #define EMLXS_PORT_RESET_MASK 0x0000FFFF /* Flags to keep */ 993291a2b48SSukumar Swaminathan /* across hard reset */ 994291a2b48SSukumar Swaminathan #define EMLXS_PORT_LINKDOWN_MASK 0xFFFFFFFF /* Flags to keep */ 995291a2b48SSukumar Swaminathan /* across link reset */ 996fcf3ce44SJohn Forte 997291a2b48SSukumar Swaminathan uint32_t options; 998fcf3ce44SJohn Forte #define EMLXS_OPT_RESTRICT 0x00000001 /* Force restricted */ 999291a2b48SSukumar Swaminathan /* logins */ 1000fcf3ce44SJohn Forte #define EMLXS_OPT_UNRESTRICT 0x00000002 /* Force Unrestricted */ 1001fcf3ce44SJohn Forte /* logins */ 1002fcf3ce44SJohn Forte #define EMLXS_OPT_RESTRICT_MASK 0x00000003 1003fcf3ce44SJohn Forte 1004fcf3ce44SJohn Forte 1005fcf3ce44SJohn Forte /* FC world wide names */ 1006291a2b48SSukumar Swaminathan NAME_TYPE wwnn; 1007291a2b48SSukumar Swaminathan NAME_TYPE wwpn; 1008291a2b48SSukumar Swaminathan char snn[256]; 1009291a2b48SSukumar Swaminathan char spn[256]; 1010fcf3ce44SJohn Forte 1011fcf3ce44SJohn Forte /* Common service paramters */ 1012291a2b48SSukumar Swaminathan SERV_PARM sparam; 1013291a2b48SSukumar Swaminathan SERV_PARM fabric_sparam; 1014fcf3ce44SJohn Forte 1015fcf3ce44SJohn Forte /* fc_id management */ 1016291a2b48SSukumar Swaminathan uint32_t did; 1017291a2b48SSukumar Swaminathan uint32_t prev_did; 1018fcf3ce44SJohn Forte 1019*82527734SSukumar Swaminathan /* support FC_PORT_GET_P2P_INFO only */ 1020*82527734SSukumar Swaminathan uint32_t rdid; 1021*82527734SSukumar Swaminathan 1022fcf3ce44SJohn Forte /* FC_AL management */ 1023291a2b48SSukumar Swaminathan uint8_t lip_type; 1024291a2b48SSukumar Swaminathan uint8_t alpa_map[128]; 1025fcf3ce44SJohn Forte 1026fcf3ce44SJohn Forte /* Node management */ 1027291a2b48SSukumar Swaminathan emlxs_node_t node_base; 1028291a2b48SSukumar Swaminathan uint32_t node_count; 1029291a2b48SSukumar Swaminathan krwlock_t node_rwlock; 1030291a2b48SSukumar Swaminathan emlxs_node_t *node_table[EMLXS_NUM_HASH_QUES]; 1031fcf3ce44SJohn Forte 1032fcf3ce44SJohn Forte /* Polled packet management */ 1033291a2b48SSukumar Swaminathan kcondvar_t pkt_lock_cv; /* pkt polling */ 1034291a2b48SSukumar Swaminathan kmutex_t pkt_lock; /* pkt polling */ 1035fcf3ce44SJohn Forte 1036fcf3ce44SJohn Forte /* ULP */ 1037291a2b48SSukumar Swaminathan uint32_t ulp_statec; 1038291a2b48SSukumar Swaminathan void (*ulp_statec_cb) (); /* Port state change */ 1039291a2b48SSukumar Swaminathan /* callback routine */ 1040291a2b48SSukumar Swaminathan void (*ulp_unsol_cb) (); /* unsolicited event */ 1041291a2b48SSukumar Swaminathan /* callback routine */ 1042291a2b48SSukumar Swaminathan opaque_t ulp_handle; 1043fcf3ce44SJohn Forte 1044fcf3ce44SJohn Forte /* ULP unsolicited buffers */ 1045291a2b48SSukumar Swaminathan kmutex_t ub_lock; 1046291a2b48SSukumar Swaminathan uint32_t ub_count; 1047291a2b48SSukumar Swaminathan emlxs_unsol_buf_t *ub_pool; 1048*82527734SSukumar Swaminathan uint32_t ub_post[MAX_CHANNEL]; 1049291a2b48SSukumar Swaminathan uint32_t ub_timer; 1050fcf3ce44SJohn Forte 1051291a2b48SSukumar Swaminathan emlxs_ub_priv_t *ub_wait_head; /* Unsolicited IO received */ 1052291a2b48SSukumar Swaminathan /* before link up */ 1053291a2b48SSukumar Swaminathan emlxs_ub_priv_t *ub_wait_tail; /* Unsolicited IO received */ 1054291a2b48SSukumar Swaminathan /* before link up */ 1055fcf3ce44SJohn Forte 1056fcf3ce44SJohn Forte 1057fcf3ce44SJohn Forte #ifdef DHCHAP_SUPPORT 1058291a2b48SSukumar Swaminathan emlxs_port_dhc_t port_dhc; 1059fcf3ce44SJohn Forte #endif /* DHCHAP_SUPPORT */ 1060fcf3ce44SJohn Forte 1061291a2b48SSukumar Swaminathan uint16_t ini_mode; 1062291a2b48SSukumar Swaminathan uint16_t tgt_mode; 1063fcf3ce44SJohn Forte 1064fcf3ce44SJohn Forte #ifdef SFCT_SUPPORT 1065fcf3ce44SJohn Forte 1066fcf3ce44SJohn Forte #define FCT_BUF_COUNT_512 256 1067fcf3ce44SJohn Forte #define FCT_BUF_COUNT_8K 128 1068fcf3ce44SJohn Forte #define FCT_BUF_COUNT_64K 64 1069fcf3ce44SJohn Forte #define FCT_BUF_COUNT_128K 64 1070fcf3ce44SJohn Forte #define FCT_MAX_BUCKETS 16 1071291a2b48SSukumar Swaminathan #define FCT_DMEM_MAX_BUF_SIZE 131072 /* 128K */ 1072291a2b48SSukumar Swaminathan #define FCT_DMEM_MAX_BUF_SEGMENT 8388608 /* 8M */ 1073fcf3ce44SJohn Forte 1074fcf3ce44SJohn Forte struct emlxs_fct_dmem_bucket dmem_bucket[FCT_MAX_BUCKETS]; 1075291a2b48SSukumar Swaminathan int fct_queue_depth; 1076291a2b48SSukumar Swaminathan #define EMLXS_FCT_DFLT_QDEPTH 64 1077fcf3ce44SJohn Forte 1078291a2b48SSukumar Swaminathan char cfd_name[24]; 1079291a2b48SSukumar Swaminathan stmf_port_provider_t *port_provider; 1080291a2b48SSukumar Swaminathan fct_local_port_t *fct_port; 1081291a2b48SSukumar Swaminathan uint32_t fct_flags; 1082fcf3ce44SJohn Forte 1083fcf3ce44SJohn Forte #define FCT_STATE_PORT_ONLINE 0x00000001 1084fcf3ce44SJohn Forte #define FCT_STATE_NOT_ACKED 0x00000002 1085fcf3ce44SJohn Forte #define FCT_STATE_LINK_UP 0x00000010 1086fcf3ce44SJohn Forte 1087291a2b48SSukumar Swaminathan emlxs_tgtport_stat_t fct_stat; 1088291a2b48SSukumar Swaminathan 1089291a2b48SSukumar Swaminathan /* Used to save fct_cmd for deferred unsol ELS commands, except FLOGI */ 1090291a2b48SSukumar Swaminathan emlxs_buf_t *fct_wait_head; 1091291a2b48SSukumar Swaminathan emlxs_buf_t *fct_wait_tail; 1092291a2b48SSukumar Swaminathan 1093291a2b48SSukumar Swaminathan /* Used to save context for deferred unsol FLOGIs */ 1094291a2b48SSukumar Swaminathan fct_flogi_xchg_t fx; 1095291a2b48SSukumar Swaminathan uint32_t fx_context; 1096291a2b48SSukumar Swaminathan #ifdef FCT_IO_TRACE 1097291a2b48SSukumar Swaminathan emlxs_iotrace_t *iotrace; 1098291a2b48SSukumar Swaminathan uint16_t iotrace_cnt; 1099291a2b48SSukumar Swaminathan uint16_t iotrace_index; 1100291a2b48SSukumar Swaminathan kmutex_t iotrace_mtx; 1101291a2b48SSukumar Swaminathan #endif /* FCT_IO_TRACE */ 1102291a2b48SSukumar Swaminathan 1103291a2b48SSukumar Swaminathan #endif /* SFCT_SUPPORT */ 1104291a2b48SSukumar Swaminathan 1105291a2b48SSukumar Swaminathan #ifdef SAN_DIAG_SUPPORT 1106291a2b48SSukumar Swaminathan uint8_t sd_io_latency_state; 1107291a2b48SSukumar Swaminathan #define SD_INVALID 0x00 1108291a2b48SSukumar Swaminathan #define SD_COLLECTING 0x01 1109291a2b48SSukumar Swaminathan #define SD_STOPPED 0x02 1110291a2b48SSukumar Swaminathan 1111291a2b48SSukumar Swaminathan /* SD event management list */ 1112*82527734SSukumar Swaminathan uint32_t sd_event_mask; /* bit-mask */ 1113291a2b48SSukumar Swaminathan emlxs_dfc_event_t sd_events[MAX_DFC_EVENTS]; 1114291a2b48SSukumar Swaminathan #endif 1115*82527734SSukumar Swaminathan /* Used for SLI4 */ 1116*82527734SSukumar Swaminathan uint16_t outstandingRPIs; 1117*82527734SSukumar Swaminathan struct VFIobject *VFIp; 1118fcf3ce44SJohn Forte } emlxs_port_t; 1119fcf3ce44SJohn Forte 1120fcf3ce44SJohn Forte 1121fcf3ce44SJohn Forte 1122fcf3ce44SJohn Forte /* Host Attn reg */ 1123*82527734SSukumar Swaminathan #define FC_HA_REG(_hba) ((volatile uint32_t *) \ 1124*82527734SSukumar Swaminathan ((_hba)->sli.sli3.ha_reg_addr)) 1125fcf3ce44SJohn Forte 1126fcf3ce44SJohn Forte /* Chip Attn reg */ 1127*82527734SSukumar Swaminathan #define FC_CA_REG(_hba) ((volatile uint32_t *) \ 1128*82527734SSukumar Swaminathan ((_hba)->sli.sli3.ca_reg_addr)) 1129fcf3ce44SJohn Forte 1130fcf3ce44SJohn Forte /* Host Status reg */ 1131*82527734SSukumar Swaminathan #define FC_HS_REG(_hba) ((volatile uint32_t *) \ 1132*82527734SSukumar Swaminathan ((_hba)->sli.sli3.hs_reg_addr)) 1133fcf3ce44SJohn Forte 1134fcf3ce44SJohn Forte /* Host Cntl reg */ 1135*82527734SSukumar Swaminathan #define FC_HC_REG(_hba) ((volatile uint32_t *) \ 1136*82527734SSukumar Swaminathan ((_hba)->sli.sli3.hc_reg_addr)) 1137fcf3ce44SJohn Forte 1138fcf3ce44SJohn Forte /* BIU Configuration reg */ 1139*82527734SSukumar Swaminathan #define FC_BC_REG(_hba) ((volatile uint32_t *) \ 1140*82527734SSukumar Swaminathan ((_hba)->sli.sli3.bc_reg_addr)) 1141fcf3ce44SJohn Forte 1142fcf3ce44SJohn Forte /* Used by SBUS adapter */ 1143fcf3ce44SJohn Forte /* TITAN Cntl reg */ 1144*82527734SSukumar Swaminathan #define FC_SHC_REG(_hba) ((volatile uint32_t *) \ 1145*82527734SSukumar Swaminathan ((_hba)->sli.sli3.shc_reg_addr)) 1146fcf3ce44SJohn Forte 1147fcf3ce44SJohn Forte /* TITAN Status reg */ 1148*82527734SSukumar Swaminathan #define FC_SHS_REG(_hba) ((volatile uint32_t *) \ 1149*82527734SSukumar Swaminathan ((_hba)->sli.sli3.shs_reg_addr)) 1150fcf3ce44SJohn Forte 1151fcf3ce44SJohn Forte /* TITAN Update reg */ 1152*82527734SSukumar Swaminathan #define FC_SHU_REG(_hba) ((volatile uint32_t *) \ 1153*82527734SSukumar Swaminathan ((_hba)->sli.sli3.shu_reg_addr)) 1154*82527734SSukumar Swaminathan 1155*82527734SSukumar Swaminathan /* MPU Semaphore reg */ 1156*82527734SSukumar Swaminathan #define FC_SEMA_REG(_hba) ((volatile uint32_t *)\ 1157*82527734SSukumar Swaminathan ((_hba)->sli.sli4.MPUEPSemaphore_reg_addr)) 1158*82527734SSukumar Swaminathan 1159*82527734SSukumar Swaminathan /* Bootstrap Mailbox Doorbell reg */ 1160*82527734SSukumar Swaminathan #define FC_MBDB_REG(_hba) ((volatile uint32_t *) \ 1161*82527734SSukumar Swaminathan ((_hba)->sli.sli4.MBDB_reg_addr)) 1162*82527734SSukumar Swaminathan 1163*82527734SSukumar Swaminathan /* MQ Doorbell reg */ 1164*82527734SSukumar Swaminathan #define FC_MQDB_REG(_hba) ((volatile uint32_t *) \ 1165*82527734SSukumar Swaminathan ((_hba)->sli.sli4.MQDB_reg_addr)) 1166fcf3ce44SJohn Forte 1167*82527734SSukumar Swaminathan /* CQ Doorbell reg */ 1168*82527734SSukumar Swaminathan #define FC_CQDB_REG(_hba) ((volatile uint32_t *) \ 1169*82527734SSukumar Swaminathan ((_hba)->sli.sli4.CQDB_reg_addr)) 1170fcf3ce44SJohn Forte 1171*82527734SSukumar Swaminathan /* WQ Doorbell reg */ 1172*82527734SSukumar Swaminathan #define FC_WQDB_REG(_hba) ((volatile uint32_t *) \ 1173*82527734SSukumar Swaminathan ((_hba)->sli.sli4.WQDB_reg_addr)) 1174fcf3ce44SJohn Forte 1175*82527734SSukumar Swaminathan /* RQ Doorbell reg */ 1176*82527734SSukumar Swaminathan #define FC_RQDB_REG(_hba) ((volatile uint32_t *) \ 1177*82527734SSukumar Swaminathan ((_hba)->sli.sli4.RQDB_reg_addr)) 1178*82527734SSukumar Swaminathan 1179*82527734SSukumar Swaminathan 1180*82527734SSukumar Swaminathan #define FC_SLIM2_MAILBOX(_hba) ((MAILBOX *)(_hba)->sli.sli3.slim2.virt) 1181*82527734SSukumar Swaminathan 1182*82527734SSukumar Swaminathan #define FC_SLIM1_MAILBOX(_hba) ((MAILBOX *)(_hba)->sli.sli3.slim_addr) 1183fcf3ce44SJohn Forte 1184fcf3ce44SJohn Forte #define FC_MAILBOX(_hba) (((_hba)->flag & FC_SLIM2_MODE) ? \ 1185291a2b48SSukumar Swaminathan FC_SLIM2_MAILBOX(_hba) : FC_SLIM1_MAILBOX(_hba)) 1186291a2b48SSukumar Swaminathan 1187291a2b48SSukumar Swaminathan #define WRITE_CSR_REG(_hba, _regp, _value) ddi_put32(\ 1188*82527734SSukumar Swaminathan (_hba)->sli.sli3.csr_acc_handle, (uint32_t *)(_regp), \ 1189*82527734SSukumar Swaminathan (uint32_t)(_value)) 1190291a2b48SSukumar Swaminathan 1191291a2b48SSukumar Swaminathan #define READ_CSR_REG(_hba, _regp) ddi_get32(\ 1192*82527734SSukumar Swaminathan (_hba)->sli.sli3.csr_acc_handle, (uint32_t *)(_regp)) 1193291a2b48SSukumar Swaminathan 1194291a2b48SSukumar Swaminathan #define WRITE_SLIM_ADDR(_hba, _regp, _value) ddi_put32(\ 1195*82527734SSukumar Swaminathan (_hba)->sli.sli3.slim_acc_handle, (uint32_t *)(_regp), \ 1196*82527734SSukumar Swaminathan (uint32_t)(_value)) 1197291a2b48SSukumar Swaminathan 1198291a2b48SSukumar Swaminathan #define READ_SLIM_ADDR(_hba, _regp) ddi_get32(\ 1199*82527734SSukumar Swaminathan (_hba)->sli.sli3.slim_acc_handle, (uint32_t *)(_regp)) 1200291a2b48SSukumar Swaminathan 1201291a2b48SSukumar Swaminathan #define WRITE_SLIM_COPY(_hba, _bufp, _slimp, _wcnt) ddi_rep_put32(\ 1202*82527734SSukumar Swaminathan (_hba)->sli.sli3.slim_acc_handle, (uint32_t *)(_bufp), \ 1203*82527734SSukumar Swaminathan (uint32_t *)(_slimp), (_wcnt), DDI_DEV_AUTOINCR) 1204291a2b48SSukumar Swaminathan 1205291a2b48SSukumar Swaminathan #define READ_SLIM_COPY(_hba, _bufp, _slimp, _wcnt) ddi_rep_get32(\ 1206*82527734SSukumar Swaminathan (_hba)->sli.sli3.slim_acc_handle, (uint32_t *)(_bufp), \ 1207*82527734SSukumar Swaminathan (uint32_t *)(_slimp), (_wcnt), DDI_DEV_AUTOINCR) 1208fcf3ce44SJohn Forte 1209fcf3ce44SJohn Forte /* Used by SBUS adapter */ 1210291a2b48SSukumar Swaminathan #define WRITE_SBUS_CSR_REG(_hba, _regp, _value) ddi_put32(\ 1211*82527734SSukumar Swaminathan (_hba)->sli.sli3.sbus_csr_handle, (uint32_t *)(_regp), \ 1212*82527734SSukumar Swaminathan (uint32_t)(_value)) 1213291a2b48SSukumar Swaminathan 1214291a2b48SSukumar Swaminathan #define READ_SBUS_CSR_REG(_hba, _regp) ddi_get32(\ 1215*82527734SSukumar Swaminathan (_hba)->sli.sli3.sbus_csr_handle, (uint32_t *)(_regp)) 1216291a2b48SSukumar Swaminathan 1217291a2b48SSukumar Swaminathan #define SBUS_WRITE_FLASH_COPY(_hba, _offset, _value) ddi_put8(\ 1218*82527734SSukumar Swaminathan (_hba)->sli.sli3.sbus_flash_acc_handle, \ 1219*82527734SSukumar Swaminathan (uint8_t *)((volatile uint8_t *)(_hba)->sli.sli3.sbus_flash_addr + \ 1220*82527734SSukumar Swaminathan (_offset)), (uint8_t)(_value)) 1221fcf3ce44SJohn Forte 1222291a2b48SSukumar Swaminathan #define SBUS_READ_FLASH_COPY(_hba, _offset) ddi_get8(\ 1223*82527734SSukumar Swaminathan (_hba)->sli.sli3.sbus_flash_acc_handle, \ 1224*82527734SSukumar Swaminathan (uint8_t *)((volatile uint8_t *)(_hba)->sli.sli3.sbus_flash_addr + \ 1225*82527734SSukumar Swaminathan (_offset))) 1226*82527734SSukumar Swaminathan 1227*82527734SSukumar Swaminathan /* SLI4 registers */ 1228*82527734SSukumar Swaminathan #define WRITE_BAR1_REG(_hba, _regp, _value) ddi_put32(\ 1229*82527734SSukumar Swaminathan (_hba)->sli.sli4.bar1_acc_handle, (uint32_t *)(_regp), \ 1230*82527734SSukumar Swaminathan (uint32_t)(_value)) 1231*82527734SSukumar Swaminathan 1232*82527734SSukumar Swaminathan #define READ_BAR1_REG(_hba, _regp) ddi_get32(\ 1233*82527734SSukumar Swaminathan (_hba)->sli.sli4.bar1_acc_handle, (uint32_t *)(_regp)) 1234*82527734SSukumar Swaminathan 1235*82527734SSukumar Swaminathan #define WRITE_BAR2_REG(_hba, _regp, _value) ddi_put32(\ 1236*82527734SSukumar Swaminathan (_hba)->sli.sli4.bar2_acc_handle, (uint32_t *)(_regp), \ 1237*82527734SSukumar Swaminathan (uint32_t)(_value)) 1238fcf3ce44SJohn Forte 1239*82527734SSukumar Swaminathan #define READ_BAR2_REG(_hba, _regp) ddi_get32(\ 1240*82527734SSukumar Swaminathan (_hba)->sli.sli4.bar2_acc_handle, (uint32_t *)(_regp)) 1241*82527734SSukumar Swaminathan 1242*82527734SSukumar Swaminathan 1243*82527734SSukumar Swaminathan #define EMLXS_STATE_CHANGE(_hba, _state)\ 1244fcf3ce44SJohn Forte { \ 1245fcf3ce44SJohn Forte mutex_enter(&EMLXS_PORT_LOCK); \ 1246*82527734SSukumar Swaminathan EMLXS_STATE_CHANGE_LOCKED((_hba), (_state)); \ 1247fcf3ce44SJohn Forte mutex_exit(&EMLXS_PORT_LOCK); \ 1248fcf3ce44SJohn Forte } 1249fcf3ce44SJohn Forte 1250fcf3ce44SJohn Forte /* Used when EMLXS_PORT_LOCK is already held */ 1251*82527734SSukumar Swaminathan #define EMLXS_STATE_CHANGE_LOCKED(_hba, _state) \ 1252fcf3ce44SJohn Forte { \ 1253fcf3ce44SJohn Forte if ((_hba)->state != (_state)) \ 1254fcf3ce44SJohn Forte { \ 1255fcf3ce44SJohn Forte uint32_t _st = _state; \ 1256fcf3ce44SJohn Forte EMLXS_MSGF(EMLXS_CONTEXT, \ 1257fcf3ce44SJohn Forte &emlxs_state_msg, "%s --> %s", \ 1258fcf3ce44SJohn Forte emlxs_ffstate_xlate((_hba)->state), \ 1259fcf3ce44SJohn Forte emlxs_ffstate_xlate(_state)); \ 1260*82527734SSukumar Swaminathan (_hba)->state = (_state); \ 1261*82527734SSukumar Swaminathan if ((_st) == FC_ERROR) \ 1262fcf3ce44SJohn Forte { \ 1263fcf3ce44SJohn Forte (_hba)->flag |= FC_HARDWARE_ERROR; \ 1264fcf3ce44SJohn Forte } \ 1265fcf3ce44SJohn Forte } \ 1266fcf3ce44SJohn Forte } 1267fcf3ce44SJohn Forte 1268*82527734SSukumar Swaminathan #ifdef FMA_SUPPORT 1269*82527734SSukumar Swaminathan #define EMLXS_CHK_ACC_HANDLE(_hba, _acc) \ 1270*82527734SSukumar Swaminathan if (emlxs_fm_check_acc_handle(_hba, _acc) != DDI_FM_OK) { \ 1271*82527734SSukumar Swaminathan EMLXS_MSGF(EMLXS_CONTEXT, \ 1272*82527734SSukumar Swaminathan &emlxs_invalid_access_handle_msg, NULL); \ 1273*82527734SSukumar Swaminathan } 1274*82527734SSukumar Swaminathan #endif /* FMA_SUPPORT */ 1275*82527734SSukumar Swaminathan 1276fcf3ce44SJohn Forte /* 1277fcf3ce44SJohn Forte * This is the HBA control area for the adapter 1278fcf3ce44SJohn Forte */ 1279fcf3ce44SJohn Forte 1280fcf3ce44SJohn Forte #ifdef MODSYM_SUPPORT 1281fcf3ce44SJohn Forte 1282291a2b48SSukumar Swaminathan typedef struct emlxs_modsym 1283291a2b48SSukumar Swaminathan { 1284291a2b48SSukumar Swaminathan ddi_modhandle_t mod_fctl; /* For Leadville */ 1285fcf3ce44SJohn Forte 1286fcf3ce44SJohn Forte /* Leadville (fctl) */ 1287291a2b48SSukumar Swaminathan int (*fc_fca_attach)(dev_info_t *, fc_fca_tran_t *); 1288291a2b48SSukumar Swaminathan int (*fc_fca_detach)(dev_info_t *); 1289291a2b48SSukumar Swaminathan int (*fc_fca_init)(struct dev_ops *); 1290fcf3ce44SJohn Forte 1291fcf3ce44SJohn Forte #ifdef SFCT_SUPPORT 1292*82527734SSukumar Swaminathan uint32_t fct_modopen; 1293*82527734SSukumar Swaminathan uint32_t reserved; /* Padding for alignment */ 1294*82527734SSukumar Swaminathan 1295291a2b48SSukumar Swaminathan ddi_modhandle_t mod_fct; /* For Comstar */ 1296291a2b48SSukumar Swaminathan ddi_modhandle_t mod_stmf; /* For Comstar */ 1297fcf3ce44SJohn Forte 1298fcf3ce44SJohn Forte /* Comstar (fct) */ 1299291a2b48SSukumar Swaminathan void* (*fct_alloc)(fct_struct_id_t, int, int); 1300291a2b48SSukumar Swaminathan void (*fct_free)(void *); 1301291a2b48SSukumar Swaminathan void* (*fct_scsi_task_alloc)(void *, uint16_t, uint32_t, uint8_t *, 1302291a2b48SSukumar Swaminathan uint16_t, uint16_t); 1303291a2b48SSukumar Swaminathan int (*fct_register_local_port)(fct_local_port_t *); 1304291a2b48SSukumar Swaminathan void (*fct_deregister_local_port)(fct_local_port_t *); 1305291a2b48SSukumar Swaminathan void (*fct_handle_event)(fct_local_port_t *, int, uint32_t, caddr_t); 1306291a2b48SSukumar Swaminathan void (*fct_post_rcvd_cmd)(fct_cmd_t *, stmf_data_buf_t *); 1307291a2b48SSukumar Swaminathan void (*fct_ctl)(void *, int, void *); 1308291a2b48SSukumar Swaminathan void (*fct_queue_cmd_for_termination)(fct_cmd_t *, fct_status_t); 1309291a2b48SSukumar Swaminathan void (*fct_send_response_done)(fct_cmd_t *, fct_status_t, uint32_t); 1310291a2b48SSukumar Swaminathan void (*fct_send_cmd_done)(fct_cmd_t *, fct_status_t, uint32_t); 1311291a2b48SSukumar Swaminathan void (*fct_scsi_data_xfer_done)(fct_cmd_t *, stmf_data_buf_t *, 1312291a2b48SSukumar Swaminathan uint32_t); 1313291a2b48SSukumar Swaminathan fct_status_t (*fct_port_shutdown) 1314291a2b48SSukumar Swaminathan (fct_local_port_t *, uint32_t, char *); 1315291a2b48SSukumar Swaminathan fct_status_t (*fct_port_initialize) 1316291a2b48SSukumar Swaminathan (fct_local_port_t *, uint32_t, char *); 1317291a2b48SSukumar Swaminathan void (*fct_cmd_fca_aborted) 1318291a2b48SSukumar Swaminathan (fct_cmd_t *, fct_status_t, int); 1319291a2b48SSukumar Swaminathan fct_status_t (*fct_handle_rcvd_flogi) 1320291a2b48SSukumar Swaminathan (fct_local_port_t *, fct_flogi_xchg_t *); 1321fcf3ce44SJohn Forte 1322fcf3ce44SJohn Forte /* Comstar (stmf) */ 1323291a2b48SSukumar Swaminathan void* (*stmf_alloc)(stmf_struct_id_t, int, int); 1324291a2b48SSukumar Swaminathan void (*stmf_free)(void *); 1325291a2b48SSukumar Swaminathan void (*stmf_deregister_port_provider) (stmf_port_provider_t *); 1326291a2b48SSukumar Swaminathan int (*stmf_register_port_provider) (stmf_port_provider_t *); 1327291a2b48SSukumar Swaminathan #endif /* SFCT_SUPPORT */ 1328fcf3ce44SJohn Forte } emlxs_modsym_t; 1329fcf3ce44SJohn Forte extern emlxs_modsym_t emlxs_modsym; 1330fcf3ce44SJohn Forte 1331291a2b48SSukumar Swaminathan #define MODSYM(_f) emlxs_modsym._f 1332fcf3ce44SJohn Forte 1333fcf3ce44SJohn Forte #else 1334fcf3ce44SJohn Forte 1335291a2b48SSukumar Swaminathan #define MODSYM(_f) _f 1336fcf3ce44SJohn Forte 1337291a2b48SSukumar Swaminathan #endif /* MODSYM_SUPPORT */ 1338fcf3ce44SJohn Forte 1339fcf3ce44SJohn Forte 1340fcf3ce44SJohn Forte 1341*82527734SSukumar Swaminathan /* defines for resource state */ 1342*82527734SSukumar Swaminathan #define RESOURCE_FREE 0 1343*82527734SSukumar Swaminathan #define RESOURCE_ALLOCATED 1 1344*82527734SSukumar Swaminathan 1345*82527734SSukumar Swaminathan #define RESOURCE_FCFI_REG 2 1346*82527734SSukumar Swaminathan #define RESOURCE_FCFI_DISC 4 1347*82527734SSukumar Swaminathan #define RESOURCE_FCFI_VLAN_ID 8 1348*82527734SSukumar Swaminathan 1349*82527734SSukumar Swaminathan #define RESOURCE_VFI_REG 2 1350*82527734SSukumar Swaminathan 1351*82527734SSukumar Swaminathan #define RESOURCE_RPI_PAUSED 2 1352*82527734SSukumar Swaminathan 1353*82527734SSukumar Swaminathan #define RESOURCE_XRI_RESERVED 2 1354*82527734SSukumar Swaminathan #define RESOURCE_XRI_PENDING_IO 4 1355*82527734SSukumar Swaminathan #define RESOURCE_XRI_ABORT_INP 8 1356*82527734SSukumar Swaminathan 1357*82527734SSukumar Swaminathan typedef struct VFIobject 1358*82527734SSukumar Swaminathan { 1359*82527734SSukumar Swaminathan uint16_t index; 1360*82527734SSukumar Swaminathan uint16_t VFI; 1361*82527734SSukumar Swaminathan uint16_t state; 1362*82527734SSukumar Swaminathan uint16_t outstandingVPIs; 1363*82527734SSukumar Swaminathan struct FCFIobject *FCFIp; 1364*82527734SSukumar Swaminathan } VFIobj_t; 1365*82527734SSukumar Swaminathan 1366*82527734SSukumar Swaminathan typedef struct RPIobject 1367*82527734SSukumar Swaminathan { 1368*82527734SSukumar Swaminathan uint16_t index; 1369*82527734SSukumar Swaminathan uint16_t RPI; 1370*82527734SSukumar Swaminathan uint16_t state; 1371*82527734SSukumar Swaminathan uint16_t outstandingXRIs; 1372*82527734SSukumar Swaminathan emlxs_port_t *VPIp; 1373*82527734SSukumar Swaminathan uint32_t did; 1374*82527734SSukumar Swaminathan emlxs_node_t *node; 1375*82527734SSukumar Swaminathan } RPIobj_t; 1376*82527734SSukumar Swaminathan 1377*82527734SSukumar Swaminathan typedef struct XRIobject 1378*82527734SSukumar Swaminathan { 1379*82527734SSukumar Swaminathan struct XRIobject *_f; 1380*82527734SSukumar Swaminathan struct XRIobject *_b; 1381*82527734SSukumar Swaminathan uint16_t XRI; 1382*82527734SSukumar Swaminathan uint16_t state; 1383*82527734SSukumar Swaminathan uint16_t sge_count; 1384*82527734SSukumar Swaminathan uint16_t iotag; 1385*82527734SSukumar Swaminathan MBUF_INFO SGList; 1386*82527734SSukumar Swaminathan RPIobj_t *RPIp; 1387*82527734SSukumar Swaminathan emlxs_buf_t *sbp; 1388*82527734SSukumar Swaminathan uint32_t rx_id; /* Used for unsol exchanges */ 1389*82527734SSukumar Swaminathan } XRIobj_t; 1390*82527734SSukumar Swaminathan 1391*82527734SSukumar Swaminathan typedef struct FCFIobject 1392*82527734SSukumar Swaminathan { 1393*82527734SSukumar Swaminathan uint16_t index; 1394*82527734SSukumar Swaminathan uint16_t FCFI; 1395*82527734SSukumar Swaminathan uint16_t FCF_index; 1396*82527734SSukumar Swaminathan uint16_t state; 1397*82527734SSukumar Swaminathan uint16_t outstandingVFIs; 1398*82527734SSukumar Swaminathan uint16_t vlan_id; 1399*82527734SSukumar Swaminathan uint32_t EventTag; 1400*82527734SSukumar Swaminathan struct VFIobject *fcf_vfi; 1401*82527734SSukumar Swaminathan emlxs_port_t *fcf_vpi; 1402*82527734SSukumar Swaminathan struct RPIobject scratch_rpi; 1403*82527734SSukumar Swaminathan SERV_PARM fcf_sparam; 1404*82527734SSukumar Swaminathan FCF_RECORD_t fcf_rec; 1405*82527734SSukumar Swaminathan } FCFIobj_t; 1406*82527734SSukumar Swaminathan 1407*82527734SSukumar Swaminathan typedef struct RPIHdrTmplate 1408*82527734SSukumar Swaminathan { 1409*82527734SSukumar Swaminathan uint32_t Word[16]; /* 64 bytes */ 1410*82527734SSukumar Swaminathan } RPIHdrTmplate_t; 1411*82527734SSukumar Swaminathan 1412*82527734SSukumar Swaminathan typedef struct EQ_DESC 1413*82527734SSukumar Swaminathan { 1414*82527734SSukumar Swaminathan uint16_t host_index; 1415*82527734SSukumar Swaminathan uint16_t max_index; 1416*82527734SSukumar Swaminathan uint16_t qid; 1417*82527734SSukumar Swaminathan uint16_t msix_vector; 1418*82527734SSukumar Swaminathan kmutex_t lastwq_lock; 1419*82527734SSukumar Swaminathan uint16_t lastwq; 1420*82527734SSukumar Swaminathan MBUF_INFO addr; 1421*82527734SSukumar Swaminathan } EQ_DESC_t; 1422*82527734SSukumar Swaminathan 1423*82527734SSukumar Swaminathan typedef struct CQ_DESC 1424*82527734SSukumar Swaminathan { 1425*82527734SSukumar Swaminathan uint16_t host_index; 1426*82527734SSukumar Swaminathan uint16_t max_index; 1427*82527734SSukumar Swaminathan uint16_t qid; 1428*82527734SSukumar Swaminathan uint16_t eqid; 1429*82527734SSukumar Swaminathan uint16_t type; 1430*82527734SSukumar Swaminathan #define EMLXS_CQ_TYPE_GROUP1 1 /* associated with a MQ and async events */ 1431*82527734SSukumar Swaminathan #define EMLXS_CQ_TYPE_GROUP2 2 /* associated with a WQ and RQ */ 1432*82527734SSukumar Swaminathan uint16_t rsvd; 1433*82527734SSukumar Swaminathan 1434*82527734SSukumar Swaminathan MBUF_INFO addr; 1435*82527734SSukumar Swaminathan CHANNEL *channelp; /* ptr to CHANNEL associated with CQ */ 1436*82527734SSukumar Swaminathan 1437*82527734SSukumar Swaminathan } CQ_DESC_t; 1438*82527734SSukumar Swaminathan 1439*82527734SSukumar Swaminathan typedef struct WQ_DESC 1440*82527734SSukumar Swaminathan { 1441*82527734SSukumar Swaminathan uint16_t host_index; 1442*82527734SSukumar Swaminathan uint16_t max_index; 1443*82527734SSukumar Swaminathan uint16_t port_index; 1444*82527734SSukumar Swaminathan uint16_t release_depth; 1445*82527734SSukumar Swaminathan #define WQE_RELEASE_DEPTH (8 * EMLXS_NUM_WQ_PAGES) 1446*82527734SSukumar Swaminathan uint16_t qid; 1447*82527734SSukumar Swaminathan uint16_t cqid; 1448*82527734SSukumar Swaminathan MBUF_INFO addr; 1449*82527734SSukumar Swaminathan } WQ_DESC_t; 1450*82527734SSukumar Swaminathan 1451*82527734SSukumar Swaminathan typedef struct RQ_DESC 1452*82527734SSukumar Swaminathan { 1453*82527734SSukumar Swaminathan uint16_t host_index; 1454*82527734SSukumar Swaminathan uint16_t max_index; 1455*82527734SSukumar Swaminathan uint16_t qid; 1456*82527734SSukumar Swaminathan uint16_t cqid; 1457*82527734SSukumar Swaminathan 1458*82527734SSukumar Swaminathan MBUF_INFO addr; 1459*82527734SSukumar Swaminathan MEMSEG rqb_pool; 1460*82527734SSukumar Swaminathan MATCHMAP *rqb[RQ_DEPTH]; 1461*82527734SSukumar Swaminathan 1462*82527734SSukumar Swaminathan kmutex_t lock; 1463*82527734SSukumar Swaminathan 1464*82527734SSukumar Swaminathan } RQ_DESC_t; 1465*82527734SSukumar Swaminathan 1466*82527734SSukumar Swaminathan 1467*82527734SSukumar Swaminathan typedef struct RXQ_DESC 1468*82527734SSukumar Swaminathan { 1469*82527734SSukumar Swaminathan kmutex_t lock; 1470*82527734SSukumar Swaminathan emlxs_queue_t active; 1471*82527734SSukumar Swaminathan 1472*82527734SSukumar Swaminathan } RXQ_DESC_t; 1473*82527734SSukumar Swaminathan 1474*82527734SSukumar Swaminathan 1475*82527734SSukumar Swaminathan typedef struct MQ_DESC 1476*82527734SSukumar Swaminathan { 1477*82527734SSukumar Swaminathan uint16_t host_index; 1478*82527734SSukumar Swaminathan uint16_t max_index; 1479*82527734SSukumar Swaminathan uint16_t qid; 1480*82527734SSukumar Swaminathan uint16_t cqid; 1481*82527734SSukumar Swaminathan MBUF_INFO addr; 1482*82527734SSukumar Swaminathan } MQ_DESC_t; 1483*82527734SSukumar Swaminathan 1484*82527734SSukumar Swaminathan /* Define the number of queues the driver will be using */ 1485*82527734SSukumar Swaminathan #define EMLXS_MAX_EQS EMLXS_MSI_MAX_INTRS 1486*82527734SSukumar Swaminathan #define EMLXS_MAX_WQS EMLXS_MSI_MAX_INTRS 1487*82527734SSukumar Swaminathan #define EMLXS_MAX_RQS 2 /* ONLY 1 pair is allowed */ 1488*82527734SSukumar Swaminathan #define EMLXS_MAX_MQS 1 1489*82527734SSukumar Swaminathan 1490*82527734SSukumar Swaminathan /* One CQ for each WQ & (RQ pair) plus one for the MQ */ 1491*82527734SSukumar Swaminathan #define EMLXS_MAX_CQS (EMLXS_MAX_WQS + (EMLXS_MAX_RQS/2) + 1) 1492*82527734SSukumar Swaminathan 1493*82527734SSukumar Swaminathan /* The First CQ created is ALWAYS for mbox / event handling */ 1494*82527734SSukumar Swaminathan #define EMLXS_CQ_MBOX 0 1495*82527734SSukumar Swaminathan 1496*82527734SSukumar Swaminathan /* The Second CQ created is ALWAYS for unsol rcv handling */ 1497*82527734SSukumar Swaminathan /* At this time we are allowing ONLY 1 pair of RQs */ 1498*82527734SSukumar Swaminathan #define EMLXS_CQ_RCV 1 1499*82527734SSukumar Swaminathan 1500*82527734SSukumar Swaminathan /* The remaining CQs are for WQ completions */ 1501*82527734SSukumar Swaminathan #define EMLXS_CQ_OFFSET_WQ 2 1502*82527734SSukumar Swaminathan 1503*82527734SSukumar Swaminathan 1504*82527734SSukumar Swaminathan /* FCFI RQ Configuration */ 1505*82527734SSukumar Swaminathan #define EMLXS_FCFI_RQ0_INDEX 0 1506*82527734SSukumar Swaminathan #define EMLXS_FCFI_RQ0_RMASK 0 /* match all */ 1507*82527734SSukumar Swaminathan #define EMLXS_FCFI_RQ0_RCTL 0 /* match all */ 1508*82527734SSukumar Swaminathan #define EMLXS_FCFI_RQ0_TMASK 0 /* match all */ 1509*82527734SSukumar Swaminathan #define EMLXS_FCFI_RQ0_TYPE 0 /* match all */ 1510*82527734SSukumar Swaminathan 1511*82527734SSukumar Swaminathan /* Define the maximum value for a Queue Id */ 1512*82527734SSukumar Swaminathan #define EMLXS_MAX_EQ_IDS 256 1513*82527734SSukumar Swaminathan #define EMLXS_MAX_CQ_IDS 1024 1514*82527734SSukumar Swaminathan #define EMLXS_MAX_WQ_IDS 1024 1515*82527734SSukumar Swaminathan #define EMLXS_MAX_RQ_IDS 4 1516*82527734SSukumar Swaminathan 1517*82527734SSukumar Swaminathan #define EMLXS_RXQ_ELS 0 1518*82527734SSukumar Swaminathan #define EMLXS_RXQ_CT 1 1519*82527734SSukumar Swaminathan #define EMLXS_MAX_RXQS 2 1520*82527734SSukumar Swaminathan 1521291a2b48SSukumar Swaminathan #define PCI_CONFIG_SIZE 0x80 1522fcf3ce44SJohn Forte 1523*82527734SSukumar Swaminathan typedef struct emlxs_sli3 1524*82527734SSukumar Swaminathan { 1525*82527734SSukumar Swaminathan /* SLIM management */ 1526*82527734SSukumar Swaminathan MATCHMAP slim2; 1527*82527734SSukumar Swaminathan 1528*82527734SSukumar Swaminathan /* HBQ management */ 1529*82527734SSukumar Swaminathan uint32_t hbq_count; /* Total number of HBQs */ 1530*82527734SSukumar Swaminathan /* configured */ 1531*82527734SSukumar Swaminathan HBQ_INIT_t hbq_table[EMLXS_NUM_HBQ]; 1532*82527734SSukumar Swaminathan 1533*82527734SSukumar Swaminathan /* Adapter memory management */ 1534*82527734SSukumar Swaminathan caddr_t csr_addr; 1535*82527734SSukumar Swaminathan caddr_t slim_addr; 1536*82527734SSukumar Swaminathan ddi_acc_handle_t csr_acc_handle; 1537*82527734SSukumar Swaminathan ddi_acc_handle_t slim_acc_handle; 1538*82527734SSukumar Swaminathan 1539*82527734SSukumar Swaminathan /* SBUS adapter management */ 1540*82527734SSukumar Swaminathan caddr_t sbus_flash_addr; /* Virt addr of R/W */ 1541*82527734SSukumar Swaminathan /* Flash */ 1542*82527734SSukumar Swaminathan caddr_t sbus_core_addr; /* Virt addr of TITAN */ 1543*82527734SSukumar Swaminathan /* CORE */ 1544*82527734SSukumar Swaminathan caddr_t sbus_csr_addr; /* Virt addr of TITAN */ 1545*82527734SSukumar Swaminathan /* CSR */ 1546*82527734SSukumar Swaminathan ddi_acc_handle_t sbus_flash_acc_handle; 1547*82527734SSukumar Swaminathan ddi_acc_handle_t sbus_core_acc_handle; 1548*82527734SSukumar Swaminathan ddi_acc_handle_t sbus_csr_handle; 1549*82527734SSukumar Swaminathan 1550*82527734SSukumar Swaminathan /* SLI 2/3 Adapter register management */ 1551*82527734SSukumar Swaminathan uint32_t *bc_reg_addr; /* virtual offset for BIU */ 1552*82527734SSukumar Swaminathan /* config reg */ 1553*82527734SSukumar Swaminathan uint32_t *ha_reg_addr; /* virtual offset for host */ 1554*82527734SSukumar Swaminathan /* attn reg */ 1555*82527734SSukumar Swaminathan uint32_t *hc_reg_addr; /* virtual offset for host */ 1556*82527734SSukumar Swaminathan /* ctl reg */ 1557*82527734SSukumar Swaminathan uint32_t *ca_reg_addr; /* virtual offset for FF */ 1558*82527734SSukumar Swaminathan /* attn reg */ 1559*82527734SSukumar Swaminathan uint32_t *hs_reg_addr; /* virtual offset for */ 1560*82527734SSukumar Swaminathan /* status reg */ 1561*82527734SSukumar Swaminathan uint32_t *shc_reg_addr; /* virtual offset for SBUS */ 1562*82527734SSukumar Swaminathan /* Ctrl reg */ 1563*82527734SSukumar Swaminathan uint32_t *shs_reg_addr; /* virtual offset for SBUS */ 1564*82527734SSukumar Swaminathan /* Status reg */ 1565*82527734SSukumar Swaminathan uint32_t *shu_reg_addr; /* virtual offset for SBUS */ 1566*82527734SSukumar Swaminathan /* Update reg */ 1567*82527734SSukumar Swaminathan uint16_t hgp_ring_offset; 1568*82527734SSukumar Swaminathan uint16_t hgp_hbq_offset; 1569*82527734SSukumar Swaminathan uint16_t iocb_cmd_size; 1570*82527734SSukumar Swaminathan uint16_t iocb_rsp_size; 1571*82527734SSukumar Swaminathan uint32_t hc_copy; /* local copy of HC register */ 1572*82527734SSukumar Swaminathan 1573*82527734SSukumar Swaminathan /* Ring management */ 1574*82527734SSukumar Swaminathan uint32_t ring_count; 1575*82527734SSukumar Swaminathan emlxs_ring_t ring[MAX_RINGS]; 1576*82527734SSukumar Swaminathan kmutex_t ring_cmd_lock[MAX_RINGS]; 1577*82527734SSukumar Swaminathan uint8_t ring_masks[4]; /* number of masks/rings used */ 1578*82527734SSukumar Swaminathan uint8_t ring_rval[6]; 1579*82527734SSukumar Swaminathan uint8_t ring_rmask[6]; 1580*82527734SSukumar Swaminathan uint8_t ring_tval[6]; 1581*82527734SSukumar Swaminathan uint8_t ring_tmask[6]; 1582*82527734SSukumar Swaminathan 1583*82527734SSukumar Swaminathan /* Protected by EMLXS_FCTAB_LOCK */ 1584*82527734SSukumar Swaminathan #ifdef EMLXS_SPARC 1585*82527734SSukumar Swaminathan MEMSEG fcp_bpl_seg; 1586*82527734SSukumar Swaminathan MATCHMAP **fcp_bpl_table; /* iotag table for */ 1587*82527734SSukumar Swaminathan /* bpl buffers */ 1588*82527734SSukumar Swaminathan #endif /* EMLXS_SPARC */ 1589*82527734SSukumar Swaminathan uint32_t mem_bpl_size; 1590*82527734SSukumar Swaminathan } emlxs_sli3_t; 1591*82527734SSukumar Swaminathan 1592*82527734SSukumar Swaminathan typedef struct emlxs_sli4 1593*82527734SSukumar Swaminathan { 1594*82527734SSukumar Swaminathan MATCHMAP bootstrapmb; 1595*82527734SSukumar Swaminathan caddr_t bar1_addr; 1596*82527734SSukumar Swaminathan caddr_t bar2_addr; 1597*82527734SSukumar Swaminathan ddi_acc_handle_t bar1_acc_handle; 1598*82527734SSukumar Swaminathan ddi_acc_handle_t bar2_acc_handle; 1599*82527734SSukumar Swaminathan 1600*82527734SSukumar Swaminathan /* SLI4 Adapter register management */ 1601*82527734SSukumar Swaminathan uint32_t *MPUEPSemaphore_reg_addr; 1602*82527734SSukumar Swaminathan uint32_t *MBDB_reg_addr; 1603*82527734SSukumar Swaminathan 1604*82527734SSukumar Swaminathan uint32_t *CQDB_reg_addr; 1605*82527734SSukumar Swaminathan uint32_t *MQDB_reg_addr; 1606*82527734SSukumar Swaminathan uint32_t *WQDB_reg_addr; 1607*82527734SSukumar Swaminathan uint32_t *RQDB_reg_addr; 1608*82527734SSukumar Swaminathan 1609*82527734SSukumar Swaminathan uint32_t flag; 1610*82527734SSukumar Swaminathan #define EMLXS_SLI4_INTR_ENABLED 0x1 1611*82527734SSukumar Swaminathan 1612*82527734SSukumar Swaminathan uint16_t XRICount; 1613*82527734SSukumar Swaminathan uint16_t XRIBase; 1614*82527734SSukumar Swaminathan uint16_t RPICount; 1615*82527734SSukumar Swaminathan uint16_t RPIBase; 1616*82527734SSukumar Swaminathan uint16_t VPICount; 1617*82527734SSukumar Swaminathan uint16_t VPIBase; 1618*82527734SSukumar Swaminathan uint16_t VFICount; 1619*82527734SSukumar Swaminathan uint16_t VFIBase; 1620*82527734SSukumar Swaminathan uint16_t FCFICount; 1621*82527734SSukumar Swaminathan 1622*82527734SSukumar Swaminathan kmutex_t id_lock; /* for FCFI, VFI, VPI, RPI, XRI mgmt */ 1623*82527734SSukumar Swaminathan FCFIobj_t *FCFIp; 1624*82527734SSukumar Swaminathan VFIobj_t *VFIp; 1625*82527734SSukumar Swaminathan 1626*82527734SSukumar Swaminathan /* Save Config Region 23 info */ 1627*82527734SSukumar Swaminathan tlv_fcoe_t cfgFCOE; 1628*82527734SSukumar Swaminathan tlv_fcfconnectlist_t cfgFCF; 1629*82527734SSukumar Swaminathan 1630*82527734SSukumar Swaminathan MBUF_INFO dump_region; 1631*82527734SSukumar Swaminathan #define EMLXS_DUMP_REGION_SIZE 1024 1632*82527734SSukumar Swaminathan 1633*82527734SSukumar Swaminathan RPIobj_t *RPIp; 1634*82527734SSukumar Swaminathan MBUF_INFO HeaderTmplate; 1635*82527734SSukumar Swaminathan XRIobj_t *XRIp; 1636*82527734SSukumar Swaminathan /* Single linked list for available XRIs */ 1637*82527734SSukumar Swaminathan XRIobj_t *XRIfree_list; 1638*82527734SSukumar Swaminathan XRIobj_t *XRIfree_tail; 1639*82527734SSukumar Swaminathan uint32_t xrif_count; 1640*82527734SSukumar Swaminathan uint32_t mem_sgl_size; 1641*82527734SSukumar Swaminathan 1642*82527734SSukumar Swaminathan /* Double linked list for XRIs in use */ 1643*82527734SSukumar Swaminathan XRIobj_t *XRIinuse_f; 1644*82527734SSukumar Swaminathan XRIobj_t *XRIinuse_b; 1645*82527734SSukumar Swaminathan uint32_t xria_count; 1646*82527734SSukumar Swaminathan 1647*82527734SSukumar Swaminathan EQ_DESC_t eq[EMLXS_MAX_EQS]; 1648*82527734SSukumar Swaminathan CQ_DESC_t cq[EMLXS_MAX_CQS]; 1649*82527734SSukumar Swaminathan WQ_DESC_t wq[EMLXS_MAX_WQS]; 1650*82527734SSukumar Swaminathan RQ_DESC_t rq[EMLXS_MAX_RQS]; 1651*82527734SSukumar Swaminathan MQ_DESC_t mq; 1652*82527734SSukumar Swaminathan 1653*82527734SSukumar Swaminathan /* Used to map a queue ID to a queue DESC_t */ 1654*82527734SSukumar Swaminathan uint16_t eq_map[EMLXS_MAX_EQ_IDS]; 1655*82527734SSukumar Swaminathan uint16_t cq_map[EMLXS_MAX_CQ_IDS]; 1656*82527734SSukumar Swaminathan uint16_t wq_map[EMLXS_MAX_WQ_IDS]; 1657*82527734SSukumar Swaminathan uint16_t rq_map[EMLXS_MAX_RQ_IDS]; 1658*82527734SSukumar Swaminathan 1659*82527734SSukumar Swaminathan RXQ_DESC_t rxq[EMLXS_MAX_RXQS]; 1660*82527734SSukumar Swaminathan 1661*82527734SSukumar Swaminathan } emlxs_sli4_t; 1662*82527734SSukumar Swaminathan 1663*82527734SSukumar Swaminathan 1664*82527734SSukumar Swaminathan typedef struct emlxs_sli_api 1665*82527734SSukumar Swaminathan { 1666*82527734SSukumar Swaminathan int (*sli_map_hdw)(); 1667*82527734SSukumar Swaminathan void (*sli_unmap_hdw)(); 1668*82527734SSukumar Swaminathan int32_t (*sli_online)(); 1669*82527734SSukumar Swaminathan void (*sli_offline)(); 1670*82527734SSukumar Swaminathan uint32_t (*sli_hba_reset)(); 1671*82527734SSukumar Swaminathan void (*sli_hba_kill)(); 1672*82527734SSukumar Swaminathan void (*sli_issue_iocb_cmd)(); 1673*82527734SSukumar Swaminathan uint32_t (*sli_issue_mbox_cmd)(); 1674*82527734SSukumar Swaminathan uint32_t (*sli_prep_fct_iocb)(); 1675*82527734SSukumar Swaminathan uint32_t (*sli_prep_fcp_iocb)(); 1676*82527734SSukumar Swaminathan uint32_t (*sli_prep_ip_iocb)(); 1677*82527734SSukumar Swaminathan uint32_t (*sli_prep_els_iocb)(); 1678*82527734SSukumar Swaminathan uint32_t (*sli_prep_ct_iocb)(); 1679*82527734SSukumar Swaminathan void (*sli_poll_intr)(); 1680*82527734SSukumar Swaminathan int32_t (*sli_intx_intr)(); 1681*82527734SSukumar Swaminathan uint32_t (*sli_msi_intr)(); 1682*82527734SSukumar Swaminathan void (*sli_disable_intr)(); 1683*82527734SSukumar Swaminathan void (*sli_timer)(); 1684*82527734SSukumar Swaminathan void (*sli_poll_erratt)(); 1685*82527734SSukumar Swaminathan 1686*82527734SSukumar Swaminathan } emlxs_sli_api_t; 1687*82527734SSukumar Swaminathan 1688*82527734SSukumar Swaminathan 1689291a2b48SSukumar Swaminathan typedef struct emlxs_hba 1690291a2b48SSukumar Swaminathan { 1691291a2b48SSukumar Swaminathan dev_info_t *dip; 1692291a2b48SSukumar Swaminathan int32_t emlxinst; 1693291a2b48SSukumar Swaminathan int32_t ddiinst; 1694*82527734SSukumar Swaminathan uint8_t pci_function_number; 1695*82527734SSukumar Swaminathan uint8_t pci_device_number; 1696*82527734SSukumar Swaminathan uint8_t pci_bus_number; 1697291a2b48SSukumar Swaminathan #ifdef FMA_SUPPORT 1698291a2b48SSukumar Swaminathan int32_t fm_caps; /* FMA capabilities */ 1699291a2b48SSukumar Swaminathan #endif /* FMA_SUPPORT */ 1700291a2b48SSukumar Swaminathan fc_fca_tran_t *fca_tran; 1701fcf3ce44SJohn Forte 1702fcf3ce44SJohn Forte /* HBA Info */ 1703291a2b48SSukumar Swaminathan emlxs_model_t model_info; 1704291a2b48SSukumar Swaminathan emlxs_vpd_t vpd; /* vital product data */ 1705291a2b48SSukumar Swaminathan NAME_TYPE wwnn; 1706291a2b48SSukumar Swaminathan NAME_TYPE wwpn; 1707291a2b48SSukumar Swaminathan char snn[256]; 1708291a2b48SSukumar Swaminathan char spn[256]; 1709291a2b48SSukumar Swaminathan PROG_ID load_list[MAX_LOAD_ENTRY]; 1710291a2b48SSukumar Swaminathan WAKE_UP_PARMS wakeup_parms; 1711291a2b48SSukumar Swaminathan uint32_t max_nodes; 1712291a2b48SSukumar Swaminathan uint32_t io_throttle; 1713291a2b48SSukumar Swaminathan uint32_t io_active; 1714291a2b48SSukumar Swaminathan uint32_t bus_type; 1715291a2b48SSukumar Swaminathan #define PCI_FC 0 1716fcf3ce44SJohn Forte #define SBUS_FC 1 1717fcf3ce44SJohn Forte 1718fcf3ce44SJohn Forte /* Link management */ 1719291a2b48SSukumar Swaminathan uint32_t link_event_tag; 1720291a2b48SSukumar Swaminathan uint8_t topology; 1721291a2b48SSukumar Swaminathan uint8_t linkspeed; 1722291a2b48SSukumar Swaminathan uint32_t linkup_wait_flag; 1723291a2b48SSukumar Swaminathan kcondvar_t linkup_lock_cv; 1724291a2b48SSukumar Swaminathan kmutex_t linkup_lock; 1725fcf3ce44SJohn Forte 1726fcf3ce44SJohn Forte /* Memory Pool management */ 1727291a2b48SSukumar Swaminathan emlxs_memseg_t memseg[FC_MAX_SEG]; /* memory for buffer */ 1728291a2b48SSukumar Swaminathan /* structures */ 1729291a2b48SSukumar Swaminathan kmutex_t memget_lock; /* locks all memory pools get */ 1730291a2b48SSukumar Swaminathan kmutex_t memput_lock; /* locks all memory pools put */ 1731fcf3ce44SJohn Forte 1732fcf3ce44SJohn Forte /* Fibre Channel Service Parameters */ 1733291a2b48SSukumar Swaminathan SERV_PARM sparam; 1734291a2b48SSukumar Swaminathan uint32_t fc_edtov; /* E_D_TOV timer value */ 1735291a2b48SSukumar Swaminathan uint32_t fc_arbtov; /* ARB_TOV timer value */ 1736291a2b48SSukumar Swaminathan uint32_t fc_ratov; /* R_A_TOV timer value */ 1737291a2b48SSukumar Swaminathan uint32_t fc_rttov; /* R_T_TOV timer value */ 1738291a2b48SSukumar Swaminathan uint32_t fc_altov; /* AL_TOV timer value */ 1739291a2b48SSukumar Swaminathan uint32_t fc_crtov; /* C_R_TOV timer value */ 1740291a2b48SSukumar Swaminathan uint32_t fc_citov; /* C_I_TOV timer value */ 1741291a2b48SSukumar Swaminathan 1742fcf3ce44SJohn Forte /* Adapter State management */ 1743291a2b48SSukumar Swaminathan int32_t state; 1744fcf3ce44SJohn Forte #define FC_ERROR 0x01 /* Adapter shutdown */ 1745fcf3ce44SJohn Forte #define FC_KILLED 0x02 /* Adapter interlocked/killed */ 1746fcf3ce44SJohn Forte #define FC_WARM_START 0x03 /* Adapter reset, but not restarted */ 1747fcf3ce44SJohn Forte #define FC_INIT_START 0x10 /* Adapter restarted */ 1748fcf3ce44SJohn Forte #define FC_INIT_NVPARAMS 0x11 1749fcf3ce44SJohn Forte #define FC_INIT_REV 0x12 1750fcf3ce44SJohn Forte #define FC_INIT_CFGPORT 0x13 1751fcf3ce44SJohn Forte #define FC_INIT_CFGRING 0x14 1752fcf3ce44SJohn Forte #define FC_INIT_INITLINK 0x15 1753fcf3ce44SJohn Forte #define FC_LINK_DOWN 0x20 1754*82527734SSukumar Swaminathan #define FC_LINK_DOWN_PERSIST 0x21 1755fcf3ce44SJohn Forte #define FC_LINK_UP 0x30 1756fcf3ce44SJohn Forte #define FC_CLEAR_LA 0x31 1757fcf3ce44SJohn Forte #define FC_READY 0x40 1758fcf3ce44SJohn Forte 1759291a2b48SSukumar Swaminathan uint32_t flag; 1760fcf3ce44SJohn Forte #define FC_ONLINING_MODE 0x00000001 1761fcf3ce44SJohn Forte #define FC_ONLINE_MODE 0x00000002 1762fcf3ce44SJohn Forte #define FC_OFFLINING_MODE 0x00000004 1763fcf3ce44SJohn Forte #define FC_OFFLINE_MODE 0x00000008 1764fcf3ce44SJohn Forte 1765291a2b48SSukumar Swaminathan #define FC_NPIV_ENABLED 0x00000010 /* NPIV enabled on adapter */ 1766291a2b48SSukumar Swaminathan #define FC_NPIV_SUPPORTED 0x00000020 /* NPIV supported on fabric */ 1767fcf3ce44SJohn Forte #define FC_NPIV_UNSUPPORTED 0x00000040 /* NPIV unsupported on fabric */ 1768fcf3ce44SJohn Forte #define FC_NPIV_LINKUP 0x00000100 /* NPIV enabled, supported, */ 1769fcf3ce44SJohn Forte /* and link is ready */ 1770fcf3ce44SJohn Forte #define FC_NPIV_DELAY_REQUIRED 0x00000200 /* Delay issuing FLOGI/FDISC */ 1771fcf3ce44SJohn Forte /* and NameServer cmds */ 1772fcf3ce44SJohn Forte 1773*82527734SSukumar Swaminathan #define FC_BOOTSTRAPMB_INIT 0x00000400 1774*82527734SSukumar Swaminathan #define FC_FIP_SUPPORTED 0x00000800 /* FIP supported */ 1775*82527734SSukumar Swaminathan 1776fcf3ce44SJohn Forte #define FC_FABRIC_ATTACHED 0x00001000 1777fcf3ce44SJohn Forte #define FC_PT_TO_PT 0x00002000 1778fcf3ce44SJohn Forte #define FC_BYPASSED_MODE 0x00004000 1779291a2b48SSukumar Swaminathan #define FC_MENLO_MODE 0x00008000 /* Menlo maintenance mode */ 1780291a2b48SSukumar Swaminathan 1781291a2b48SSukumar Swaminathan #define FC_DUMP_SAFE 0x00010000 /* Safe to DUMP */ 1782291a2b48SSukumar Swaminathan #define FC_DUMP_ACTIVE 0x00020000 /* DUMP in progress */ 1783fcf3ce44SJohn Forte 1784fcf3ce44SJohn Forte #define FC_SLIM2_MODE 0x00100000 /* SLIM in host memory */ 1785fcf3ce44SJohn Forte #define FC_INTERLOCKED 0x00200000 1786fcf3ce44SJohn Forte #define FC_HBQ_ENABLED 0x00400000 1787fcf3ce44SJohn Forte #define FC_ASYNC_EVENTS 0x00800000 1788fcf3ce44SJohn Forte 1789fcf3ce44SJohn Forte #define FC_ILB_MODE 0x01000000 1790fcf3ce44SJohn Forte #define FC_ELB_MODE 0x02000000 1791fcf3ce44SJohn Forte #define FC_LOOPBACK_MODE 0x03000000 /* Loopback Mode Mask */ 1792291a2b48SSukumar Swaminathan #define FC_DUMP 0x04000000 /* DUMP in progress */ 1793fcf3ce44SJohn Forte #define FC_SHUTDOWN 0x08000000 /* SHUTDOWN in progress */ 1794fcf3ce44SJohn Forte 1795291a2b48SSukumar Swaminathan #define FC_OVERTEMP_EVENT 0x10000000 /* FC_ERROR reason: */ 1796291a2b48SSukumar Swaminathan /* over temperature event */ 1797291a2b48SSukumar Swaminathan #define FC_MBOX_TIMEOUT 0x20000000 /* FC_ERROR reason: */ 1798291a2b48SSukumar Swaminathan /* mailbox timeout event */ 1799fcf3ce44SJohn Forte #define FC_HARDWARE_ERROR 0x80000000 /* FC_ERROR state triggered */ 1800fcf3ce44SJohn Forte 1801*82527734SSukumar Swaminathan #define FC_RESET_MASK 0x00030C1F /* Bits to protect during */ 1802291a2b48SSukumar Swaminathan /* a hard reset */ 1803*82527734SSukumar Swaminathan #define FC_LINKDOWN_MASK 0xFFF30C1F /* Bits to protect during */ 1804291a2b48SSukumar Swaminathan /* a linkdown */ 1805fcf3ce44SJohn Forte 1806*82527734SSukumar Swaminathan uint32_t temperature; /* Last reported temperature */ 1807fcf3ce44SJohn Forte 1808fcf3ce44SJohn Forte /* SBUS adapter management */ 1809291a2b48SSukumar Swaminathan caddr_t sbus_pci_addr; /* Virt addr of TITAN */ 1810291a2b48SSukumar Swaminathan /* pci config */ 1811fcf3ce44SJohn Forte ddi_acc_handle_t sbus_pci_handle; 1812fcf3ce44SJohn Forte 1813*82527734SSukumar Swaminathan /* PCI BUS adapter management */ 1814*82527734SSukumar Swaminathan caddr_t pci_addr; 1815*82527734SSukumar Swaminathan ddi_acc_handle_t pci_acc_handle; 1816*82527734SSukumar Swaminathan 1817*82527734SSukumar Swaminathan uint32_t sli_mode; 1818*82527734SSukumar Swaminathan #define EMLXS_HBA_SLI1_MODE 1 1819*82527734SSukumar Swaminathan #define EMLXS_HBA_SLI2_MODE 2 1820*82527734SSukumar Swaminathan #define EMLXS_HBA_SLI3_MODE 3 1821*82527734SSukumar Swaminathan #define EMLXS_HBA_SLI4_MODE 4 1822*82527734SSukumar Swaminathan 1823*82527734SSukumar Swaminathan /* SLI private data */ 1824*82527734SSukumar Swaminathan union { 1825*82527734SSukumar Swaminathan emlxs_sli3_t sli3; 1826*82527734SSukumar Swaminathan emlxs_sli4_t sli4; 1827*82527734SSukumar Swaminathan } sli; 1828*82527734SSukumar Swaminathan 1829*82527734SSukumar Swaminathan /* SLI API entry point routines */ 1830*82527734SSukumar Swaminathan emlxs_sli_api_t sli_api; 1831291a2b48SSukumar Swaminathan 1832291a2b48SSukumar Swaminathan uint32_t io_poll_count; /* Number of poll commands */ 1833291a2b48SSukumar Swaminathan /* in progress */ 1834fcf3ce44SJohn Forte 1835fcf3ce44SJohn Forte /* IO Completion management */ 1836291a2b48SSukumar Swaminathan uint32_t iodone_count; /* Number of IO's on done Q */ 1837fcf3ce44SJohn Forte /* Protected by EMLXS_PORT_LOCK */ 1838291a2b48SSukumar Swaminathan emlxs_buf_t *iodone_list; /* fc_packet being deferred */ 1839291a2b48SSukumar Swaminathan emlxs_buf_t *iodone_tail; /* fc_packet being deferred */ 1840291a2b48SSukumar Swaminathan emlxs_thread_t iodone_thread; 1841bb63f56eSSukumar Swaminathan emlxs_thread_t *spawn_thread_head; 1842bb63f56eSSukumar Swaminathan emlxs_thread_t *spawn_thread_tail; 1843bb63f56eSSukumar Swaminathan kmutex_t spawn_lock; 1844bb63f56eSSukumar Swaminathan uint32_t spawn_open; 1845fcf3ce44SJohn Forte 1846*82527734SSukumar Swaminathan /* IO Channel management */ 1847*82527734SSukumar Swaminathan int32_t chan_count; 1848*82527734SSukumar Swaminathan emlxs_channel_t chan[MAX_CHANNEL]; 1849*82527734SSukumar Swaminathan kmutex_t channel_tx_lock; 1850*82527734SSukumar Swaminathan uint8_t channel_fcp; /* Default channel to use for FCP IO */ 1851*82527734SSukumar Swaminathan #define CHANNEL_FCT channel_fcp 1852*82527734SSukumar Swaminathan uint8_t channel_ip; /* Default channel to use for IP IO */ 1853*82527734SSukumar Swaminathan uint8_t channel_els; /* Default channel to use for ELS IO */ 1854*82527734SSukumar Swaminathan uint8_t channel_ct; /* Default channel to use for CT IO */ 1855*82527734SSukumar Swaminathan 1856*82527734SSukumar Swaminathan /* IOTag management */ 1857*82527734SSukumar Swaminathan emlxs_buf_t **fc_table; /* sc_buf pointers indexed by */ 1858*82527734SSukumar Swaminathan /* iotag */ 1859*82527734SSukumar Swaminathan uint16_t fc_iotag; /* used to identify I/Os */ 1860*82527734SSukumar Swaminathan uint16_t fc_oor_iotag; /* OutOfRange (fc_table) iotags */ 1861*82527734SSukumar Swaminathan /* typically used for Abort/close */ 1862*82527734SSukumar Swaminathan #define EMLXS_MAX_ABORT_TAG 0x7fff 1863*82527734SSukumar Swaminathan uint16_t max_iotag; /* ALL IOCBs except aborts */ 1864*82527734SSukumar Swaminathan kmutex_t iotag_lock; 1865*82527734SSukumar Swaminathan uint32_t io_count; /* No of IO holding */ 1866*82527734SSukumar Swaminathan /* regular iotag */ 1867*82527734SSukumar Swaminathan uint32_t channel_tx_count; /* No of IO on tx Q */ 1868fcf3ce44SJohn Forte 1869fcf3ce44SJohn Forte /* Mailbox Management */ 1870291a2b48SSukumar Swaminathan uint32_t mbox_queue_flag; 1871291a2b48SSukumar Swaminathan emlxs_queue_t mbox_queue; 1872*82527734SSukumar Swaminathan uint32_t *mbox_mqe; /* active mbox mqe */ 1873*82527734SSukumar Swaminathan uint8_t *mbox_mbq; /* active MAILBOXQ */ 1874291a2b48SSukumar Swaminathan kcondvar_t mbox_lock_cv; /* MBX_SLEEP */ 1875291a2b48SSukumar Swaminathan kmutex_t mbox_lock; /* MBX_SLEEP */ 1876291a2b48SSukumar Swaminathan uint32_t mbox_timer; 1877fcf3ce44SJohn Forte 1878fcf3ce44SJohn Forte /* Interrupt management */ 1879291a2b48SSukumar Swaminathan void *intr_arg; 1880291a2b48SSukumar Swaminathan uint32_t intr_unclaimed; 1881291a2b48SSukumar Swaminathan uint32_t intr_autoClear; 1882291a2b48SSukumar Swaminathan uint32_t intr_flags; 1883fcf3ce44SJohn Forte #define EMLXS_INTX_INITED 0x0001 1884fcf3ce44SJohn Forte #define EMLXS_INTX_ADDED 0x0002 1885fcf3ce44SJohn Forte #define EMLXS_MSI_ENABLED 0x0010 1886fcf3ce44SJohn Forte #define EMLXS_MSI_INITED 0x0020 1887fcf3ce44SJohn Forte #define EMLXS_MSI_ADDED 0x0040 1888291a2b48SSukumar Swaminathan #define EMLXS_INTR_INITED (EMLXS_INTX_INITED|EMLXS_MSI_INITED) 1889291a2b48SSukumar Swaminathan #define EMLXS_INTR_ADDED (EMLXS_INTX_ADDED|EMLXS_MSI_ADDED) 1890fcf3ce44SJohn Forte 1891fcf3ce44SJohn Forte #ifdef MSI_SUPPORT 1892fcf3ce44SJohn Forte ddi_intr_handle_t *intr_htable; 1893291a2b48SSukumar Swaminathan uint32_t *intr_pri; 1894291a2b48SSukumar Swaminathan int32_t *intr_cap; 1895291a2b48SSukumar Swaminathan uint32_t intr_count; 1896291a2b48SSukumar Swaminathan uint32_t intr_type; 1897291a2b48SSukumar Swaminathan uint32_t intr_cond; 1898291a2b48SSukumar Swaminathan uint32_t intr_map[EMLXS_MSI_MAX_INTRS]; 1899291a2b48SSukumar Swaminathan uint32_t intr_mask; 1900291a2b48SSukumar Swaminathan uint32_t msi_cap_offset; 1901fcf3ce44SJohn Forte #define MSI_CAP_ID 0x05 1902fcf3ce44SJohn Forte 1903291a2b48SSukumar Swaminathan uint32_t msix_cap_offset; 1904fcf3ce44SJohn Forte #define MSIX_CAP_ID 0x11 1905fcf3ce44SJohn Forte 1906291a2b48SSukumar Swaminathan kmutex_t intr_lock[EMLXS_MSI_MAX_INTRS]; 1907fcf3ce44SJohn Forte #endif /* MSI_SUPPORT */ 1908fcf3ce44SJohn Forte 1909291a2b48SSukumar Swaminathan uint32_t heartbeat_timer; 1910291a2b48SSukumar Swaminathan uint32_t heartbeat_flag; 1911291a2b48SSukumar Swaminathan uint32_t heartbeat_active; 1912fcf3ce44SJohn Forte 1913fcf3ce44SJohn Forte /* IOCTL management */ 1914291a2b48SSukumar Swaminathan kmutex_t ioctl_lock; 1915291a2b48SSukumar Swaminathan uint32_t ioctl_flags; 1916fcf3ce44SJohn Forte #define EMLXS_OPEN 0x00000001 1917fcf3ce44SJohn Forte #define EMLXS_OPEN_EXCLUSIVE 0x00000002 1918fcf3ce44SJohn Forte 1919fcf3ce44SJohn Forte /* Timer management */ 1920291a2b48SSukumar Swaminathan kcondvar_t timer_lock_cv; 1921291a2b48SSukumar Swaminathan kmutex_t timer_lock; 1922291a2b48SSukumar Swaminathan timeout_id_t timer_id; 1923291a2b48SSukumar Swaminathan uint32_t timer_tics; 1924291a2b48SSukumar Swaminathan uint32_t timer_flags; 1925fcf3ce44SJohn Forte #define EMLXS_TIMER_STARTED 0x0000001 1926fcf3ce44SJohn Forte #define EMLXS_TIMER_BUSY 0x0000002 1927fcf3ce44SJohn Forte #define EMLXS_TIMER_KILL 0x0000004 1928fcf3ce44SJohn Forte #define EMLXS_TIMER_ENDED 0x0000008 1929fcf3ce44SJohn Forte 1930fcf3ce44SJohn Forte /* Misc Timers */ 1931291a2b48SSukumar Swaminathan uint32_t linkup_timer; 1932291a2b48SSukumar Swaminathan uint32_t discovery_timer; 1933291a2b48SSukumar Swaminathan uint32_t pkt_timer; 1934fcf3ce44SJohn Forte 1935fcf3ce44SJohn Forte /* Power Management */ 1936291a2b48SSukumar Swaminathan uint32_t pm_state; 1937fcf3ce44SJohn Forte /* pm_state */ 1938fcf3ce44SJohn Forte #define EMLXS_PM_IN_ATTACH 0x00000001 1939fcf3ce44SJohn Forte #define EMLXS_PM_IN_DETACH 0x00000002 1940fcf3ce44SJohn Forte #define EMLXS_PM_IN_SOL_CB 0x00000010 1941fcf3ce44SJohn Forte #define EMLXS_PM_IN_UNSOL_CB 0x00000020 1942fcf3ce44SJohn Forte #define EMLXS_PM_IN_LINK_RESET 0x00000100 1943fcf3ce44SJohn Forte #define EMLXS_PM_IN_HARD_RESET 0x00000200 1944fcf3ce44SJohn Forte #define EMLXS_PM_SUSPENDED 0x01000000 1945fcf3ce44SJohn Forte 1946291a2b48SSukumar Swaminathan uint32_t pm_level; 1947fcf3ce44SJohn Forte /* pm_level */ 1948fcf3ce44SJohn Forte #define EMLXS_PM_ADAPTER_DOWN 0 1949fcf3ce44SJohn Forte #define EMLXS_PM_ADAPTER_UP 1 1950fcf3ce44SJohn Forte 1951291a2b48SSukumar Swaminathan uint32_t pm_busy; 1952291a2b48SSukumar Swaminathan kmutex_t pm_lock; 1953291a2b48SSukumar Swaminathan uint8_t pm_config[PCI_CONFIG_SIZE]; 1954fcf3ce44SJohn Forte #ifdef IDLE_TIMER 1955291a2b48SSukumar Swaminathan uint32_t pm_idle_timer; 1956291a2b48SSukumar Swaminathan uint32_t pm_active; /* Only used by timer */ 1957fcf3ce44SJohn Forte #endif /* IDLE_TIMER */ 1958fcf3ce44SJohn Forte 1959fcf3ce44SJohn Forte /* Loopback management */ 1960291a2b48SSukumar Swaminathan uint32_t loopback_tics; 1961291a2b48SSukumar Swaminathan void *loopback_pkt; 1962fcf3ce44SJohn Forte 1963fcf3ce44SJohn Forte /* Event management */ 1964*82527734SSukumar Swaminathan emlxs_event_queue_t event_queue; 1965*82527734SSukumar Swaminathan uint32_t event_mask; 1966*82527734SSukumar Swaminathan uint32_t event_timer; 1967fcf3ce44SJohn Forte emlxs_dfc_event_t dfc_event[MAX_DFC_EVENTS]; 1968fcf3ce44SJohn Forte emlxs_hba_event_t hba_event; 1969fcf3ce44SJohn Forte 1970fcf3ce44SJohn Forte /* Parameter management */ 1971291a2b48SSukumar Swaminathan emlxs_config_t config[NUM_CFG_PARAM]; 1972fcf3ce44SJohn Forte 1973fcf3ce44SJohn Forte /* Driver stat management */ 1974291a2b48SSukumar Swaminathan kstat_t *kstat; 1975291a2b48SSukumar Swaminathan emlxs_stats_t stats; 1976fcf3ce44SJohn Forte 1977fcf3ce44SJohn Forte /* Log management */ 1978291a2b48SSukumar Swaminathan emlxs_msg_log_t log; 1979fcf3ce44SJohn Forte 1980fcf3ce44SJohn Forte /* Port managment */ 1981*82527734SSukumar Swaminathan uint32_t vpi_base; 1982291a2b48SSukumar Swaminathan uint32_t vpi_max; 1983291a2b48SSukumar Swaminathan uint32_t vpi_high; 1984291a2b48SSukumar Swaminathan uint32_t num_of_ports; 1985fcf3ce44SJohn Forte 1986291a2b48SSukumar Swaminathan kmutex_t port_lock; /* locks port, nodes, rings */ 1987291a2b48SSukumar Swaminathan emlxs_port_t port[MAX_VPORTS + 1]; /* port specific info */ 1988291a2b48SSukumar Swaminathan /* Last one is for */ 1989291a2b48SSukumar Swaminathan /* NPIV ready test */ 1990fcf3ce44SJohn Forte 1991fcf3ce44SJohn Forte #ifdef DHCHAP_SUPPORT 1992291a2b48SSukumar Swaminathan kmutex_t dhc_lock; 1993291a2b48SSukumar Swaminathan kmutex_t auth_lock; 1994291a2b48SSukumar Swaminathan emlxs_auth_cfg_t auth_cfg; /* Default auth_cfg. */ 1995291a2b48SSukumar Swaminathan /* Points to list of entries. */ 1996291a2b48SSukumar Swaminathan /* Protected by auth_lock */ 1997291a2b48SSukumar Swaminathan uint32_t auth_cfg_count; 1998291a2b48SSukumar Swaminathan emlxs_auth_key_t auth_key; /* Default auth_key. */ 1999291a2b48SSukumar Swaminathan /* Points to list of entries. */ 2000291a2b48SSukumar Swaminathan /* Protected by auth_lock */ 2001291a2b48SSukumar Swaminathan uint32_t auth_key_count; 2002291a2b48SSukumar Swaminathan uint32_t rdn_flag; 2003fcf3ce44SJohn Forte #endif /* DHCHAP_SUPPORT */ 2004fcf3ce44SJohn Forte 2005291a2b48SSukumar Swaminathan uint16_t ini_mode; 2006291a2b48SSukumar Swaminathan uint16_t tgt_mode; 2007fcf3ce44SJohn Forte 2008fcf3ce44SJohn Forte #ifdef TEST_SUPPORT 2009291a2b48SSukumar Swaminathan uint32_t underrun_counter; 2010291a2b48SSukumar Swaminathan #endif /* TEST_SUPPORT */ 2011291a2b48SSukumar Swaminathan 2012291a2b48SSukumar Swaminathan #ifdef MODFW_SUPPORT 2013291a2b48SSukumar Swaminathan ddi_modhandle_t fw_modhandle; 2014291a2b48SSukumar Swaminathan #endif /* MODFW_SUPPORT */ 2015291a2b48SSukumar Swaminathan 2016291a2b48SSukumar Swaminathan #ifdef DUMP_SUPPORT 2017291a2b48SSukumar Swaminathan emlxs_file_t dump_txtfile; 2018291a2b48SSukumar Swaminathan emlxs_file_t dump_dmpfile; 2019291a2b48SSukumar Swaminathan emlxs_file_t dump_ceefile; 2020291a2b48SSukumar Swaminathan kmutex_t dump_lock; 2021291a2b48SSukumar Swaminathan #define EMLXS_DUMP_LOCK hba->dump_lock 2022291a2b48SSukumar Swaminathan #define EMLXS_TXT_FILE 1 2023291a2b48SSukumar Swaminathan #define EMLXS_DMP_FILE 2 2024291a2b48SSukumar Swaminathan #define EMLXS_CEE_FILE 3 2025291a2b48SSukumar Swaminathan 2026291a2b48SSukumar Swaminathan #define EMLXS_DRV_DUMP 0 2027291a2b48SSukumar Swaminathan #define EMLXS_TEMP_DUMP 1 2028291a2b48SSukumar Swaminathan #define EMLXS_USER_DUMP 2 2029291a2b48SSukumar Swaminathan 2030291a2b48SSukumar Swaminathan #endif /* DUMP_SUPPORT */ 2031291a2b48SSukumar Swaminathan 2032fcf3ce44SJohn Forte } emlxs_hba_t; 2033fcf3ce44SJohn Forte 2034*82527734SSukumar Swaminathan #define EMLXS_SLI_MAP_HDW (hba->sli_api.sli_map_hdw) 2035*82527734SSukumar Swaminathan #define EMLXS_SLI_UNMAP_HDW (hba->sli_api.sli_unmap_hdw) 2036*82527734SSukumar Swaminathan #define EMLXS_SLI_ONLINE (hba->sli_api.sli_online) 2037*82527734SSukumar Swaminathan #define EMLXS_SLI_OFFLINE (hba->sli_api.sli_offline) 2038*82527734SSukumar Swaminathan #define EMLXS_SLI_HBA_RESET (hba->sli_api.sli_hba_reset) 2039*82527734SSukumar Swaminathan #define EMLXS_SLI_HBA_KILL (hba->sli_api.sli_hba_kill) 2040*82527734SSukumar Swaminathan #define EMLXS_SLI_ISSUE_IOCB_CMD (hba->sli_api.sli_issue_iocb_cmd) 2041*82527734SSukumar Swaminathan #define EMLXS_SLI_ISSUE_MBOX_CMD (hba->sli_api.sli_issue_mbox_cmd) 2042*82527734SSukumar Swaminathan #define EMLXS_SLI_PREP_FCT_IOCB (hba->sli_api.sli_prep_fct_iocb) 2043*82527734SSukumar Swaminathan #define EMLXS_SLI_PREP_FCP_IOCB (hba->sli_api.sli_prep_fcp_iocb) 2044*82527734SSukumar Swaminathan #define EMLXS_SLI_PREP_IP_IOCB (hba->sli_api.sli_prep_ip_iocb) 2045*82527734SSukumar Swaminathan #define EMLXS_SLI_PREP_ELS_IOCB (hba->sli_api.sli_prep_els_iocb) 2046*82527734SSukumar Swaminathan #define EMLXS_SLI_PREP_CT_IOCB (hba->sli_api.sli_prep_ct_iocb) 2047*82527734SSukumar Swaminathan #define EMLXS_SLI_POLL_INTR (hba->sli_api.sli_poll_intr) 2048*82527734SSukumar Swaminathan #define EMLXS_SLI_INTX_INTR (hba->sli_api.sli_intx_intr) 2049*82527734SSukumar Swaminathan #define EMLXS_SLI_MSI_INTR (hba->sli_api.sli_msi_intr) 2050*82527734SSukumar Swaminathan #define EMLXS_SLI_DISABLE_INTR (hba->sli_api.sli_disable_intr) 2051*82527734SSukumar Swaminathan #define EMLXS_SLI_TIMER (hba->sli_api.sli_timer) 2052*82527734SSukumar Swaminathan #define EMLXS_SLI_POLL_ERRATT (hba->sli_api.sli_poll_erratt) 2053291a2b48SSukumar Swaminathan 2054291a2b48SSukumar Swaminathan #define EMLXS_HBA_T 1 /* flag emlxs_hba_t is already typedefed */ 2055fcf3ce44SJohn Forte 2056fcf3ce44SJohn Forte #ifdef MSI_SUPPORT 2057291a2b48SSukumar Swaminathan #define EMLXS_INTR_INIT(_hba, _m) emlxs_msi_init(_hba, _m) 2058291a2b48SSukumar Swaminathan #define EMLXS_INTR_UNINIT(_hba) emlxs_msi_uninit(_hba) 2059291a2b48SSukumar Swaminathan #define EMLXS_INTR_ADD(_hba) emlxs_msi_add(_hba) 2060291a2b48SSukumar Swaminathan #define EMLXS_INTR_REMOVE(_hba) emlxs_msi_remove(_hba) 2061fcf3ce44SJohn Forte #else 2062291a2b48SSukumar Swaminathan #define EMLXS_INTR_INIT(_hba, _m) emlxs_intx_init(_hba, _m) 2063291a2b48SSukumar Swaminathan #define EMLXS_INTR_UNINIT(_hba) emlxs_intx_uninit(_hba) 2064291a2b48SSukumar Swaminathan #define EMLXS_INTR_ADD(_hba) emlxs_intx_add(_hba) 2065291a2b48SSukumar Swaminathan #define EMLXS_INTR_REMOVE(_hba) emlxs_intx_remove(_hba) 2066fcf3ce44SJohn Forte #endif /* MSI_SUPPORT */ 2067fcf3ce44SJohn Forte 2068fcf3ce44SJohn Forte 2069fcf3ce44SJohn Forte /* Power Management Component */ 2070291a2b48SSukumar Swaminathan #define EMLXS_PM_ADAPTER 0 2071291a2b48SSukumar Swaminathan 2072291a2b48SSukumar Swaminathan 2073291a2b48SSukumar Swaminathan #define DRV_TIME (uint32_t)(ddi_get_time() - emlxs_device.drv_timestamp) 2074291a2b48SSukumar Swaminathan 2075291a2b48SSukumar Swaminathan #define HBA port->hba 2076291a2b48SSukumar Swaminathan #define PPORT hba->port[0] 2077291a2b48SSukumar Swaminathan #define VPORT(x) hba->port[x] 2078291a2b48SSukumar Swaminathan #define EMLXS_TIMER_LOCK hba->timer_lock 2079291a2b48SSukumar Swaminathan #define VPD hba->vpd 2080291a2b48SSukumar Swaminathan #define CFG hba->config[0] 2081291a2b48SSukumar Swaminathan #define LOG hba->log 2082*82527734SSukumar Swaminathan #define EVENTQ hba->event_queue 2083291a2b48SSukumar Swaminathan #define EMLXS_MBOX_LOCK hba->mbox_lock 2084291a2b48SSukumar Swaminathan #define EMLXS_MBOX_CV hba->mbox_lock_cv 2085291a2b48SSukumar Swaminathan #define EMLXS_LINKUP_LOCK hba->linkup_lock 2086291a2b48SSukumar Swaminathan #define EMLXS_LINKUP_CV hba->linkup_lock_cv 2087*82527734SSukumar Swaminathan #define EMLXS_TX_CHANNEL_LOCK hba->channel_tx_lock /* ring txq lock */ 2088291a2b48SSukumar Swaminathan #define EMLXS_MEMGET_LOCK hba->memget_lock /* mempool get lock */ 2089291a2b48SSukumar Swaminathan #define EMLXS_MEMPUT_LOCK hba->memput_lock /* mempool put lock */ 2090291a2b48SSukumar Swaminathan #define EMLXS_IOCTL_LOCK hba->ioctl_lock /* ioctl lock */ 2091291a2b48SSukumar Swaminathan #define HBASTATS hba->stats 2092*82527734SSukumar Swaminathan #define EMLXS_CMD_RING_LOCK(n) hba->sli.sli3.ring_cmd_lock[n] 2093*82527734SSukumar Swaminathan #define EMLXS_FCTAB_LOCK hba->iotag_lock 2094291a2b48SSukumar Swaminathan #define EMLXS_PORT_LOCK hba->port_lock /* locks ports, */ 2095fcf3ce44SJohn Forte /* nodes, rings */ 2096291a2b48SSukumar Swaminathan #define EMLXS_INTR_LOCK(_id) hba->intr_lock[_id] /* locks intr threads */ 2097fcf3ce44SJohn Forte 2098291a2b48SSukumar Swaminathan #define EMLXS_PKT_LOCK port->pkt_lock /* used for pkt */ 2099291a2b48SSukumar Swaminathan /* polling */ 2100291a2b48SSukumar Swaminathan #define EMLXS_PKT_CV port->pkt_lock_cv /* Used for pkt */ 2101291a2b48SSukumar Swaminathan /* polling */ 2102291a2b48SSukumar Swaminathan #define EMLXS_UB_LOCK port->ub_lock /* locks unsolicited */ 2103fcf3ce44SJohn Forte /* buffer pool */ 2104fcf3ce44SJohn Forte 2105*82527734SSukumar Swaminathan /* These SWAPs will swap on any platform */ 2106*82527734SSukumar Swaminathan #define SWAP32_BUFFER(_b, _c) emlxs_swap32_buffer(_b, _c) 2107*82527734SSukumar Swaminathan #define SWAP32_BCOPY(_s, _d, _c) emlxs_swap32_bcopy(_s, _d, _c) 2108fcf3ce44SJohn Forte 2109*82527734SSukumar Swaminathan #define SWAP64(_x) ((((uint64_t)(_x) & 0xFF)<<56) | \ 2110*82527734SSukumar Swaminathan (((uint64_t)(_x) & 0xFF00)<<40) | \ 2111*82527734SSukumar Swaminathan (((uint64_t)(_x) & 0xFF0000)<<24) | \ 2112*82527734SSukumar Swaminathan (((uint64_t)(_x) & 0xFF000000)<<8) | \ 2113*82527734SSukumar Swaminathan (((uint64_t)(_x) & 0xFF00000000)>>8) | \ 2114*82527734SSukumar Swaminathan (((uint64_t)(_x) & 0xFF0000000000)>>24) | \ 2115*82527734SSukumar Swaminathan (((uint64_t)(_x) & 0xFF000000000000)>>40) | \ 2116*82527734SSukumar Swaminathan (((uint64_t)(_x) & 0xFF00000000000000)>>56)) 2117fcf3ce44SJohn Forte 2118*82527734SSukumar Swaminathan #define SWAP32(_x) ((((uint32_t)(_x) & 0xFF)<<24) | \ 2119*82527734SSukumar Swaminathan (((uint32_t)(_x) & 0xFF00)<<8) | \ 2120*82527734SSukumar Swaminathan (((uint32_t)(_x) & 0xFF0000)>>8) | \ 2121*82527734SSukumar Swaminathan (((uint32_t)(_x) & 0xFF000000)>>24)) 2122fcf3ce44SJohn Forte 2123*82527734SSukumar Swaminathan #define SWAP16(_x) ((((uint16_t)(_x) & 0xFF)<<8) | \ 2124*82527734SSukumar Swaminathan (((uint16_t)(_x) & 0xFF00)>>8)) 2125fcf3ce44SJohn Forte 2126*82527734SSukumar Swaminathan #define SWAP24_LO(_x) ((((uint32_t)(_x) & 0xFF)<<16) | \ 2127*82527734SSukumar Swaminathan ((uint32_t)(_x) & 0xFF00FF00) | \ 2128*82527734SSukumar Swaminathan (((uint32_t)(_x) & 0x00FF0000)>>16)) 2129fcf3ce44SJohn Forte 2130*82527734SSukumar Swaminathan #define SWAP24_HI(_x) (((uint32_t)(_x) & 0x00FF00FF) | \ 2131*82527734SSukumar Swaminathan (((uint32_t)(_x) & 0x0000FF00)<<16) | \ 2132*82527734SSukumar Swaminathan (((uint32_t)(_x) & 0xFF000000)>>16)) 2133fcf3ce44SJohn Forte 2134*82527734SSukumar Swaminathan /* These LE_SWAPs will only swap on a LE platform */ 2135*82527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 2136*82527734SSukumar Swaminathan #define LE_SWAP32_BUFFER(_b, _c) SWAP32_BUFFER(_b, _c) 2137*82527734SSukumar Swaminathan #define LE_SWAP32_BCOPY(_s, _d, _c) SWAP32_BCOPY(_s, _d, _c) 2138*82527734SSukumar Swaminathan #define LE_SWAP64(_x) SWAP64(_x) 2139*82527734SSukumar Swaminathan #define LE_SWAP32(_x) SWAP32(_x) 2140*82527734SSukumar Swaminathan #define LE_SWAP16(_x) SWAP16(_x) 2141*82527734SSukumar Swaminathan #define LE_SWAP24_LO(_x) SWAP24_LO(X) 2142*82527734SSukumar Swaminathan #define LE_SWAP24_HI(_x) SWAP24_HI(X) 2143fcf3ce44SJohn Forte 2144*82527734SSukumar Swaminathan #if (EMLXS_MODREVX == EMLXS_MODREV2X) 2145*82527734SSukumar Swaminathan #undef LE_SWAP24_LO 2146*82527734SSukumar Swaminathan #define LE_SWAP24_LO(_x) (_x) 2147*82527734SSukumar Swaminathan #undef LE_SWAP24_HI 2148*82527734SSukumar Swaminathan #define LE_SWAP24_HI(_x) (_x) 2149*82527734SSukumar Swaminathan #endif /* EMLXS_MODREV2X */ 2150291a2b48SSukumar Swaminathan 2151*82527734SSukumar Swaminathan #else /* BIG ENDIAN */ 2152*82527734SSukumar Swaminathan #define LE_SWAP32_BUFFER(_b, _c) 2153*82527734SSukumar Swaminathan #define LE_SWAP32_BCOPY(_s, _d, _c) bcopy(_s, _d, _c) 2154*82527734SSukumar Swaminathan #define LE_SWAP64(_x) (_x) 2155*82527734SSukumar Swaminathan #define LE_SWAP32(_x) (_x) 2156*82527734SSukumar Swaminathan #define LE_SWAP16(_x) (_x) 2157*82527734SSukumar Swaminathan #define LE_SWAP24_LO(_x) (_x) 2158*82527734SSukumar Swaminathan #define LE_SWAP24_HI(_x) (_x) 2159*82527734SSukumar Swaminathan #endif /* EMLXS_LITTLE_ENDIAN */ 2160*82527734SSukumar Swaminathan 2161*82527734SSukumar Swaminathan /* These BE_SWAPs will only swap on a BE platform */ 2162*82527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 2163*82527734SSukumar Swaminathan #define BE_SWAP32_BUFFER(_b, _c) SWAP32_BUFFER(_b, _c) 2164*82527734SSukumar Swaminathan #define BE_SWAP32_BCOPY(_s, _d, _c) SWAP32_BCOPY(_s, _d, _c) 2165*82527734SSukumar Swaminathan #define BE_SWAP64(_x) SWAP64(_x) 2166*82527734SSukumar Swaminathan #define BE_SWAP32(_x) SWAP32(_x) 2167*82527734SSukumar Swaminathan #define BE_SWAP16(_x) SWAP16(_x) 2168*82527734SSukumar Swaminathan #else /* LITTLE ENDIAN */ 2169*82527734SSukumar Swaminathan #define BE_SWAP32_BUFFER(_b, _c) 2170*82527734SSukumar Swaminathan #define BE_SWAP32_BCOPY(_s, _d, _c) bcopy(_s, _d, _c) 2171*82527734SSukumar Swaminathan #define BE_SWAP64(_x) (_x) 2172*82527734SSukumar Swaminathan #define BE_SWAP32(_x) (_x) 2173*82527734SSukumar Swaminathan #define BE_SWAP16(_x) (_x) 2174*82527734SSukumar Swaminathan #endif /* EMLXS_BIG_ENDIAN */ 2175fcf3ce44SJohn Forte 2176fcf3ce44SJohn Forte #ifdef __cplusplus 2177fcf3ce44SJohn Forte } 2178fcf3ce44SJohn Forte #endif 2179fcf3ce44SJohn Forte 2180fcf3ce44SJohn Forte #endif /* _EMLXS_FC_H */ 2181