1fcf3ce44SJohn Forte /* 2fcf3ce44SJohn Forte * CDDL HEADER START 3fcf3ce44SJohn Forte * 4fcf3ce44SJohn Forte * The contents of this file are subject to the terms of the 5fcf3ce44SJohn Forte * Common Development and Distribution License (the "License"). 6fcf3ce44SJohn Forte * You may not use this file except in compliance with the License. 7fcf3ce44SJohn Forte * 8*8f23e9faSHans Rosenfeld * You can obtain a copy of the license at 9*8f23e9faSHans Rosenfeld * http://www.opensource.org/licenses/cddl1.txt. 10fcf3ce44SJohn Forte * See the License for the specific language governing permissions 11fcf3ce44SJohn Forte * and limitations under the License. 12fcf3ce44SJohn Forte * 13fcf3ce44SJohn Forte * When distributing Covered Code, include this CDDL HEADER in each 14fcf3ce44SJohn Forte * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15fcf3ce44SJohn Forte * If applicable, add the following below this CDDL HEADER, with the 16fcf3ce44SJohn Forte * fields enclosed by brackets "[]" replaced with your own identifying 17fcf3ce44SJohn Forte * information: Portions Copyright [yyyy] [name of copyright owner] 18fcf3ce44SJohn Forte * 19fcf3ce44SJohn Forte * CDDL HEADER END 20fcf3ce44SJohn Forte */ 21fcf3ce44SJohn Forte 22fcf3ce44SJohn Forte /* 23*8f23e9faSHans Rosenfeld * Copyright (c) 2004-2011 Emulex. All rights reserved. 2482527734SSukumar Swaminathan * Use is subject to license terms. 25fcf3ce44SJohn Forte */ 26fcf3ce44SJohn Forte 27fcf3ce44SJohn Forte #ifndef _EMLXS_DFCLIB_H 28fcf3ce44SJohn Forte #define _EMLXS_DFCLIB_H 29fcf3ce44SJohn Forte 30fcf3ce44SJohn Forte #ifdef __cplusplus 31fcf3ce44SJohn Forte extern "C" { 32fcf3ce44SJohn Forte #endif 33fcf3ce44SJohn Forte 34fcf3ce44SJohn Forte #define MAX_DFC_EVENTS 16 35fcf3ce44SJohn Forte #define MAX_EMLXS_BRDS 128 36fcf3ce44SJohn Forte #define MAX_CFG_PARAM 64 3782527734SSukumar Swaminathan #define MAX_NODES 4096 38fcf3ce44SJohn Forte 39fcf3ce44SJohn Forte #ifndef MAX_VPORTS 40fcf3ce44SJohn Forte #define MAX_VPORTS 256 41291a2b48SSukumar Swaminathan #endif /* MAX_VPORTS */ 42fcf3ce44SJohn Forte 43291a2b48SSukumar Swaminathan #ifdef EMLXS_SPARC 44fcf3ce44SJohn Forte #define EMLXS_BIG_ENDIAN 45291a2b48SSukumar Swaminathan #endif /* EMLXS_SPARC */ 46291a2b48SSukumar Swaminathan 47291a2b48SSukumar Swaminathan #ifdef EMLXS_I386 48fcf3ce44SJohn Forte #define EMLXS_LITTLE_ENDIAN 49291a2b48SSukumar Swaminathan #endif /* EMLXS_I386 */ 50fcf3ce44SJohn Forte 51fcf3ce44SJohn Forte 52291a2b48SSukumar Swaminathan typedef struct brdinfo 53291a2b48SSukumar Swaminathan { 54fcf3ce44SJohn Forte uint32_t a_mem_hi; /* memory identifier for adapter access */ 55fcf3ce44SJohn Forte uint32_t a_mem_low; /* memory identifier for adapter access */ 56fcf3ce44SJohn Forte uint32_t a_flash_hi; /* memory identifier for adapter access */ 57fcf3ce44SJohn Forte uint32_t a_flash_low; /* memory identifier for adapter access */ 58fcf3ce44SJohn Forte uint32_t a_ctlreg_hi; /* memory identifier for adapter access */ 59fcf3ce44SJohn Forte uint32_t a_ctlreg_low; /* memory identifier for adapter access */ 60fcf3ce44SJohn Forte uint32_t a_intrlvl; /* interrupt level for adapter */ 61fcf3ce44SJohn Forte uint32_t a_pci; /* PCI identifier (device / vendor id) */ 62fcf3ce44SJohn Forte uint32_t a_busid; /* identifier of PCI bus adapter is on */ 63fcf3ce44SJohn Forte uint32_t a_devid; /* identifier of PCI device number */ 64291a2b48SSukumar Swaminathan uint8_t a_rsvd1; /* reserved for future use */ 65291a2b48SSukumar Swaminathan uint8_t a_rsvd2; /* reserved for future use */ 66291a2b48SSukumar Swaminathan uint8_t a_siglvl; /* signal handler used by library */ 67291a2b48SSukumar Swaminathan uint8_t a_ddi; /* identifier device driver instance number */ 68fcf3ce44SJohn Forte uint32_t a_onmask; /* mask of ONDI primatives supported */ 69fcf3ce44SJohn Forte uint32_t a_offmask; /* mask of OFFDI primatives supported */ 70291a2b48SSukumar Swaminathan uint8_t a_drvrid[16]; /* driver version */ 71291a2b48SSukumar Swaminathan uint8_t a_fwname[32]; /* firmware version */ 72fcf3ce44SJohn Forte } brdinfo_t; 73fcf3ce44SJohn Forte 74fcf3ce44SJohn Forte 75291a2b48SSukumar Swaminathan typedef struct dfc_brdinfo 76291a2b48SSukumar Swaminathan { 77fcf3ce44SJohn Forte uint32_t a_mem_hi; /* memory identifier for adapter access */ 78fcf3ce44SJohn Forte uint32_t a_mem_low; /* memory identifier for adapter access */ 79fcf3ce44SJohn Forte uint32_t a_flash_hi; /* memory identifier for adapter access */ 80fcf3ce44SJohn Forte uint32_t a_flash_low; /* memory identifier for adapter access */ 81fcf3ce44SJohn Forte uint32_t a_ctlreg_hi; /* memory identifier for adapter access */ 82fcf3ce44SJohn Forte uint32_t a_ctlreg_low; /* memory identifier for adapter access */ 83fcf3ce44SJohn Forte uint32_t a_intrlvl; /* interrupt level for adapter */ 84fcf3ce44SJohn Forte uint32_t a_pci; /* PCI identifier (device / vendor id) */ 85fcf3ce44SJohn Forte uint32_t a_busid; /* identifier of PCI bus adapter is on */ 86fcf3ce44SJohn Forte uint32_t a_devid; /* identifier of PCI device number */ 8782527734SSukumar Swaminathan uint8_t a_pciFunc; /* identifier of PCI function number */ 88291a2b48SSukumar Swaminathan uint8_t a_siglvl; /* signal handler used by library */ 89fcf3ce44SJohn Forte uint16_t a_ddi; /* identifier device driver instance number */ 90fcf3ce44SJohn Forte uint32_t a_onmask; /* mask of ONDI primatives supported */ 91fcf3ce44SJohn Forte uint32_t a_offmask; /* mask of OFFDI primatives supported */ 92291a2b48SSukumar Swaminathan uint8_t a_drvrid[16]; /* driver version */ 93291a2b48SSukumar Swaminathan uint8_t a_fwname[32]; /* firmware version */ 94291a2b48SSukumar Swaminathan uint8_t a_wwpn[8]; /* worldwide portname */ 95fcf3ce44SJohn Forte } dfc_brdinfo_t; 96fcf3ce44SJohn Forte 97fcf3ce44SJohn Forte 9882527734SSukumar Swaminathan #define PADDR_LO(addr) ((uint32_t)(((uint64_t)(addr)) & 0xffffffff)) 9982527734SSukumar Swaminathan #define PADDR_HI(addr) ((uint32_t)(((uint64_t)(addr)) >> 32)) 10082527734SSukumar Swaminathan #define PADDR(high, low) ((uint64_t)((((uint64_t)(high)) << 32) \ 101291a2b48SSukumar Swaminathan | (((uint64_t)(low)) & 0xffffffff))) 102fcf3ce44SJohn Forte 103291a2b48SSukumar Swaminathan typedef struct ulp_bde 104291a2b48SSukumar Swaminathan { 105291a2b48SSukumar Swaminathan uint32_t bdeAddress; 106fcf3ce44SJohn Forte 107fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 108291a2b48SSukumar Swaminathan uint32_t bdeReserved:4; 109291a2b48SSukumar Swaminathan uint32_t bdeAddrHigh:4; 110291a2b48SSukumar Swaminathan uint32_t bdeSize:24; 111fcf3ce44SJohn Forte #endif 112fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 113291a2b48SSukumar Swaminathan uint32_t bdeSize:24; 114291a2b48SSukumar Swaminathan uint32_t bdeAddrHigh:4; 115291a2b48SSukumar Swaminathan uint32_t bdeReserved:4; 116fcf3ce44SJohn Forte #endif 117fcf3ce44SJohn Forte } ulp_bde_t; 118fcf3ce44SJohn Forte 119291a2b48SSukumar Swaminathan typedef struct ulp_bde64 120291a2b48SSukumar Swaminathan { 121291a2b48SSukumar Swaminathan union 122291a2b48SSukumar Swaminathan { 123291a2b48SSukumar Swaminathan uint32_t w; 124291a2b48SSukumar Swaminathan struct 125291a2b48SSukumar Swaminathan { 126fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 127291a2b48SSukumar Swaminathan uint32_t bdeFlags:8; 128291a2b48SSukumar Swaminathan uint32_t bdeSize:24; 129fcf3ce44SJohn Forte #endif 130fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 131291a2b48SSukumar Swaminathan uint32_t bdeSize:24; 132291a2b48SSukumar Swaminathan uint32_t bdeFlags:8; 133fcf3ce44SJohn Forte #endif 134fcf3ce44SJohn Forte 135291a2b48SSukumar Swaminathan #define BUFF_USE_RSVD 0x01 /* bdeFlags */ 136291a2b48SSukumar Swaminathan #define BUFF_USE_INTRPT 0x02 /* Not Implemented with LP6000 */ 137291a2b48SSukumar Swaminathan #define BUFF_USE_CMND 0x04 /* Optional, 1=cmd/rsp 0=data buffer */ 138291a2b48SSukumar Swaminathan #define BUFF_USE_RCV 0x08 /* "" "", 1=rcv buffer, 0=xmit buffer */ 139291a2b48SSukumar Swaminathan #define BUFF_TYPE_32BIT 0x10 /* "" "", 1=32 bit addr 0=64 bit addr */ 140291a2b48SSukumar Swaminathan #define BUFF_TYPE_SPECIAL 0x20 /* Not Implemented with LP6000 */ 141291a2b48SSukumar Swaminathan #define BUFF_TYPE_BDL 0x40 /* Optional, may be set in BDL */ 142291a2b48SSukumar Swaminathan #define BUFF_TYPE_INVALID 0x80 /* "" "" */ 143fcf3ce44SJohn Forte } f; 144fcf3ce44SJohn Forte } tus; 145fcf3ce44SJohn Forte 146291a2b48SSukumar Swaminathan uint32_t addrLow; 147291a2b48SSukumar Swaminathan uint32_t addrHigh; 148fcf3ce44SJohn Forte } ulp_bde64_t; 149fcf3ce44SJohn Forte 15082527734SSukumar Swaminathan 15182527734SSukumar Swaminathan /* ==== Mailbox Commands ==== */ 15282527734SSukumar Swaminathan #define MBX_SHUTDOWN 0x00 15382527734SSukumar Swaminathan #define MBX_LOAD_SM 0x01 15482527734SSukumar Swaminathan #define MBX_READ_NV 0x02 15582527734SSukumar Swaminathan #define MBX_WRITE_NV 0x03 15682527734SSukumar Swaminathan #define MBX_RUN_BIU_DIAG 0x04 15782527734SSukumar Swaminathan #define MBX_INIT_LINK 0x05 15882527734SSukumar Swaminathan #define MBX_DOWN_LINK 0x06 15982527734SSukumar Swaminathan #define MBX_CONFIG_LINK 0x07 16082527734SSukumar Swaminathan #define MBX_PART_SLIM 0x08 16182527734SSukumar Swaminathan #define MBX_CONFIG_RING 0x09 16282527734SSukumar Swaminathan #define MBX_RESET_RING 0x0A 16382527734SSukumar Swaminathan #define MBX_READ_CONFIG 0x0B 16482527734SSukumar Swaminathan #define MBX_READ_RCONFIG 0x0C 16582527734SSukumar Swaminathan #define MBX_READ_SPARM 0x0D 16682527734SSukumar Swaminathan #define MBX_READ_STATUS 0x0E 16782527734SSukumar Swaminathan #define MBX_READ_RPI 0x0F 16882527734SSukumar Swaminathan #define MBX_READ_XRI 0x10 16982527734SSukumar Swaminathan #define MBX_READ_REV 0x11 17082527734SSukumar Swaminathan #define MBX_READ_LNK_STAT 0x12 17182527734SSukumar Swaminathan #define MBX_REG_LOGIN 0x13 17282527734SSukumar Swaminathan #define MBX_UNREG_LOGIN 0x14 17382527734SSukumar Swaminathan #define MBX_READ_LA 0x15 17482527734SSukumar Swaminathan #define MBX_CLEAR_LA 0x16 17582527734SSukumar Swaminathan #define MBX_DUMP_MEMORY 0x17 17682527734SSukumar Swaminathan #define MBX_DUMP_CONTEXT 0x18 17782527734SSukumar Swaminathan #define MBX_RUN_DIAGS 0x19 17882527734SSukumar Swaminathan #define MBX_RESTART 0x1A 17982527734SSukumar Swaminathan #define MBX_UPDATE_CFG 0x1B 18082527734SSukumar Swaminathan #define MBX_DOWN_LOAD 0x1C 18182527734SSukumar Swaminathan #define MBX_DEL_LD_ENTRY 0x1D 18282527734SSukumar Swaminathan #define MBX_RUN_PROGRAM 0x1E 18382527734SSukumar Swaminathan #define MBX_SET_MASK 0x20 18482527734SSukumar Swaminathan #define MBX_SET_SLIM 0x21 18582527734SSukumar Swaminathan #define MBX_UNREG_D_ID 0x23 18682527734SSukumar Swaminathan #define MBX_KILL_BOARD 0x24 18782527734SSukumar Swaminathan #define MBX_CONFIG_FARP 0x25 18882527734SSukumar Swaminathan #define MBX_WRITE_VPARMS 0x32 18982527734SSukumar Swaminathan #define MBX_LOAD_AREA 0x81 19082527734SSukumar Swaminathan #define MBX_RUN_BIU_DIAG64 0x84 19182527734SSukumar Swaminathan #define MBX_CONFIG_PORT 0x88 19282527734SSukumar Swaminathan #define MBX_READ_SPARM64 0x8D 19382527734SSukumar Swaminathan #define MBX_READ_RPI64 0x8F 19482527734SSukumar Swaminathan #define MBX_CONFIG_MSI 0x90 19582527734SSukumar Swaminathan #define MBX_REG_LOGIN64 0x93 19682527734SSukumar Swaminathan #define MBX_READ_LA64 0x95 19782527734SSukumar Swaminathan #define MBX_FLASH_WR_ULA 0x98 19882527734SSukumar Swaminathan #define MBX_SET_DEBUG 0x99 199fe199829SSukumar Swaminathan #define MBX_SLI_CONFIG 0x9B 20082527734SSukumar Swaminathan #define MBX_LOAD_EXP_ROM 0x9C 20182527734SSukumar Swaminathan #define MBX_REQUEST_FEATURES 0x9D 20282527734SSukumar Swaminathan #define MBX_RESUME_RPI 0x9E 20382527734SSukumar Swaminathan #define MBX_REG_VFI 0x9F 20482527734SSukumar Swaminathan #define MBX_REG_FCFI 0xA0 20582527734SSukumar Swaminathan #define MBX_UNREG_VFI 0xA1 20682527734SSukumar Swaminathan #define MBX_UNREG_FCFI 0xA2 20782527734SSukumar Swaminathan #define MBX_INIT_VFI 0xA3 20882527734SSukumar Swaminathan #define MBX_INIT_VPI 0xA4 20982527734SSukumar Swaminathan #define MBX_ACCESS_VDATA 0xA5 21082527734SSukumar Swaminathan #define MBX_MAX_CMDS 0xA6 21182527734SSukumar Swaminathan #define MBX_SLI2_CMD_MASK 0x80 21282527734SSukumar Swaminathan 21382527734SSukumar Swaminathan 214291a2b48SSukumar Swaminathan typedef struct read_sparm_var 215291a2b48SSukumar Swaminathan { 216291a2b48SSukumar Swaminathan uint32_t rsvd1; 217291a2b48SSukumar Swaminathan uint32_t rsvd2; 218291a2b48SSukumar Swaminathan union 219291a2b48SSukumar Swaminathan { 220291a2b48SSukumar Swaminathan ulp_bde_t sp; 221291a2b48SSukumar Swaminathan ulp_bde64_t sp64; 222fcf3ce44SJohn Forte } un; 223fcf3ce44SJohn Forte } read_sparm_var_t; 224fcf3ce44SJohn Forte 22582527734SSukumar Swaminathan 226291a2b48SSukumar Swaminathan typedef struct read_rev_var 227291a2b48SSukumar Swaminathan { 228fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 229291a2b48SSukumar Swaminathan uint32_t cv:1; 230291a2b48SSukumar Swaminathan uint32_t rr:1; 231291a2b48SSukumar Swaminathan uint32_t rsvd1:29; 232291a2b48SSukumar Swaminathan uint32_t rv:1; 233fcf3ce44SJohn Forte #endif 234fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 235291a2b48SSukumar Swaminathan uint32_t rv:1; 236291a2b48SSukumar Swaminathan uint32_t rsvd1:29; 237291a2b48SSukumar Swaminathan uint32_t rr:1; 238291a2b48SSukumar Swaminathan uint32_t cv:1; 239fcf3ce44SJohn Forte #endif 240291a2b48SSukumar Swaminathan uint32_t biuRev; 241291a2b48SSukumar Swaminathan uint32_t smRev; 242291a2b48SSukumar Swaminathan union 243291a2b48SSukumar Swaminathan { 244291a2b48SSukumar Swaminathan uint32_t smFwRev; 245291a2b48SSukumar Swaminathan struct 246291a2b48SSukumar Swaminathan { 247fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 248291a2b48SSukumar Swaminathan uint8_t ProgType; 249291a2b48SSukumar Swaminathan uint8_t ProgId; 250291a2b48SSukumar Swaminathan uint16_t ProgVer:4; 251291a2b48SSukumar Swaminathan uint16_t ProgRev:4; 252291a2b48SSukumar Swaminathan uint16_t ProgFixLvl:2; 253291a2b48SSukumar Swaminathan uint16_t ProgDistType:2; 254291a2b48SSukumar Swaminathan uint16_t DistCnt:4; 255fcf3ce44SJohn Forte #endif 256fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 257291a2b48SSukumar Swaminathan uint16_t DistCnt:4; 258291a2b48SSukumar Swaminathan uint16_t ProgDistType:2; 259291a2b48SSukumar Swaminathan uint16_t ProgFixLvl:2; 260291a2b48SSukumar Swaminathan uint16_t ProgRev:4; 261291a2b48SSukumar Swaminathan uint16_t ProgVer:4; 262291a2b48SSukumar Swaminathan uint8_t ProgId; 263291a2b48SSukumar Swaminathan uint8_t ProgType; 264fcf3ce44SJohn Forte #endif 265fcf3ce44SJohn Forte } b; 266fcf3ce44SJohn Forte } un; 267291a2b48SSukumar Swaminathan uint32_t endecRev; 268fcf3ce44SJohn Forte 269fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 270291a2b48SSukumar Swaminathan uint8_t feaLevelHigh; 271291a2b48SSukumar Swaminathan uint8_t feaLevelLow; 272291a2b48SSukumar Swaminathan uint8_t fcphHigh; 273291a2b48SSukumar Swaminathan uint8_t fcphLow; 274fcf3ce44SJohn Forte #endif 275fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 276291a2b48SSukumar Swaminathan uint8_t fcphLow; 277291a2b48SSukumar Swaminathan uint8_t fcphHigh; 278291a2b48SSukumar Swaminathan uint8_t feaLevelLow; 279291a2b48SSukumar Swaminathan uint8_t feaLevelHigh; 280fcf3ce44SJohn Forte #endif 281291a2b48SSukumar Swaminathan uint32_t postKernRev; 282291a2b48SSukumar Swaminathan uint32_t opFwRev; 283291a2b48SSukumar Swaminathan uint8_t opFwName[16]; 284291a2b48SSukumar Swaminathan uint32_t sli1FwRev; 285291a2b48SSukumar Swaminathan uint8_t sli1FwName[16]; 286291a2b48SSukumar Swaminathan uint32_t sli2FwRev; 287291a2b48SSukumar Swaminathan uint8_t sli2FwName[16]; 288fcf3ce44SJohn Forte } read_rev_var_t; 289fcf3ce44SJohn Forte 290fcf3ce44SJohn Forte 291291a2b48SSukumar Swaminathan typedef struct dump_var 292291a2b48SSukumar Swaminathan { 293fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 294291a2b48SSukumar Swaminathan uint32_t rsvd:25; 295291a2b48SSukumar Swaminathan uint32_t ra:1; 296291a2b48SSukumar Swaminathan uint32_t co:1; 297291a2b48SSukumar Swaminathan uint32_t cv:1; 298291a2b48SSukumar Swaminathan uint32_t type:4; 299291a2b48SSukumar Swaminathan 300291a2b48SSukumar Swaminathan uint32_t entry_index:16; 301291a2b48SSukumar Swaminathan uint32_t region_id:16; 302fcf3ce44SJohn Forte #endif 303fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 304291a2b48SSukumar Swaminathan uint32_t type:4; 305291a2b48SSukumar Swaminathan uint32_t cv:1; 306291a2b48SSukumar Swaminathan uint32_t co:1; 307291a2b48SSukumar Swaminathan uint32_t ra:1; 308291a2b48SSukumar Swaminathan uint32_t rsvd:25; 309291a2b48SSukumar Swaminathan 310291a2b48SSukumar Swaminathan uint32_t region_id:16; 311291a2b48SSukumar Swaminathan uint32_t entry_index:16; 312fcf3ce44SJohn Forte #endif 313291a2b48SSukumar Swaminathan uint32_t base_adr; 314291a2b48SSukumar Swaminathan uint32_t word_cnt; 315291a2b48SSukumar Swaminathan uint32_t resp_offset; 316fcf3ce44SJohn Forte } dump_var_t; 317fcf3ce44SJohn Forte 318fcf3ce44SJohn Forte 31982527734SSukumar Swaminathan typedef struct dump4_var 32082527734SSukumar Swaminathan { 32182527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 32282527734SSukumar Swaminathan uint32_t link:8; 32382527734SSukumar Swaminathan uint32_t rsvd:20; 32482527734SSukumar Swaminathan uint32_t type:4; 32582527734SSukumar Swaminathan 32682527734SSukumar Swaminathan uint32_t entry_index:16; 32782527734SSukumar Swaminathan uint32_t region_id:16; 32882527734SSukumar Swaminathan #endif 32982527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 33082527734SSukumar Swaminathan uint32_t type:4; 33182527734SSukumar Swaminathan uint32_t rsvd:20; 33282527734SSukumar Swaminathan uint32_t link:8; 33382527734SSukumar Swaminathan 33482527734SSukumar Swaminathan uint32_t region_id:16; 33582527734SSukumar Swaminathan uint32_t entry_index:16; 33682527734SSukumar Swaminathan #endif 33782527734SSukumar Swaminathan uint32_t available_cnt; 33882527734SSukumar Swaminathan uint32_t addrLow; 33982527734SSukumar Swaminathan uint32_t addrHigh; 34082527734SSukumar Swaminathan uint32_t rsp_cnt; 34182527734SSukumar Swaminathan } dump4_var_t; 34282527734SSukumar Swaminathan 34382527734SSukumar Swaminathan 34482527734SSukumar Swaminathan typedef struct update_cfg 34582527734SSukumar Swaminathan { 34682527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 34782527734SSukumar Swaminathan uint32_t rsvd2:16; 34882527734SSukumar Swaminathan uint32_t proc_type:8; 34982527734SSukumar Swaminathan uint32_t rsvd1:1; 35082527734SSukumar Swaminathan uint32_t Abit:1; 35182527734SSukumar Swaminathan uint32_t DIbit:1; 35282527734SSukumar Swaminathan uint32_t Vbit:1; 35382527734SSukumar Swaminathan uint32_t req_type:4; 35482527734SSukumar Swaminathan #define INIT_REGION 1 35582527734SSukumar Swaminathan #define UPDATE_DATA 2 35682527734SSukumar Swaminathan #define CLEAN_UP_CFG 3 35782527734SSukumar Swaminathan uint32_t entry_len:16; 35882527734SSukumar Swaminathan uint32_t region_id:16; 35982527734SSukumar Swaminathan #endif 36082527734SSukumar Swaminathan 36182527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 36282527734SSukumar Swaminathan uint32_t req_type:4; 36382527734SSukumar Swaminathan #define INIT_REGION 1 36482527734SSukumar Swaminathan #define UPDATE_DATA 2 36582527734SSukumar Swaminathan #define CLEAN_UP_CFG 3 36682527734SSukumar Swaminathan uint32_t Vbit:1; 36782527734SSukumar Swaminathan uint32_t DIbit:1; 36882527734SSukumar Swaminathan uint32_t Abit:1; 36982527734SSukumar Swaminathan uint32_t rsvd1:1; 37082527734SSukumar Swaminathan uint32_t proc_type:8; 37182527734SSukumar Swaminathan uint32_t rsvd2:16; 37282527734SSukumar Swaminathan 37382527734SSukumar Swaminathan uint32_t region_id:16; 37482527734SSukumar Swaminathan uint32_t entry_len:16; 37582527734SSukumar Swaminathan #endif 37682527734SSukumar Swaminathan 37782527734SSukumar Swaminathan uint32_t rsp_info; 37882527734SSukumar Swaminathan uint32_t byte_len; 37982527734SSukumar Swaminathan uint32_t cfg_data; 38082527734SSukumar Swaminathan } update_cfg_var_t; 38182527734SSukumar Swaminathan 38282527734SSukumar Swaminathan 383fe199829SSukumar Swaminathan 384fe199829SSukumar Swaminathan typedef struct 385fe199829SSukumar Swaminathan { 386fe199829SSukumar Swaminathan union { 387fe199829SSukumar Swaminathan struct { 388fe199829SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 389fe199829SSukumar Swaminathan uint8_t domain; 390fe199829SSukumar Swaminathan uint8_t port_number; 391fe199829SSukumar Swaminathan uint8_t subsystem; 392fe199829SSukumar Swaminathan uint8_t opcode; 393fe199829SSukumar Swaminathan #else 394fe199829SSukumar Swaminathan uint8_t opcode; 395fe199829SSukumar Swaminathan uint8_t subsystem; 396fe199829SSukumar Swaminathan uint8_t port_number; 397fe199829SSukumar Swaminathan uint8_t domain; 398fe199829SSukumar Swaminathan #endif 399fe199829SSukumar Swaminathan uint32_t timeout; 400fe199829SSukumar Swaminathan uint32_t request_length; 401fe199829SSukumar Swaminathan uint32_t rsvd0; 402fe199829SSukumar Swaminathan }req; 403fe199829SSukumar Swaminathan 404fe199829SSukumar Swaminathan struct { 405fe199829SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 406fe199829SSukumar Swaminathan /* dw 0 */ 407fe199829SSukumar Swaminathan uint8_t domain; 408fe199829SSukumar Swaminathan uint8_t rsvd0; 409fe199829SSukumar Swaminathan uint8_t subsystem; 410fe199829SSukumar Swaminathan uint8_t opcode; 411fe199829SSukumar Swaminathan 412fe199829SSukumar Swaminathan /* dw 1 */ 413fe199829SSukumar Swaminathan uint16_t rsvd1; 414fe199829SSukumar Swaminathan uint8_t additional_status; 415fe199829SSukumar Swaminathan uint8_t status; 416fe199829SSukumar Swaminathan #else 417fe199829SSukumar Swaminathan /* dw 0 */ 418fe199829SSukumar Swaminathan uint8_t opcode; 419fe199829SSukumar Swaminathan uint8_t subsystem; 420fe199829SSukumar Swaminathan uint8_t rsvd0; 421fe199829SSukumar Swaminathan uint8_t domain; 422fe199829SSukumar Swaminathan 423fe199829SSukumar Swaminathan /* dw 1 */ 424fe199829SSukumar Swaminathan uint8_t status; 425fe199829SSukumar Swaminathan uint8_t additional_status; 426fe199829SSukumar Swaminathan uint16_t rsvd1; 427fe199829SSukumar Swaminathan #endif 428fe199829SSukumar Swaminathan 429fe199829SSukumar Swaminathan uint32_t rsp_length; 430fe199829SSukumar Swaminathan uint32_t actual_rsp_length; 431fe199829SSukumar Swaminathan }rsp; 432fe199829SSukumar Swaminathan uint32_t dw[4]; 433fe199829SSukumar Swaminathan }u0; 434fe199829SSukumar Swaminathan } common_hdr_t; 435fe199829SSukumar Swaminathan 436fe199829SSukumar Swaminathan typedef struct get_oem_attrs 437fe199829SSukumar Swaminathan { 438fe199829SSukumar Swaminathan common_hdr_t hdr; 439fe199829SSukumar Swaminathan union { 440fe199829SSukumar Swaminathan struct { 441fe199829SSukumar Swaminathan uint32_t rsvd0; 442fe199829SSukumar Swaminathan }req; 443fe199829SSukumar Swaminathan 444fe199829SSukumar Swaminathan struct { 445fe199829SSukumar Swaminathan uint8_t emulex_serial_number[12]; 446fe199829SSukumar Swaminathan uint8_t oem_serial_number[24]; 447fe199829SSukumar Swaminathan uint32_t oem_personality_mgmt_word; 448fe199829SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 449fe199829SSukumar Swaminathan uint8_t rsvd[3]; 450fe199829SSukumar Swaminathan uint8_t oem_current_personality; 451fe199829SSukumar Swaminathan #else 452fe199829SSukumar Swaminathan uint8_t oem_current_personality; 453fe199829SSukumar Swaminathan uint8_t rsvd[3]; 454fe199829SSukumar Swaminathan #endif 455fe199829SSukumar Swaminathan 456fe199829SSukumar Swaminathan }rsp; 457fe199829SSukumar Swaminathan }params; 458fe199829SSukumar Swaminathan 459fe199829SSukumar Swaminathan } get_oem_attrs_t; 460fe199829SSukumar Swaminathan 461fe199829SSukumar Swaminathan 462fe199829SSukumar Swaminathan typedef struct read_write_flashrom { 463fe199829SSukumar Swaminathan common_hdr_t hdr; 464fe199829SSukumar Swaminathan uint32_t flash_op_code; 465fe199829SSukumar Swaminathan uint32_t flash_op_type; 466fe199829SSukumar Swaminathan uint32_t data_buffer_size; 467fe199829SSukumar Swaminathan uint32_t data_offset; 468fe199829SSukumar Swaminathan uint8_t data_buffer[4]; 469fe199829SSukumar Swaminathan } read_write_flashrom_t; 470fe199829SSukumar Swaminathan 471fe199829SSukumar Swaminathan 472fe199829SSukumar Swaminathan typedef struct 473fe199829SSukumar Swaminathan { 474fe199829SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 475fe199829SSukumar Swaminathan uint32_t special:8; /* word 1 */ 476fe199829SSukumar Swaminathan uint32_t reserved2:16; /* word 1 */ 477fe199829SSukumar Swaminathan uint32_t sge_cnt:5; /* word 1 */ 478fe199829SSukumar Swaminathan uint32_t reserved1:2; /* word 1 */ 479fe199829SSukumar Swaminathan uint32_t embedded:1; /* word 1 */ 480fe199829SSukumar Swaminathan #endif 481fe199829SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 482fe199829SSukumar Swaminathan uint32_t embedded:1; /* word 1 */ 483fe199829SSukumar Swaminathan uint32_t reserved1:2; /* word 1 */ 484fe199829SSukumar Swaminathan uint32_t sge_cnt:5; /* word 1 */ 485fe199829SSukumar Swaminathan uint32_t reserved2:16; /* word 1 */ 486fe199829SSukumar Swaminathan uint32_t special:8; /* word 1 */ 487fe199829SSukumar Swaminathan #endif 488fe199829SSukumar Swaminathan uint32_t payload_length; /* word 2 */ 489fe199829SSukumar Swaminathan uint32_t tag_low; /* word 3 */ 490fe199829SSukumar Swaminathan uint32_t tag_hi; /* word 4 */ 491fe199829SSukumar Swaminathan uint32_t reserved3; /* word 5 */ 492fe199829SSukumar Swaminathan 493fe199829SSukumar Swaminathan } be_req_header_t; 494fe199829SSukumar Swaminathan 495fe199829SSukumar Swaminathan typedef struct 496fe199829SSukumar Swaminathan { 497fe199829SSukumar Swaminathan be_req_header_t be; 498fe199829SSukumar Swaminathan 499fe199829SSukumar Swaminathan union 500fe199829SSukumar Swaminathan { 501fe199829SSukumar Swaminathan get_oem_attrs_t varOemAttrs; 502fe199829SSukumar Swaminathan read_write_flashrom_t varFlashRom; 503fe199829SSukumar Swaminathan } un; 504fe199829SSukumar Swaminathan 505fe199829SSukumar Swaminathan } sli_config_var_t; 506fe199829SSukumar Swaminathan 507fe199829SSukumar Swaminathan 508291a2b48SSukumar Swaminathan typedef struct read_cfg_var 509291a2b48SSukumar Swaminathan { 510fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 511291a2b48SSukumar Swaminathan uint32_t cr:1; 512291a2b48SSukumar Swaminathan uint32_t ci:1; 513291a2b48SSukumar Swaminathan uint32_t cr_delay:6; 514291a2b48SSukumar Swaminathan uint32_t cr_count:8; 515291a2b48SSukumar Swaminathan uint32_t InitBBC: