1fcf3ce44SJohn Forte /* 2fcf3ce44SJohn Forte * CDDL HEADER START 3fcf3ce44SJohn Forte * 4fcf3ce44SJohn Forte * The contents of this file are subject to the terms of the 5fcf3ce44SJohn Forte * Common Development and Distribution License (the "License"). 6fcf3ce44SJohn Forte * You may not use this file except in compliance with the License. 7fcf3ce44SJohn Forte * 8*8f23e9faSHans Rosenfeld * You can obtain a copy of the license at 9*8f23e9faSHans Rosenfeld * http://www.opensource.org/licenses/cddl1.txt. 10fcf3ce44SJohn Forte * See the License for the specific language governing permissions 11fcf3ce44SJohn Forte * and limitations under the License. 12fcf3ce44SJohn Forte * 13fcf3ce44SJohn Forte * When distributing Covered Code, include this CDDL HEADER in each 14fcf3ce44SJohn Forte * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15fcf3ce44SJohn Forte * If applicable, add the following below this CDDL HEADER, with the 16fcf3ce44SJohn Forte * fields enclosed by brackets "[]" replaced with your own identifying 17fcf3ce44SJohn Forte * information: Portions Copyright [yyyy] [name of copyright owner] 18fcf3ce44SJohn Forte * 19fcf3ce44SJohn Forte * CDDL HEADER END 20fcf3ce44SJohn Forte */ 21fcf3ce44SJohn Forte 22fcf3ce44SJohn Forte /* 23*8f23e9faSHans Rosenfeld * Copyright (c) 2004-2011 Emulex. All rights reserved. 2482527734SSukumar Swaminathan * Use is subject to license terms. 25fcf3ce44SJohn Forte */ 26fcf3ce44SJohn Forte 27fcf3ce44SJohn Forte #ifndef _EMLXS_DFCLIB_H 28fcf3ce44SJohn Forte #define _EMLXS_DFCLIB_H 29fcf3ce44SJohn Forte 30fcf3ce44SJohn Forte #ifdef __cplusplus 31fcf3ce44SJohn Forte extern "C" { 32fcf3ce44SJohn Forte #endif 33fcf3ce44SJohn Forte 34fcf3ce44SJohn Forte #define MAX_DFC_EVENTS 16 35fcf3ce44SJohn Forte #define MAX_EMLXS_BRDS 128 36fcf3ce44SJohn Forte #define MAX_CFG_PARAM 64 3782527734SSukumar Swaminathan #define MAX_NODES 4096 38fcf3ce44SJohn Forte 39fcf3ce44SJohn Forte #ifndef MAX_VPORTS 40fcf3ce44SJohn Forte #define MAX_VPORTS 256 41291a2b48SSukumar Swaminathan #endif /* MAX_VPORTS */ 42fcf3ce44SJohn Forte 43291a2b48SSukumar Swaminathan #ifdef EMLXS_SPARC 44fcf3ce44SJohn Forte #define EMLXS_BIG_ENDIAN 45291a2b48SSukumar Swaminathan #endif /* EMLXS_SPARC */ 46291a2b48SSukumar Swaminathan 47291a2b48SSukumar Swaminathan #ifdef EMLXS_I386 48fcf3ce44SJohn Forte #define EMLXS_LITTLE_ENDIAN 49291a2b48SSukumar Swaminathan #endif /* EMLXS_I386 */ 50fcf3ce44SJohn Forte 51fcf3ce44SJohn Forte 52291a2b48SSukumar Swaminathan typedef struct brdinfo 53291a2b48SSukumar Swaminathan { 54fcf3ce44SJohn Forte uint32_t a_mem_hi; /* memory identifier for adapter access */ 55fcf3ce44SJohn Forte uint32_t a_mem_low; /* memory identifier for adapter access */ 56fcf3ce44SJohn Forte uint32_t a_flash_hi; /* memory identifier for adapter access */ 57fcf3ce44SJohn Forte uint32_t a_flash_low; /* memory identifier for adapter access */ 58fcf3ce44SJohn Forte uint32_t a_ctlreg_hi; /* memory identifier for adapter access */ 59fcf3ce44SJohn Forte uint32_t a_ctlreg_low; /* memory identifier for adapter access */ 60fcf3ce44SJohn Forte uint32_t a_intrlvl; /* interrupt level for adapter */ 61fcf3ce44SJohn Forte uint32_t a_pci; /* PCI identifier (device / vendor id) */ 62fcf3ce44SJohn Forte uint32_t a_busid; /* identifier of PCI bus adapter is on */ 63fcf3ce44SJohn Forte uint32_t a_devid; /* identifier of PCI device number */ 64291a2b48SSukumar Swaminathan uint8_t a_rsvd1; /* reserved for future use */ 65291a2b48SSukumar Swaminathan uint8_t a_rsvd2; /* reserved for future use */ 66291a2b48SSukumar Swaminathan uint8_t a_siglvl; /* signal handler used by library */ 67291a2b48SSukumar Swaminathan uint8_t a_ddi; /* identifier device driver instance number */ 68fcf3ce44SJohn Forte uint32_t a_onmask; /* mask of ONDI primatives supported */ 69fcf3ce44SJohn Forte uint32_t a_offmask; /* mask of OFFDI primatives supported */ 70291a2b48SSukumar Swaminathan uint8_t a_drvrid[16]; /* driver version */ 71291a2b48SSukumar Swaminathan uint8_t a_fwname[32]; /* firmware version */ 72fcf3ce44SJohn Forte } brdinfo_t; 73fcf3ce44SJohn Forte 74fcf3ce44SJohn Forte 75291a2b48SSukumar Swaminathan typedef struct dfc_brdinfo 76291a2b48SSukumar Swaminathan { 77fcf3ce44SJohn Forte uint32_t a_mem_hi; /* memory identifier for adapter access */ 78fcf3ce44SJohn Forte uint32_t a_mem_low; /* memory identifier for adapter access */ 79fcf3ce44SJohn Forte uint32_t a_flash_hi; /* memory identifier for adapter access */ 80fcf3ce44SJohn Forte uint32_t a_flash_low; /* memory identifier for adapter access */ 81fcf3ce44SJohn Forte uint32_t a_ctlreg_hi; /* memory identifier for adapter access */ 82fcf3ce44SJohn Forte uint32_t a_ctlreg_low; /* memory identifier for adapter access */ 83fcf3ce44SJohn Forte uint32_t a_intrlvl; /* interrupt level for adapter */ 84fcf3ce44SJohn Forte uint32_t a_pci; /* PCI identifier (device / vendor id) */ 85fcf3ce44SJohn Forte uint32_t a_busid; /* identifier of PCI bus adapter is on */ 86fcf3ce44SJohn Forte uint32_t a_devid; /* identifier of PCI device number */ 8782527734SSukumar Swaminathan uint8_t a_pciFunc; /* identifier of PCI function number */ 88291a2b48SSukumar Swaminathan uint8_t a_siglvl; /* signal handler used by library */ 89fcf3ce44SJohn Forte uint16_t a_ddi; /* identifier device driver instance number */ 90fcf3ce44SJohn Forte uint32_t a_onmask; /* mask of ONDI primatives supported */ 91fcf3ce44SJohn Forte uint32_t a_offmask; /* mask of OFFDI primatives supported */ 92291a2b48SSukumar Swaminathan uint8_t a_drvrid[16]; /* driver version */ 93291a2b48SSukumar Swaminathan uint8_t a_fwname[32]; /* firmware version */ 94291a2b48SSukumar Swaminathan uint8_t a_wwpn[8]; /* worldwide portname */ 95fcf3ce44SJohn Forte } dfc_brdinfo_t; 96fcf3ce44SJohn Forte 97fcf3ce44SJohn Forte 9882527734SSukumar Swaminathan #define PADDR_LO(addr) ((uint32_t)(((uint64_t)(addr)) & 0xffffffff)) 9982527734SSukumar Swaminathan #define PADDR_HI(addr) ((uint32_t)(((uint64_t)(addr)) >> 32)) 10082527734SSukumar Swaminathan #define PADDR(high, low) ((uint64_t)((((uint64_t)(high)) << 32) \ 101291a2b48SSukumar Swaminathan | (((uint64_t)(low)) & 0xffffffff))) 102fcf3ce44SJohn Forte 103291a2b48SSukumar Swaminathan typedef struct ulp_bde 104291a2b48SSukumar Swaminathan { 105291a2b48SSukumar Swaminathan uint32_t bdeAddress; 106fcf3ce44SJohn Forte 107fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 108291a2b48SSukumar Swaminathan uint32_t bdeReserved:4; 109291a2b48SSukumar Swaminathan uint32_t bdeAddrHigh:4; 110291a2b48SSukumar Swaminathan uint32_t bdeSize:24; 111fcf3ce44SJohn Forte #endif 112fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 113291a2b48SSukumar Swaminathan uint32_t bdeSize:24; 114291a2b48SSukumar Swaminathan uint32_t bdeAddrHigh:4; 115291a2b48SSukumar Swaminathan uint32_t bdeReserved:4; 116fcf3ce44SJohn Forte #endif 117fcf3ce44SJohn Forte } ulp_bde_t; 118fcf3ce44SJohn Forte 119291a2b48SSukumar Swaminathan typedef struct ulp_bde64 120291a2b48SSukumar Swaminathan { 121291a2b48SSukumar Swaminathan union 122291a2b48SSukumar Swaminathan { 123291a2b48SSukumar Swaminathan uint32_t w; 124291a2b48SSukumar Swaminathan struct 125291a2b48SSukumar Swaminathan { 126fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 127291a2b48SSukumar Swaminathan uint32_t bdeFlags:8; 128291a2b48SSukumar Swaminathan uint32_t bdeSize:24; 129fcf3ce44SJohn Forte #endif 130fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 131291a2b48SSukumar Swaminathan uint32_t bdeSize:24; 132291a2b48SSukumar Swaminathan uint32_t bdeFlags:8; 133fcf3ce44SJohn Forte #endif 134fcf3ce44SJohn Forte 135291a2b48SSukumar Swaminathan #define BUFF_USE_RSVD 0x01 /* bdeFlags */ 136291a2b48SSukumar Swaminathan #define BUFF_USE_INTRPT 0x02 /* Not Implemented with LP6000 */ 137291a2b48SSukumar Swaminathan #define BUFF_USE_CMND 0x04 /* Optional, 1=cmd/rsp 0=data buffer */ 138291a2b48SSukumar Swaminathan #define BUFF_USE_RCV 0x08 /* "" "", 1=rcv buffer, 0=xmit buffer */ 139291a2b48SSukumar Swaminathan #define BUFF_TYPE_32BIT 0x10 /* "" "", 1=32 bit addr 0=64 bit addr */ 140291a2b48SSukumar Swaminathan #define BUFF_TYPE_SPECIAL 0x20 /* Not Implemented with LP6000 */ 141291a2b48SSukumar Swaminathan #define BUFF_TYPE_BDL 0x40 /* Optional, may be set in BDL */ 142291a2b48SSukumar Swaminathan #define BUFF_TYPE_INVALID 0x80 /* "" "" */ 143fcf3ce44SJohn Forte } f; 144fcf3ce44SJohn Forte } tus; 145fcf3ce44SJohn Forte 146291a2b48SSukumar Swaminathan uint32_t addrLow; 147291a2b48SSukumar Swaminathan uint32_t addrHigh; 148fcf3ce44SJohn Forte } ulp_bde64_t; 149fcf3ce44SJohn Forte 15082527734SSukumar Swaminathan 15182527734SSukumar Swaminathan /* ==== Mailbox Commands ==== */ 15282527734SSukumar Swaminathan #define MBX_SHUTDOWN 0x00 15382527734SSukumar Swaminathan #define MBX_LOAD_SM 0x01 15482527734SSukumar Swaminathan #define MBX_READ_NV 0x02 15582527734SSukumar Swaminathan #define MBX_WRITE_NV 0x03 15682527734SSukumar Swaminathan #define MBX_RUN_BIU_DIAG 0x04 15782527734SSukumar Swaminathan #define MBX_INIT_LINK 0x05 15882527734SSukumar Swaminathan #define MBX_DOWN_LINK 0x06 15982527734SSukumar Swaminathan #define MBX_CONFIG_LINK 0x07 16082527734SSukumar Swaminathan #define MBX_PART_SLIM 0x08 16182527734SSukumar Swaminathan #define MBX_CONFIG_RING 0x09 16282527734SSukumar Swaminathan #define MBX_RESET_RING 0x0A 16382527734SSukumar Swaminathan #define MBX_READ_CONFIG 0x0B 16482527734SSukumar Swaminathan #define MBX_READ_RCONFIG 0x0C 16582527734SSukumar Swaminathan #define MBX_READ_SPARM 0x0D 16682527734SSukumar Swaminathan #define MBX_READ_STATUS 0x0E 16782527734SSukumar Swaminathan #define MBX_READ_RPI 0x0F 16882527734SSukumar Swaminathan #define MBX_READ_XRI 0x10 16982527734SSukumar Swaminathan #define MBX_READ_REV 0x11 17082527734SSukumar Swaminathan #define MBX_READ_LNK_STAT 0x12 17182527734SSukumar Swaminathan #define MBX_REG_LOGIN 0x13 17282527734SSukumar Swaminathan #define MBX_UNREG_LOGIN 0x14 17382527734SSukumar Swaminathan #define MBX_READ_LA 0x15 17482527734SSukumar Swaminathan #define MBX_CLEAR_LA 0x16 17582527734SSukumar Swaminathan #define MBX_DUMP_MEMORY 0x17 17682527734SSukumar Swaminathan #define MBX_DUMP_CONTEXT 0x18 17782527734SSukumar Swaminathan #define MBX_RUN_DIAGS 0x19 17882527734SSukumar Swaminathan #define MBX_RESTART 0x1A 17982527734SSukumar Swaminathan #define MBX_UPDATE_CFG 0x1B 18082527734SSukumar Swaminathan #define MBX_DOWN_LOAD 0x1C 18182527734SSukumar Swaminathan #define MBX_DEL_LD_ENTRY 0x1D 18282527734SSukumar Swaminathan #define MBX_RUN_PROGRAM 0x1E 18382527734SSukumar Swaminathan #define MBX_SET_MASK 0x20 18482527734SSukumar Swaminathan #define MBX_SET_SLIM 0x21 18582527734SSukumar Swaminathan #define MBX_UNREG_D_ID 0x23 18682527734SSukumar Swaminathan #define MBX_KILL_BOARD 0x24 18782527734SSukumar Swaminathan #define MBX_CONFIG_FARP 0x25 18882527734SSukumar Swaminathan #define MBX_WRITE_VPARMS 0x32 18982527734SSukumar Swaminathan #define MBX_LOAD_AREA 0x81 19082527734SSukumar Swaminathan #define MBX_RUN_BIU_DIAG64 0x84 19182527734SSukumar Swaminathan #define MBX_CONFIG_PORT 0x88 19282527734SSukumar Swaminathan #define MBX_READ_SPARM64 0x8D 19382527734SSukumar Swaminathan #define MBX_READ_RPI64 0x8F 19482527734SSukumar Swaminathan #define MBX_CONFIG_MSI 0x90 19582527734SSukumar Swaminathan #define MBX_REG_LOGIN64 0x93 19682527734SSukumar Swaminathan #define MBX_READ_LA64 0x95 19782527734SSukumar Swaminathan #define MBX_FLASH_WR_ULA 0x98 19882527734SSukumar Swaminathan #define MBX_SET_DEBUG 0x99 199fe199829SSukumar Swaminathan #define MBX_SLI_CONFIG 0x9B 20082527734SSukumar Swaminathan #define MBX_LOAD_EXP_ROM 0x9C 20182527734SSukumar Swaminathan #define MBX_REQUEST_FEATURES 0x9D 20282527734SSukumar Swaminathan #define MBX_RESUME_RPI 0x9E 20382527734SSukumar Swaminathan #define MBX_REG_VFI 0x9F 20482527734SSukumar Swaminathan #define MBX_REG_FCFI 0xA0 20582527734SSukumar Swaminathan #define MBX_UNREG_VFI 0xA1 20682527734SSukumar Swaminathan #define MBX_UNREG_FCFI 0xA2 20782527734SSukumar Swaminathan #define MBX_INIT_VFI 0xA3 20882527734SSukumar Swaminathan #define MBX_INIT_VPI 0xA4 20982527734SSukumar Swaminathan #define MBX_ACCESS_VDATA 0xA5 21082527734SSukumar Swaminathan #define MBX_MAX_CMDS 0xA6 21182527734SSukumar Swaminathan #define MBX_SLI2_CMD_MASK 0x80 21282527734SSukumar Swaminathan 21382527734SSukumar Swaminathan 214291a2b48SSukumar Swaminathan typedef struct read_sparm_var 215291a2b48SSukumar Swaminathan { 216291a2b48SSukumar Swaminathan uint32_t rsvd1; 217291a2b48SSukumar Swaminathan uint32_t rsvd2; 218291a2b48SSukumar Swaminathan union 219291a2b48SSukumar Swaminathan { 220291a2b48SSukumar Swaminathan ulp_bde_t sp; 221291a2b48SSukumar Swaminathan ulp_bde64_t sp64; 222fcf3ce44SJohn Forte } un; 223fcf3ce44SJohn Forte } read_sparm_var_t; 224fcf3ce44SJohn Forte 22582527734SSukumar Swaminathan 226291a2b48SSukumar Swaminathan typedef struct read_rev_var 227291a2b48SSukumar Swaminathan { 228fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 229291a2b48SSukumar Swaminathan uint32_t cv:1; 230291a2b48SSukumar Swaminathan uint32_t rr:1; 231291a2b48SSukumar Swaminathan uint32_t rsvd1:29; 232291a2b48SSukumar Swaminathan uint32_t rv:1; 233fcf3ce44SJohn Forte #endif 234fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 235291a2b48SSukumar Swaminathan uint32_t rv:1; 236291a2b48SSukumar Swaminathan uint32_t rsvd1:29; 237291a2b48SSukumar Swaminathan uint32_t rr:1; 238291a2b48SSukumar Swaminathan uint32_t cv:1; 239fcf3ce44SJohn Forte #endif 240291a2b48SSukumar Swaminathan uint32_t biuRev; 241291a2b48SSukumar Swaminathan uint32_t smRev; 242291a2b48SSukumar Swaminathan union 243291a2b48SSukumar Swaminathan { 244291a2b48SSukumar Swaminathan uint32_t smFwRev; 245291a2b48SSukumar Swaminathan struct 246291a2b48SSukumar Swaminathan { 247fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 248291a2b48SSukumar Swaminathan uint8_t ProgType; 249291a2b48SSukumar Swaminathan uint8_t ProgId; 250291a2b48SSukumar Swaminathan uint16_t ProgVer:4; 251291a2b48SSukumar Swaminathan uint16_t ProgRev:4; 252291a2b48SSukumar Swaminathan uint16_t ProgFixLvl:2; 253291a2b48SSukumar Swaminathan uint16_t ProgDistType:2; 254291a2b48SSukumar Swaminathan uint16_t DistCnt:4; 255fcf3ce44SJohn Forte #endif 256fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 257291a2b48SSukumar Swaminathan uint16_t DistCnt:4; 258291a2b48SSukumar Swaminathan uint16_t ProgDistType:2; 259291a2b48SSukumar Swaminathan uint16_t ProgFixLvl:2; 260291a2b48SSukumar Swaminathan uint16_t ProgRev:4; 261291a2b48SSukumar Swaminathan uint16_t ProgVer:4; 262291a2b48SSukumar Swaminathan uint8_t ProgId; 263291a2b48SSukumar Swaminathan uint8_t ProgType; 264fcf3ce44SJohn Forte #endif 265fcf3ce44SJohn Forte } b; 266fcf3ce44SJohn Forte } un; 267291a2b48SSukumar Swaminathan uint32_t endecRev; 268fcf3ce44SJohn Forte 269fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 270291a2b48SSukumar Swaminathan uint8_t feaLevelHigh; 271291a2b48SSukumar Swaminathan uint8_t feaLevelLow; 272291a2b48SSukumar Swaminathan uint8_t fcphHigh; 273291a2b48SSukumar Swaminathan uint8_t fcphLow; 274fcf3ce44SJohn Forte #endif 275fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 276291a2b48SSukumar Swaminathan uint8_t fcphLow; 277291a2b48SSukumar Swaminathan uint8_t fcphHigh; 278291a2b48SSukumar Swaminathan uint8_t feaLevelLow; 279291a2b48SSukumar Swaminathan uint8_t feaLevelHigh; 280fcf3ce44SJohn Forte #endif 281291a2b48SSukumar Swaminathan uint32_t postKernRev; 282291a2b48SSukumar Swaminathan uint32_t opFwRev; 283291a2b48SSukumar Swaminathan uint8_t opFwName[16]; 284291a2b48SSukumar Swaminathan uint32_t sli1FwRev; 285291a2b48SSukumar Swaminathan uint8_t sli1FwName[16]; 286291a2b48SSukumar Swaminathan uint32_t sli2FwRev; 287291a2b48SSukumar Swaminathan uint8_t sli2FwName[16]; 288fcf3ce44SJohn Forte } read_rev_var_t; 289fcf3ce44SJohn Forte 290fcf3ce44SJohn Forte 291291a2b48SSukumar Swaminathan typedef struct dump_var 292291a2b48SSukumar Swaminathan { 293fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 294291a2b48SSukumar Swaminathan uint32_t rsvd:25; 295291a2b48SSukumar Swaminathan uint32_t ra:1; 296291a2b48SSukumar Swaminathan uint32_t co:1; 297291a2b48SSukumar Swaminathan uint32_t cv:1; 298291a2b48SSukumar Swaminathan uint32_t type:4; 299291a2b48SSukumar Swaminathan 300291a2b48SSukumar Swaminathan uint32_t entry_index:16; 301291a2b48SSukumar Swaminathan uint32_t region_id:16; 302fcf3ce44SJohn Forte #endif 303fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 304291a2b48SSukumar Swaminathan uint32_t type:4; 305291a2b48SSukumar Swaminathan uint32_t cv:1; 306291a2b48SSukumar Swaminathan uint32_t co:1; 307291a2b48SSukumar Swaminathan uint32_t ra:1; 308291a2b48SSukumar Swaminathan uint32_t rsvd:25; 309291a2b48SSukumar Swaminathan 310291a2b48SSukumar Swaminathan uint32_t region_id:16; 311291a2b48SSukumar Swaminathan uint32_t entry_index:16; 312fcf3ce44SJohn Forte #endif 313291a2b48SSukumar Swaminathan uint32_t base_adr; 314291a2b48SSukumar Swaminathan uint32_t word_cnt; 315291a2b48SSukumar Swaminathan uint32_t resp_offset; 316fcf3ce44SJohn Forte } dump_var_t; 317fcf3ce44SJohn Forte 318fcf3ce44SJohn Forte 31982527734SSukumar Swaminathan typedef struct dump4_var 32082527734SSukumar Swaminathan { 32182527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 32282527734SSukumar Swaminathan uint32_t link:8; 32382527734SSukumar Swaminathan uint32_t rsvd:20; 32482527734SSukumar Swaminathan uint32_t type:4; 32582527734SSukumar Swaminathan 32682527734SSukumar Swaminathan uint32_t entry_index:16; 32782527734SSukumar Swaminathan uint32_t region_id:16; 32882527734SSukumar Swaminathan #endif 32982527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 33082527734SSukumar Swaminathan uint32_t type:4; 33182527734SSukumar Swaminathan uint32_t rsvd:20; 33282527734SSukumar Swaminathan uint32_t link:8; 33382527734SSukumar Swaminathan 33482527734SSukumar Swaminathan uint32_t region_id:16; 33582527734SSukumar Swaminathan uint32_t entry_index:16; 33682527734SSukumar Swaminathan #endif 33782527734SSukumar Swaminathan uint32_t available_cnt; 33882527734SSukumar Swaminathan uint32_t addrLow; 33982527734SSukumar Swaminathan uint32_t addrHigh; 34082527734SSukumar Swaminathan uint32_t rsp_cnt; 34182527734SSukumar Swaminathan } dump4_var_t; 34282527734SSukumar Swaminathan 34382527734SSukumar Swaminathan 34482527734SSukumar Swaminathan typedef struct update_cfg 34582527734SSukumar Swaminathan { 34682527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 34782527734SSukumar Swaminathan uint32_t rsvd2:16; 34882527734SSukumar Swaminathan uint32_t proc_type:8; 34982527734SSukumar Swaminathan uint32_t rsvd1:1; 35082527734SSukumar Swaminathan uint32_t Abit:1; 35182527734SSukumar Swaminathan uint32_t DIbit:1; 35282527734SSukumar Swaminathan uint32_t Vbit:1; 35382527734SSukumar Swaminathan uint32_t req_type:4; 35482527734SSukumar Swaminathan #define INIT_REGION 1 35582527734SSukumar Swaminathan #define UPDATE_DATA 2 35682527734SSukumar Swaminathan #define CLEAN_UP_CFG 3 35782527734SSukumar Swaminathan uint32_t entry_len:16; 35882527734SSukumar Swaminathan uint32_t region_id:16; 35982527734SSukumar Swaminathan #endif 36082527734SSukumar Swaminathan 36182527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 36282527734SSukumar Swaminathan uint32_t req_type:4; 36382527734SSukumar Swaminathan #define INIT_REGION 1 36482527734SSukumar Swaminathan #define UPDATE_DATA 2 36582527734SSukumar Swaminathan #define CLEAN_UP_CFG 3 36682527734SSukumar Swaminathan uint32_t Vbit:1; 36782527734SSukumar Swaminathan uint32_t DIbit:1; 36882527734SSukumar Swaminathan uint32_t Abit:1; 36982527734SSukumar Swaminathan uint32_t rsvd1:1; 37082527734SSukumar Swaminathan uint32_t proc_type:8; 37182527734SSukumar Swaminathan uint32_t rsvd2:16; 37282527734SSukumar Swaminathan 37382527734SSukumar Swaminathan uint32_t region_id:16; 37482527734SSukumar Swaminathan uint32_t entry_len:16; 37582527734SSukumar Swaminathan #endif 37682527734SSukumar Swaminathan 37782527734SSukumar Swaminathan uint32_t rsp_info; 37882527734SSukumar Swaminathan uint32_t byte_len; 37982527734SSukumar Swaminathan uint32_t cfg_data; 38082527734SSukumar Swaminathan } update_cfg_var_t; 38182527734SSukumar Swaminathan 38282527734SSukumar Swaminathan 383fe199829SSukumar Swaminathan 384fe199829SSukumar Swaminathan typedef struct 385fe199829SSukumar Swaminathan { 386fe199829SSukumar Swaminathan union { 387fe199829SSukumar Swaminathan struct { 388fe199829SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 389fe199829SSukumar Swaminathan uint8_t domain; 390fe199829SSukumar Swaminathan uint8_t port_number; 391fe199829SSukumar Swaminathan uint8_t subsystem; 392fe199829SSukumar Swaminathan uint8_t opcode; 393fe199829SSukumar Swaminathan #else 394fe199829SSukumar Swaminathan uint8_t opcode; 395fe199829SSukumar Swaminathan uint8_t subsystem; 396fe199829SSukumar Swaminathan uint8_t port_number; 397fe199829SSukumar Swaminathan uint8_t domain; 398fe199829SSukumar Swaminathan #endif 399fe199829SSukumar Swaminathan uint32_t timeout; 400fe199829SSukumar Swaminathan uint32_t request_length; 401fe199829SSukumar Swaminathan uint32_t rsvd0; 402fe199829SSukumar Swaminathan }req; 403fe199829SSukumar Swaminathan 404fe199829SSukumar Swaminathan struct { 405fe199829SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 406fe199829SSukumar Swaminathan /* dw 0 */ 407fe199829SSukumar Swaminathan uint8_t domain; 408fe199829SSukumar Swaminathan uint8_t rsvd0; 409fe199829SSukumar Swaminathan uint8_t subsystem; 410fe199829SSukumar Swaminathan uint8_t opcode; 411fe199829SSukumar Swaminathan 412fe199829SSukumar Swaminathan /* dw 1 */ 413fe199829SSukumar Swaminathan uint16_t rsvd1; 414fe199829SSukumar Swaminathan uint8_t additional_status; 415fe199829SSukumar Swaminathan uint8_t status; 416fe199829SSukumar Swaminathan #else 417fe199829SSukumar Swaminathan /* dw 0 */ 418fe199829SSukumar Swaminathan uint8_t opcode; 419fe199829SSukumar Swaminathan uint8_t subsystem; 420fe199829SSukumar Swaminathan uint8_t rsvd0; 421fe199829SSukumar Swaminathan uint8_t domain; 422fe199829SSukumar Swaminathan 423fe199829SSukumar Swaminathan /* dw 1 */ 424fe199829SSukumar Swaminathan uint8_t status; 425fe199829SSukumar Swaminathan uint8_t additional_status; 426fe199829SSukumar Swaminathan uint16_t rsvd1; 427fe199829SSukumar Swaminathan #endif 428fe199829SSukumar Swaminathan 429fe199829SSukumar Swaminathan uint32_t rsp_length; 430fe199829SSukumar Swaminathan uint32_t actual_rsp_length; 431fe199829SSukumar Swaminathan }rsp; 432fe199829SSukumar Swaminathan uint32_t dw[4]; 433fe199829SSukumar Swaminathan }u0; 434fe199829SSukumar Swaminathan } common_hdr_t; 435fe199829SSukumar Swaminathan 436fe199829SSukumar Swaminathan typedef struct get_oem_attrs 437fe199829SSukumar Swaminathan { 438fe199829SSukumar Swaminathan common_hdr_t hdr; 439fe199829SSukumar Swaminathan union { 440fe199829SSukumar Swaminathan struct { 441fe199829SSukumar Swaminathan uint32_t rsvd0; 442fe199829SSukumar Swaminathan }req; 443fe199829SSukumar Swaminathan 444fe199829SSukumar Swaminathan struct { 445fe199829SSukumar Swaminathan uint8_t emulex_serial_number[12]; 446fe199829SSukumar Swaminathan uint8_t oem_serial_number[24]; 447fe199829SSukumar Swaminathan uint32_t oem_personality_mgmt_word; 448fe199829SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 449fe199829SSukumar Swaminathan uint8_t rsvd[3]; 450fe199829SSukumar Swaminathan uint8_t oem_current_personality; 451fe199829SSukumar Swaminathan #else 452fe199829SSukumar Swaminathan uint8_t oem_current_personality; 453fe199829SSukumar Swaminathan uint8_t rsvd[3]; 454fe199829SSukumar Swaminathan #endif 455fe199829SSukumar Swaminathan 456fe199829SSukumar Swaminathan }rsp; 457fe199829SSukumar Swaminathan }params; 458fe199829SSukumar Swaminathan 459fe199829SSukumar Swaminathan } get_oem_attrs_t; 460fe199829SSukumar Swaminathan 461fe199829SSukumar Swaminathan 462fe199829SSukumar Swaminathan typedef struct read_write_flashrom { 463fe199829SSukumar Swaminathan common_hdr_t hdr; 464fe199829SSukumar Swaminathan uint32_t flash_op_code; 465fe199829SSukumar Swaminathan uint32_t flash_op_type; 466fe199829SSukumar Swaminathan uint32_t data_buffer_size; 467fe199829SSukumar Swaminathan uint32_t data_offset; 468fe199829SSukumar Swaminathan uint8_t data_buffer[4]; 469fe199829SSukumar Swaminathan } read_write_flashrom_t; 470fe199829SSukumar Swaminathan 471fe199829SSukumar Swaminathan 472fe199829SSukumar Swaminathan typedef struct 473fe199829SSukumar Swaminathan { 474fe199829SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 475fe199829SSukumar Swaminathan uint32_t special:8; /* word 1 */ 476fe199829SSukumar Swaminathan uint32_t reserved2:16; /* word 1 */ 477fe199829SSukumar Swaminathan uint32_t sge_cnt:5; /* word 1 */ 478fe199829SSukumar Swaminathan uint32_t reserved1:2; /* word 1 */ 479fe199829SSukumar Swaminathan uint32_t embedded:1; /* word 1 */ 480fe199829SSukumar Swaminathan #endif 481fe199829SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 482fe199829SSukumar Swaminathan uint32_t embedded:1; /* word 1 */ 483fe199829SSukumar Swaminathan uint32_t reserved1:2; /* word 1 */ 484fe199829SSukumar Swaminathan uint32_t sge_cnt:5; /* word 1 */ 485fe199829SSukumar Swaminathan uint32_t reserved2:16; /* word 1 */ 486fe199829SSukumar Swaminathan uint32_t special:8; /* word 1 */ 487fe199829SSukumar Swaminathan #endif 488fe199829SSukumar Swaminathan uint32_t payload_length; /* word 2 */ 489fe199829SSukumar Swaminathan uint32_t tag_low; /* word 3 */ 490fe199829SSukumar Swaminathan uint32_t tag_hi; /* word 4 */ 491fe199829SSukumar Swaminathan uint32_t reserved3; /* word 5 */ 492fe199829SSukumar Swaminathan 493fe199829SSukumar Swaminathan } be_req_header_t; 494fe199829SSukumar Swaminathan 495fe199829SSukumar Swaminathan typedef struct 496fe199829SSukumar Swaminathan { 497fe199829SSukumar Swaminathan be_req_header_t be; 498fe199829SSukumar Swaminathan 499fe199829SSukumar Swaminathan union 500fe199829SSukumar Swaminathan { 501fe199829SSukumar Swaminathan get_oem_attrs_t varOemAttrs; 502fe199829SSukumar Swaminathan read_write_flashrom_t varFlashRom; 503fe199829SSukumar Swaminathan } un; 504fe199829SSukumar Swaminathan 505fe199829SSukumar Swaminathan } sli_config_var_t; 506fe199829SSukumar Swaminathan 507fe199829SSukumar Swaminathan 508291a2b48SSukumar Swaminathan typedef struct read_cfg_var 509291a2b48SSukumar Swaminathan { 510fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 511291a2b48SSukumar Swaminathan uint32_t cr:1; 512291a2b48SSukumar Swaminathan uint32_t ci:1; 513291a2b48SSukumar Swaminathan uint32_t cr_delay:6; 514291a2b48SSukumar Swaminathan uint32_t cr_count:8; 515291a2b48SSukumar Swaminathan uint32_t InitBBC:8; 516291a2b48SSukumar Swaminathan uint32_t MaxBBC:8; 517fcf3ce44SJohn Forte #endif 518fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 519291a2b48SSukumar Swaminathan uint32_t MaxBBC:8; 520291a2b48SSukumar Swaminathan uint32_t InitBBC:8; 521291a2b48SSukumar Swaminathan uint32_t cr_count:8; 522291a2b48SSukumar Swaminathan uint32_t cr_delay:6; 523291a2b48SSukumar Swaminathan uint32_t ci:1; 524291a2b48SSukumar Swaminathan uint32_t cr:1; 525fcf3ce44SJohn Forte #endif 526fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 527291a2b48SSukumar Swaminathan uint32_t topology:8; 528291a2b48SSukumar Swaminathan uint32_t myDid:24; 529fcf3ce44SJohn Forte #endif 530fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 531291a2b48SSukumar Swaminathan uint32_t myDid:24; 532291a2b48SSukumar Swaminathan uint32_t topology:8; 533fcf3ce44SJohn Forte #endif 534fcf3ce44SJohn Forte /* Defines for topology (defined previously) */ 535fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 536291a2b48SSukumar Swaminathan uint32_t AR:1; 537291a2b48SSukumar Swaminathan uint32_t IR:1; 538291a2b48SSukumar Swaminathan uint32_t rsvd1:29; 539291a2b48SSukumar Swaminathan uint32_t ack0:1; 540fcf3ce44SJohn Forte #endif 541fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 542291a2b48SSukumar Swaminathan uint32_t ack0:1; 543291a2b48SSukumar Swaminathan uint32_t rsvd1:29; 544291a2b48SSukumar Swaminathan uint32_t IR:1; 545291a2b48SSukumar Swaminathan uint32_t AR:1; 546fcf3ce44SJohn Forte #endif 547291a2b48SSukumar Swaminathan uint32_t edtov; 548291a2b48SSukumar Swaminathan uint32_t arbtov; 549291a2b48SSukumar Swaminathan uint32_t ratov; 550291a2b48SSukumar Swaminathan uint32_t rttov; 551291a2b48SSukumar Swaminathan uint32_t altov; 552291a2b48SSukumar Swaminathan uint32_t lmt; 553fcf3ce44SJohn Forte 554fcf3ce44SJohn Forte #define LMT_1GB_CAPABLE 0x0004 555fcf3ce44SJohn Forte #define LMT_2GB_CAPABLE 0x0008 556fcf3ce44SJohn Forte #define LMT_4GB_CAPABLE 0x0040 557fcf3ce44SJohn Forte #define LMT_8GB_CAPABLE 0x0080 558fcf3ce44SJohn Forte #define LMT_10GB_CAPABLE 0x0100 559fcf3ce44SJohn Forte 560291a2b48SSukumar Swaminathan uint32_t rsvd2; 561291a2b48SSukumar Swaminathan uint32_t rsvd3; 562291a2b48SSukumar Swaminathan uint32_t max_xri; 563291a2b48SSukumar Swaminathan uint32_t max_iocb; 564291a2b48SSukumar Swaminathan uint32_t max_rpi; 565291a2b48SSukumar Swaminathan uint32_t avail_xri; 566291a2b48SSukumar Swaminathan uint32_t avail_iocb; 567291a2b48SSukumar Swaminathan uint32_t avail_rpi; 568291a2b48SSukumar Swaminathan uint32_t default_rpi; 569fcf3ce44SJohn Forte } read_cfg_var_t; 570fcf3ce44SJohn Forte 571fcf3ce44SJohn Forte 572291a2b48SSukumar Swaminathan typedef struct read_log_var 573291a2b48SSukumar Swaminathan { 574fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 575291a2b48SSukumar Swaminathan uint32_t type:8; 576291a2b48SSukumar Swaminathan uint32_t byte_count:8; 577291a2b48SSukumar Swaminathan uint32_t write:1; 578291a2b48SSukumar Swaminathan uint32_t resv:3; 579291a2b48SSukumar Swaminathan uint32_t offset:12; 580fcf3ce44SJohn Forte #endif 581fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 582291a2b48SSukumar Swaminathan uint32_t offset:12; 583291a2b48SSukumar Swaminathan uint32_t resv:3; 584291a2b48SSukumar Swaminathan uint32_t write:1; 585291a2b48SSukumar Swaminathan uint32_t byte_count:8; 586291a2b48SSukumar Swaminathan uint32_t type:8; 587fcf3ce44SJohn Forte #endif 588fcf3ce44SJohn Forte 589291a2b48SSukumar Swaminathan uint32_t data; 590fcf3ce44SJohn Forte } read_log_var_t; 591fcf3ce44SJohn Forte 592fcf3ce44SJohn Forte 593291a2b48SSukumar Swaminathan typedef struct log_status_var 594291a2b48SSukumar Swaminathan { 595fcf3ce44SJohn Forte 596fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 597291a2b48SSukumar Swaminathan uint16_t split_log_next; 598291a2b48SSukumar Swaminathan uint16_t log_next; 599fcf3ce44SJohn Forte 600291a2b48SSukumar Swaminathan uint32_t size; 601fcf3ce44SJohn Forte 602291a2b48SSukumar Swaminathan uint32_t format:8; 603291a2b48SSukumar Swaminathan uint32_t resv2:22; 604291a2b48SSukumar Swaminathan uint32_t log_level:1; 605291a2b48SSukumar Swaminathan uint32_t split_log:1; 606fcf3ce44SJohn Forte #endif 607fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 608291a2b48SSukumar Swaminathan uint16_t log_next; 609291a2b48SSukumar Swaminathan uint16_t split_log_next; 610fcf3ce44SJohn Forte 611291a2b48SSukumar Swaminathan uint32_t size; 612fcf3ce44SJohn Forte 613291a2b48SSukumar Swaminathan uint32_t split_log:1; 614291a2b48SSukumar Swaminathan uint32_t log_level:1; 615291a2b48SSukumar Swaminathan uint32_t resv2:22; 616291a2b48SSukumar Swaminathan uint32_t format:8; 617fcf3ce44SJohn Forte #endif 618fcf3ce44SJohn Forte 619291a2b48SSukumar Swaminathan uint32_t offset; 620fcf3ce44SJohn Forte } log_status_var_t; 621fcf3ce44SJohn Forte 622fcf3ce44SJohn Forte 623291a2b48SSukumar Swaminathan typedef struct read_evt_log_var 624291a2b48SSukumar Swaminathan { 625fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 626291a2b48SSukumar Swaminathan uint32_t read_log:1; 627291a2b48SSukumar Swaminathan uint32_t clear_log:1; 628291a2b48SSukumar Swaminathan uint32_t mbox_rsp:1; 629291a2b48SSukumar Swaminathan uint32_t resv:28; 630fcf3ce44SJohn Forte #endif 631fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 632291a2b48SSukumar Swaminathan uint32_t resv:28; 633291a2b48SSukumar Swaminathan uint32_t mbox_rsp:1; 634291a2b48SSukumar Swaminathan uint32_t clear_log:1; 635291a2b48SSukumar Swaminathan uint32_t read_log:1; 636fcf3ce44SJohn Forte #endif 637fcf3ce44SJohn Forte 638291a2b48SSukumar Swaminathan uint32_t offset; 639fcf3ce44SJohn Forte 640291a2b48SSukumar Swaminathan union 641291a2b48SSukumar Swaminathan { 642291a2b48SSukumar Swaminathan ulp_bde_t sp; 643291a2b48SSukumar Swaminathan ulp_bde64_t sp64; 644fcf3ce44SJohn Forte } un; 645fcf3ce44SJohn Forte } read_evt_log_var_t; 646fcf3ce44SJohn Forte 647fcf3ce44SJohn Forte 648291a2b48SSukumar Swaminathan typedef struct dfc_mailbox 649291a2b48SSukumar Swaminathan { 650fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 651291a2b48SSukumar Swaminathan uint16_t mbxStatus; 652291a2b48SSukumar Swaminathan uint8_t mbxCommand; 653291a2b48SSukumar Swaminathan uint8_t mbxReserved:6; 654291a2b48SSukumar Swaminathan uint8_t mbxHc:1; 655291a2b48SSukumar Swaminathan uint8_t mbxOwner:1; /* Low order bit first word */ 656fcf3ce44SJohn Forte #endif 657fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 658291a2b48SSukumar Swaminathan uint8_t mbxOwner:1; /* Low order bit first word */ 659291a2b48SSukumar Swaminathan uint8_t mbxHc:1; 660291a2b48SSukumar Swaminathan uint8_t mbxReserved:6; 661291a2b48SSukumar Swaminathan uint8_t mbxCommand; 662291a2b48SSukumar Swaminathan uint16_t mbxStatus; 663fcf3ce44SJohn Forte #endif 664fcf3ce44SJohn Forte 665291a2b48SSukumar Swaminathan union 666291a2b48SSukumar Swaminathan { 667291a2b48SSukumar Swaminathan uint32_t varWords[31]; 668291a2b48SSukumar Swaminathan read_sparm_var_t varRdSparm; 669291a2b48SSukumar Swaminathan read_rev_var_t varRdRev; 670291a2b48SSukumar Swaminathan read_cfg_var_t varRdCfg; 671291a2b48SSukumar Swaminathan dump_var_t varDmp; 672291a2b48SSukumar Swaminathan read_log_var_t varRdLog; 673291a2b48SSukumar Swaminathan log_status_var_t varLogStat; 674291a2b48SSukumar Swaminathan read_evt_log_var_t varRdEvtLog; 675fcf3ce44SJohn Forte 676fcf3ce44SJohn Forte } un; 677fcf3ce44SJohn Forte } dfc_mailbox_t; 678fcf3ce44SJohn Forte 679fcf3ce44SJohn Forte 68082527734SSukumar Swaminathan typedef struct dfc_mailbox4 68182527734SSukumar Swaminathan { 68282527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 68382527734SSukumar Swaminathan uint16_t mbxStatus; 68482527734SSukumar Swaminathan uint8_t mbxCommand; 68582527734SSukumar Swaminathan uint8_t mbxReserved:6; 68682527734SSukumar Swaminathan uint8_t mbxHc:1; 68782527734SSukumar Swaminathan uint8_t mbxOwner:1; /* Low order bit first word */ 68882527734SSukumar Swaminathan #endif 68982527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 69082527734SSukumar Swaminathan uint8_t mbxOwner:1; /* Low order bit first word */ 69182527734SSukumar Swaminathan uint8_t mbxHc:1; 69282527734SSukumar Swaminathan uint8_t mbxReserved:6; 69382527734SSukumar Swaminathan uint8_t mbxCommand; 69482527734SSukumar Swaminathan uint16_t mbxStatus; 69582527734SSukumar Swaminathan #endif 69682527734SSukumar Swaminathan 69782527734SSukumar Swaminathan union 69882527734SSukumar Swaminathan { 69982527734SSukumar Swaminathan uint32_t varWords[63]; 70082527734SSukumar Swaminathan dump4_var_t varDmp; 70182527734SSukumar Swaminathan update_cfg_var_t varUpdateCfg; 702fe199829SSukumar Swaminathan sli_config_var_t varSLIConfig; 70382527734SSukumar Swaminathan } un; 70482527734SSukumar Swaminathan } dfc_mailbox4_t; 70582527734SSukumar Swaminathan 70682527734SSukumar Swaminathan 707fe199829SSukumar Swaminathan 708fe199829SSukumar Swaminathan 70982527734SSukumar Swaminathan /* Config Region 23 Records */ 71082527734SSukumar Swaminathan 71182527734SSukumar Swaminathan typedef struct tlv_fcoe { 71282527734SSukumar Swaminathan uint8_t type; 71382527734SSukumar Swaminathan uint8_t length; 71482527734SSukumar Swaminathan uint8_t version; 71582527734SSukumar Swaminathan #define TLV_FCOE_VER 1 71682527734SSukumar Swaminathan 71782527734SSukumar Swaminathan uint8_t fip_flags; 71882527734SSukumar Swaminathan #define TLV_FCOE_FIP 0x40 71982527734SSukumar Swaminathan #define TLV_FCOE_VLAN 0x01 72082527734SSukumar Swaminathan 72182527734SSukumar Swaminathan uint8_t FCMap[3]; 72282527734SSukumar Swaminathan uint8_t reserved; 72382527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 72482527734SSukumar Swaminathan uint32_t rsvd:20; 72582527734SSukumar Swaminathan uint32_t VLanId:12; 72682527734SSukumar Swaminathan #endif 72782527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 72882527734SSukumar Swaminathan uint32_t VLanId:12; 72982527734SSukumar Swaminathan uint32_t rsvd:20; 73082527734SSukumar Swaminathan #endif 73182527734SSukumar Swaminathan } tlv_fcoe_t; 73282527734SSukumar Swaminathan 73382527734SSukumar Swaminathan 73482527734SSukumar Swaminathan typedef struct tlv_fcfconnectentry { 73582527734SSukumar Swaminathan #ifdef EMLXS_BIG_ENDIAN 73682527734SSukumar Swaminathan uint32_t rsvd1:4; 73782527734SSukumar Swaminathan uint32_t VLanId:12; 73882527734SSukumar Swaminathan uint32_t rsvd2:7; 73982527734SSukumar Swaminathan uint32_t AddrMode:1; 74082527734SSukumar Swaminathan uint32_t AddrModePreferred:1; 74182527734SSukumar Swaminathan uint32_t AddrModeValid:1; 74282527734SSukumar Swaminathan uint32_t VLanValid:1; 74382527734SSukumar Swaminathan uint32_t SwitchNameValid:1; 74482527734SSukumar Swaminathan uint32_t FabricNameValid:1; 74582527734SSukumar Swaminathan uint32_t Primary:1; 74682527734SSukumar Swaminathan uint32_t Boot:1; 74782527734SSukumar Swaminathan uint32_t Valid:1; 74882527734SSukumar Swaminathan #endif 74982527734SSukumar Swaminathan #ifdef EMLXS_LITTLE_ENDIAN 75082527734SSukumar Swaminathan uint32_t Valid:1; 75182527734SSukumar Swaminathan uint32_t Boot:1; 75282527734SSukumar Swaminathan uint32_t Primary:1; 75382527734SSukumar Swaminathan uint32_t FabricNameValid:1; 75482527734SSukumar Swaminathan uint32_t SwitchNameValid:1; 75582527734SSukumar Swaminathan uint32_t VLanValid:1; 75682527734SSukumar Swaminathan uint32_t AddrModeValid:1; 75782527734SSukumar Swaminathan uint32_t AddrModePreferred:1; 75882527734SSukumar Swaminathan uint32_t AddrMode:1; 75982527734SSukumar Swaminathan uint32_t rsvd2:7; 76082527734SSukumar Swaminathan uint32_t VLanId:12; 76182527734SSukumar Swaminathan uint32_t rsvd1:4; 76282527734SSukumar Swaminathan #endif 76382527734SSukumar Swaminathan uint8_t FabricName[8]; 76482527734SSukumar Swaminathan uint8_t SwitchName[8]; 76582527734SSukumar Swaminathan } tlv_fcfconnectentry_t; 76682527734SSukumar Swaminathan 76782527734SSukumar Swaminathan 76882527734SSukumar Swaminathan #define MAX_FCFCONNECTLIST_ENTRIES 16 76982527734SSukumar Swaminathan typedef struct tlv_fcfconnectlist { 77082527734SSukumar Swaminathan uint8_t type; 77182527734SSukumar Swaminathan uint8_t length; 77282527734SSukumar Swaminathan uint16_t rsvd; 77382527734SSukumar Swaminathan tlv_fcfconnectentry_t entry[MAX_FCFCONNECTLIST_ENTRIES]; 77482527734SSukumar Swaminathan } tlv_fcfconnectlist_t; 77582527734SSukumar Swaminathan 77682527734SSukumar Swaminathan 777291a2b48SSukumar Swaminathan typedef struct dfc_ioinfo 778291a2b48SSukumar Swaminathan { 779fcf3ce44SJohn Forte uint32_t a_mboxCmd; /* mailbox commands issued */ 780fcf3ce44SJohn Forte uint32_t a_mboxCmpl; /* mailbox commands completed */ 781fcf3ce44SJohn Forte uint32_t a_mboxErr; /* mailbox commands completed, error status */ 782fcf3ce44SJohn Forte uint32_t a_iocbCmd; /* iocb command ring issued */ 783fcf3ce44SJohn Forte uint32_t a_iocbRsp; /* iocb rsp ring received */ 784fcf3ce44SJohn Forte uint32_t a_adapterIntr; /* adapter interrupt events */ 785fcf3ce44SJohn Forte uint32_t a_fcpCmd; /* FCP commands issued */ 786fcf3ce44SJohn Forte uint32_t a_fcpCmpl; /* FCP command completions received */ 787fcf3ce44SJohn Forte uint32_t a_fcpErr; /* FCP command completions errors */ 788fcf3ce44SJohn Forte uint32_t a_seqXmit; /* IP xmit sequences sent */ 789fcf3ce44SJohn Forte uint32_t a_seqRcv; /* IP sequences received */ 790fcf3ce44SJohn Forte uint32_t a_bcastXmit; /* cnt of successful xmit bcast cmds issued */ 791fcf3ce44SJohn Forte uint32_t a_bcastRcv; /* cnt of receive bcast cmds received */ 792fcf3ce44SJohn Forte uint32_t a_elsXmit; /* cnt of successful ELS req cmds issued */ 793fcf3ce44SJohn Forte uint32_t a_elsRcv; /* cnt of ELS request commands received */ 794fcf3ce44SJohn Forte uint32_t a_RSCNRcv; /* cnt of RSCN commands received */ 795fcf3ce44SJohn Forte uint32_t a_seqXmitErr; /* cnt of unsuccessful xmit bcast cmds issued */ 796fcf3ce44SJohn Forte uint32_t a_elsXmitErr; /* cnt of unsuccessful ELS req cmds issued */ 797fcf3ce44SJohn Forte uint32_t a_elsBufPost; /* cnt of ELS buffers posted to adapter */ 798fcf3ce44SJohn Forte uint32_t a_ipBufPost; /* cnt of IP buffers posted to adapter */ 799fcf3ce44SJohn Forte uint32_t a_cnt1; /* generic counter */ 800fcf3ce44SJohn Forte uint32_t a_cnt2; /* generic counter */ 801fcf3ce44SJohn Forte uint32_t a_cnt3; /* generic counter */ 802fcf3ce44SJohn Forte uint32_t a_cnt4; /* generic counter */ 803fcf3ce44SJohn Forte 804fcf3ce44SJohn Forte } dfc_ioinfo_t; 805fcf3ce44SJohn Forte 806fcf3ce44SJohn Forte 807291a2b48SSukumar Swaminathan typedef struct dfc_linkinfo 808291a2b48SSukumar Swaminathan { 809291a2b48SSukumar Swaminathan uint32_t a_linkEventTag; 810291a2b48SSukumar Swaminathan uint32_t a_linkUp; 811291a2b48SSukumar Swaminathan uint32_t a_linkDown; 812291a2b48SSukumar Swaminathan uint32_t a_linkMulti; 813291a2b48SSukumar Swaminathan uint32_t a_DID; 814291a2b48SSukumar Swaminathan uint8_t a_topology; 815291a2b48SSukumar Swaminathan uint8_t a_linkState; 816291a2b48SSukumar Swaminathan uint8_t a_alpa; 817291a2b48SSukumar Swaminathan uint8_t a_alpaCnt; 818291a2b48SSukumar Swaminathan uint8_t a_alpaMap[128]; 819291a2b48SSukumar Swaminathan uint8_t a_wwpName[8]; 820291a2b48SSukumar Swaminathan uint8_t a_wwnName[8]; 821fcf3ce44SJohn Forte } dfc_linkinfo_t; 822fcf3ce44SJohn Forte 823fcf3ce44SJohn Forte /* values for a_topology */ 824fcf3ce44SJohn Forte #define LNK_LOOP 0x1 825fcf3ce44SJohn Forte #define LNK_PUBLIC_LOOP 0x2 826fcf3ce44SJohn Forte #define LNK_FABRIC 0x3 827fcf3ce44SJohn Forte #define LNK_PT2PT 0x4 828fcf3ce44SJohn Forte #define LNK_MENLO_MAINTENANCE 0x5 829fcf3ce44SJohn Forte 830fcf3ce44SJohn Forte /* values for a_linkState */ 831fcf3ce44SJohn Forte #define LNK_DOWN 0x1 832fcf3ce44SJohn Forte #define LNK_UP 0x2 833fcf3ce44SJohn Forte #define LNK_FLOGI 0x3 834fcf3ce44SJohn Forte #define LNK_DISCOVERY 0x4 835fcf3ce44SJohn Forte #define LNK_REDISCOVERY 0x5 836fcf3ce44SJohn Forte #define LNK_READY 0x6 83782527734SSukumar Swaminathan #define LNK_DOWN_PERSIST 0x7 838fcf3ce44SJohn Forte 839fcf3ce44SJohn Forte 840291a2b48SSukumar Swaminathan typedef struct dfc_traceinfo 841291a2b48SSukumar Swaminathan { 842291a2b48SSukumar Swaminathan uint8_t a_event; 843291a2b48SSukumar Swaminathan uint8_t a_cmd; 844291a2b48SSukumar Swaminathan uint16_t a_status; 845291a2b48SSukumar Swaminathan uint32_t a_information; 846fcf3ce44SJohn Forte } dfc_traceinfo_t; 847fcf3ce44SJohn Forte 848fcf3ce44SJohn Forte 849291a2b48SSukumar Swaminathan typedef struct dfc_cfgparam 850291a2b48SSukumar Swaminathan { 851291a2b48SSukumar Swaminathan char a_string[32]; 852291a2b48SSukumar Swaminathan uint32_t a_low; 853291a2b48SSukumar Swaminathan uint32_t a_hi; 854291a2b48SSukumar Swaminathan uint32_t a_default; 855291a2b48SSukumar Swaminathan uint32_t a_current; 856291a2b48SSukumar Swaminathan uint16_t a_flag; 857291a2b48SSukumar Swaminathan #define CFG_EXPORT 0x1 /* Export this parameter to end user */ 858fcf3ce44SJohn Forte #define CFG_IGNORE 0x2 /* Ignore this parameter */ 85982527734SSukumar Swaminathan #define CFG_APPLICABLE 0x4 /* Applicable to this HBA */ 86082527734SSukumar Swaminathan #define CFG_COMMON 0x8 /* Common to all HBAs */ 861fcf3ce44SJohn Forte 862291a2b48SSukumar Swaminathan uint16_t a_changestate; 863fcf3ce44SJohn Forte #define CFG_REBOOT 0x0 /* Changes effective after system */ 864fcf3ce44SJohn Forte /* reboot */ 865fcf3ce44SJohn Forte #define CFG_DYMANIC 0x1 /* Changes effective immediately */ 866fcf3ce44SJohn Forte #define CFG_RESTART 0x2 /* Changes effective after adapter */ 867fcf3ce44SJohn Forte /* restart */ 868291a2b48SSukumar Swaminathan #define CFG_LINKRESET 0x3 /* Changes effective after link reset */ 869fcf3ce44SJohn Forte 870291a2b48SSukumar Swaminathan char a_help[80]; 871fcf3ce44SJohn Forte } dfc_cfgparam_t; 872fcf3ce44SJohn Forte 873fcf3ce44SJohn Forte 874fcf3ce44SJohn Forte 875291a2b48SSukumar Swaminathan typedef struct dfc_nodeinfo 876291a2b48SSukumar Swaminathan { 877291a2b48SSukumar Swaminathan uint16_t a_flag; 878291a2b48SSukumar Swaminathan uint16_t a_state; 879291a2b48SSukumar Swaminathan uint32_t a_did; 880291a2b48SSukumar Swaminathan uint8_t a_wwpn[8]; 881291a2b48SSukumar Swaminathan uint8_t a_wwnn[8]; 882291a2b48SSukumar Swaminathan uint32_t a_targetid; 883fcf3ce44SJohn Forte } dfc_nodeinfo_t; 884fcf3ce44SJohn Forte 885fcf3ce44SJohn Forte /* Defines for a_state */ 886291a2b48SSukumar Swaminathan #define NODE_UNUSED 0 /* unused NL_PORT entry */ 887291a2b48SSukumar Swaminathan #define NODE_LIMBO 0x1 /* entry needs to hang around for wwpn / sid */ 888291a2b48SSukumar Swaminathan #define NODE_LOGOUT 0x2 /* NL_PORT is not logged in - entry is cached */ 889291a2b48SSukumar Swaminathan #define NODE_PLOGI 0x3 /* PLOGI was sent to NL_PORT */ 890291a2b48SSukumar Swaminathan #define NODE_LOGIN 0x4 /* NL_PORT is logged in / login REG_LOGINed */ 891291a2b48SSukumar Swaminathan #define NODE_PRLI 0x5 /* PRLI was sent to NL_PORT */ 892291a2b48SSukumar Swaminathan #define NODE_ALLOC 0x6 /* NL_PORT is ready to initiate adapter I/O */ 893291a2b48SSukumar Swaminathan #define NODE_SEED 0x7 /* seed scsi id bind in table */ 894fcf3ce44SJohn Forte 895fcf3ce44SJohn Forte /* Defines for a_flag */ 896291a2b48SSukumar Swaminathan #define NODE_RPI_XRI 0x1 /* creating xri for entry */ 897291a2b48SSukumar Swaminathan #define NODE_REQ_SND 0x2 /* sent ELS request for this entry */ 898291a2b48SSukumar Swaminathan #define NODE_ADDR_AUTH 0x4 /* Authenticating addr for this entry */ 899291a2b48SSukumar Swaminathan #define NODE_RM_ENTRY 0x8 /* Remove this entry */ 900291a2b48SSukumar Swaminathan #define NODE_FARP_SND 0x10 /* sent FARP request for this entry */ 901291a2b48SSukumar Swaminathan #define NODE_FABRIC 0x20 /* this entry represents the Fabric */ 902291a2b48SSukumar Swaminathan #define NODE_FCP_TARGET 0x40 /* this entry is an FCP target */ 903291a2b48SSukumar Swaminathan #define NODE_IP_NODE 0x80 /* this entry is an IP node */ 904291a2b48SSukumar Swaminathan #define NODE_DISC_START 0x100 /* start discovery on this entry */ 905291a2b48SSukumar Swaminathan #define NODE_SEED_WWPN 0x200 /* Entry scsi id is seeded for WWPN */ 906291a2b48SSukumar Swaminathan #define NODE_SEED_WWNN 0x400 /* Entry scsi id is seeded for WWNN */ 907291a2b48SSukumar Swaminathan #define NODE_SEED_DID 0x800 /* Entry scsi id is seeded for DID */ 908291a2b48SSukumar Swaminathan #define NODE_SEED_MASK 0xe00 /* mask for seeded flags */ 909291a2b48SSukumar Swaminathan #define NODE_AUTOMAP 0x1000 /* This entry was automap'ed */ 910291a2b48SSukumar Swaminathan #define NODE_NS_REMOVED 0x2000 /* This entry removed from NameServer */ 911291a2b48SSukumar Swaminathan 912291a2b48SSukumar Swaminathan 913291a2b48SSukumar Swaminathan typedef struct dfc_vpd 914291a2b48SSukumar Swaminathan { 915291a2b48SSukumar Swaminathan uint32_t version; 916fcf3ce44SJohn Forte #define DFC_VPD_VERSION 1 917fcf3ce44SJohn Forte 918291a2b48SSukumar Swaminathan char ModelDescription[256]; /* VPD field V1 */ 919291a2b48SSukumar Swaminathan char Model[80]; /* VPD field V2 */ 920291a2b48SSukumar Swaminathan char ProgramType[256]; /* VPD field V3 */ 921291a2b48SSukumar Swaminathan char PortNum[20]; /* VPD field V4 */ 922fcf3ce44SJohn Forte } dfc_vpd_t; 923fcf3ce44SJohn Forte 924291a2b48SSukumar Swaminathan typedef struct dfc_destid 925291a2b48SSukumar Swaminathan { 926291a2b48SSukumar Swaminathan uint32_t idType; /* 0 - wwpn, 1 - d_id */ 927291a2b48SSukumar Swaminathan uint32_t d_id; 928291a2b48SSukumar Swaminathan uint8_t wwpn[8]; 929fcf3ce44SJohn Forte } dfc_destid_t; 930fcf3ce44SJohn Forte 931fcf3ce44SJohn Forte 932291a2b48SSukumar Swaminathan typedef struct dfc_loopback 933291a2b48SSukumar Swaminathan { 934291a2b48SSukumar Swaminathan uint32_t bufSize; 935291a2b48SSukumar Swaminathan uint8_t *XmitBuffer; 936291a2b48SSukumar Swaminathan uint8_t *RcvBuffer; 937fcf3ce44SJohn Forte } dfc_loopback_t; 938fcf3ce44SJohn Forte 939fcf3ce44SJohn Forte 940291a2b48SSukumar Swaminathan typedef struct dfc_drvinfo 941291a2b48SSukumar Swaminathan { 942291a2b48SSukumar Swaminathan uint8_t drvInfoVer; /* Version of this structure */ 943291a2b48SSukumar Swaminathan #define DFC_DRVINFO_VERSION2 0x02 944291a2b48SSukumar Swaminathan #define DFC_DRVINFO_VERSION3 0x03 /* NPIV */ 945291a2b48SSukumar Swaminathan #define DFC_DRVINFO_VERSION4 0x04 /* DHCHAP */ 946291a2b48SSukumar Swaminathan #define DFC_DRVINFO_VERSION DFC_DRVINFO_VERSION3 947fcf3ce44SJohn Forte 948fcf3ce44SJohn Forte #ifdef DHCHAP_SUPPORT 949fcf3ce44SJohn Forte #undef DFC_DRVINFO_VERSION 950291a2b48SSukumar Swaminathan #define DFC_DRVINFO_VERSION DFC_DRVINFO_VERSION4 951291a2b48SSukumar Swaminathan #endif /* DHCHAP_SUPPORT */ 952fcf3ce44SJohn Forte 953291a2b48SSukumar Swaminathan uint8_t drvType; 954fcf3ce44SJohn Forte #define DFC_DRVINFO_SOLARIS 0x11 /* Solaris */ 955291a2b48SSukumar Swaminathan #define DFC_DRVINFO_LEADVILLE 0x14 /* Solaris Leadville ULP */ 956291a2b48SSukumar Swaminathan #define DFC_DRVINFO_COMSTAR 0x16 /* Solaris Comstar ULP */ 957fcf3ce44SJohn Forte 958291a2b48SSukumar Swaminathan uint16_t reserved; 959291a2b48SSukumar Swaminathan uint8_t rmLevel; /* Remote Management (HBAnyware) */ 960291a2b48SSukumar Swaminathan /* Support Level */ 961291a2b48SSukumar Swaminathan #define DFC_DRVINFO_RMLEVEL 0x02 /* HBAnyware v2.3 */ 962fcf3ce44SJohn Forte 963291a2b48SSukumar Swaminathan uint8_t mpLevel; /* MultiPulse support Level */ 964291a2b48SSukumar Swaminathan uint8_t hbaapiLevel; /* HBAAPI support level */ 965fcf3ce44SJohn Forte #define DFC_DRVINFO_HBAAPI 0x01 /* HBAAPI v1.0 */ 966fcf3ce44SJohn Forte 967291a2b48SSukumar Swaminathan uint8_t reserved1; 968291a2b48SSukumar Swaminathan char drvVer[16]; /* Driver Version string */ 969291a2b48SSukumar Swaminathan char drvName[8]; /* Driver Name */ 970291a2b48SSukumar Swaminathan char ftrDrvVer[16]; /* Filter/IOCtl Driver Version string */ 971291a2b48SSukumar Swaminathan char ftrDrvName[8]; /* Filter/IOCtl Driver Name */ 972291a2b48SSukumar Swaminathan char ipDrvVer[16]; /* IP Driver/component Version string */ 973291a2b48SSukumar Swaminathan char ipDrvName[8]; /* IP Driver/component Name */ 974291a2b48SSukumar Swaminathan uint32_t d_id; 975291a2b48SSukumar Swaminathan uint8_t wwpn[8]; 976291a2b48SSukumar Swaminathan uint8_t wwnn[8]; 977291a2b48SSukumar Swaminathan uint8_t hostname[32]; /* IP node hostname from uname -n */ 978fcf3ce44SJohn Forte 979fcf3ce44SJohn Forte #if (DFC_DRVINFO_VERSION >= DFC_DRVINFO_VERSION3) 980291a2b48SSukumar Swaminathan uint32_t NPIVsupport; 981fcf3ce44SJohn Forte #define DFC_DRVINFO_NPIV_DRV 0x00000001 982fcf3ce44SJohn Forte #define DFC_DRVINFO_NPIV_MODS 0x00000002 983fcf3ce44SJohn Forte #define DFC_DRVINFO_NPIV_PARMS 0x00000004 984fcf3ce44SJohn Forte #define DFC_DRVINFO_NPIV_FW 0x00000008 985fcf3ce44SJohn Forte 986fcf3ce44SJohn Forte #endif /* >= DFC_DRVINFO_VERSION3 */ 987fcf3ce44SJohn Forte 988fcf3ce44SJohn Forte #if (DFC_DRVINFO_VERSION >= DFC_DRVINFO_VERSION4) 989291a2b48SSukumar Swaminathan uint32_t sliMode; 990291a2b48SSukumar Swaminathan uint64_t featureList; 991fcf3ce44SJohn Forte #define DFC_DRVINFO_FEATURE_DIAG 0x00000001 992fcf3ce44SJohn Forte #define DFC_DRVINFO_FEATURE_MAPPING 0x00000002 993fcf3ce44SJohn Forte #define DFC_DRVINFO_FEATURE_DHCHAP 0x00000004 994fcf3ce44SJohn Forte #define DFC_DRVINFO_FEATURE_IKE 0x00000008 995fcf3ce44SJohn Forte #define DFC_DRVINFO_FEATURE_NPIV 0x00000010 996fcf3ce44SJohn Forte #define DFC_DRVINFO_FEATURE_RESET_WWN 0x00000020 997fcf3ce44SJohn Forte #define DFC_DRVINFO_FEATURE_VOLATILE_WWN 0x00000040 998fcf3ce44SJohn Forte #define DFC_DRVINFO_FEATURE_E2E_AUTH 0x00000080 99982527734SSukumar Swaminathan #define DFC_DRVINFO_FEATURE_SAN_DIAG 0x00000100 100082527734SSukumar Swaminathan #define DFC_DRVINFO_FEATURE_FCOE 0x00000200 100182527734SSukumar Swaminathan #define DFC_DRVINFO_FEATURE_PERSISTLINK 0x00000400 100282527734SSukumar Swaminathan #define DFC_DRVINFO_FEATURE_TARGET_MODE 0x00000800 1003*8f23e9faSHans Rosenfeld #define DFC_DRVINFO_FEATURE_EXT_MBOX 0x00001000 1004fcf3ce44SJohn Forte 1005291a2b48SSukumar Swaminathan #endif /* >= DFC_DRVINFO_VERSION4 */ 1006fcf3ce44SJohn Forte } dfc_drvinfo_t; 1007fcf3ce44SJohn Forte 1008fcf3ce44SJohn Forte 1009fcf3ce44SJohn Forte 1010291a2b48SSukumar Swaminathan typedef struct dfc_regevent 1011291a2b48SSukumar Swaminathan { 1012291a2b48SSukumar Swaminathan uint32_t ppid; 1013291a2b48SSukumar Swaminathan uint32_t cpid; 1014fcf3ce44SJohn Forte 1015291a2b48SSukumar Swaminathan uint32_t event; 1016291a2b48SSukumar Swaminathan uint32_t type; 1017291a2b48SSukumar Swaminathan uint32_t outsz; 1018291a2b48SSukumar Swaminathan void *ctx; 1019291a2b48SSukumar Swaminathan void (*func) (); 1020fcf3ce44SJohn Forte 1021291a2b48SSukumar Swaminathan uint32_t cindex; /* Set only by child */ 1022291a2b48SSukumar Swaminathan uint32_t state; /* Set only by child */ 1023fcf3ce44SJohn Forte 1024fcf3ce44SJohn Forte /* state */ 1025fcf3ce44SJohn Forte #define CHILD_UNKNOWN 0 1026fcf3ce44SJohn Forte #define CHILD_UNBORN 1 1027fcf3ce44SJohn Forte #define CHILD_ALIVE 2 1028fcf3ce44SJohn Forte #define CHILD_REGISTERED 3 1029fcf3ce44SJohn Forte #define CHILD_ASLEEP 4 1030fcf3ce44SJohn Forte #define CHILD_AWAKE 5 1031fcf3ce44SJohn Forte #define CHILD_DIED 6 1032fcf3ce44SJohn Forte 1033291a2b48SSukumar Swaminathan uint32_t pindex; /* Set only by parent */ 1034291a2b48SSukumar Swaminathan uint32_t flags; /* Set only by parent */ 1035fcf3ce44SJohn Forte 1036fcf3ce44SJohn Forte /* flags */ 1037fcf3ce44SJohn Forte #define EVENT_REGISTERED 0x01 1038fcf3ce44SJohn Forte #define EVENT_SERVICE_ACTIVE 0x02 1039fcf3ce44SJohn Forte 1040291a2b48SSukumar Swaminathan #ifdef SAN_DIAG_SUPPORT 1041291a2b48SSukumar Swaminathan HBA_WWN portname; 1042291a2b48SSukumar Swaminathan #endif /* SAN_DIAG_SUPPORT */ 1043*8f23e9faSHans Rosenfeld 1044*8f23e9faSHans Rosenfeld pthread_t ptid; 1045*8f23e9faSHans Rosenfeld uint32_t board; 1046*8f23e9faSHans Rosenfeld 1047fcf3ce44SJohn Forte } dfc_regevent_t; 1048fcf3ce44SJohn Forte 1049fcf3ce44SJohn Forte 1050fcf3ce44SJohn Forte /* Defines for RegisterForEvent mask */ 1051291a2b48SSukumar Swaminathan #define FC_REG_LINK_EVENT 0x01 /* Register for link up/down */ 1052291a2b48SSukumar Swaminathan /* events */ 1053291a2b48SSukumar Swaminathan #define FC_REG_RSCN_EVENT 0x02 /* Register for RSCN events */ 1054291a2b48SSukumar Swaminathan #define FC_REG_CT_EVENT 0x04 /* Register for CT request */ 1055291a2b48SSukumar Swaminathan /* events */ 1056291a2b48SSukumar Swaminathan #define FC_REG_MULTIPULSE_EVENT 0x08 /* Register for MultiPulse */ 1057291a2b48SSukumar Swaminathan /* events */ 1058291a2b48SSukumar Swaminathan #define FC_REG_DUMP_EVENT 0x10 /* Register for Diagnostic */ 1059291a2b48SSukumar Swaminathan /* Dump events */ 1060291a2b48SSukumar Swaminathan #define FC_REG_TEMP_EVENT 0x20 /* Register for Temperature */ 1061291a2b48SSukumar Swaminathan /* events */ 1062291a2b48SSukumar Swaminathan #define FC_REG_VPORTRSCN_EVENT 0x40 /* Register for VPort RSCN */ 1063291a2b48SSukumar Swaminathan /* events */ 1064291a2b48SSukumar Swaminathan #ifdef SAN_DIAG_SUPPORT 1065291a2b48SSukumar Swaminathan #define FC_REG_SD_ELS_EVENT 0x1000 /* Register for SANDiag ELS */ 1066291a2b48SSukumar Swaminathan /* events */ 1067291a2b48SSukumar Swaminathan #define FC_REG_SD_FABRIC_EVENT 0x2000 /* Register for SANDiag */ 1068291a2b48SSukumar Swaminathan /* Fabric events */ 1069291a2b48SSukumar Swaminathan #define FC_REG_SD_SCSI_EVENT 0x4000 /* Register for SANDiag SCSI */ 1070291a2b48SSukumar Swaminathan /* events */ 1071291a2b48SSukumar Swaminathan #define FC_REG_SD_BOARD_EVENT 0x8000 /* Register for SANDiag Board */ 1072291a2b48SSukumar Swaminathan /* events */ 1073291a2b48SSukumar Swaminathan #endif /* SAN_DIAG_SUPPORT */ 1074fcf3ce44SJohn Forte #define FC_REG_FCOE_EVENT 0x80000000 /* (Unofficial) Register for */ 1075fcf3ce44SJohn Forte /* FCOE events */ 1076fcf3ce44SJohn Forte 1077fcf3ce44SJohn Forte #define MAX_RSCN_PAYLOAD 1024 1078fcf3ce44SJohn Forte #define MAX_CT_PAYLOAD (1024*320) 1079fcf3ce44SJohn Forte 1080fcf3ce44SJohn Forte /* Temperature event types */ 1081fcf3ce44SJohn Forte #define DFC_TEMP_CRITICAL 1 1082fcf3ce44SJohn Forte #define DFC_TEMP_WARNING 2 1083fcf3ce44SJohn Forte #define DFC_TEMP_SAFE 3 1084fcf3ce44SJohn Forte 1085fcf3ce44SJohn Forte /* bits in a_onmask */ 1086291a2b48SSukumar Swaminathan #define ONDI_MBOX 0x1 /* allows non-destructive mailbox */ 1087291a2b48SSukumar Swaminathan /* commands */ 1088291a2b48SSukumar Swaminathan #define ONDI_IOINFO 0x2 /* supports retrieval of I/O info */ 1089291a2b48SSukumar Swaminathan #define ONDI_LNKINFO 0x4 /* supports retrieval of link info */ 1090291a2b48SSukumar Swaminathan #define ONDI_NODEINFO 0x8 /* supports retrieval of node info */ 1091291a2b48SSukumar Swaminathan #define ONDI_TRACEINFO 0x10 /* supports retrieval of trace info */ 1092291a2b48SSukumar Swaminathan #define ONDI_SETTRACE 0x20 /* supports configuration of trace */ 1093291a2b48SSukumar Swaminathan /* info */ 1094291a2b48SSukumar Swaminathan #define ONDI_SLI1 0x40 /* hardware supports SLI-1 interface */ 1095291a2b48SSukumar Swaminathan #define ONDI_SLI2 0x80 /* hardware supports SLI-2 interface */ 1096291a2b48SSukumar Swaminathan #define ONDI_BIG_ENDIAN 0x100 /* DDI interface is BIG Endian */ 1097291a2b48SSukumar Swaminathan #define ONDI_LTL_ENDIAN 0x200 /* DDI interface is LITTLE Endian */ 1098291a2b48SSukumar Swaminathan #define ONDI_RMEM 0x400 /* allows reading of adapter shared */ 1099291a2b48SSukumar Swaminathan /* memory */ 1100291a2b48SSukumar Swaminathan #define ONDI_RFLASH 0x800 /* allows reading of adapter flash */ 1101291a2b48SSukumar Swaminathan #define ONDI_RPCI 0x1000 /* allows reading of adapter pci */ 1102291a2b48SSukumar Swaminathan /* registers */ 1103291a2b48SSukumar Swaminathan #define ONDI_RCTLREG 0x2000 /* allows reading of adapter cntrol */ 1104291a2b48SSukumar Swaminathan /* registers */ 1105291a2b48SSukumar Swaminathan #define ONDI_CFGPARAM 0x4000 /* supports get/set configuration */ 1106291a2b48SSukumar Swaminathan /* parameters */ 1107291a2b48SSukumar Swaminathan #define ONDI_CT 0x8000 /* supports passthru CT interface */ 1108291a2b48SSukumar Swaminathan #define ONDI_HBAAPI 0x10000 /* supports HBA API interface */ 1109291a2b48SSukumar Swaminathan #define ONDI_SBUS 0x20000 /* supports SBUS adapter interface */ 1110fcf3ce44SJohn Forte 1111fcf3ce44SJohn Forte /* bits in a_offmask */ 1112291a2b48SSukumar Swaminathan #define OFFDI_MBOX 0x1 /* allows all mailbox commands */ 1113291a2b48SSukumar Swaminathan #define OFFDI_RMEM 0x2 /* allows reading of adapter shared */ 1114291a2b48SSukumar Swaminathan /* memory */ 1115291a2b48SSukumar Swaminathan #define OFFDI_WMEM 0x4 /* allows writing of adapter shared */ 1116291a2b48SSukumar Swaminathan /* memory */ 1117291a2b48SSukumar Swaminathan #define OFFDI_RFLASH 0x8 /* allows reading of adapter flash */ 1118291a2b48SSukumar Swaminathan #define OFFDI_WFLASH 0x10 /* allows writing of adapter flash */ 1119291a2b48SSukumar Swaminathan #define OFFDI_RPCI 0x20 /* allows reading of adapter pci */ 1120291a2b48SSukumar Swaminathan /* registers */ 1121291a2b48SSukumar Swaminathan #define OFFDI_WPCI 0x40 /* allows writing of adapter pci */ 1122291a2b48SSukumar Swaminathan /* registers */ 1123291a2b48SSukumar Swaminathan #define OFFDI_RCTLREG 0x80 /* allows reading of adapter cntrol */ 1124291a2b48SSukumar Swaminathan /* registers */ 1125291a2b48SSukumar Swaminathan #define OFFDI_WCTLREG 0x100 /* allows writing of adapter cntrol */ 1126291a2b48SSukumar Swaminathan /* registers */ 1127fcf3ce44SJohn Forte #define OFFDI_OFFLINE 0x80000000 /* if set, adapter is in offline */ 1128fcf3ce44SJohn Forte /* state */ 1129fcf3ce44SJohn Forte 1130fcf3ce44SJohn Forte 1131fcf3ce44SJohn Forte #define DDI_SHOW 0x0 1132fcf3ce44SJohn Forte #define DDI_ONDI 0x1 1133fcf3ce44SJohn Forte #define DDI_OFFDI 0x2 1134fcf3ce44SJohn Forte #define DDI_WARMDI 0x3 1135fcf3ce44SJohn Forte #define DDI_DIAGDI 0x4 1136fcf3ce44SJohn Forte 1137fcf3ce44SJohn Forte /* mbxStatus */ 1138fcf3ce44SJohn Forte #define DFC_MBX_SUCCESS 0x00 1139fcf3ce44SJohn Forte #define DFC_MBXERR_NUM_RINGS 0x01 1140fcf3ce44SJohn Forte #define DFC_MBXERR_NUM_IOCBS 0x02 1141fcf3ce44SJohn Forte #define DFC_MBXERR_IOCBS_EXCEEDED 0x03 1142fcf3ce44SJohn Forte #define DFC_MBXERR_BAD_RING_NUMBER 0x04 1143fcf3ce44SJohn Forte #define DFC_MBXERR_MASK_ENTRIES_RANGE 0x05 1144fcf3ce44SJohn Forte #define DFC_MBXERR_MASKS_EXCEEDED 0x06 1145fcf3ce44SJohn Forte #define DFC_MBXERR_BAD_PROFILE 0x07 1146fcf3ce44SJohn Forte #define DFC_MBXERR_BAD_DEF_CLASS 0x08 1147fcf3ce44SJohn Forte #define DFC_MBXERR_BAD_MAX_RESPONDER 0x09 1148fcf3ce44SJohn Forte #define DFC_MBXERR_BAD_MAX_ORIGINATOR 0x0A 1149fcf3ce44SJohn Forte #define DFC_MBXERR_RPI_REGISTERED 0x0B 1150fcf3ce44SJohn Forte #define DFC_MBXERR_RPI_FULL 0x0C 1151fcf3ce44SJohn Forte #define DFC_MBXERR_NO_RESOURCES 0x0D 1152fcf3ce44SJohn Forte #define DFC_MBXERR_BAD_RCV_LENGTH 0x0E 1153fcf3ce44SJohn Forte #define DFC_MBXERR_DMA_ERROR 0x0F 1154fcf3ce44SJohn Forte #define DFC_MBXERR_ERROR 0x10 1155fcf3ce44SJohn Forte 1156fcf3ce44SJohn Forte #define DFC_MBXERR_OVERTEMP_ERROR 0xFA 1157fcf3ce44SJohn Forte #define DFC_MBXERR_HARDWARE_ERROR 0xFB 1158fcf3ce44SJohn Forte #define DFC_MBXERR_DRVR_ERROR 0xFC 1159fcf3ce44SJohn Forte #define DFC_MBXERR_BUSY 0xFD 1160fcf3ce44SJohn Forte #define DFC_MBXERR_TIMEOUT 0xFE 1161fcf3ce44SJohn Forte #define DFC_MBX_NOT_FINISHED 0xFF 1162fcf3ce44SJohn Forte 1163fcf3ce44SJohn Forte 1164fcf3ce44SJohn Forte 1165fcf3ce44SJohn Forte /* Error codes for library calls */ 1166fcf3ce44SJohn Forte #define DFC_ERR_GENERAL_ERROR 0x1 1167fcf3ce44SJohn Forte 1168fcf3ce44SJohn Forte #define DFC_ERR_MBOX_ERROR 0x2 1169fcf3ce44SJohn Forte #define DFC_ERR_LINK_DOWN 0x2 1170fcf3ce44SJohn Forte #define DFC_ERR_INCORRECT_VER 0x2 1171fcf3ce44SJohn Forte #define DFC_ERR_INVALID_ID 0x2 1172fcf3ce44SJohn Forte #define DFC_ERR_TIMEOUT 0x2 1173fcf3ce44SJohn Forte #define DFC_ERR_NOT_SUPPORTED 0x2 1174fcf3ce44SJohn Forte #define DFC_ERR_NPIV_ACTIVE 0x2 1175fcf3ce44SJohn Forte 1176fcf3ce44SJohn Forte #define DFC_ERR_NO_RPI 0x3 1177fcf3ce44SJohn Forte #define DFC_ERR_BUFFER_OVERFLOW 0x3 1178fcf3ce44SJohn Forte #define DFC_ERR_INVALID_LOOPBACK_TYPE 0x3 1179fcf3ce44SJohn Forte #define DFC_ERR_OVERTEMP 0x3 1180fcf3ce44SJohn Forte 1181fcf3ce44SJohn Forte #define DFC_ERR_LOOPBACK_BUSY 0x4 1182fcf3ce44SJohn Forte #define DFC_ERR_INVALID_RESET_TYPE 0x4 1183fcf3ce44SJohn Forte #define DFC_ERR_MENLO_LINKDOWN 0x4 1184fcf3ce44SJohn Forte 1185fcf3ce44SJohn Forte #define DFC_ERR_SEQ_TIMEOUT 0x5 1186fcf3ce44SJohn Forte 1187fcf3ce44SJohn Forte #define DFC_ERR_NO_XMIT 0x6 1188fcf3ce44SJohn Forte #define DFC_ERR_INVALID_NUMBER 0x6 1189fcf3ce44SJohn Forte 1190fcf3ce44SJohn Forte #define DFC_ERR_RESET_RECV 0x7 1191fcf3ce44SJohn Forte 1192fcf3ce44SJohn Forte 1193fcf3ce44SJohn Forte 1194fcf3ce44SJohn Forte 1195fcf3ce44SJohn Forte /* type definitions for GetBindList function */ 1196291a2b48SSukumar Swaminathan typedef enum dfc_bindtype 1197291a2b48SSukumar Swaminathan { 1198fcf3ce44SJohn Forte BIND_NONE, 1199fcf3ce44SJohn Forte BIND_WWNN, 1200fcf3ce44SJohn Forte BIND_WWPN, 1201fcf3ce44SJohn Forte BIND_DID, 1202fcf3ce44SJohn Forte BIND_ALPA 1203fcf3ce44SJohn Forte } dfc_bindtype_t; 1204fcf3ce44SJohn Forte 1205fcf3ce44SJohn Forte 1206291a2b48SSukumar Swaminathan typedef struct dfc_bind_entry 1207291a2b48SSukumar Swaminathan { 1208291a2b48SSukumar Swaminathan dfc_bindtype_t bind_type; 1209291a2b48SSukumar Swaminathan uint32_t scsi_id; 1210291a2b48SSukumar Swaminathan uint32_t did; 1211291a2b48SSukumar Swaminathan uint8_t wwnn[8]; 1212291a2b48SSukumar Swaminathan uint8_t wwpn[8]; 1213291a2b48SSukumar Swaminathan uint32_t flags; 1214fcf3ce44SJohn Forte 1215fcf3ce44SJohn Forte /* Bind Entry flags */ 1216fcf3ce44SJohn Forte #define DFC_BIND_AUTOMAP 0x1 /* Node is automapped */ 1217fcf3ce44SJohn Forte #define DFC_BIND_BINDLIST 0x2 /* entry in bind list not mapped */ 1218fcf3ce44SJohn Forte #define DFC_BIND_MAPPED 0x4 /* Node is mapped to a scsiid */ 1219fcf3ce44SJohn Forte #define DFC_BIND_UNMAPPED 0x8 /* Node is unmapped */ 1220fcf3ce44SJohn Forte #define DFC_BIND_NODEVTMO 0x10 /* NODEVTMO flag of the node */ 1221fcf3ce44SJohn Forte #define DFC_BIND_NOSCSIID 0x20 /* No scsi id is assigned yet */ 1222291a2b48SSukumar Swaminathan #define DFC_BIND_RPTLUNST 0x40 /* Node is in report lun cmpl st */ 1223fcf3ce44SJohn Forte } dfc_bind_entry_t; 1224fcf3ce44SJohn Forte 1225291a2b48SSukumar Swaminathan typedef struct dfc_bind_list 1226291a2b48SSukumar Swaminathan { 1227291a2b48SSukumar Swaminathan uint32_t NumberOfEntries; 1228291a2b48SSukumar Swaminathan dfc_bind_entry_t entry[1]; /* Variable length array */ 1229fcf3ce44SJohn Forte } dfc_bind_list_t; 1230fcf3ce44SJohn Forte 1231fcf3ce44SJohn Forte 1232fcf3ce44SJohn Forte 1233fcf3ce44SJohn Forte /* Defines for error codes -OLD- */ 1234fcf3ce44SJohn Forte #define FC_ERROR_BUFFER_OVERFLOW 0xff 1235fcf3ce44SJohn Forte #define FC_ERROR_RESPONSE_TIMEOUT 0xfe 1236fcf3ce44SJohn Forte #define FC_ERROR_LINK_UNAVAILABLE 0xfd 1237fcf3ce44SJohn Forte #define FC_ERROR_INSUFFICIENT_RESOURCES 0xfc 1238fcf3ce44SJohn Forte #define FC_ERROR_EXISTING_REGISTRATION 0xfb 1239fcf3ce44SJohn Forte #define FC_ERROR_INVALID_TAG 0xfa 1240fcf3ce44SJohn Forte #define FC_ERROR_INVALID_WWN 0xf9 1241fcf3ce44SJohn Forte #define FC_ERROR_CREATEVENT_FAILED 0xf8 1242fcf3ce44SJohn Forte 1243fcf3ce44SJohn Forte 1244fcf3ce44SJohn Forte 1245291a2b48SSukumar Swaminathan typedef union dfc_ct_rev 1246291a2b48SSukumar Swaminathan { 1247fcf3ce44SJohn Forte /* Structure is in Big Endian format */ 1248291a2b48SSukumar Swaminathan struct 1249291a2b48SSukumar Swaminathan { 1250291a2b48SSukumar Swaminathan uint32_t Revision:8; 1251291a2b48SSukumar Swaminathan uint32_t InId:24; 1252fcf3ce44SJohn Forte } bits; 1253291a2b48SSukumar Swaminathan uint32_t word; 1254fcf3ce44SJohn Forte } dfc_ct_rev_t; 1255fcf3ce44SJohn Forte 1256291a2b48SSukumar Swaminathan typedef union dfc_ct_resp 1257291a2b48SSukumar Swaminathan { 1258fcf3ce44SJohn Forte /* Structure is in Big Endian format */ 1259291a2b48SSukumar Swaminathan struct 1260291a2b48SSukumar Swaminathan { 1261291a2b48SSukumar Swaminathan uint32_t CmdRsp:16; 1262291a2b48SSukumar Swaminathan uint32_t Size:16; 1263fcf3ce44SJohn Forte } bits; 1264291a2b48SSukumar Swaminathan uint32_t word; 1265fcf3ce44SJohn Forte } dfc_ct_resp_t; 1266fcf3ce44SJohn Forte 1267291a2b48SSukumar Swaminathan typedef struct dfc_ct_request 1268291a2b48SSukumar Swaminathan { 1269fcf3ce44SJohn Forte /* Structure is in Big Endian format */ 1270291a2b48SSukumar Swaminathan dfc_ct_rev_t RevisionId; 1271291a2b48SSukumar Swaminathan uint8_t FsType; 1272291a2b48SSukumar Swaminathan uint8_t FsSubType; 1273291a2b48SSukumar Swaminathan uint8_t Options; 1274291a2b48SSukumar Swaminathan uint8_t Rsrvd1; 1275291a2b48SSukumar Swaminathan dfc_ct_resp_t CommandResponse; 1276291a2b48SSukumar Swaminathan uint8_t Rsrvd2; 1277291a2b48SSukumar Swaminathan uint8_t ReasonCode; 1278291a2b48SSukumar Swaminathan uint8_t Explanation; 1279291a2b48SSukumar Swaminathan uint8_t VendorUnique; 1280fcf3ce44SJohn Forte } dfc_ct_request_t; 1281fcf3ce44SJohn Forte 1282291a2b48SSukumar Swaminathan #define SLI_CT_REVISION 1 1283fcf3ce44SJohn Forte 1284291a2b48SSukumar Swaminathan #define FC_FSTYPE_ALL 0xffff /* match on all fsTypes */ 1285fcf3ce44SJohn Forte 1286fcf3ce44SJohn Forte /* Emulex Vendor-Unique CT Request Command Codes */ 1287291a2b48SSukumar Swaminathan #define CT_OP_GSAT 0x0101 /* Get Server Attributes */ 1288291a2b48SSukumar Swaminathan #define CT_OP_GHAT 0x0102 /* Get HBA Attributes */ 1289291a2b48SSukumar Swaminathan #define CT_OP_GPAT 0x0103 /* Get Port Attributes */ 1290291a2b48SSukumar Swaminathan #define CT_OP_GDAT 0x0104 /* Get Driver Attributes */ 1291291a2b48SSukumar Swaminathan #define CT_OP_GPST 0x0105 /* Get Port Statistics */ 1292291a2b48SSukumar Swaminathan /* 0x0106 is reserved */ 1293291a2b48SSukumar Swaminathan #define CT_OP_GDP 0x0107 /* Get Driver Parameters */ 1294291a2b48SSukumar Swaminathan #define CT_OP_GDPG 0x0108 /* Get Driver Parameters Global */ 1295291a2b48SSukumar Swaminathan #define CT_OP_GEPS 0x0109 /* Get Extended Port Statistics */ 1296291a2b48SSukumar Swaminathan #define CT_OP_GLAT 0x010A /* Get Lun Attributes */ 1297291a2b48SSukumar Swaminathan 1298291a2b48SSukumar Swaminathan #define CT_OP_SSAT 0x0111 /* Set Server Attributes */ 1299291a2b48SSukumar Swaminathan #define CT_OP_SHAT 0x0112 /* Set HBA Attributes */ 1300291a2b48SSukumar Swaminathan #define CT_OP_SPAT 0x0113 /* Set Port Attributes */ 1301291a2b48SSukumar Swaminathan #define CT_OP_SDAT 0x0114 /* Set Driver Attributes */ 1302291a2b48SSukumar Swaminathan /* 0x0115 is reserved */ 1303291a2b48SSukumar Swaminathan /* 0x0116 is reserved */ 1304291a2b48SSukumar Swaminathan #define CT_OP_SDP 0x0117 /* Set Driver Parameter */ 1305291a2b48SSukumar Swaminathan #define CT_OP_SBBS 0x0118 /* Set Boot Bios State */ 1306291a2b48SSukumar Swaminathan 1307291a2b48SSukumar Swaminathan #define CT_OP_RPST 0x0121 /* Reset Port Statistics */ 1308291a2b48SSukumar Swaminathan #define CT_OP_VFW 0x0122 /* Verify Firmware */ 1309291a2b48SSukumar Swaminathan #define CT_OP_DFW 0x0123 /* Download Firmware */ 1310291a2b48SSukumar Swaminathan #define CT_OP_RES 0x0124 /* Reset HBA */ 1311291a2b48SSukumar Swaminathan #define CT_OP_RHD 0x0125 /* Run HBA Diagnostic */ 1312291a2b48SSukumar Swaminathan #define CT_OP_UFW 0x0126 /* Upgrade Firmware */ 1313291a2b48SSukumar Swaminathan #define CT_OP_RDP 0x0127 /* Reset Driver Parameters */ 1314291a2b48SSukumar Swaminathan #define CT_OP_GHDR 0x0128 /* Get HBA Diagnotic Results */ 1315291a2b48SSukumar Swaminathan #define CT_OP_CHD 0x0129 /* Cancel HBA Diagnostic */ 1316291a2b48SSukumar Swaminathan 1317291a2b48SSukumar Swaminathan /* 0x0131 is reserved */ 1318291a2b48SSukumar Swaminathan /* 0x0132 is reserved */ 1319291a2b48SSukumar Swaminathan #define CT_OP_SSR 0x0133 /* Send Software Resource */ 1320291a2b48SSukumar Swaminathan 1321291a2b48SSukumar Swaminathan #define CT_OP_RSAT 0x0141 /* Read SA Table */ 1322291a2b48SSukumar Swaminathan #define CT_OP_WSAT 0x0142 /* Write SA Table */ 1323291a2b48SSukumar Swaminathan #define CT_OP_RSAH 0x0143 /* Read SA Table Header */ 1324291a2b48SSukumar Swaminathan #define CT_OP_WSAH 0x0144 /* Write SA Table Header */ 1325291a2b48SSukumar Swaminathan #define CT_OP_RACT 0x0145 /* Read Access Control Table */ 1326291a2b48SSukumar Swaminathan #define CT_OP_WACT 0x0146 /* Write Access Control Table */ 1327291a2b48SSukumar Swaminathan #define CT_OP_RKT 0x0147 /* Read Key Table Table */ 1328291a2b48SSukumar Swaminathan #define CT_OP_WKT 0x0148 /* Write Key Table Table */ 1329291a2b48SSukumar Swaminathan #define CT_OP_SSC 0x0149 /* Cause SA Table re-read;sync */ 1330291a2b48SSukumar Swaminathan 1331291a2b48SSukumar Swaminathan #define CT_OP_QHBA 0x0151 /* Query HBA */ 1332291a2b48SSukumar Swaminathan #define CT_OP_GST 0x0152 /* Get Status */ 1333291a2b48SSukumar Swaminathan 1334291a2b48SSukumar Swaminathan #define CT_OP_GFTM 0x0161 /* Get FCP Target Mapping */ 1335291a2b48SSukumar Swaminathan #define CT_OP_SRL 0x0162 /* SCSI Report Luns */ 1336291a2b48SSukumar Swaminathan #define CT_OP_SI 0x0163 /* SCSI Inquiry */ 1337291a2b48SSukumar Swaminathan #define CT_OP_SRC 0x0164 /* SCSI Read Capacity */ 1338291a2b48SSukumar Swaminathan 1339291a2b48SSukumar Swaminathan #define CT_OP_GPB 0x0171 /* Get FCP Persistent Binding */ 1340291a2b48SSukumar Swaminathan #define CT_OP_SPB 0x0172 /* Set FCP Persistent Binding */ 1341291a2b48SSukumar Swaminathan #define CT_OP_RPB 0x0173 /* Remove FCP Persistent Binding */ 1342291a2b48SSukumar Swaminathan #define CT_OP_RAPB 0x0174 /* Remove All FCP Persistent Bindings */ 1343291a2b48SSukumar Swaminathan #define CT_OP_GBC 0x0175 /* Get Binding Capability */ 1344291a2b48SSukumar Swaminathan #define CT_OP_GBS 0x0176 /* Get Binding Support */ 1345291a2b48SSukumar Swaminathan #define CT_OP_SBS 0x0177 /* Set Binding Support */ 1346291a2b48SSukumar Swaminathan #define CT_OP_GANI 0x0178 /* Get All Nodes Info */ 1347291a2b48SSukumar Swaminathan #define CT_OP_GRV 0x0179 /* Get Range Value for Bus#, Target#, Lun# */ 1348291a2b48SSukumar Swaminathan #define CT_OP_GAPBS 0x017A /* Get AutoPB service state */ 1349291a2b48SSukumar Swaminathan /* (AutoPilotManager) */ 1350291a2b48SSukumar Swaminathan #define CT_OP_APBC 0x017B /* Configure AutoPB service */ 1351291a2b48SSukumar Swaminathan /* (AutoPilotManager) */ 1352291a2b48SSukumar Swaminathan 1353291a2b48SSukumar Swaminathan #define CT_OP_GDT 0x0180 /* Get Driver Type */ 1354291a2b48SSukumar Swaminathan #define CT_OP_GDLMI 0x0181 /* Get Drive Letter Mapping */ 1355291a2b48SSukumar Swaminathan /* Information [GDLM] */ 1356291a2b48SSukumar Swaminathan #define CT_OP_GANA 0x0182 /* Get All Node Addresses */ 1357291a2b48SSukumar Swaminathan #define CT_OP_GDLV 0x0183 /* Get Driver Library Version */ 1358291a2b48SSukumar Swaminathan #define CT_OP_GWUP 0x0184 /* Get Adapter Wakeup Parameters */ 1359291a2b48SSukumar Swaminathan #define CT_OP_GLM 0x0185 /* Get Adapter Loopmap */ 1360291a2b48SSukumar Swaminathan #define CT_OP_GABS 0x0186 /* Get Adapter Beacon State */ 1361291a2b48SSukumar Swaminathan #define CT_OP_SABS 0x0187 /* Set Adapter Beacon State */ 1362291a2b48SSukumar Swaminathan #define CT_OP_RPR 0x0188 /* Read Adapter PCI Registers */ 1363fcf3ce44SJohn Forte 1364fcf3ce44SJohn Forte /* NPIV return codes */ 1365fcf3ce44SJohn Forte #define DFC_NPIV_SUCCESS 0 1366fcf3ce44SJohn Forte #define DFC_NPIV_GENERAL_ERROR 1 1367fcf3ce44SJohn Forte #define DFC_NPIV_NOT_SUPPORTED 2 1368fcf3ce44SJohn Forte #define DFC_NPIV_NO_RESOURCES 3 1369fcf3ce44SJohn Forte #define DFC_NPIV_INVALID_HANDLE 3 1370fcf3ce44SJohn Forte #define DFC_NPIV_ILLEGAL_WWPN 4 1371fcf3ce44SJohn Forte #define DFC_NPIV_TOO_MANY_VPORTS 4 1372fcf3ce44SJohn Forte #define DFC_NPIV_ILLEGAL_WWN 5 1373fcf3ce44SJohn Forte #define DFC_NPIV_BUSY 5 1374fcf3ce44SJohn Forte #define DFC_NPIV_INVALID_WWN 6 1375fcf3ce44SJohn Forte #define DFC_NPIV_LINK_DOWN 7 1376fcf3ce44SJohn Forte #define DFC_NPIV_MORE_DATA 7 1377fcf3ce44SJohn Forte #define DFC_NPIV_FABRIC_NOT_SUPPORTED 8 1378fcf3ce44SJohn Forte #define DFC_NPIV_FABRIC_OUT_OF_RESOURCE 9 1379fcf3ce44SJohn Forte #define DFC_NPIV_INVALID_ACCESS_KEY 10 1380fcf3ce44SJohn Forte #define DFC_NPIV_INVALID_HANDLE_AT_CREATE 11 1381fcf3ce44SJohn Forte #define DFC_NPIV_UNSUPPORTED_OPTION 12 1382fcf3ce44SJohn Forte 1383291a2b48SSukumar Swaminathan typedef struct dfc_vport_QoS 1384291a2b48SSukumar Swaminathan { 1385291a2b48SSukumar Swaminathan uint32_t resv; 1386fcf3ce44SJohn Forte } dfc_vport_QoS_t; 1387fcf3ce44SJohn Forte 1388fcf3ce44SJohn Forte 1389fcf3ce44SJohn Forte /* VPORT type */ 1390291a2b48SSukumar Swaminathan #define VPORT_TYPE_PHYSICAL 0 1391291a2b48SSukumar Swaminathan #define VPORT_TYPE_VIRTUAL 1 1392fcf3ce44SJohn Forte 1393fcf3ce44SJohn Forte /* VPORT States */ 1394fcf3ce44SJohn Forte #define VPORT_STATE_UNKNOWN 0 1395fcf3ce44SJohn Forte #define VPORT_STATE_LINKDOWN 1 1396fcf3ce44SJohn Forte #define VPORT_STATE_INIT 2 1397fcf3ce44SJohn Forte #define VPORT_STATE_NO_FABRIC_SUPPORT 3 1398fcf3ce44SJohn Forte #define VPORT_STATE_NO_FABRIC_RESOURCE 4 1399fcf3ce44SJohn Forte #define VPORT_STATE_FABRIC_LOGOUT 5 1400fcf3ce44SJohn Forte #define VPORT_STATE_FABRIC_REJECT_WWN 6 1401fcf3ce44SJohn Forte #define VPORT_STATE_FABRIC_LOGIN_FAIL 7 1402fcf3ce44SJohn Forte #define VPORT_STATE_ACTIVE 8 1403fcf3ce44SJohn Forte #define VPORT_STATE_AUTH_FAILED 9 1404fcf3ce44SJohn Forte 1405fcf3ce44SJohn Forte /* VPORT Options */ 1406291a2b48SSukumar Swaminathan #define VPORT_OPT_AUTORETRY 0x00000001 1407291a2b48SSukumar Swaminathan #define VPORT_OPT_AUTOWWN 0x00000002 1408291a2b48SSukumar Swaminathan #define VPORT_OPT_ACTIVATE 0x00000004 1409fcf3ce44SJohn Forte 1410291a2b48SSukumar Swaminathan #define VPORT_OPT_SAVE_CREATE_ONLY 0x00000000 1411291a2b48SSukumar Swaminathan #define VPORT_OPT_SAVE_CREATE_UPDATE 0x00000010 1412291a2b48SSukumar Swaminathan #define VPORT_OPT_SAVE_UPDATE_ONLY 0x00000018 1413291a2b48SSukumar Swaminathan #define VPORT_OPT_SAVE_MASK 0x00000018 1414fcf3ce44SJohn Forte 1415291a2b48SSukumar Swaminathan #define VPORT_OPT_RESTRICT 0x00000020 1416291a2b48SSukumar Swaminathan #define VPORT_OPT_UNRESTRICT 0x00000040 1417291a2b48SSukumar Swaminathan #define VPORT_OPT_RESTRICT_MASK 0x00000060 1418fcf3ce44SJohn Forte 1419291a2b48SSukumar Swaminathan #define VPORT_OPT_FAILOVER 0x00000080 1420fcf3ce44SJohn Forte 1421fcf3ce44SJohn Forte /* Check list bit-mapped value */ 1422291a2b48SSukumar Swaminathan #define CL_NPIV_PARM_ENABLE 0x00000001 1423291a2b48SSukumar Swaminathan #define CL_SLI3_ENABLE 0x00000002 1424291a2b48SSukumar Swaminathan #define CL_HBA_SUPPORT_NPIV 0x00000004 1425291a2b48SSukumar Swaminathan #define CL_HBA_HAS_RESOURCES 0x00000008 1426291a2b48SSukumar Swaminathan #define CL_HBA_LINKUP 0x00000010 1427291a2b48SSukumar Swaminathan #define CL_P2P_TOPOLOGY 0x00000020 1428291a2b48SSukumar Swaminathan #define CL_FABRIC_SUPPORTS_NPIV 0x00000040 1429291a2b48SSukumar Swaminathan #define CL_FABRIC_HAS_RESOURCES 0x00000080 1430291a2b48SSukumar Swaminathan #define CL_NPIV_READY 0x000000FF 1431fcf3ce44SJohn Forte 1432fcf3ce44SJohn Forte 1433fcf3ce44SJohn Forte 1434fcf3ce44SJohn Forte 1435291a2b48SSukumar Swaminathan #define DFC_VPORT_ATTR_VERSION 2 1436291a2b48SSukumar Swaminathan typedef struct dfc_vport_attrs 1437291a2b48SSukumar Swaminathan { 1438291a2b48SSukumar Swaminathan uint8_t version; /* 2 = version of this structure, */ 1439291a2b48SSukumar Swaminathan /* for compatibility check */ 1440291a2b48SSukumar Swaminathan uint8_t reserved1[3]; 1441fcf3ce44SJohn Forte 1442291a2b48SSukumar Swaminathan uint8_t wwpn[8]; /* virtual port WWPN */ 1443291a2b48SSukumar Swaminathan uint8_t wwnn[8]; /* virtual port WWNN */ 1444291a2b48SSukumar Swaminathan char name[256]; /* name to be register with the */ 1445291a2b48SSukumar Swaminathan /* fabric */ 1446fcf3ce44SJohn Forte 1447291a2b48SSukumar Swaminathan uint32_t options; 1448fcf3ce44SJohn Forte 1449291a2b48SSukumar Swaminathan uint32_t portFcId; /* D-ID; set when the N-port is */ 1450291a2b48SSukumar Swaminathan /* created successfully */ 1451fcf3ce44SJohn Forte 1452291a2b48SSukumar Swaminathan uint8_t state; /* VPORT state */ 1453291a2b48SSukumar Swaminathan uint8_t restrictLogin; 145482527734SSukumar Swaminathan uint8_t flags; 145582527734SSukumar Swaminathan uint8_t reserved2; 1456291a2b48SSukumar Swaminathan uint64_t buf; /* Used for VPI */ 1457fcf3ce44SJohn Forte 1458291a2b48SSukumar Swaminathan uint8_t fabric_wwn[8]; /* Fabric WWN (WWNN) */ 1459291a2b48SSukumar Swaminathan uint32_t checklist; 1460291a2b48SSukumar Swaminathan uint8_t accessKey[32]; 1461fcf3ce44SJohn Forte } dfc_vport_attrs_t; 1462fcf3ce44SJohn Forte 1463fcf3ce44SJohn Forte 1464291a2b48SSukumar Swaminathan typedef struct dfc_vport_entry 1465291a2b48SSukumar Swaminathan { 1466291a2b48SSukumar Swaminathan uint8_t wwpn[8]; /* wwpn of the virtual port */ 1467291a2b48SSukumar Swaminathan uint8_t wwnn[8]; /* wwnn of the virtual port */ 1468291a2b48SSukumar Swaminathan uint32_t PortFcId; /* FC port ID assigned to this */ 1469291a2b48SSukumar Swaminathan /* virtual port */ 1470fcf3ce44SJohn Forte } dfc_vport_entry_t; 1471fcf3ce44SJohn Forte 1472fcf3ce44SJohn Forte 1473291a2b48SSukumar Swaminathan typedef struct dfc_vport_entry_list 1474291a2b48SSukumar Swaminathan { 1475291a2b48SSukumar Swaminathan uint32_t NumberOfEntries; 1476291a2b48SSukumar Swaminathan dfc_vport_entry_t entry[MAX_VPORTS]; 1477fcf3ce44SJohn Forte } dfc_vport_entry_list_t; 1478fcf3ce44SJohn Forte 1479fcf3ce44SJohn Forte 1480291a2b48SSukumar Swaminathan typedef struct dfc_vport_nodeinfo_entry 1481291a2b48SSukumar Swaminathan { 1482291a2b48SSukumar Swaminathan uint32_t bind_type; 1483fcf3ce44SJohn Forte #define VPORT_NODE_BINDDID 0x0000 1484fcf3ce44SJohn Forte #define VPORT_NODE_BINDWWNN 0x0001 1485fcf3ce44SJohn Forte #define VPORT_NODE_BINDWWPN 0x0002 1486fcf3ce44SJohn Forte #define VPORT_NODE_AUTOMAP 0x0004 1487291a2b48SSukumar Swaminathan #define VPORT_NODE_UNMASK_ALL_LUN 0x0008 1488fcf3ce44SJohn Forte #define VPORT_NODE_DISABLE_LUN_AUTOMAP 0x0010 1489fcf3ce44SJohn Forte #define VPORT_NODE_ALPA 0x0020 1490fcf3ce44SJohn Forte 1491291a2b48SSukumar Swaminathan HBA_SCSIID scsiId; 1492291a2b48SSukumar Swaminathan HBA_FCPID fcpId; 1493fcf3ce44SJohn Forte 1494291a2b48SSukumar Swaminathan uint32_t nodeState; 1495fcf3ce44SJohn Forte #define VPORT_NODESTATE_EXIST 0x0001 1496fcf3ce44SJohn Forte #define VPORT_NODESTATE_READY 0x0002 1497fcf3ce44SJohn Forte #define VPORT_NODESTATE_LINKDOWN 0x0004 1498fcf3ce44SJohn Forte #define VPORT_NODESTATE_UNMAPPED 0x0008 1499fcf3ce44SJohn Forte #define VPORT_NODESTATE_BOUND 0x0010 1500fcf3ce44SJohn Forte 1501291a2b48SSukumar Swaminathan uint32_t reserved; 1502fcf3ce44SJohn Forte } dfc_vport_nodeinfo_entry_t; 1503fcf3ce44SJohn Forte 1504291a2b48SSukumar Swaminathan typedef struct dfc_vport_get_nodeinfo 1505291a2b48SSukumar Swaminathan { 1506291a2b48SSukumar Swaminathan uint32_t NumberOfEntries; /* number of nodes */ 1507291a2b48SSukumar Swaminathan dfc_vport_nodeinfo_entry_t entry[MAX_NODES]; /* start of array */ 1508fcf3ce44SJohn Forte } dfc_vport_get_nodeinfo_t; 1509fcf3ce44SJohn Forte 1510fcf3ce44SJohn Forte 1511291a2b48SSukumar Swaminathan typedef struct dfc_vport_resource 1512291a2b48SSukumar Swaminathan { 1513291a2b48SSukumar Swaminathan uint32_t vpi_max; 1514291a2b48SSukumar Swaminathan uint32_t vpi_inuse; 1515291a2b48SSukumar Swaminathan uint32_t rpi_max; 1516291a2b48SSukumar Swaminathan uint32_t rpi_inuse; 1517fcf3ce44SJohn Forte } dfc_vport_resource_t; 1518fcf3ce44SJohn Forte 1519fcf3ce44SJohn Forte 1520291a2b48SSukumar Swaminathan typedef struct dfc_vlinkinfo 1521291a2b48SSukumar Swaminathan { 1522291a2b48SSukumar Swaminathan uint32_t api_versions; 1523fcf3ce44SJohn Forte 1524291a2b48SSukumar Swaminathan uint8_t linktype; 1525291a2b48SSukumar Swaminathan uint8_t state; 1526291a2b48SSukumar Swaminathan uint8_t fail_reason; 1527291a2b48SSukumar Swaminathan uint8_t prev_fail_reason; 1528fcf3ce44SJohn Forte #define VPORT_FAIL_UNKNOWN 0 1529fcf3ce44SJohn Forte #define VPORT_FAIL_LINKDOWN 1 1530fcf3ce44SJohn Forte #define VPORT_FAIL_FAB_UNSUPPORTED 2 1531fcf3ce44SJohn Forte #define VPORT_FAIL_FAB_NORESOURCES 3 1532fcf3ce44SJohn Forte #define VPORT_FAIL_FAB_LOGOUT 4 1533fcf3ce44SJohn Forte #define VPORT_FAIL_HBA_NORESOURCES 5 1534fcf3ce44SJohn Forte 1535291a2b48SSukumar Swaminathan uint8_t wwnn[8]; 1536291a2b48SSukumar Swaminathan uint8_t wwpn[8]; 1537fcf3ce44SJohn Forte 1538291a2b48SSukumar Swaminathan void *vlink; 1539fcf3ce44SJohn Forte 1540291a2b48SSukumar Swaminathan uint32_t vpi_max; 1541291a2b48SSukumar Swaminathan uint32_t vpi_inuse; 1542291a2b48SSukumar Swaminathan uint32_t rpi_max; 1543291a2b48SSukumar Swaminathan uint32_t rpi_inuse; 1544fcf3ce44SJohn Forte } dfc_vlinkinfo_t; 1545fcf3ce44SJohn Forte 1546fcf3ce44SJohn Forte 1547fcf3ce44SJohn Forte #ifdef DHCHAP_SUPPORT 1548fcf3ce44SJohn Forte 1549fcf3ce44SJohn Forte /* DHCHAP return code */ 1550fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_NOT_CONFIGURED 0x8001 1551fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_AUTH_FAILED_NO_SA_FOUND 0x8002 1552fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_AUTH_INIT_OK_AUTH_FAILED 0x8003 1553fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_COMPARE_FAILED 0x8004 1554fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_WWN_NOT_FOUND 0x8005 1555fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_PASSWORD_INVALID 0x8006 1556fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_INVALID_ENTITY 0x8007 1557fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_ENTITY_NOT_ACTIVE 0x8008 1558fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_INVALID_OPERATION 0x8009 1559fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_OUT_OF_RESOURCES 0x800a 1560fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_AUTHENTICATION_GOINGON 0x800b 1561fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_INVALID_BOARD_NO 0x800c 1562fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_IO_ERROR 0x800d 1563fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_CREATE_STORKEY_ERROR 0x800e 1564fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_CREATE_PARMKEY_ERROR 0x800f 1565fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_CREATE_AUTHKEY_ERROR 0x8010 1566291a2b48SSukumar Swaminathan #define DFC_AUTH_STATUS_LOCAL_REMOTE_PASSWORD_SAME 0x8011 1567fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_CREATE_BORDKEY_ERROR 0x8020 1568fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_DRVTYPE_NOT_SUPPORTED 0x8030 1569fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_AUTHENTICATION_NOT_SUPPORTED 0x8031 1570fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_GENERAL_ERROR 0x8032 1571fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_CONFIG_NOT_FOUND 0x8034 1572fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_NOT_PRIVILEGE_USER 0x8040 1573fcf3ce44SJohn Forte 1574fcf3ce44SJohn Forte 1575291a2b48SSukumar Swaminathan typedef struct dfc_fcsp_config 1576291a2b48SSukumar Swaminathan { 1577291a2b48SSukumar Swaminathan HBA_WWN lwwpn; 1578291a2b48SSukumar Swaminathan HBA_WWN rwwpn; 1579291a2b48SSukumar Swaminathan 1580291a2b48SSukumar Swaminathan uint16_t auth_tov; /* seconds */ 1581291a2b48SSukumar Swaminathan #define DFC_AUTH_TOV_MIN 20 1582291a2b48SSukumar Swaminathan #define DFC_AUTH_TOV_MAX 1000 1583291a2b48SSukumar Swaminathan #define DFC_AUTH_TOV_DEFAULT 45 1584291a2b48SSukumar Swaminathan 1585291a2b48SSukumar Swaminathan uint8_t auth_mode; 1586291a2b48SSukumar Swaminathan #define DFC_AUTH_MODE_DISABLED 1 1587291a2b48SSukumar Swaminathan #define DFC_AUTH_MODE_ACTIVE 2 1588291a2b48SSukumar Swaminathan #define DFC_AUTH_MODE_PASSIVE 3 1589291a2b48SSukumar Swaminathan #define DFC_AUTH_MODE_DEFAULT DFC_AUTH_MODE_DISABLED 1590291a2b48SSukumar Swaminathan 1591291a2b48SSukumar Swaminathan uint8_t auth_bidir:1; 1592291a2b48SSukumar Swaminathan #define DFC_AUTH_BIDIR_DISABLED 0 1593291a2b48SSukumar Swaminathan #define DFC_AUTH_BIDIR_ENABLED 1 1594291a2b48SSukumar Swaminathan #define DFC_AUTH_BIDIR_DEFAULT DFC_AUTH_BIDIR_DISABLED 1595291a2b48SSukumar Swaminathan uint8_t reserved:7; 1596291a2b48SSukumar Swaminathan 1597291a2b48SSukumar Swaminathan uint8_t type_priority[4]; 1598291a2b48SSukumar Swaminathan #define DFC_AUTH_TYPE_DHCHAP 1 /* Only one currently supported */ 1599291a2b48SSukumar Swaminathan #define DFC_AUTH_TYPE_FCAP 2 1600291a2b48SSukumar Swaminathan #define DFC_AUTH_TYPE_FCPAP 3 1601291a2b48SSukumar Swaminathan #define DFC_AUTH_TYPE_KERBEROS 4 1602291a2b48SSukumar Swaminathan #define DFC_AUTH_TYPE_MAX 4 1603291a2b48SSukumar Swaminathan #define DFC_AUTH_TYPE_DEFAULT0 DFC_AUTH_TYPE_DHCHAP 1604291a2b48SSukumar Swaminathan #define DFC_AUTH_TYPE_DEFAULT1 0 1605291a2b48SSukumar Swaminathan #define DFC_AUTH_TYPE_DEFAULT2 0 1606291a2b48SSukumar Swaminathan #define DFC_AUTH_TYPE_DEFAULT3 0 1607291a2b48SSukumar Swaminathan 1608291a2b48SSukumar Swaminathan uint8_t hash_priority[4]; 1609291a2b48SSukumar Swaminathan #define DFC_AUTH_HASH_MD5 1 1610291a2b48SSukumar Swaminathan #define DFC_AUTH_HASH_SHA1 2 1611291a2b48SSukumar Swaminathan #define DFC_AUTH_HASH_MAX 2 1612291a2b48SSukumar Swaminathan #define DFC_AUTH_HASH_DEFAULT0 DFC_AUTH_HASH_MD5 1613291a2b48SSukumar Swaminathan #define DFC_AUTH_HASH_DEFAULT1 DFC_AUTH_HASH_SHA1 1614291a2b48SSukumar Swaminathan #define DFC_AUTH_HASH_DEFAULT2 0 1615291a2b48SSukumar Swaminathan #define DFC_AUTH_HASH_DEFAULT3 0 1616291a2b48SSukumar Swaminathan 1617291a2b48SSukumar Swaminathan uint8_t group_priority[8]; 1618291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_NULL 1 1619291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_1024 2 1620291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_1280 3 1621291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_1536 4 1622291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_2048 5 1623291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_MAX 5 1624291a2b48SSukumar Swaminathan 1625291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_DEFAULT0 DFC_AUTH_GROUP_NULL 1626291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_DEFAULT1 DFC_AUTH_GROUP_1024 1627291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_DEFAULT2 DFC_AUTH_GROUP_1280 1628291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_DEFAULT3 DFC_AUTH_GROUP_1536 1629291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_DEFAULT4 DFC_AUTH_GROUP_2048 1630291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_DEFAULT5 0 1631291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_DEFAULT6 0 1632291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_DEFAULT7 0 1633291a2b48SSukumar Swaminathan 1634291a2b48SSukumar Swaminathan uint32_t reauth_tov; /* minutes */ 1635291a2b48SSukumar Swaminathan #define DFC_REAUTH_TOV_MIN 0 1636291a2b48SSukumar Swaminathan #define DFC_REAUTH_TOV_MAX 7200 1637291a2b48SSukumar Swaminathan #define DFC_REAUTH_TOV_DEFAULT 1440 1638fcf3ce44SJohn Forte } dfc_fcsp_config_t; 1639fcf3ce44SJohn Forte 1640fcf3ce44SJohn Forte 1641291a2b48SSukumar Swaminathan typedef struct dfc_password 1642291a2b48SSukumar Swaminathan { 1643291a2b48SSukumar Swaminathan uint16_t length; 1644fcf3ce44SJohn Forte #define DFC_PASSWORD_LENGTH_MIN 8 1645fcf3ce44SJohn Forte #define DFC_PASSWORD_LENGTH_MAX 128 1646fcf3ce44SJohn Forte 1647291a2b48SSukumar Swaminathan uint16_t type; 1648fcf3ce44SJohn Forte #define DFC_PASSWORD_TYPE_ASCII 1 1649fcf3ce44SJohn Forte #define DFC_PASSWORD_TYPE_BINARY 2 1650fcf3ce44SJohn Forte #define DFC_PASSWORD_TYPE_IGNORE 3 1651fcf3ce44SJohn Forte 1652291a2b48SSukumar Swaminathan uint8_t password[DFC_PASSWORD_LENGTH_MAX]; 1653fcf3ce44SJohn Forte } dfc_password_t; 1654fcf3ce44SJohn Forte 1655291a2b48SSukumar Swaminathan typedef struct dfc_auth_password 1656291a2b48SSukumar Swaminathan { 1657291a2b48SSukumar Swaminathan HBA_WWN lwwpn; 1658291a2b48SSukumar Swaminathan HBA_WWN rwwpn; 1659fcf3ce44SJohn Forte 1660291a2b48SSukumar Swaminathan dfc_password_t lpw; 1661291a2b48SSukumar Swaminathan dfc_password_t rpw; 1662fcf3ce44SJohn Forte 1663291a2b48SSukumar Swaminathan dfc_password_t lpw_new; 1664291a2b48SSukumar Swaminathan dfc_password_t rpw_new; 1665fcf3ce44SJohn Forte } dfc_auth_password_t; 1666fcf3ce44SJohn Forte 1667fcf3ce44SJohn Forte 1668291a2b48SSukumar Swaminathan typedef struct dfc_auth_cfglist 1669291a2b48SSukumar Swaminathan { 1670291a2b48SSukumar Swaminathan uint32_t cnt; 1671291a2b48SSukumar Swaminathan HBA_WWN rwwpn[1]; 1672fcf3ce44SJohn Forte } dfc_auth_cfglist_t; 1673fcf3ce44SJohn Forte 1674fcf3ce44SJohn Forte 1675291a2b48SSukumar Swaminathan typedef struct dfc_auth_status 1676291a2b48SSukumar Swaminathan { 1677291a2b48SSukumar Swaminathan HBA_WWN lwwpn; 1678291a2b48SSukumar Swaminathan HBA_WWN rwwpn; 1679fcf3ce44SJohn Forte 1680291a2b48SSukumar Swaminathan uint8_t auth_state; 1681fcf3ce44SJohn Forte #define DFC_AUTH_STATE_OFF 1 1682fcf3ce44SJohn Forte #define DFC_AUTH_STATE_INP 2 1683fcf3ce44SJohn Forte #define DFC_AUTH_STATE_ON 3 1684fcf3ce44SJohn Forte #define DFC_AUTH_STATE_FAILED 4 1685fcf3ce44SJohn Forte 1686291a2b48SSukumar Swaminathan uint8_t auth_failReason; 1687fcf3ce44SJohn Forte #define DFC_AUTH_FAIL_GENERIC 1 1688fcf3ce44SJohn Forte #define DFC_AUTH_FAIL_ELS_TMO 2 1689fcf3ce44SJohn Forte #define DFC_AUTH_FAIL_XACT_TMO 3 1690fcf3ce44SJohn Forte #define DFC_AUTH_FAIL_LS_RJT 4 1691fcf3ce44SJohn Forte #define DFC_AUTH_FAIL_BSY_LS_RJT 5 1692fcf3ce44SJohn Forte #define DFC_AUTH_FAIL_REJECTED 6 1693fcf3ce44SJohn Forte 1694291a2b48SSukumar Swaminathan uint8_t type_priority; 1695291a2b48SSukumar Swaminathan uint8_t group_priority; 1696fcf3ce44SJohn Forte 1697291a2b48SSukumar Swaminathan uint8_t hash_priority; 1698291a2b48SSukumar Swaminathan uint8_t localAuth :1; 1699291a2b48SSukumar Swaminathan uint8_t remoteAuth :1; 1700291a2b48SSukumar Swaminathan uint8_t pad :6; 1701291a2b48SSukumar Swaminathan uint16_t reserved0; 1702fcf3ce44SJohn Forte 1703291a2b48SSukumar Swaminathan uint32_t time_from_last_auth; /* seconds */ 1704291a2b48SSukumar Swaminathan uint32_t time_until_next_auth; /* seconds */ 1705fcf3ce44SJohn Forte 1706291a2b48SSukumar Swaminathan uint32_t reserved1; 1707291a2b48SSukumar Swaminathan uint32_t reserved2; 1708fcf3ce44SJohn Forte } dfc_auth_status_t; 1709fcf3ce44SJohn Forte 1710fcf3ce44SJohn Forte #endif /* DHCHAP_SUPPORT */ 1711fcf3ce44SJohn Forte 1712fcf3ce44SJohn Forte /* 1713fcf3ce44SJohn Forte * Start of FCP specific structures 1714fcf3ce44SJohn Forte */ 1715fcf3ce44SJohn Forte 1716fcf3ce44SJohn Forte #ifndef MAX_FCP_SNS 1717291a2b48SSukumar Swaminathan typedef struct emlxs_fcp_rsp 1718291a2b48SSukumar Swaminathan { 1719291a2b48SSukumar Swaminathan uint32_t rspRsvd1; /* FC Word 0, byte 0:3 */ 1720291a2b48SSukumar Swaminathan uint32_t rspRsvd2; /* FC Word 1, byte 0:3 */ 1721291a2b48SSukumar Swaminathan 1722291a2b48SSukumar Swaminathan uint8_t rspStatus0; /* FCP_STATUS byte 0 (reserved) */ 1723291a2b48SSukumar Swaminathan uint8_t rspStatus1; /* FCP_STATUS byte 1 (reserved) */ 1724291a2b48SSukumar Swaminathan uint8_t rspStatus2; /* FCP_STATUS byte 2 field validity */ 1725291a2b48SSukumar Swaminathan #define RSP_LEN_VALID 0x01 /* bit 0 */ 1726291a2b48SSukumar Swaminathan #define SNS_LEN_VALID 0x02 /* bit 1 */ 1727291a2b48SSukumar Swaminathan #define RESID_OVER 0x04 /* bit 2 */ 1728291a2b48SSukumar Swaminathan #define RESID_UNDER 0x08 /* bit 3 */ 1729291a2b48SSukumar Swaminathan uint8_t rspStatus3; /* FCP_STATUS byte 3 SCSI status byte */ 1730fcf3ce44SJohn Forte #define SCSI_STAT_GOOD 0x00 1731fcf3ce44SJohn Forte #define SCSI_STAT_CHECK_COND 0x02 1732fcf3ce44SJohn Forte #define SCSI_STAT_COND_MET 0x04 1733fcf3ce44SJohn Forte #define SCSI_STAT_BUSY 0x08 1734fcf3ce44SJohn Forte #define SCSI_STAT_INTERMED 0x10 1735fcf3ce44SJohn Forte #define SCSI_STAT_INTERMED_CM 0x14 1736fcf3ce44SJohn Forte #define SCSI_STAT_RES_CNFLCT 0x18 1737fcf3ce44SJohn Forte #define SCSI_STAT_CMD_TERM 0x22 1738fcf3ce44SJohn Forte #define SCSI_STAT_QUE_FULL 0x28 1739fcf3ce44SJohn Forte #define SCSI_STAT_ACA_ACTIVE 0x30 1740fcf3ce44SJohn Forte #define SCSI_STAT_TASK_ABORT 0x40 1741fcf3ce44SJohn Forte 1742291a2b48SSukumar Swaminathan uint32_t rspResId; /* Residual xfer if RESID_xxxx set in */ 1743291a2b48SSukumar Swaminathan /* fcpStatus2 */ 1744291a2b48SSukumar Swaminathan /* Received in Big Endian format */ 1745291a2b48SSukumar Swaminathan uint32_t rspSnsLen; /* Length of sense data in fcpSnsInfo */ 1746291a2b48SSukumar Swaminathan /* received in Big Endian format */ 1747291a2b48SSukumar Swaminathan uint32_t rspRspLen; /* Length of FCP response data in */ 1748291a2b48SSukumar Swaminathan /* fcpRspInfo */ 1749291a2b48SSukumar Swaminathan /* Received In Big Endian format */ 1750fcf3ce44SJohn Forte 1751291a2b48SSukumar Swaminathan uint8_t rspInfo0; /* FCP_RSP_INFO byte 0 (reserved) */ 1752291a2b48SSukumar Swaminathan uint8_t rspInfo1; /* FCP_RSP_INFO byte 1 (reserved) */ 1753291a2b48SSukumar Swaminathan uint8_t rspInfo2; /* FCP_RSP_INFO byte 2 (reserved) */ 1754291a2b48SSukumar Swaminathan uint8_t rspInfo3; /* FCP_RSP_INFO RSP_CODE byte 3 */ 1755fcf3ce44SJohn Forte 1756fcf3ce44SJohn Forte #define RSP_NO_FAILURE 0x00 1757fcf3ce44SJohn Forte #define RSP_DATA_BURST_ERR 0x01 1758fcf3ce44SJohn Forte #define RSP_CMD_FIELD_ERR 0x02 1759fcf3ce44SJohn Forte #define RSP_RO_MISMATCH_ERR 0x03 1760fcf3ce44SJohn Forte #define RSP_TM_NOT_SUPPORTED 0x04 /* Task mgmt function not supported */ 1761fcf3ce44SJohn Forte #define RSP_TM_NOT_COMPLETED 0x05 /* Task mgmt function not performed */ 1762fcf3ce44SJohn Forte 1763291a2b48SSukumar Swaminathan uint32_t rspInfoRsvd; /* FCP_RSP_INFO bytes 4-7 (reserved) */ 1764fcf3ce44SJohn Forte 1765fcf3ce44SJohn Forte /* 1766291a2b48SSukumar Swaminathan * Define maximum size of SCSI Sense buffer. 1767291a2b48SSukumar Swaminathan * Seagate never issues more than 18 bytes of Sense data. 1768fcf3ce44SJohn Forte */ 1769fcf3ce44SJohn Forte #define MAX_FCP_SNS 128 1770291a2b48SSukumar Swaminathan uint8_t rspSnsInfo[MAX_FCP_SNS]; 1771fcf3ce44SJohn Forte } emlxs_fcp_rsp; 1772fcf3ce44SJohn Forte typedef emlxs_fcp_rsp FCP_RSP; 1773291a2b48SSukumar Swaminathan #endif /* MAX_FCP_SNS */ 1774fcf3ce44SJohn Forte 1775fcf3ce44SJohn Forte 1776fcf3ce44SJohn Forte #ifndef FC_LUN_SHIFT 1777291a2b48SSukumar Swaminathan typedef struct emlxs_fcp_cmd 1778291a2b48SSukumar Swaminathan { 1779291a2b48SSukumar Swaminathan uint32_t fcpLunMsl; /* most significant word (32 bits) */ 1780291a2b48SSukumar Swaminathan uint32_t fcpLunLsl; /* least significant word (32 bits) */ 1781fcf3ce44SJohn Forte 1782fcf3ce44SJohn Forte /* 1783291a2b48SSukumar Swaminathan * # of bits to shift lun id to end up in right payload word, 1784291a2b48SSukumar Swaminathan * little endian = 8, big = 16. 1785fcf3ce44SJohn Forte */ 1786fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 1787fcf3ce44SJohn Forte #define FC_LUN_SHIFT 8 1788fcf3ce44SJohn Forte #define FC_ADDR_MODE_SHIFT 0 1789fcf3ce44SJohn Forte #endif 1790fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 1791fcf3ce44SJohn Forte #define FC_LUN_SHIFT 16 1792fcf3ce44SJohn Forte #define FC_ADDR_MODE_SHIFT 24 1793fcf3ce44SJohn Forte #endif 1794fcf3ce44SJohn Forte 1795291a2b48SSukumar Swaminathan uint8_t fcpCntl0; /* FCP_CNTL byte 0 (reserved) */ 1796291a2b48SSukumar Swaminathan uint8_t fcpCntl1; /* FCP_CNTL byte 1 task codes */ 1797291a2b48SSukumar Swaminathan #define SIMPLE_Q 0x00 1798291a2b48SSukumar Swaminathan #define HEAD_OF_Q 0x01 1799291a2b48SSukumar Swaminathan #define ORDERED_Q 0x02 1800291a2b48SSukumar Swaminathan #define ACA_Q 0x04 1801291a2b48SSukumar Swaminathan #define UNTAGGED 0x05 1802291a2b48SSukumar Swaminathan 1803291a2b48SSukumar Swaminathan uint8_t fcpCntl2; /* FCP_CTL byte 2 task management */ 1804291a2b48SSukumar Swaminathan /* codes */ 1805291a2b48SSukumar Swaminathan #define ABORT_TASK_SET 0x02 /* Bit 1 */ 1806291a2b48SSukumar Swaminathan #define CLEAR_TASK_SET 0x04 /* bit 2 */ 1807291a2b48SSukumar Swaminathan #define LUN_RESET 0x10 /* bit 4 */ 1808291a2b48SSukumar Swaminathan #define TARGET_RESET 0x20 /* bit 5 */ 1809291a2b48SSukumar Swaminathan #define CLEAR_ACA 0x40 /* bit 6 */ 1810291a2b48SSukumar Swaminathan #define TERMINATE_TASK 0x80 /* bit 7 */ 1811291a2b48SSukumar Swaminathan 1812291a2b48SSukumar Swaminathan uint8_t fcpCntl3; 1813291a2b48SSukumar Swaminathan #define WRITE_DATA 0x01 /* Bit 0 */ 1814291a2b48SSukumar Swaminathan #define READ_DATA 0x02 /* Bit 1 */ 1815291a2b48SSukumar Swaminathan 1816291a2b48SSukumar Swaminathan uint8_t fcpCdb[16]; /* SRB cdb field is copied here */ 1817291a2b48SSukumar Swaminathan uint32_t fcpDl; /* Total transfer length */ 1818fcf3ce44SJohn Forte } emlxs_fcp_cmd_t; 1819fcf3ce44SJohn Forte typedef emlxs_fcp_cmd_t FCP_CMND; 1820291a2b48SSukumar Swaminathan #endif /* FC_LUN_SHIFT */ 1821fcf3ce44SJohn Forte 1822fcf3ce44SJohn Forte 1823fcf3ce44SJohn Forte /* 1824fcf3ce44SJohn Forte * Used by libdfc (SendScsiCmd, SendFcpCmd, DFC_SendScsiCmdV2, DFC_SendFcpCmdV2 1825fcf3ce44SJohn Forte * and emlxs_dfc_send_scsi_fcp functions 1826fcf3ce44SJohn Forte */ 1827291a2b48SSukumar Swaminathan typedef struct dfc_send_scsi_fcp_cmd_info 1828291a2b48SSukumar Swaminathan { 1829291a2b48SSukumar Swaminathan HBA_WWN src_wwn; 1830291a2b48SSukumar Swaminathan HBA_WWN dst_wwn; 1831291a2b48SSukumar Swaminathan uint32_t cnt1; 1832291a2b48SSukumar Swaminathan uint32_t cnt2; 1833291a2b48SSukumar Swaminathan uint32_t ver; 1834fcf3ce44SJohn Forte } dfc_send_scsi_fcp_cmd_info_t; 1835291a2b48SSukumar Swaminathan 1836*8f23e9faSHans Rosenfeld #define SCSI_RSP_CNT(x) x->cnt1 1837*8f23e9faSHans Rosenfeld #define SCSI_SNS_CNT(x) x->cnt2 1838*8f23e9faSHans Rosenfeld #define FC_DATA_CNT(x) x->cnt1 1839*8f23e9faSHans Rosenfeld #define FC_RSP_CNT(x) x->cnt2 1840*8f23e9faSHans Rosenfeld 1841291a2b48SSukumar Swaminathan #define DFC_SEND_SCSI_FCP_V1 1 1842291a2b48SSukumar Swaminathan #define DFC_SEND_SCSI_FCP_V2 2 1843fcf3ce44SJohn Forte 184482527734SSukumar Swaminathan typedef struct DFC_FCoEParam 184582527734SSukumar Swaminathan { 184682527734SSukumar Swaminathan uint8_t version; 184782527734SSukumar Swaminathan #define DFC_FCoE_PARAM_VERSION 1 184882527734SSukumar Swaminathan 184982527734SSukumar Swaminathan uint8_t Reserved[3]; 185082527734SSukumar Swaminathan uint8_t FCMap[3]; 185182527734SSukumar Swaminathan uint8_t VLanValid; 185282527734SSukumar Swaminathan #define VLAN_ID_INVALID 0x0 185382527734SSukumar Swaminathan #define VLAN_ID_VALID 0x1 185482527734SSukumar Swaminathan 185582527734SSukumar Swaminathan uint16_t VLanId; 185682527734SSukumar Swaminathan } DFC_FCoEParam_t; 185782527734SSukumar Swaminathan 185882527734SSukumar Swaminathan typedef struct DFC_FCoEFCFConnectEntry 185982527734SSukumar Swaminathan { 1860a9800bebSGarrett D'Amore uint16_t flags; 186182527734SSukumar Swaminathan #define FCFCNCT_RSVD 0x00000001 186282527734SSukumar Swaminathan #define FCFCNCT_BOOT 0x00000002 186382527734SSukumar Swaminathan #define FCFCNCT_PRIMARY 0x00000004 186482527734SSukumar Swaminathan #define FCFCNCT_FBNM_VALID 0x00000008 186582527734SSukumar Swaminathan #define FCFCNCT_SWNM_VALID 0x00000010 186682527734SSukumar Swaminathan #define FCFCNCT_VLAN_VALID 0x00000020 186782527734SSukumar Swaminathan #define FCFCNCT_MASK 0xFFFFFF00 186882527734SSukumar Swaminathan 186982527734SSukumar Swaminathan uint16_t vlan_id; 187082527734SSukumar Swaminathan uint8_t fabric_name[8]; 187182527734SSukumar Swaminathan uint8_t switch_name[8]; 187282527734SSukumar Swaminathan uint8_t reserved[2]; 187382527734SSukumar Swaminathan } DFC_FCoEFCFConnectEntry_t; 187482527734SSukumar Swaminathan 187582527734SSukumar Swaminathan typedef struct DFC_FCoEFCFConnectList 187682527734SSukumar Swaminathan { 187782527734SSukumar Swaminathan uint8_t version; 187882527734SSukumar Swaminathan #define DFC_FCoE_FCFCONNECTLIST_VERSION 1 187982527734SSukumar Swaminathan 188082527734SSukumar Swaminathan uint8_t reserved; 188182527734SSukumar Swaminathan uint8_t numberOfEntries; 188282527734SSukumar Swaminathan uint8_t maxNumOfEntries; 188382527734SSukumar Swaminathan DFC_FCoEFCFConnectEntry_t entries[1]; 188482527734SSukumar Swaminathan } DFC_FCoEFCFConnectList_t; 188582527734SSukumar Swaminathan 188682527734SSukumar Swaminathan typedef struct DFC_FCoEFCFInfo 188782527734SSukumar Swaminathan { 188882527734SSukumar Swaminathan uint8_t FabricName[8]; 188982527734SSukumar Swaminathan uint8_t SwitchName[8]; 189082527734SSukumar Swaminathan uint8_t Mac[6]; 189182527734SSukumar Swaminathan uint16_t State; 189282527734SSukumar Swaminathan #define FCF_AVAILABLE_STATE 0x1 189382527734SSukumar Swaminathan 189482527734SSukumar Swaminathan uint8_t VLanBitMap[512]; 189582527734SSukumar Swaminathan uint8_t FC_Map[3]; 189682527734SSukumar Swaminathan uint8_t reserved1; 189782527734SSukumar Swaminathan uint32_t LKA_Period; 189882527734SSukumar Swaminathan uint32_t reserved2; 189982527734SSukumar Swaminathan uint32_t Priority; 190082527734SSukumar Swaminathan } DFC_FCoEFCFInfo_t; 190182527734SSukumar Swaminathan 190282527734SSukumar Swaminathan typedef struct DFC_FCoEFCFList 190382527734SSukumar Swaminathan { 190482527734SSukumar Swaminathan uint8_t version; 190582527734SSukumar Swaminathan #define DFC_FCoE_FCFLIST_VERSION 1 190682527734SSukumar Swaminathan 190782527734SSukumar Swaminathan uint8_t reserved[3]; 190882527734SSukumar Swaminathan uint16_t numberOfEntries; 190982527734SSukumar Swaminathan uint16_t nActiveFCFs; 191082527734SSukumar Swaminathan DFC_FCoEFCFInfo_t entries[1]; 191182527734SSukumar Swaminathan } DFC_FCoEFCFList_t; 191282527734SSukumar Swaminathan 1913fcf3ce44SJohn Forte #ifdef __cplusplus 1914fcf3ce44SJohn Forte } 1915fcf3ce44SJohn Forte #endif 1916fcf3ce44SJohn Forte 1917fcf3ce44SJohn Forte #endif /* _EMLXS_DFCLIB_H */ 1918