1fcf3ce44SJohn Forte /* 2fcf3ce44SJohn Forte * CDDL HEADER START 3fcf3ce44SJohn Forte * 4fcf3ce44SJohn Forte * The contents of this file are subject to the terms of the 5fcf3ce44SJohn Forte * Common Development and Distribution License (the "License"). 6fcf3ce44SJohn Forte * You may not use this file except in compliance with the License. 7fcf3ce44SJohn Forte * 8fcf3ce44SJohn Forte * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9fcf3ce44SJohn Forte * or http://www.opensolaris.org/os/licensing. 10fcf3ce44SJohn Forte * See the License for the specific language governing permissions 11fcf3ce44SJohn Forte * and limitations under the License. 12fcf3ce44SJohn Forte * 13fcf3ce44SJohn Forte * When distributing Covered Code, include this CDDL HEADER in each 14fcf3ce44SJohn Forte * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15fcf3ce44SJohn Forte * If applicable, add the following below this CDDL HEADER, with the 16fcf3ce44SJohn Forte * fields enclosed by brackets "[]" replaced with your own identifying 17fcf3ce44SJohn Forte * information: Portions Copyright [yyyy] [name of copyright owner] 18fcf3ce44SJohn Forte * 19fcf3ce44SJohn Forte * CDDL HEADER END 20fcf3ce44SJohn Forte */ 21fcf3ce44SJohn Forte 22fcf3ce44SJohn Forte /* 23*291a2b48SSukumar Swaminathan * Copyright 2009 Emulex. All rights reserved. 24fcf3ce44SJohn Forte * Use is subject to License terms. 25fcf3ce44SJohn Forte */ 26fcf3ce44SJohn Forte 27fcf3ce44SJohn Forte 28fcf3ce44SJohn Forte #ifndef _EMLXS_DFCLIB_H 29fcf3ce44SJohn Forte #define _EMLXS_DFCLIB_H 30fcf3ce44SJohn Forte 31fcf3ce44SJohn Forte #ifdef __cplusplus 32fcf3ce44SJohn Forte extern "C" { 33fcf3ce44SJohn Forte #endif 34fcf3ce44SJohn Forte 35fcf3ce44SJohn Forte #define MAX_DFC_EVENTS 16 36fcf3ce44SJohn Forte #define MAX_EMLXS_BRDS 128 37fcf3ce44SJohn Forte #define MAX_CFG_PARAM 64 38fcf3ce44SJohn Forte #define MAX_NODES 4096 39fcf3ce44SJohn Forte 40fcf3ce44SJohn Forte 41fcf3ce44SJohn Forte #ifndef MAX_VPORTS 42fcf3ce44SJohn Forte #ifdef NPIV_SUPPORT 43fcf3ce44SJohn Forte #define MAX_VPORTS 256 44fcf3ce44SJohn Forte #else 45fcf3ce44SJohn Forte #define MAX_VPORTS 1 46fcf3ce44SJohn Forte #endif /* NPIV_SUPPORT */ 47*291a2b48SSukumar Swaminathan #endif /* MAX_VPORTS */ 48fcf3ce44SJohn Forte 49*291a2b48SSukumar Swaminathan #ifdef EMLXS_SPARC 50fcf3ce44SJohn Forte #define EMLXS_BIG_ENDIAN 51*291a2b48SSukumar Swaminathan #endif /* EMLXS_SPARC */ 52*291a2b48SSukumar Swaminathan 53*291a2b48SSukumar Swaminathan #ifdef EMLXS_I386 54fcf3ce44SJohn Forte #define EMLXS_LITTLE_ENDIAN 55*291a2b48SSukumar Swaminathan #endif /* EMLXS_I386 */ 56fcf3ce44SJohn Forte 57fcf3ce44SJohn Forte 58*291a2b48SSukumar Swaminathan typedef struct brdinfo 59*291a2b48SSukumar Swaminathan { 60fcf3ce44SJohn Forte uint32_t a_mem_hi; /* memory identifier for adapter access */ 61fcf3ce44SJohn Forte uint32_t a_mem_low; /* memory identifier for adapter access */ 62fcf3ce44SJohn Forte uint32_t a_flash_hi; /* memory identifier for adapter access */ 63fcf3ce44SJohn Forte uint32_t a_flash_low; /* memory identifier for adapter access */ 64fcf3ce44SJohn Forte uint32_t a_ctlreg_hi; /* memory identifier for adapter access */ 65fcf3ce44SJohn Forte uint32_t a_ctlreg_low; /* memory identifier for adapter access */ 66fcf3ce44SJohn Forte uint32_t a_intrlvl; /* interrupt level for adapter */ 67fcf3ce44SJohn Forte uint32_t a_pci; /* PCI identifier (device / vendor id) */ 68fcf3ce44SJohn Forte uint32_t a_busid; /* identifier of PCI bus adapter is on */ 69fcf3ce44SJohn Forte uint32_t a_devid; /* identifier of PCI device number */ 70*291a2b48SSukumar Swaminathan uint8_t a_rsvd1; /* reserved for future use */ 71*291a2b48SSukumar Swaminathan uint8_t a_rsvd2; /* reserved for future use */ 72*291a2b48SSukumar Swaminathan uint8_t a_siglvl; /* signal handler used by library */ 73*291a2b48SSukumar Swaminathan uint8_t a_ddi; /* identifier device driver instance number */ 74fcf3ce44SJohn Forte uint32_t a_onmask; /* mask of ONDI primatives supported */ 75fcf3ce44SJohn Forte uint32_t a_offmask; /* mask of OFFDI primatives supported */ 76*291a2b48SSukumar Swaminathan uint8_t a_drvrid[16]; /* driver version */ 77*291a2b48SSukumar Swaminathan uint8_t a_fwname[32]; /* firmware version */ 78fcf3ce44SJohn Forte } brdinfo_t; 79fcf3ce44SJohn Forte 80fcf3ce44SJohn Forte 81*291a2b48SSukumar Swaminathan typedef struct dfc_brdinfo 82*291a2b48SSukumar Swaminathan { 83fcf3ce44SJohn Forte uint32_t a_mem_hi; /* memory identifier for adapter access */ 84fcf3ce44SJohn Forte uint32_t a_mem_low; /* memory identifier for adapter access */ 85fcf3ce44SJohn Forte uint32_t a_flash_hi; /* memory identifier for adapter access */ 86fcf3ce44SJohn Forte uint32_t a_flash_low; /* memory identifier for adapter access */ 87fcf3ce44SJohn Forte uint32_t a_ctlreg_hi; /* memory identifier for adapter access */ 88fcf3ce44SJohn Forte uint32_t a_ctlreg_low; /* memory identifier for adapter access */ 89fcf3ce44SJohn Forte uint32_t a_intrlvl; /* interrupt level for adapter */ 90fcf3ce44SJohn Forte uint32_t a_pci; /* PCI identifier (device / vendor id) */ 91fcf3ce44SJohn Forte uint32_t a_busid; /* identifier of PCI bus adapter is on */ 92fcf3ce44SJohn Forte uint32_t a_devid; /* identifier of PCI device number */ 93*291a2b48SSukumar Swaminathan uint8_t a_rsvd; /* reserved for word alignment */ 94*291a2b48SSukumar Swaminathan uint8_t a_siglvl; /* signal handler used by library */ 95fcf3ce44SJohn Forte uint16_t a_ddi; /* identifier device driver instance number */ 96fcf3ce44SJohn Forte uint32_t a_onmask; /* mask of ONDI primatives supported */ 97fcf3ce44SJohn Forte uint32_t a_offmask; /* mask of OFFDI primatives supported */ 98*291a2b48SSukumar Swaminathan uint8_t a_drvrid[16]; /* driver version */ 99*291a2b48SSukumar Swaminathan uint8_t a_fwname[32]; /* firmware version */ 100*291a2b48SSukumar Swaminathan uint8_t a_wwpn[8]; /* worldwide portname */ 101fcf3ce44SJohn Forte } dfc_brdinfo_t; 102fcf3ce44SJohn Forte 103fcf3ce44SJohn Forte 104*291a2b48SSukumar Swaminathan #define putPaddrLow(addr) ((uint32_t)(((unsigned long)(addr)) \ 105*291a2b48SSukumar Swaminathan & 0xffffffff)) 106*291a2b48SSukumar Swaminathan #define putPaddrHigh(addr) ((uint32_t)(((uint64_t)(unsigned long)(addr)) \ 107*291a2b48SSukumar Swaminathan >> 32)) 108*291a2b48SSukumar Swaminathan #define getPaddr(high, low) ((uint64_t)((((uint64_t)(high)) << 32) \ 109*291a2b48SSukumar Swaminathan | (((uint64_t)(low)) & 0xffffffff))) 110fcf3ce44SJohn Forte 111*291a2b48SSukumar Swaminathan typedef struct ulp_bde 112*291a2b48SSukumar Swaminathan { 113*291a2b48SSukumar Swaminathan uint32_t bdeAddress; 114fcf3ce44SJohn Forte 115fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 116*291a2b48SSukumar Swaminathan uint32_t bdeReserved:4; 117*291a2b48SSukumar Swaminathan uint32_t bdeAddrHigh:4; 118*291a2b48SSukumar Swaminathan uint32_t bdeSize:24; 119fcf3ce44SJohn Forte #endif 120fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 121*291a2b48SSukumar Swaminathan uint32_t bdeSize:24; 122*291a2b48SSukumar Swaminathan uint32_t bdeAddrHigh:4; 123*291a2b48SSukumar Swaminathan uint32_t bdeReserved:4; 124fcf3ce44SJohn Forte #endif 125fcf3ce44SJohn Forte } ulp_bde_t; 126fcf3ce44SJohn Forte 127*291a2b48SSukumar Swaminathan typedef struct ulp_bde64 128*291a2b48SSukumar Swaminathan { 129*291a2b48SSukumar Swaminathan union 130*291a2b48SSukumar Swaminathan { 131*291a2b48SSukumar Swaminathan uint32_t w; 132*291a2b48SSukumar Swaminathan struct 133*291a2b48SSukumar Swaminathan { 134fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 135*291a2b48SSukumar Swaminathan uint32_t bdeFlags:8; 136*291a2b48SSukumar Swaminathan uint32_t bdeSize:24; 137fcf3ce44SJohn Forte #endif 138fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 139*291a2b48SSukumar Swaminathan uint32_t bdeSize:24; 140*291a2b48SSukumar Swaminathan uint32_t bdeFlags:8; 141fcf3ce44SJohn Forte #endif 142fcf3ce44SJohn Forte 143*291a2b48SSukumar Swaminathan #define BUFF_USE_RSVD 0x01 /* bdeFlags */ 144*291a2b48SSukumar Swaminathan #define BUFF_USE_INTRPT 0x02 /* Not Implemented with LP6000 */ 145*291a2b48SSukumar Swaminathan #define BUFF_USE_CMND 0x04 /* Optional, 1=cmd/rsp 0=data buffer */ 146*291a2b48SSukumar Swaminathan #define BUFF_USE_RCV 0x08 /* "" "", 1=rcv buffer, 0=xmit buffer */ 147*291a2b48SSukumar Swaminathan #define BUFF_TYPE_32BIT 0x10 /* "" "", 1=32 bit addr 0=64 bit addr */ 148*291a2b48SSukumar Swaminathan #define BUFF_TYPE_SPECIAL 0x20 /* Not Implemented with LP6000 */ 149*291a2b48SSukumar Swaminathan #define BUFF_TYPE_BDL 0x40 /* Optional, may be set in BDL */ 150*291a2b48SSukumar Swaminathan #define BUFF_TYPE_INVALID 0x80 /* "" "" */ 151fcf3ce44SJohn Forte } f; 152fcf3ce44SJohn Forte } tus; 153fcf3ce44SJohn Forte 154*291a2b48SSukumar Swaminathan uint32_t addrLow; 155*291a2b48SSukumar Swaminathan uint32_t addrHigh; 156fcf3ce44SJohn Forte } ulp_bde64_t; 157fcf3ce44SJohn Forte 158*291a2b48SSukumar Swaminathan typedef struct read_sparm_var 159*291a2b48SSukumar Swaminathan { 160*291a2b48SSukumar Swaminathan uint32_t rsvd1; 161*291a2b48SSukumar Swaminathan uint32_t rsvd2; 162*291a2b48SSukumar Swaminathan union 163*291a2b48SSukumar Swaminathan { 164*291a2b48SSukumar Swaminathan ulp_bde_t sp; 165*291a2b48SSukumar Swaminathan ulp_bde64_t sp64; 166fcf3ce44SJohn Forte } un; 167fcf3ce44SJohn Forte } read_sparm_var_t; 168fcf3ce44SJohn Forte 169*291a2b48SSukumar Swaminathan typedef struct read_rev_var 170*291a2b48SSukumar Swaminathan { 171fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 172*291a2b48SSukumar Swaminathan uint32_t cv:1; 173*291a2b48SSukumar Swaminathan uint32_t rr:1; 174*291a2b48SSukumar Swaminathan uint32_t rsvd1:29; 175*291a2b48SSukumar Swaminathan uint32_t rv:1; 176fcf3ce44SJohn Forte #endif 177fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 178*291a2b48SSukumar Swaminathan uint32_t rv:1; 179*291a2b48SSukumar Swaminathan uint32_t rsvd1:29; 180*291a2b48SSukumar Swaminathan uint32_t rr:1; 181*291a2b48SSukumar Swaminathan uint32_t cv:1; 182fcf3ce44SJohn Forte #endif 183*291a2b48SSukumar Swaminathan uint32_t biuRev; 184*291a2b48SSukumar Swaminathan uint32_t smRev; 185*291a2b48SSukumar Swaminathan union 186*291a2b48SSukumar Swaminathan { 187*291a2b48SSukumar Swaminathan uint32_t smFwRev; 188*291a2b48SSukumar Swaminathan struct 189*291a2b48SSukumar Swaminathan { 190fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 191*291a2b48SSukumar Swaminathan uint8_t ProgType; 192*291a2b48SSukumar Swaminathan uint8_t ProgId; 193*291a2b48SSukumar Swaminathan uint16_t ProgVer:4; 194*291a2b48SSukumar Swaminathan uint16_t ProgRev:4; 195*291a2b48SSukumar Swaminathan uint16_t ProgFixLvl:2; 196*291a2b48SSukumar Swaminathan uint16_t ProgDistType:2; 197*291a2b48SSukumar Swaminathan uint16_t DistCnt:4; 198fcf3ce44SJohn Forte #endif 199fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 200*291a2b48SSukumar Swaminathan uint16_t DistCnt:4; 201*291a2b48SSukumar Swaminathan uint16_t ProgDistType:2; 202*291a2b48SSukumar Swaminathan uint16_t ProgFixLvl:2; 203*291a2b48SSukumar Swaminathan uint16_t ProgRev:4; 204*291a2b48SSukumar Swaminathan uint16_t ProgVer:4; 205*291a2b48SSukumar Swaminathan uint8_t ProgId; 206*291a2b48SSukumar Swaminathan uint8_t ProgType; 207fcf3ce44SJohn Forte #endif 208fcf3ce44SJohn Forte } b; 209fcf3ce44SJohn Forte } un; 210*291a2b48SSukumar Swaminathan uint32_t endecRev; 211fcf3ce44SJohn Forte 212fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 213*291a2b48SSukumar Swaminathan uint8_t feaLevelHigh; 214*291a2b48SSukumar Swaminathan uint8_t feaLevelLow; 215*291a2b48SSukumar Swaminathan uint8_t fcphHigh; 216*291a2b48SSukumar Swaminathan uint8_t fcphLow; 217fcf3ce44SJohn Forte #endif 218fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 219*291a2b48SSukumar Swaminathan uint8_t fcphLow; 220*291a2b48SSukumar Swaminathan uint8_t fcphHigh; 221*291a2b48SSukumar Swaminathan uint8_t feaLevelLow; 222*291a2b48SSukumar Swaminathan uint8_t feaLevelHigh; 223fcf3ce44SJohn Forte #endif 224*291a2b48SSukumar Swaminathan uint32_t postKernRev; 225*291a2b48SSukumar Swaminathan uint32_t opFwRev; 226*291a2b48SSukumar Swaminathan uint8_t opFwName[16]; 227*291a2b48SSukumar Swaminathan uint32_t sli1FwRev; 228*291a2b48SSukumar Swaminathan uint8_t sli1FwName[16]; 229*291a2b48SSukumar Swaminathan uint32_t sli2FwRev; 230*291a2b48SSukumar Swaminathan uint8_t sli2FwName[16]; 231fcf3ce44SJohn Forte } read_rev_var_t; 232fcf3ce44SJohn Forte 233fcf3ce44SJohn Forte 234*291a2b48SSukumar Swaminathan typedef struct dump_var 235*291a2b48SSukumar Swaminathan { 236fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 237*291a2b48SSukumar Swaminathan uint32_t rsvd:25; 238*291a2b48SSukumar Swaminathan uint32_t ra:1; 239*291a2b48SSukumar Swaminathan uint32_t co:1; 240*291a2b48SSukumar Swaminathan uint32_t cv:1; 241*291a2b48SSukumar Swaminathan uint32_t type:4; 242*291a2b48SSukumar Swaminathan 243*291a2b48SSukumar Swaminathan uint32_t entry_index:16; 244*291a2b48SSukumar Swaminathan uint32_t region_id:16; 245fcf3ce44SJohn Forte #endif 246fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 247*291a2b48SSukumar Swaminathan uint32_t type:4; 248*291a2b48SSukumar Swaminathan uint32_t cv:1; 249*291a2b48SSukumar Swaminathan uint32_t co:1; 250*291a2b48SSukumar Swaminathan uint32_t ra:1; 251*291a2b48SSukumar Swaminathan uint32_t rsvd:25; 252*291a2b48SSukumar Swaminathan 253*291a2b48SSukumar Swaminathan uint32_t region_id:16; 254*291a2b48SSukumar Swaminathan uint32_t entry_index:16; 255fcf3ce44SJohn Forte #endif 256*291a2b48SSukumar Swaminathan uint32_t base_adr; 257*291a2b48SSukumar Swaminathan uint32_t word_cnt; 258*291a2b48SSukumar Swaminathan uint32_t resp_offset; 259fcf3ce44SJohn Forte } dump_var_t; 260fcf3ce44SJohn Forte 261fcf3ce44SJohn Forte 262*291a2b48SSukumar Swaminathan typedef struct read_cfg_var 263*291a2b48SSukumar Swaminathan { 264fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 265*291a2b48SSukumar Swaminathan uint32_t cr:1; 266*291a2b48SSukumar Swaminathan uint32_t ci:1; 267*291a2b48SSukumar Swaminathan uint32_t cr_delay:6; 268*291a2b48SSukumar Swaminathan uint32_t cr_count:8; 269*291a2b48SSukumar Swaminathan uint32_t InitBBC:8; 270*291a2b48SSukumar Swaminathan uint32_t MaxBBC:8; 271fcf3ce44SJohn Forte #endif 272fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 273*291a2b48SSukumar Swaminathan uint32_t MaxBBC:8; 274*291a2b48SSukumar Swaminathan uint32_t InitBBC:8; 275*291a2b48SSukumar Swaminathan uint32_t cr_count:8; 276*291a2b48SSukumar Swaminathan uint32_t cr_delay:6; 277*291a2b48SSukumar Swaminathan uint32_t ci:1; 278*291a2b48SSukumar Swaminathan uint32_t cr:1; 279fcf3ce44SJohn Forte #endif 280fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 281*291a2b48SSukumar Swaminathan uint32_t topology:8; 282*291a2b48SSukumar Swaminathan uint32_t myDid:24; 283fcf3ce44SJohn Forte #endif 284fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 285*291a2b48SSukumar Swaminathan uint32_t myDid:24; 286*291a2b48SSukumar Swaminathan uint32_t topology:8; 287fcf3ce44SJohn Forte #endif 288fcf3ce44SJohn Forte /* Defines for topology (defined previously) */ 289fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 290*291a2b48SSukumar Swaminathan uint32_t AR:1; 291*291a2b48SSukumar Swaminathan uint32_t IR:1; 292*291a2b48SSukumar Swaminathan uint32_t rsvd1:29; 293*291a2b48SSukumar Swaminathan uint32_t ack0:1; 294fcf3ce44SJohn Forte #endif 295fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 296*291a2b48SSukumar Swaminathan uint32_t ack0:1; 297*291a2b48SSukumar Swaminathan uint32_t rsvd1:29; 298*291a2b48SSukumar Swaminathan uint32_t IR:1; 299*291a2b48SSukumar Swaminathan uint32_t AR:1; 300fcf3ce44SJohn Forte #endif 301*291a2b48SSukumar Swaminathan uint32_t edtov; 302*291a2b48SSukumar Swaminathan uint32_t arbtov; 303*291a2b48SSukumar Swaminathan uint32_t ratov; 304*291a2b48SSukumar Swaminathan uint32_t rttov; 305*291a2b48SSukumar Swaminathan uint32_t altov; 306*291a2b48SSukumar Swaminathan uint32_t lmt; 307fcf3ce44SJohn Forte 308fcf3ce44SJohn Forte #define LMT_1GB_CAPABLE 0x0004 309fcf3ce44SJohn Forte #define LMT_2GB_CAPABLE 0x0008 310fcf3ce44SJohn Forte #define LMT_4GB_CAPABLE 0x0040 311fcf3ce44SJohn Forte #define LMT_8GB_CAPABLE 0x0080 312fcf3ce44SJohn Forte #define LMT_10GB_CAPABLE 0x0100 313fcf3ce44SJohn Forte 314*291a2b48SSukumar Swaminathan uint32_t rsvd2; 315*291a2b48SSukumar Swaminathan uint32_t rsvd3; 316*291a2b48SSukumar Swaminathan uint32_t max_xri; 317*291a2b48SSukumar Swaminathan uint32_t max_iocb; 318*291a2b48SSukumar Swaminathan uint32_t max_rpi; 319*291a2b48SSukumar Swaminathan uint32_t avail_xri; 320*291a2b48SSukumar Swaminathan uint32_t avail_iocb; 321*291a2b48SSukumar Swaminathan uint32_t avail_rpi; 322*291a2b48SSukumar Swaminathan uint32_t default_rpi; 323fcf3ce44SJohn Forte } read_cfg_var_t; 324fcf3ce44SJohn Forte 325fcf3ce44SJohn Forte 326*291a2b48SSukumar Swaminathan typedef struct read_log_var 327*291a2b48SSukumar Swaminathan { 328fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 329*291a2b48SSukumar Swaminathan uint32_t type:8; 330*291a2b48SSukumar Swaminathan uint32_t byte_count:8; 331*291a2b48SSukumar Swaminathan uint32_t write:1; 332*291a2b48SSukumar Swaminathan uint32_t resv:3; 333*291a2b48SSukumar Swaminathan uint32_t offset:12; 334fcf3ce44SJohn Forte #endif 335fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 336*291a2b48SSukumar Swaminathan uint32_t offset:12; 337*291a2b48SSukumar Swaminathan uint32_t resv:3; 338*291a2b48SSukumar Swaminathan uint32_t write:1; 339*291a2b48SSukumar Swaminathan uint32_t byte_count:8; 340*291a2b48SSukumar Swaminathan uint32_t type:8; 341fcf3ce44SJohn Forte #endif 342fcf3ce44SJohn Forte 343*291a2b48SSukumar Swaminathan uint32_t data; 344fcf3ce44SJohn Forte } read_log_var_t; 345fcf3ce44SJohn Forte 346fcf3ce44SJohn Forte 347*291a2b48SSukumar Swaminathan typedef struct log_status_var 348*291a2b48SSukumar Swaminathan { 349fcf3ce44SJohn Forte 350fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 351*291a2b48SSukumar Swaminathan uint16_t split_log_next; 352*291a2b48SSukumar Swaminathan uint16_t log_next; 353fcf3ce44SJohn Forte 354*291a2b48SSukumar Swaminathan uint32_t size; 355fcf3ce44SJohn Forte 356*291a2b48SSukumar Swaminathan uint32_t format:8; 357*291a2b48SSukumar Swaminathan uint32_t resv2:22; 358*291a2b48SSukumar Swaminathan uint32_t log_level:1; 359*291a2b48SSukumar Swaminathan uint32_t split_log:1; 360fcf3ce44SJohn Forte #endif 361fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 362*291a2b48SSukumar Swaminathan uint16_t log_next; 363*291a2b48SSukumar Swaminathan uint16_t split_log_next; 364fcf3ce44SJohn Forte 365*291a2b48SSukumar Swaminathan uint32_t size; 366fcf3ce44SJohn Forte 367*291a2b48SSukumar Swaminathan uint32_t split_log:1; 368*291a2b48SSukumar Swaminathan uint32_t log_level:1; 369*291a2b48SSukumar Swaminathan uint32_t resv2:22; 370*291a2b48SSukumar Swaminathan uint32_t format:8; 371fcf3ce44SJohn Forte #endif 372fcf3ce44SJohn Forte 373*291a2b48SSukumar Swaminathan uint32_t offset; 374fcf3ce44SJohn Forte } log_status_var_t; 375fcf3ce44SJohn Forte 376fcf3ce44SJohn Forte 377*291a2b48SSukumar Swaminathan typedef struct read_evt_log_var 378*291a2b48SSukumar Swaminathan { 379fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 380*291a2b48SSukumar Swaminathan uint32_t read_log:1; 381*291a2b48SSukumar Swaminathan uint32_t clear_log:1; 382*291a2b48SSukumar Swaminathan uint32_t mbox_rsp:1; 383*291a2b48SSukumar Swaminathan uint32_t resv:28; 384fcf3ce44SJohn Forte #endif 385fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 386*291a2b48SSukumar Swaminathan uint32_t resv:28; 387*291a2b48SSukumar Swaminathan uint32_t mbox_rsp:1; 388*291a2b48SSukumar Swaminathan uint32_t clear_log:1; 389*291a2b48SSukumar Swaminathan uint32_t read_log:1; 390fcf3ce44SJohn Forte #endif 391fcf3ce44SJohn Forte 392*291a2b48SSukumar Swaminathan uint32_t offset; 393fcf3ce44SJohn Forte 394*291a2b48SSukumar Swaminathan union 395*291a2b48SSukumar Swaminathan { 396*291a2b48SSukumar Swaminathan ulp_bde_t sp; 397*291a2b48SSukumar Swaminathan ulp_bde64_t sp64; 398fcf3ce44SJohn Forte } un; 399fcf3ce44SJohn Forte } read_evt_log_var_t; 400fcf3ce44SJohn Forte 401fcf3ce44SJohn Forte 402*291a2b48SSukumar Swaminathan typedef struct dfc_mailbox 403*291a2b48SSukumar Swaminathan { 404fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 405*291a2b48SSukumar Swaminathan uint16_t mbxStatus; 406*291a2b48SSukumar Swaminathan uint8_t mbxCommand; 407*291a2b48SSukumar Swaminathan uint8_t mbxReserved:6; 408*291a2b48SSukumar Swaminathan uint8_t mbxHc:1; 409*291a2b48SSukumar Swaminathan uint8_t mbxOwner:1; /* Low order bit first word */ 410fcf3ce44SJohn Forte #endif 411fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 412*291a2b48SSukumar Swaminathan uint8_t mbxOwner:1; /* Low order bit first word */ 413*291a2b48SSukumar Swaminathan uint8_t mbxHc:1; 414*291a2b48SSukumar Swaminathan uint8_t mbxReserved:6; 415*291a2b48SSukumar Swaminathan uint8_t mbxCommand; 416*291a2b48SSukumar Swaminathan uint16_t mbxStatus; 417fcf3ce44SJohn Forte #endif 418fcf3ce44SJohn Forte 419*291a2b48SSukumar Swaminathan union 420*291a2b48SSukumar Swaminathan { 421*291a2b48SSukumar Swaminathan uint32_t varWords[31]; 422*291a2b48SSukumar Swaminathan read_sparm_var_t varRdSparm; 423*291a2b48SSukumar Swaminathan read_rev_var_t varRdRev; 424*291a2b48SSukumar Swaminathan read_cfg_var_t varRdCfg; 425*291a2b48SSukumar Swaminathan dump_var_t varDmp; 426*291a2b48SSukumar Swaminathan read_log_var_t varRdLog; 427*291a2b48SSukumar Swaminathan log_status_var_t varLogStat; 428*291a2b48SSukumar Swaminathan read_evt_log_var_t varRdEvtLog; 429fcf3ce44SJohn Forte 430fcf3ce44SJohn Forte } un; 431fcf3ce44SJohn Forte } dfc_mailbox_t; 432fcf3ce44SJohn Forte 433fcf3ce44SJohn Forte 434*291a2b48SSukumar Swaminathan typedef struct dfc_ioinfo 435*291a2b48SSukumar Swaminathan { 436fcf3ce44SJohn Forte uint32_t a_mboxCmd; /* mailbox commands issued */ 437fcf3ce44SJohn Forte uint32_t a_mboxCmpl; /* mailbox commands completed */ 438fcf3ce44SJohn Forte uint32_t a_mboxErr; /* mailbox commands completed, error status */ 439fcf3ce44SJohn Forte uint32_t a_iocbCmd; /* iocb command ring issued */ 440fcf3ce44SJohn Forte uint32_t a_iocbRsp; /* iocb rsp ring received */ 441fcf3ce44SJohn Forte uint32_t a_adapterIntr; /* adapter interrupt events */ 442fcf3ce44SJohn Forte uint32_t a_fcpCmd; /* FCP commands issued */ 443fcf3ce44SJohn Forte uint32_t a_fcpCmpl; /* FCP command completions received */ 444fcf3ce44SJohn Forte uint32_t a_fcpErr; /* FCP command completions errors */ 445fcf3ce44SJohn Forte uint32_t a_seqXmit; /* IP xmit sequences sent */ 446fcf3ce44SJohn Forte uint32_t a_seqRcv; /* IP sequences received */ 447fcf3ce44SJohn Forte uint32_t a_bcastXmit; /* cnt of successful xmit bcast cmds issued */ 448fcf3ce44SJohn Forte uint32_t a_bcastRcv; /* cnt of receive bcast cmds received */ 449fcf3ce44SJohn Forte uint32_t a_elsXmit; /* cnt of successful ELS req cmds issued */ 450fcf3ce44SJohn Forte uint32_t a_elsRcv; /* cnt of ELS request commands received */ 451fcf3ce44SJohn Forte uint32_t a_RSCNRcv; /* cnt of RSCN commands received */ 452fcf3ce44SJohn Forte uint32_t a_seqXmitErr; /* cnt of unsuccessful xmit bcast cmds issued */ 453fcf3ce44SJohn Forte uint32_t a_elsXmitErr; /* cnt of unsuccessful ELS req cmds issued */ 454fcf3ce44SJohn Forte uint32_t a_elsBufPost; /* cnt of ELS buffers posted to adapter */ 455fcf3ce44SJohn Forte uint32_t a_ipBufPost; /* cnt of IP buffers posted to adapter */ 456fcf3ce44SJohn Forte uint32_t a_cnt1; /* generic counter */ 457fcf3ce44SJohn Forte uint32_t a_cnt2; /* generic counter */ 458fcf3ce44SJohn Forte uint32_t a_cnt3; /* generic counter */ 459fcf3ce44SJohn Forte uint32_t a_cnt4; /* generic counter */ 460fcf3ce44SJohn Forte 461fcf3ce44SJohn Forte } dfc_ioinfo_t; 462fcf3ce44SJohn Forte 463fcf3ce44SJohn Forte 464*291a2b48SSukumar Swaminathan typedef struct dfc_linkinfo 465*291a2b48SSukumar Swaminathan { 466*291a2b48SSukumar Swaminathan uint32_t a_linkEventTag; 467*291a2b48SSukumar Swaminathan uint32_t a_linkUp; 468*291a2b48SSukumar Swaminathan uint32_t a_linkDown; 469*291a2b48SSukumar Swaminathan uint32_t a_linkMulti; 470*291a2b48SSukumar Swaminathan uint32_t a_DID; 471*291a2b48SSukumar Swaminathan uint8_t a_topology; 472*291a2b48SSukumar Swaminathan uint8_t a_linkState; 473*291a2b48SSukumar Swaminathan uint8_t a_alpa; 474*291a2b48SSukumar Swaminathan uint8_t a_alpaCnt; 475*291a2b48SSukumar Swaminathan uint8_t a_alpaMap[128]; 476*291a2b48SSukumar Swaminathan uint8_t a_wwpName[8]; 477*291a2b48SSukumar Swaminathan uint8_t a_wwnName[8]; 478fcf3ce44SJohn Forte } dfc_linkinfo_t; 479fcf3ce44SJohn Forte 480fcf3ce44SJohn Forte /* values for a_topology */ 481fcf3ce44SJohn Forte #define LNK_LOOP 0x1 482fcf3ce44SJohn Forte #define LNK_PUBLIC_LOOP 0x2 483fcf3ce44SJohn Forte #define LNK_FABRIC 0x3 484fcf3ce44SJohn Forte #define LNK_PT2PT 0x4 485fcf3ce44SJohn Forte #define LNK_MENLO_MAINTENANCE 0x5 486fcf3ce44SJohn Forte 487fcf3ce44SJohn Forte /* values for a_linkState */ 488fcf3ce44SJohn Forte #define LNK_DOWN 0x1 489fcf3ce44SJohn Forte #define LNK_UP 0x2 490fcf3ce44SJohn Forte #define LNK_FLOGI 0x3 491fcf3ce44SJohn Forte #define LNK_DISCOVERY 0x4 492fcf3ce44SJohn Forte #define LNK_REDISCOVERY 0x5 493fcf3ce44SJohn Forte #define LNK_READY 0x6 494fcf3ce44SJohn Forte 495fcf3ce44SJohn Forte 496*291a2b48SSukumar Swaminathan typedef struct dfc_traceinfo 497*291a2b48SSukumar Swaminathan { 498*291a2b48SSukumar Swaminathan uint8_t a_event; 499*291a2b48SSukumar Swaminathan uint8_t a_cmd; 500*291a2b48SSukumar Swaminathan uint16_t a_status; 501*291a2b48SSukumar Swaminathan uint32_t a_information; 502fcf3ce44SJohn Forte } dfc_traceinfo_t; 503fcf3ce44SJohn Forte 504fcf3ce44SJohn Forte 505*291a2b48SSukumar Swaminathan typedef struct dfc_cfgparam 506*291a2b48SSukumar Swaminathan { 507*291a2b48SSukumar Swaminathan char a_string[32]; 508*291a2b48SSukumar Swaminathan uint32_t a_low; 509*291a2b48SSukumar Swaminathan uint32_t a_hi; 510*291a2b48SSukumar Swaminathan uint32_t a_default; 511*291a2b48SSukumar Swaminathan uint32_t a_current; 512*291a2b48SSukumar Swaminathan uint16_t a_flag; 513*291a2b48SSukumar Swaminathan #define CFG_EXPORT 0x1 /* Export this parameter to end user */ 514fcf3ce44SJohn Forte #define CFG_IGNORE 0x2 /* Ignore this parameter */ 515fcf3ce44SJohn Forte 516*291a2b48SSukumar Swaminathan uint16_t a_changestate; 517fcf3ce44SJohn Forte #define CFG_REBOOT 0x0 /* Changes effective after system */ 518fcf3ce44SJohn Forte /* reboot */ 519fcf3ce44SJohn Forte #define CFG_DYMANIC 0x1 /* Changes effective immediately */ 520fcf3ce44SJohn Forte #define CFG_RESTART 0x2 /* Changes effective after adapter */ 521fcf3ce44SJohn Forte /* restart */ 522*291a2b48SSukumar Swaminathan #define CFG_LINKRESET 0x3 /* Changes effective after link reset */ 523fcf3ce44SJohn Forte 524*291a2b48SSukumar Swaminathan char a_help[80]; 525fcf3ce44SJohn Forte } dfc_cfgparam_t; 526fcf3ce44SJohn Forte 527fcf3ce44SJohn Forte 528fcf3ce44SJohn Forte 529*291a2b48SSukumar Swaminathan typedef struct dfc_nodeinfo 530*291a2b48SSukumar Swaminathan { 531*291a2b48SSukumar Swaminathan uint16_t a_flag; 532*291a2b48SSukumar Swaminathan uint16_t a_state; 533*291a2b48SSukumar Swaminathan uint32_t a_did; 534*291a2b48SSukumar Swaminathan uint8_t a_wwpn[8]; 535*291a2b48SSukumar Swaminathan uint8_t a_wwnn[8]; 536*291a2b48SSukumar Swaminathan uint32_t a_targetid; 537fcf3ce44SJohn Forte } dfc_nodeinfo_t; 538fcf3ce44SJohn Forte 539fcf3ce44SJohn Forte /* Defines for a_state */ 540*291a2b48SSukumar Swaminathan #define NODE_UNUSED 0 /* unused NL_PORT entry */ 541*291a2b48SSukumar Swaminathan #define NODE_LIMBO 0x1 /* entry needs to hang around for wwpn / sid */ 542*291a2b48SSukumar Swaminathan #define NODE_LOGOUT 0x2 /* NL_PORT is not logged in - entry is cached */ 543*291a2b48SSukumar Swaminathan #define NODE_PLOGI 0x3 /* PLOGI was sent to NL_PORT */ 544*291a2b48SSukumar Swaminathan #define NODE_LOGIN 0x4 /* NL_PORT is logged in / login REG_LOGINed */ 545*291a2b48SSukumar Swaminathan #define NODE_PRLI 0x5 /* PRLI was sent to NL_PORT */ 546*291a2b48SSukumar Swaminathan #define NODE_ALLOC 0x6 /* NL_PORT is ready to initiate adapter I/O */ 547*291a2b48SSukumar Swaminathan #define NODE_SEED 0x7 /* seed scsi id bind in table */ 548fcf3ce44SJohn Forte 549fcf3ce44SJohn Forte /* Defines for a_flag */ 550*291a2b48SSukumar Swaminathan #define NODE_RPI_XRI 0x1 /* creating xri for entry */ 551*291a2b48SSukumar Swaminathan #define NODE_REQ_SND 0x2 /* sent ELS request for this entry */ 552*291a2b48SSukumar Swaminathan #define NODE_ADDR_AUTH 0x4 /* Authenticating addr for this entry */ 553*291a2b48SSukumar Swaminathan #define NODE_RM_ENTRY 0x8 /* Remove this entry */ 554*291a2b48SSukumar Swaminathan #define NODE_FARP_SND 0x10 /* sent FARP request for this entry */ 555*291a2b48SSukumar Swaminathan #define NODE_FABRIC 0x20 /* this entry represents the Fabric */ 556*291a2b48SSukumar Swaminathan #define NODE_FCP_TARGET 0x40 /* this entry is an FCP target */ 557*291a2b48SSukumar Swaminathan #define NODE_IP_NODE 0x80 /* this entry is an IP node */ 558*291a2b48SSukumar Swaminathan #define NODE_DISC_START 0x100 /* start discovery on this entry */ 559*291a2b48SSukumar Swaminathan #define NODE_SEED_WWPN 0x200 /* Entry scsi id is seeded for WWPN */ 560*291a2b48SSukumar Swaminathan #define NODE_SEED_WWNN 0x400 /* Entry scsi id is seeded for WWNN */ 561*291a2b48SSukumar Swaminathan #define NODE_SEED_DID 0x800 /* Entry scsi id is seeded for DID */ 562*291a2b48SSukumar Swaminathan #define NODE_SEED_MASK 0xe00 /* mask for seeded flags */ 563*291a2b48SSukumar Swaminathan #define NODE_AUTOMAP 0x1000 /* This entry was automap'ed */ 564*291a2b48SSukumar Swaminathan #define NODE_NS_REMOVED 0x2000 /* This entry removed from NameServer */ 565*291a2b48SSukumar Swaminathan 566*291a2b48SSukumar Swaminathan 567*291a2b48SSukumar Swaminathan typedef struct dfc_vpd 568*291a2b48SSukumar Swaminathan { 569*291a2b48SSukumar Swaminathan uint32_t version; 570fcf3ce44SJohn Forte #define DFC_VPD_VERSION 1 571fcf3ce44SJohn Forte 572*291a2b48SSukumar Swaminathan char ModelDescription[256]; /* VPD field V1 */ 573*291a2b48SSukumar Swaminathan char Model[80]; /* VPD field V2 */ 574*291a2b48SSukumar Swaminathan char ProgramType[256]; /* VPD field V3 */ 575*291a2b48SSukumar Swaminathan char PortNum[20]; /* VPD field V4 */ 576fcf3ce44SJohn Forte } dfc_vpd_t; 577fcf3ce44SJohn Forte 578*291a2b48SSukumar Swaminathan typedef struct dfc_destid 579*291a2b48SSukumar Swaminathan { 580*291a2b48SSukumar Swaminathan uint32_t idType; /* 0 - wwpn, 1 - d_id */ 581*291a2b48SSukumar Swaminathan uint32_t d_id; 582*291a2b48SSukumar Swaminathan uint8_t wwpn[8]; 583fcf3ce44SJohn Forte } dfc_destid_t; 584fcf3ce44SJohn Forte 585fcf3ce44SJohn Forte 586*291a2b48SSukumar Swaminathan typedef struct dfc_loopback 587*291a2b48SSukumar Swaminathan { 588*291a2b48SSukumar Swaminathan uint32_t bufSize; 589*291a2b48SSukumar Swaminathan uint8_t *XmitBuffer; 590*291a2b48SSukumar Swaminathan uint8_t *RcvBuffer; 591fcf3ce44SJohn Forte } dfc_loopback_t; 592fcf3ce44SJohn Forte 593fcf3ce44SJohn Forte 594*291a2b48SSukumar Swaminathan typedef struct dfc_drvinfo 595*291a2b48SSukumar Swaminathan { 596*291a2b48SSukumar Swaminathan uint8_t drvInfoVer; /* Version of this structure */ 597*291a2b48SSukumar Swaminathan #define DFC_DRVINFO_VERSION2 0x02 598*291a2b48SSukumar Swaminathan #define DFC_DRVINFO_VERSION3 0x03 /* NPIV */ 599*291a2b48SSukumar Swaminathan #define DFC_DRVINFO_VERSION4 0x04 /* DHCHAP */ 600*291a2b48SSukumar Swaminathan #define DFC_DRVINFO_VERSION DFC_DRVINFO_VERSION2 601fcf3ce44SJohn Forte 602fcf3ce44SJohn Forte #ifdef NPIV_SUPPORT 603fcf3ce44SJohn Forte #undef DFC_DRVINFO_VERSION 604*291a2b48SSukumar Swaminathan #define DFC_DRVINFO_VERSION DFC_DRVINFO_VERSION3 605fcf3ce44SJohn Forte #endif /* NPIV_SUPPORT */ 606fcf3ce44SJohn Forte 607fcf3ce44SJohn Forte #ifdef DHCHAP_SUPPORT 608fcf3ce44SJohn Forte #undef DFC_DRVINFO_VERSION 609*291a2b48SSukumar Swaminathan #define DFC_DRVINFO_VERSION DFC_DRVINFO_VERSION4 610*291a2b48SSukumar Swaminathan #endif /* DHCHAP_SUPPORT */ 611fcf3ce44SJohn Forte 612*291a2b48SSukumar Swaminathan uint8_t drvType; 613fcf3ce44SJohn Forte #define DFC_DRVINFO_SOLARIS 0x11 /* Solaris */ 614*291a2b48SSukumar Swaminathan #define DFC_DRVINFO_LEADVILLE 0x14 /* Solaris Leadville ULP */ 615*291a2b48SSukumar Swaminathan #define DFC_DRVINFO_COMSTAR 0x16 /* Solaris Comstar ULP */ 616fcf3ce44SJohn Forte 617*291a2b48SSukumar Swaminathan uint16_t reserved; 618*291a2b48SSukumar Swaminathan uint8_t rmLevel; /* Remote Management (HBAnyware) */ 619*291a2b48SSukumar Swaminathan /* Support Level */ 620*291a2b48SSukumar Swaminathan #define DFC_DRVINFO_RMLEVEL 0x02 /* HBAnyware v2.3 */ 621fcf3ce44SJohn Forte 622*291a2b48SSukumar Swaminathan uint8_t mpLevel; /* MultiPulse support Level */ 623*291a2b48SSukumar Swaminathan uint8_t hbaapiLevel; /* HBAAPI support level */ 624fcf3ce44SJohn Forte #define DFC_DRVINFO_HBAAPI 0x01 /* HBAAPI v1.0 */ 625fcf3ce44SJohn Forte 626*291a2b48SSukumar Swaminathan uint8_t reserved1; 627*291a2b48SSukumar Swaminathan char drvVer[16]; /* Driver Version string */ 628*291a2b48SSukumar Swaminathan char drvName[8]; /* Driver Name */ 629*291a2b48SSukumar Swaminathan char ftrDrvVer[16]; /* Filter/IOCtl Driver Version string */ 630*291a2b48SSukumar Swaminathan char ftrDrvName[8]; /* Filter/IOCtl Driver Name */ 631*291a2b48SSukumar Swaminathan char ipDrvVer[16]; /* IP Driver/component Version string */ 632*291a2b48SSukumar Swaminathan char ipDrvName[8]; /* IP Driver/component Name */ 633*291a2b48SSukumar Swaminathan uint32_t d_id; 634*291a2b48SSukumar Swaminathan uint8_t wwpn[8]; 635*291a2b48SSukumar Swaminathan uint8_t wwnn[8]; 636*291a2b48SSukumar Swaminathan uint8_t hostname[32]; /* IP node hostname from uname -n */ 637fcf3ce44SJohn Forte 638fcf3ce44SJohn Forte #if (DFC_DRVINFO_VERSION >= DFC_DRVINFO_VERSION3) 639*291a2b48SSukumar Swaminathan uint32_t NPIVsupport; 640fcf3ce44SJohn Forte #define DFC_DRVINFO_NPIV_DRV 0x00000001 641fcf3ce44SJohn Forte #define DFC_DRVINFO_NPIV_MODS 0x00000002 642fcf3ce44SJohn Forte #define DFC_DRVINFO_NPIV_PARMS 0x00000004 643fcf3ce44SJohn Forte #define DFC_DRVINFO_NPIV_FW 0x00000008 644fcf3ce44SJohn Forte 645fcf3ce44SJohn Forte #endif /* >= DFC_DRVINFO_VERSION3 */ 646fcf3ce44SJohn Forte 647fcf3ce44SJohn Forte #if (DFC_DRVINFO_VERSION >= DFC_DRVINFO_VERSION4) 648*291a2b48SSukumar Swaminathan uint32_t sliMode; 649*291a2b48SSukumar Swaminathan uint64_t featureList; 650fcf3ce44SJohn Forte #define DFC_DRVINFO_FEATURE_DIAG 0x00000001 651fcf3ce44SJohn Forte #define DFC_DRVINFO_FEATURE_MAPPING 0x00000002 652fcf3ce44SJohn Forte #define DFC_DRVINFO_FEATURE_DHCHAP 0x00000004 653fcf3ce44SJohn Forte #define DFC_DRVINFO_FEATURE_IKE 0x00000008 654fcf3ce44SJohn Forte #define DFC_DRVINFO_FEATURE_NPIV 0x00000010 655fcf3ce44SJohn Forte #define DFC_DRVINFO_FEATURE_RESET_WWN 0x00000020 656fcf3ce44SJohn Forte #define DFC_DRVINFO_FEATURE_VOLATILE_WWN 0x00000040 657fcf3ce44SJohn Forte #define DFC_DRVINFO_FEATURE_E2E_AUTH 0x00000080 658*291a2b48SSukumar Swaminathan #define DFC_DRVINFO_FEATURE_TARGET_MODE 0x00000100 659fcf3ce44SJohn Forte 660*291a2b48SSukumar Swaminathan #endif /* >= DFC_DRVINFO_VERSION4 */ 661fcf3ce44SJohn Forte } dfc_drvinfo_t; 662fcf3ce44SJohn Forte 663fcf3ce44SJohn Forte 664fcf3ce44SJohn Forte 665*291a2b48SSukumar Swaminathan typedef struct dfc_regevent 666*291a2b48SSukumar Swaminathan { 667*291a2b48SSukumar Swaminathan uint32_t ppid; 668*291a2b48SSukumar Swaminathan uint32_t cpid; 669fcf3ce44SJohn Forte 670*291a2b48SSukumar Swaminathan uint32_t event; 671*291a2b48SSukumar Swaminathan uint32_t type; 672*291a2b48SSukumar Swaminathan uint32_t outsz; 673*291a2b48SSukumar Swaminathan void *ctx; 674*291a2b48SSukumar Swaminathan void (*func) (); 675fcf3ce44SJohn Forte 676*291a2b48SSukumar Swaminathan uint32_t cindex; /* Set only by child */ 677*291a2b48SSukumar Swaminathan uint32_t state; /* Set only by child */ 678fcf3ce44SJohn Forte 679fcf3ce44SJohn Forte /* state */ 680fcf3ce44SJohn Forte #define CHILD_UNKNOWN 0 681fcf3ce44SJohn Forte #define CHILD_UNBORN 1 682fcf3ce44SJohn Forte #define CHILD_ALIVE 2 683fcf3ce44SJohn Forte #define CHILD_REGISTERED 3 684fcf3ce44SJohn Forte #define CHILD_ASLEEP 4 685fcf3ce44SJohn Forte #define CHILD_AWAKE 5 686fcf3ce44SJohn Forte #define CHILD_DIED 6 687fcf3ce44SJohn Forte 688*291a2b48SSukumar Swaminathan uint32_t pindex; /* Set only by parent */ 689*291a2b48SSukumar Swaminathan uint32_t flags; /* Set only by parent */ 690fcf3ce44SJohn Forte 691fcf3ce44SJohn Forte /* flags */ 692fcf3ce44SJohn Forte #define EVENT_REGISTERED 0x01 693fcf3ce44SJohn Forte #define EVENT_SERVICE_ACTIVE 0x02 694fcf3ce44SJohn Forte 695*291a2b48SSukumar Swaminathan #ifdef SAN_DIAG_SUPPORT 696*291a2b48SSukumar Swaminathan HBA_WWN portname; 697*291a2b48SSukumar Swaminathan #endif /* SAN_DIAG_SUPPORT */ 698fcf3ce44SJohn Forte } dfc_regevent_t; 699fcf3ce44SJohn Forte 700fcf3ce44SJohn Forte 701fcf3ce44SJohn Forte /* Defines for RegisterForEvent mask */ 702*291a2b48SSukumar Swaminathan #define FC_REG_LINK_EVENT 0x01 /* Register for link up/down */ 703*291a2b48SSukumar Swaminathan /* events */ 704*291a2b48SSukumar Swaminathan #define FC_REG_RSCN_EVENT 0x02 /* Register for RSCN events */ 705*291a2b48SSukumar Swaminathan #define FC_REG_CT_EVENT 0x04 /* Register for CT request */ 706*291a2b48SSukumar Swaminathan /* events */ 707*291a2b48SSukumar Swaminathan #define FC_REG_MULTIPULSE_EVENT 0x08 /* Register for MultiPulse */ 708*291a2b48SSukumar Swaminathan /* events */ 709*291a2b48SSukumar Swaminathan #define FC_REG_DUMP_EVENT 0x10 /* Register for Diagnostic */ 710*291a2b48SSukumar Swaminathan /* Dump events */ 711*291a2b48SSukumar Swaminathan #define FC_REG_TEMP_EVENT 0x20 /* Register for Temperature */ 712*291a2b48SSukumar Swaminathan /* events */ 713*291a2b48SSukumar Swaminathan #define FC_REG_VPORTRSCN_EVENT 0x40 /* Register for VPort RSCN */ 714*291a2b48SSukumar Swaminathan /* events */ 715*291a2b48SSukumar Swaminathan #ifdef SAN_DIAG_SUPPORT 716*291a2b48SSukumar Swaminathan #define FC_REG_SD_ELS_EVENT 0x1000 /* Register for SANDiag ELS */ 717*291a2b48SSukumar Swaminathan /* events */ 718*291a2b48SSukumar Swaminathan #define FC_REG_SD_FABRIC_EVENT 0x2000 /* Register for SANDiag */ 719*291a2b48SSukumar Swaminathan /* Fabric events */ 720*291a2b48SSukumar Swaminathan #define FC_REG_SD_SCSI_EVENT 0x4000 /* Register for SANDiag SCSI */ 721*291a2b48SSukumar Swaminathan /* events */ 722*291a2b48SSukumar Swaminathan #define FC_REG_SD_BOARD_EVENT 0x8000 /* Register for SANDiag Board */ 723*291a2b48SSukumar Swaminathan /* events */ 724*291a2b48SSukumar Swaminathan #endif /* SAN_DIAG_SUPPORT */ 725fcf3ce44SJohn Forte #define FC_REG_FCOE_EVENT 0x80000000 /* (Unofficial) Register for */ 726fcf3ce44SJohn Forte /* FCOE events */ 727fcf3ce44SJohn Forte 728fcf3ce44SJohn Forte #define MAX_RSCN_PAYLOAD 1024 729fcf3ce44SJohn Forte #define MAX_CT_PAYLOAD (1024*320) 730fcf3ce44SJohn Forte 731fcf3ce44SJohn Forte /* Temperature event types */ 732fcf3ce44SJohn Forte #define DFC_TEMP_CRITICAL 1 733fcf3ce44SJohn Forte #define DFC_TEMP_WARNING 2 734fcf3ce44SJohn Forte #define DFC_TEMP_SAFE 3 735fcf3ce44SJohn Forte 736fcf3ce44SJohn Forte /* bits in a_onmask */ 737*291a2b48SSukumar Swaminathan #define ONDI_MBOX 0x1 /* allows non-destructive mailbox */ 738*291a2b48SSukumar Swaminathan /* commands */ 739*291a2b48SSukumar Swaminathan #define ONDI_IOINFO 0x2 /* supports retrieval of I/O info */ 740*291a2b48SSukumar Swaminathan #define ONDI_LNKINFO 0x4 /* supports retrieval of link info */ 741*291a2b48SSukumar Swaminathan #define ONDI_NODEINFO 0x8 /* supports retrieval of node info */ 742*291a2b48SSukumar Swaminathan #define ONDI_TRACEINFO 0x10 /* supports retrieval of trace info */ 743*291a2b48SSukumar Swaminathan #define ONDI_SETTRACE 0x20 /* supports configuration of trace */ 744*291a2b48SSukumar Swaminathan /* info */ 745*291a2b48SSukumar Swaminathan #define ONDI_SLI1 0x40 /* hardware supports SLI-1 interface */ 746*291a2b48SSukumar Swaminathan #define ONDI_SLI2 0x80 /* hardware supports SLI-2 interface */ 747*291a2b48SSukumar Swaminathan #define ONDI_BIG_ENDIAN 0x100 /* DDI interface is BIG Endian */ 748*291a2b48SSukumar Swaminathan #define ONDI_LTL_ENDIAN 0x200 /* DDI interface is LITTLE Endian */ 749*291a2b48SSukumar Swaminathan #define ONDI_RMEM 0x400 /* allows reading of adapter shared */ 750*291a2b48SSukumar Swaminathan /* memory */ 751*291a2b48SSukumar Swaminathan #define ONDI_RFLASH 0x800 /* allows reading of adapter flash */ 752*291a2b48SSukumar Swaminathan #define ONDI_RPCI 0x1000 /* allows reading of adapter pci */ 753*291a2b48SSukumar Swaminathan /* registers */ 754*291a2b48SSukumar Swaminathan #define ONDI_RCTLREG 0x2000 /* allows reading of adapter cntrol */ 755*291a2b48SSukumar Swaminathan /* registers */ 756*291a2b48SSukumar Swaminathan #define ONDI_CFGPARAM 0x4000 /* supports get/set configuration */ 757*291a2b48SSukumar Swaminathan /* parameters */ 758*291a2b48SSukumar Swaminathan #define ONDI_CT 0x8000 /* supports passthru CT interface */ 759*291a2b48SSukumar Swaminathan #define ONDI_HBAAPI 0x10000 /* supports HBA API interface */ 760*291a2b48SSukumar Swaminathan #define ONDI_SBUS 0x20000 /* supports SBUS adapter interface */ 761fcf3ce44SJohn Forte 762fcf3ce44SJohn Forte /* bits in a_offmask */ 763*291a2b48SSukumar Swaminathan #define OFFDI_MBOX 0x1 /* allows all mailbox commands */ 764*291a2b48SSukumar Swaminathan #define OFFDI_RMEM 0x2 /* allows reading of adapter shared */ 765*291a2b48SSukumar Swaminathan /* memory */ 766*291a2b48SSukumar Swaminathan #define OFFDI_WMEM 0x4 /* allows writing of adapter shared */ 767*291a2b48SSukumar Swaminathan /* memory */ 768*291a2b48SSukumar Swaminathan #define OFFDI_RFLASH 0x8 /* allows reading of adapter flash */ 769*291a2b48SSukumar Swaminathan #define OFFDI_WFLASH 0x10 /* allows writing of adapter flash */ 770*291a2b48SSukumar Swaminathan #define OFFDI_RPCI 0x20 /* allows reading of adapter pci */ 771*291a2b48SSukumar Swaminathan /* registers */ 772*291a2b48SSukumar Swaminathan #define OFFDI_WPCI 0x40 /* allows writing of adapter pci */ 773*291a2b48SSukumar Swaminathan /* registers */ 774*291a2b48SSukumar Swaminathan #define OFFDI_RCTLREG 0x80 /* allows reading of adapter cntrol */ 775*291a2b48SSukumar Swaminathan /* registers */ 776*291a2b48SSukumar Swaminathan #define OFFDI_WCTLREG 0x100 /* allows writing of adapter cntrol */ 777*291a2b48SSukumar Swaminathan /* registers */ 778fcf3ce44SJohn Forte #define OFFDI_OFFLINE 0x80000000 /* if set, adapter is in offline */ 779fcf3ce44SJohn Forte /* state */ 780fcf3ce44SJohn Forte 781fcf3ce44SJohn Forte 782fcf3ce44SJohn Forte #define DDI_SHOW 0x0 783fcf3ce44SJohn Forte #define DDI_ONDI 0x1 784fcf3ce44SJohn Forte #define DDI_OFFDI 0x2 785fcf3ce44SJohn Forte #define DDI_WARMDI 0x3 786fcf3ce44SJohn Forte #define DDI_DIAGDI 0x4 787fcf3ce44SJohn Forte 788fcf3ce44SJohn Forte /* mbxStatus */ 789fcf3ce44SJohn Forte #define DFC_MBX_SUCCESS 0x00 790fcf3ce44SJohn Forte #define DFC_MBXERR_NUM_RINGS 0x01 791fcf3ce44SJohn Forte #define DFC_MBXERR_NUM_IOCBS 0x02 792fcf3ce44SJohn Forte #define DFC_MBXERR_IOCBS_EXCEEDED 0x03 793fcf3ce44SJohn Forte #define DFC_MBXERR_BAD_RING_NUMBER 0x04 794fcf3ce44SJohn Forte #define DFC_MBXERR_MASK_ENTRIES_RANGE 0x05 795fcf3ce44SJohn Forte #define DFC_MBXERR_MASKS_EXCEEDED 0x06 796fcf3ce44SJohn Forte #define DFC_MBXERR_BAD_PROFILE 0x07 797fcf3ce44SJohn Forte #define DFC_MBXERR_BAD_DEF_CLASS 0x08 798fcf3ce44SJohn Forte #define DFC_MBXERR_BAD_MAX_RESPONDER 0x09 799fcf3ce44SJohn Forte #define DFC_MBXERR_BAD_MAX_ORIGINATOR 0x0A 800fcf3ce44SJohn Forte #define DFC_MBXERR_RPI_REGISTERED 0x0B 801fcf3ce44SJohn Forte #define DFC_MBXERR_RPI_FULL 0x0C 802fcf3ce44SJohn Forte #define DFC_MBXERR_NO_RESOURCES 0x0D 803fcf3ce44SJohn Forte #define DFC_MBXERR_BAD_RCV_LENGTH 0x0E 804fcf3ce44SJohn Forte #define DFC_MBXERR_DMA_ERROR 0x0F 805fcf3ce44SJohn Forte #define DFC_MBXERR_ERROR 0x10 806fcf3ce44SJohn Forte 807fcf3ce44SJohn Forte #define DFC_MBXERR_OVERTEMP_ERROR 0xFA 808fcf3ce44SJohn Forte #define DFC_MBXERR_HARDWARE_ERROR 0xFB 809fcf3ce44SJohn Forte #define DFC_MBXERR_DRVR_ERROR 0xFC 810fcf3ce44SJohn Forte #define DFC_MBXERR_BUSY 0xFD 811fcf3ce44SJohn Forte #define DFC_MBXERR_TIMEOUT 0xFE 812fcf3ce44SJohn Forte #define DFC_MBX_NOT_FINISHED 0xFF 813fcf3ce44SJohn Forte 814fcf3ce44SJohn Forte 815fcf3ce44SJohn Forte 816fcf3ce44SJohn Forte /* Error codes for library calls */ 817fcf3ce44SJohn Forte #define DFC_ERR_GENERAL_ERROR 0x1 818fcf3ce44SJohn Forte 819fcf3ce44SJohn Forte #define DFC_ERR_MBOX_ERROR 0x2 820fcf3ce44SJohn Forte #define DFC_ERR_LINK_DOWN 0x2 821fcf3ce44SJohn Forte #define DFC_ERR_INCORRECT_VER 0x2 822fcf3ce44SJohn Forte #define DFC_ERR_INVALID_ID 0x2 823fcf3ce44SJohn Forte #define DFC_ERR_TIMEOUT 0x2 824fcf3ce44SJohn Forte #define DFC_ERR_NOT_SUPPORTED 0x2 825fcf3ce44SJohn Forte #define DFC_ERR_NPIV_ACTIVE 0x2 826fcf3ce44SJohn Forte 827fcf3ce44SJohn Forte #define DFC_ERR_NO_RPI 0x3 828fcf3ce44SJohn Forte #define DFC_ERR_BUFFER_OVERFLOW 0x3 829fcf3ce44SJohn Forte #define DFC_ERR_INVALID_LOOPBACK_TYPE 0x3 830fcf3ce44SJohn Forte #define DFC_ERR_OVERTEMP 0x3 831fcf3ce44SJohn Forte 832fcf3ce44SJohn Forte #define DFC_ERR_LOOPBACK_BUSY 0x4 833fcf3ce44SJohn Forte #define DFC_ERR_INVALID_RESET_TYPE 0x4 834fcf3ce44SJohn Forte #define DFC_ERR_MENLO_LINKDOWN 0x4 835fcf3ce44SJohn Forte 836fcf3ce44SJohn Forte #define DFC_ERR_SEQ_TIMEOUT 0x5 837fcf3ce44SJohn Forte 838fcf3ce44SJohn Forte #define DFC_ERR_NO_XMIT 0x6 839fcf3ce44SJohn Forte #define DFC_ERR_INVALID_NUMBER 0x6 840fcf3ce44SJohn Forte 841fcf3ce44SJohn Forte #define DFC_ERR_RESET_RECV 0x7 842fcf3ce44SJohn Forte 843fcf3ce44SJohn Forte 844fcf3ce44SJohn Forte 845fcf3ce44SJohn Forte 846fcf3ce44SJohn Forte /* type definitions for GetBindList function */ 847*291a2b48SSukumar Swaminathan typedef enum dfc_bindtype 848*291a2b48SSukumar Swaminathan { 849fcf3ce44SJohn Forte BIND_NONE, 850fcf3ce44SJohn Forte BIND_WWNN, 851fcf3ce44SJohn Forte BIND_WWPN, 852fcf3ce44SJohn Forte BIND_DID, 853fcf3ce44SJohn Forte BIND_ALPA 854fcf3ce44SJohn Forte } dfc_bindtype_t; 855fcf3ce44SJohn Forte 856fcf3ce44SJohn Forte 857*291a2b48SSukumar Swaminathan typedef struct dfc_bind_entry 858*291a2b48SSukumar Swaminathan { 859*291a2b48SSukumar Swaminathan dfc_bindtype_t bind_type; 860*291a2b48SSukumar Swaminathan uint32_t scsi_id; 861*291a2b48SSukumar Swaminathan uint32_t did; 862*291a2b48SSukumar Swaminathan uint8_t wwnn[8]; 863*291a2b48SSukumar Swaminathan uint8_t wwpn[8]; 864*291a2b48SSukumar Swaminathan uint32_t flags; 865fcf3ce44SJohn Forte 866fcf3ce44SJohn Forte /* Bind Entry flags */ 867fcf3ce44SJohn Forte #define DFC_BIND_AUTOMAP 0x1 /* Node is automapped */ 868fcf3ce44SJohn Forte #define DFC_BIND_BINDLIST 0x2 /* entry in bind list not mapped */ 869fcf3ce44SJohn Forte #define DFC_BIND_MAPPED 0x4 /* Node is mapped to a scsiid */ 870fcf3ce44SJohn Forte #define DFC_BIND_UNMAPPED 0x8 /* Node is unmapped */ 871fcf3ce44SJohn Forte #define DFC_BIND_NODEVTMO 0x10 /* NODEVTMO flag of the node */ 872fcf3ce44SJohn Forte #define DFC_BIND_NOSCSIID 0x20 /* No scsi id is assigned yet */ 873*291a2b48SSukumar Swaminathan #define DFC_BIND_RPTLUNST 0x40 /* Node is in report lun cmpl st */ 874fcf3ce44SJohn Forte } dfc_bind_entry_t; 875fcf3ce44SJohn Forte 876*291a2b48SSukumar Swaminathan typedef struct dfc_bind_list 877*291a2b48SSukumar Swaminathan { 878*291a2b48SSukumar Swaminathan uint32_t NumberOfEntries; 879*291a2b48SSukumar Swaminathan dfc_bind_entry_t entry[1]; /* Variable length array */ 880fcf3ce44SJohn Forte } dfc_bind_list_t; 881fcf3ce44SJohn Forte 882fcf3ce44SJohn Forte 883fcf3ce44SJohn Forte 884fcf3ce44SJohn Forte /* Defines for error codes -OLD- */ 885fcf3ce44SJohn Forte #define FC_ERROR_BUFFER_OVERFLOW 0xff 886fcf3ce44SJohn Forte #define FC_ERROR_RESPONSE_TIMEOUT 0xfe 887fcf3ce44SJohn Forte #define FC_ERROR_LINK_UNAVAILABLE 0xfd 888fcf3ce44SJohn Forte #define FC_ERROR_INSUFFICIENT_RESOURCES 0xfc 889fcf3ce44SJohn Forte #define FC_ERROR_EXISTING_REGISTRATION 0xfb 890fcf3ce44SJohn Forte #define FC_ERROR_INVALID_TAG 0xfa 891fcf3ce44SJohn Forte #define FC_ERROR_INVALID_WWN 0xf9 892fcf3ce44SJohn Forte #define FC_ERROR_CREATEVENT_FAILED 0xf8 893fcf3ce44SJohn Forte 894fcf3ce44SJohn Forte 895fcf3ce44SJohn Forte 896*291a2b48SSukumar Swaminathan typedef union dfc_ct_rev 897*291a2b48SSukumar Swaminathan { 898fcf3ce44SJohn Forte /* Structure is in Big Endian format */ 899*291a2b48SSukumar Swaminathan struct 900*291a2b48SSukumar Swaminathan { 901*291a2b48SSukumar Swaminathan uint32_t Revision:8; 902*291a2b48SSukumar Swaminathan uint32_t InId:24; 903fcf3ce44SJohn Forte } bits; 904*291a2b48SSukumar Swaminathan uint32_t word; 905fcf3ce44SJohn Forte } dfc_ct_rev_t; 906fcf3ce44SJohn Forte 907*291a2b48SSukumar Swaminathan typedef union dfc_ct_resp 908*291a2b48SSukumar Swaminathan { 909fcf3ce44SJohn Forte /* Structure is in Big Endian format */ 910*291a2b48SSukumar Swaminathan struct 911*291a2b48SSukumar Swaminathan { 912*291a2b48SSukumar Swaminathan uint32_t CmdRsp:16; 913*291a2b48SSukumar Swaminathan uint32_t Size:16; 914fcf3ce44SJohn Forte } bits; 915*291a2b48SSukumar Swaminathan uint32_t word; 916fcf3ce44SJohn Forte } dfc_ct_resp_t; 917fcf3ce44SJohn Forte 918*291a2b48SSukumar Swaminathan typedef struct dfc_ct_request 919*291a2b48SSukumar Swaminathan { 920fcf3ce44SJohn Forte /* Structure is in Big Endian format */ 921*291a2b48SSukumar Swaminathan dfc_ct_rev_t RevisionId; 922*291a2b48SSukumar Swaminathan uint8_t FsType; 923*291a2b48SSukumar Swaminathan uint8_t FsSubType; 924*291a2b48SSukumar Swaminathan uint8_t Options; 925*291a2b48SSukumar Swaminathan uint8_t Rsrvd1; 926*291a2b48SSukumar Swaminathan dfc_ct_resp_t CommandResponse; 927*291a2b48SSukumar Swaminathan uint8_t Rsrvd2; 928*291a2b48SSukumar Swaminathan uint8_t ReasonCode; 929*291a2b48SSukumar Swaminathan uint8_t Explanation; 930*291a2b48SSukumar Swaminathan uint8_t VendorUnique; 931fcf3ce44SJohn Forte } dfc_ct_request_t; 932fcf3ce44SJohn Forte 933*291a2b48SSukumar Swaminathan #define SLI_CT_REVISION 1 934fcf3ce44SJohn Forte 935*291a2b48SSukumar Swaminathan #define FC_FSTYPE_ALL 0xffff /* match on all fsTypes */ 936fcf3ce44SJohn Forte 937fcf3ce44SJohn Forte /* Emulex Vendor-Unique CT Request Command Codes */ 938*291a2b48SSukumar Swaminathan #define CT_OP_GSAT 0x0101 /* Get Server Attributes */ 939*291a2b48SSukumar Swaminathan #define CT_OP_GHAT 0x0102 /* Get HBA Attributes */ 940*291a2b48SSukumar Swaminathan #define CT_OP_GPAT 0x0103 /* Get Port Attributes */ 941*291a2b48SSukumar Swaminathan #define CT_OP_GDAT 0x0104 /* Get Driver Attributes */ 942*291a2b48SSukumar Swaminathan #define CT_OP_GPST 0x0105 /* Get Port Statistics */ 943*291a2b48SSukumar Swaminathan /* 0x0106 is reserved */ 944*291a2b48SSukumar Swaminathan #define CT_OP_GDP 0x0107 /* Get Driver Parameters */ 945*291a2b48SSukumar Swaminathan #define CT_OP_GDPG 0x0108 /* Get Driver Parameters Global */ 946*291a2b48SSukumar Swaminathan #define CT_OP_GEPS 0x0109 /* Get Extended Port Statistics */ 947*291a2b48SSukumar Swaminathan #define CT_OP_GLAT 0x010A /* Get Lun Attributes */ 948*291a2b48SSukumar Swaminathan 949*291a2b48SSukumar Swaminathan #define CT_OP_SSAT 0x0111 /* Set Server Attributes */ 950*291a2b48SSukumar Swaminathan #define CT_OP_SHAT 0x0112 /* Set HBA Attributes */ 951*291a2b48SSukumar Swaminathan #define CT_OP_SPAT 0x0113 /* Set Port Attributes */ 952*291a2b48SSukumar Swaminathan #define CT_OP_SDAT 0x0114 /* Set Driver Attributes */ 953*291a2b48SSukumar Swaminathan /* 0x0115 is reserved */ 954*291a2b48SSukumar Swaminathan /* 0x0116 is reserved */ 955*291a2b48SSukumar Swaminathan #define CT_OP_SDP 0x0117 /* Set Driver Parameter */ 956*291a2b48SSukumar Swaminathan #define CT_OP_SBBS 0x0118 /* Set Boot Bios State */ 957*291a2b48SSukumar Swaminathan 958*291a2b48SSukumar Swaminathan #define CT_OP_RPST 0x0121 /* Reset Port Statistics */ 959*291a2b48SSukumar Swaminathan #define CT_OP_VFW 0x0122 /* Verify Firmware */ 960*291a2b48SSukumar Swaminathan #define CT_OP_DFW 0x0123 /* Download Firmware */ 961*291a2b48SSukumar Swaminathan #define CT_OP_RES 0x0124 /* Reset HBA */ 962*291a2b48SSukumar Swaminathan #define CT_OP_RHD 0x0125 /* Run HBA Diagnostic */ 963*291a2b48SSukumar Swaminathan #define CT_OP_UFW 0x0126 /* Upgrade Firmware */ 964*291a2b48SSukumar Swaminathan #define CT_OP_RDP 0x0127 /* Reset Driver Parameters */ 965*291a2b48SSukumar Swaminathan #define CT_OP_GHDR 0x0128 /* Get HBA Diagnotic Results */ 966*291a2b48SSukumar Swaminathan #define CT_OP_CHD 0x0129 /* Cancel HBA Diagnostic */ 967*291a2b48SSukumar Swaminathan 968*291a2b48SSukumar Swaminathan /* 0x0131 is reserved */ 969*291a2b48SSukumar Swaminathan /* 0x0132 is reserved */ 970*291a2b48SSukumar Swaminathan #define CT_OP_SSR 0x0133 /* Send Software Resource */ 971*291a2b48SSukumar Swaminathan 972*291a2b48SSukumar Swaminathan #define CT_OP_RSAT 0x0141 /* Read SA Table */ 973*291a2b48SSukumar Swaminathan #define CT_OP_WSAT 0x0142 /* Write SA Table */ 974*291a2b48SSukumar Swaminathan #define CT_OP_RSAH 0x0143 /* Read SA Table Header */ 975*291a2b48SSukumar Swaminathan #define CT_OP_WSAH 0x0144 /* Write SA Table Header */ 976*291a2b48SSukumar Swaminathan #define CT_OP_RACT 0x0145 /* Read Access Control Table */ 977*291a2b48SSukumar Swaminathan #define CT_OP_WACT 0x0146 /* Write Access Control Table */ 978*291a2b48SSukumar Swaminathan #define CT_OP_RKT 0x0147 /* Read Key Table Table */ 979*291a2b48SSukumar Swaminathan #define CT_OP_WKT 0x0148 /* Write Key Table Table */ 980*291a2b48SSukumar Swaminathan #define CT_OP_SSC 0x0149 /* Cause SA Table re-read;sync */ 981*291a2b48SSukumar Swaminathan 982*291a2b48SSukumar Swaminathan #define CT_OP_QHBA 0x0151 /* Query HBA */ 983*291a2b48SSukumar Swaminathan #define CT_OP_GST 0x0152 /* Get Status */ 984*291a2b48SSukumar Swaminathan 985*291a2b48SSukumar Swaminathan #define CT_OP_GFTM 0x0161 /* Get FCP Target Mapping */ 986*291a2b48SSukumar Swaminathan #define CT_OP_SRL 0x0162 /* SCSI Report Luns */ 987*291a2b48SSukumar Swaminathan #define CT_OP_SI 0x0163 /* SCSI Inquiry */ 988*291a2b48SSukumar Swaminathan #define CT_OP_SRC 0x0164 /* SCSI Read Capacity */ 989*291a2b48SSukumar Swaminathan 990*291a2b48SSukumar Swaminathan #define CT_OP_GPB 0x0171 /* Get FCP Persistent Binding */ 991*291a2b48SSukumar Swaminathan #define CT_OP_SPB 0x0172 /* Set FCP Persistent Binding */ 992*291a2b48SSukumar Swaminathan #define CT_OP_RPB 0x0173 /* Remove FCP Persistent Binding */ 993*291a2b48SSukumar Swaminathan #define CT_OP_RAPB 0x0174 /* Remove All FCP Persistent Bindings */ 994*291a2b48SSukumar Swaminathan #define CT_OP_GBC 0x0175 /* Get Binding Capability */ 995*291a2b48SSukumar Swaminathan #define CT_OP_GBS 0x0176 /* Get Binding Support */ 996*291a2b48SSukumar Swaminathan #define CT_OP_SBS 0x0177 /* Set Binding Support */ 997*291a2b48SSukumar Swaminathan #define CT_OP_GANI 0x0178 /* Get All Nodes Info */ 998*291a2b48SSukumar Swaminathan #define CT_OP_GRV 0x0179 /* Get Range Value for Bus#, Target#, Lun# */ 999*291a2b48SSukumar Swaminathan #define CT_OP_GAPBS 0x017A /* Get AutoPB service state */ 1000*291a2b48SSukumar Swaminathan /* (AutoPilotManager) */ 1001*291a2b48SSukumar Swaminathan #define CT_OP_APBC 0x017B /* Configure AutoPB service */ 1002*291a2b48SSukumar Swaminathan /* (AutoPilotManager) */ 1003*291a2b48SSukumar Swaminathan 1004*291a2b48SSukumar Swaminathan #define CT_OP_GDT 0x0180 /* Get Driver Type */ 1005*291a2b48SSukumar Swaminathan #define CT_OP_GDLMI 0x0181 /* Get Drive Letter Mapping */ 1006*291a2b48SSukumar Swaminathan /* Information [GDLM] */ 1007*291a2b48SSukumar Swaminathan #define CT_OP_GANA 0x0182 /* Get All Node Addresses */ 1008*291a2b48SSukumar Swaminathan #define CT_OP_GDLV 0x0183 /* Get Driver Library Version */ 1009*291a2b48SSukumar Swaminathan #define CT_OP_GWUP 0x0184 /* Get Adapter Wakeup Parameters */ 1010*291a2b48SSukumar Swaminathan #define CT_OP_GLM 0x0185 /* Get Adapter Loopmap */ 1011*291a2b48SSukumar Swaminathan #define CT_OP_GABS 0x0186 /* Get Adapter Beacon State */ 1012*291a2b48SSukumar Swaminathan #define CT_OP_SABS 0x0187 /* Set Adapter Beacon State */ 1013*291a2b48SSukumar Swaminathan #define CT_OP_RPR 0x0188 /* Read Adapter PCI Registers */ 1014fcf3ce44SJohn Forte 1015fcf3ce44SJohn Forte 1016fcf3ce44SJohn Forte #ifdef NPIV_SUPPORT 1017fcf3ce44SJohn Forte 1018fcf3ce44SJohn Forte /* NPIV return codes */ 1019fcf3ce44SJohn Forte #define DFC_NPIV_SUCCESS 0 1020fcf3ce44SJohn Forte #define DFC_NPIV_GENERAL_ERROR 1 1021fcf3ce44SJohn Forte #define DFC_NPIV_NOT_SUPPORTED 2 1022fcf3ce44SJohn Forte #define DFC_NPIV_NO_RESOURCES 3 1023fcf3ce44SJohn Forte #define DFC_NPIV_INVALID_HANDLE 3 1024fcf3ce44SJohn Forte #define DFC_NPIV_ILLEGAL_WWPN 4 1025fcf3ce44SJohn Forte #define DFC_NPIV_TOO_MANY_VPORTS 4 1026fcf3ce44SJohn Forte #define DFC_NPIV_ILLEGAL_WWN 5 1027fcf3ce44SJohn Forte #define DFC_NPIV_BUSY 5 1028fcf3ce44SJohn Forte #define DFC_NPIV_INVALID_WWN 6 1029fcf3ce44SJohn Forte #define DFC_NPIV_LINK_DOWN 7 1030fcf3ce44SJohn Forte #define DFC_NPIV_MORE_DATA 7 1031fcf3ce44SJohn Forte #define DFC_NPIV_FABRIC_NOT_SUPPORTED 8 1032fcf3ce44SJohn Forte #define DFC_NPIV_FABRIC_OUT_OF_RESOURCE 9 1033fcf3ce44SJohn Forte #define DFC_NPIV_INVALID_ACCESS_KEY 10 1034fcf3ce44SJohn Forte #define DFC_NPIV_INVALID_HANDLE_AT_CREATE 11 1035fcf3ce44SJohn Forte #define DFC_NPIV_UNSUPPORTED_OPTION 12 1036fcf3ce44SJohn Forte 1037*291a2b48SSukumar Swaminathan typedef struct dfc_vport_QoS 1038*291a2b48SSukumar Swaminathan { 1039*291a2b48SSukumar Swaminathan uint32_t resv; 1040fcf3ce44SJohn Forte } dfc_vport_QoS_t; 1041fcf3ce44SJohn Forte 1042fcf3ce44SJohn Forte 1043fcf3ce44SJohn Forte /* VPORT type */ 1044*291a2b48SSukumar Swaminathan #define VPORT_TYPE_PHYSICAL 0 1045*291a2b48SSukumar Swaminathan #define VPORT_TYPE_VIRTUAL 1 1046fcf3ce44SJohn Forte 1047fcf3ce44SJohn Forte /* VPORT States */ 1048fcf3ce44SJohn Forte #define VPORT_STATE_UNKNOWN 0 1049fcf3ce44SJohn Forte #define VPORT_STATE_LINKDOWN 1 1050fcf3ce44SJohn Forte #define VPORT_STATE_INIT 2 1051fcf3ce44SJohn Forte #define VPORT_STATE_NO_FABRIC_SUPPORT 3 1052fcf3ce44SJohn Forte #define VPORT_STATE_NO_FABRIC_RESOURCE 4 1053fcf3ce44SJohn Forte #define VPORT_STATE_FABRIC_LOGOUT 5 1054fcf3ce44SJohn Forte #define VPORT_STATE_FABRIC_REJECT_WWN 6 1055fcf3ce44SJohn Forte #define VPORT_STATE_FABRIC_LOGIN_FAIL 7 1056fcf3ce44SJohn Forte #define VPORT_STATE_ACTIVE 8 1057fcf3ce44SJohn Forte #define VPORT_STATE_AUTH_FAILED 9 1058fcf3ce44SJohn Forte 1059fcf3ce44SJohn Forte /* VPORT Options */ 1060*291a2b48SSukumar Swaminathan #define VPORT_OPT_AUTORETRY 0x00000001 1061*291a2b48SSukumar Swaminathan #define VPORT_OPT_AUTOWWN 0x00000002 1062*291a2b48SSukumar Swaminathan #define VPORT_OPT_ACTIVATE 0x00000004 1063fcf3ce44SJohn Forte 1064*291a2b48SSukumar Swaminathan #define VPORT_OPT_SAVE_CREATE_ONLY 0x00000000 1065*291a2b48SSukumar Swaminathan #define VPORT_OPT_SAVE_CREATE_UPDATE 0x00000010 1066*291a2b48SSukumar Swaminathan #define VPORT_OPT_SAVE_UPDATE_ONLY 0x00000018 1067*291a2b48SSukumar Swaminathan #define VPORT_OPT_SAVE_MASK 0x00000018 1068fcf3ce44SJohn Forte 1069*291a2b48SSukumar Swaminathan #define VPORT_OPT_RESTRICT 0x00000020 1070*291a2b48SSukumar Swaminathan #define VPORT_OPT_UNRESTRICT 0x00000040 1071*291a2b48SSukumar Swaminathan #define VPORT_OPT_RESTRICT_MASK 0x00000060 1072fcf3ce44SJohn Forte 1073*291a2b48SSukumar Swaminathan #define VPORT_OPT_FAILOVER 0x00000080 1074fcf3ce44SJohn Forte 1075fcf3ce44SJohn Forte /* Check list bit-mapped value */ 1076*291a2b48SSukumar Swaminathan #define CL_NPIV_PARM_ENABLE 0x00000001 1077*291a2b48SSukumar Swaminathan #define CL_SLI3_ENABLE 0x00000002 1078*291a2b48SSukumar Swaminathan #define CL_HBA_SUPPORT_NPIV 0x00000004 1079*291a2b48SSukumar Swaminathan #define CL_HBA_HAS_RESOURCES 0x00000008 1080*291a2b48SSukumar Swaminathan #define CL_HBA_LINKUP 0x00000010 1081*291a2b48SSukumar Swaminathan #define CL_P2P_TOPOLOGY 0x00000020 1082*291a2b48SSukumar Swaminathan #define CL_FABRIC_SUPPORTS_NPIV 0x00000040 1083*291a2b48SSukumar Swaminathan #define CL_FABRIC_HAS_RESOURCES 0x00000080 1084*291a2b48SSukumar Swaminathan #define CL_NPIV_READY 0x000000FF 1085fcf3ce44SJohn Forte 1086fcf3ce44SJohn Forte 1087fcf3ce44SJohn Forte 1088fcf3ce44SJohn Forte 1089*291a2b48SSukumar Swaminathan #define DFC_VPORT_ATTR_VERSION 2 1090*291a2b48SSukumar Swaminathan typedef struct dfc_vport_attrs 1091*291a2b48SSukumar Swaminathan { 1092*291a2b48SSukumar Swaminathan uint8_t version; /* 2 = version of this structure, */ 1093*291a2b48SSukumar Swaminathan /* for compatibility check */ 1094*291a2b48SSukumar Swaminathan uint8_t reserved1[3]; 1095fcf3ce44SJohn Forte 1096*291a2b48SSukumar Swaminathan uint8_t wwpn[8]; /* virtual port WWPN */ 1097*291a2b48SSukumar Swaminathan uint8_t wwnn[8]; /* virtual port WWNN */ 1098*291a2b48SSukumar Swaminathan char name[256]; /* name to be register with the */ 1099*291a2b48SSukumar Swaminathan /* fabric */ 1100fcf3ce44SJohn Forte 1101*291a2b48SSukumar Swaminathan uint32_t options; 1102fcf3ce44SJohn Forte 1103*291a2b48SSukumar Swaminathan uint32_t portFcId; /* D-ID; set when the N-port is */ 1104*291a2b48SSukumar Swaminathan /* created successfully */ 1105fcf3ce44SJohn Forte 1106*291a2b48SSukumar Swaminathan uint8_t state; /* VPORT state */ 1107*291a2b48SSukumar Swaminathan uint8_t restrictLogin; 1108*291a2b48SSukumar Swaminathan uint8_t reserved2[2]; 1109*291a2b48SSukumar Swaminathan uint64_t buf; /* Used for VPI */ 1110fcf3ce44SJohn Forte 1111*291a2b48SSukumar Swaminathan uint8_t fabric_wwn[8]; /* Fabric WWN (WWNN) */ 1112*291a2b48SSukumar Swaminathan uint32_t checklist; 1113*291a2b48SSukumar Swaminathan uint8_t accessKey[32]; 1114fcf3ce44SJohn Forte } dfc_vport_attrs_t; 1115fcf3ce44SJohn Forte 1116fcf3ce44SJohn Forte 1117*291a2b48SSukumar Swaminathan typedef struct dfc_vport_entry 1118*291a2b48SSukumar Swaminathan { 1119*291a2b48SSukumar Swaminathan uint8_t wwpn[8]; /* wwpn of the virtual port */ 1120*291a2b48SSukumar Swaminathan uint8_t wwnn[8]; /* wwnn of the virtual port */ 1121*291a2b48SSukumar Swaminathan uint32_t PortFcId; /* FC port ID assigned to this */ 1122*291a2b48SSukumar Swaminathan /* virtual port */ 1123fcf3ce44SJohn Forte } dfc_vport_entry_t; 1124fcf3ce44SJohn Forte 1125fcf3ce44SJohn Forte 1126*291a2b48SSukumar Swaminathan typedef struct dfc_vport_entry_list 1127*291a2b48SSukumar Swaminathan { 1128*291a2b48SSukumar Swaminathan uint32_t NumberOfEntries; 1129*291a2b48SSukumar Swaminathan dfc_vport_entry_t entry[MAX_VPORTS]; 1130fcf3ce44SJohn Forte } dfc_vport_entry_list_t; 1131fcf3ce44SJohn Forte 1132fcf3ce44SJohn Forte 1133*291a2b48SSukumar Swaminathan typedef struct dfc_vport_nodeinfo_entry 1134*291a2b48SSukumar Swaminathan { 1135*291a2b48SSukumar Swaminathan uint32_t bind_type; 1136fcf3ce44SJohn Forte #define VPORT_NODE_BINDDID 0x0000 1137fcf3ce44SJohn Forte #define VPORT_NODE_BINDWWNN 0x0001 1138fcf3ce44SJohn Forte #define VPORT_NODE_BINDWWPN 0x0002 1139fcf3ce44SJohn Forte #define VPORT_NODE_AUTOMAP 0x0004 1140*291a2b48SSukumar Swaminathan #define VPORT_NODE_UNMASK_ALL_LUN 0x0008 1141fcf3ce44SJohn Forte #define VPORT_NODE_DISABLE_LUN_AUTOMAP 0x0010 1142fcf3ce44SJohn Forte #define VPORT_NODE_ALPA 0x0020 1143fcf3ce44SJohn Forte 1144*291a2b48SSukumar Swaminathan HBA_SCSIID scsiId; 1145*291a2b48SSukumar Swaminathan HBA_FCPID fcpId; 1146fcf3ce44SJohn Forte 1147*291a2b48SSukumar Swaminathan uint32_t nodeState; 1148fcf3ce44SJohn Forte #define VPORT_NODESTATE_EXIST 0x0001 1149fcf3ce44SJohn Forte #define VPORT_NODESTATE_READY 0x0002 1150fcf3ce44SJohn Forte #define VPORT_NODESTATE_LINKDOWN 0x0004 1151fcf3ce44SJohn Forte #define VPORT_NODESTATE_UNMAPPED 0x0008 1152fcf3ce44SJohn Forte #define VPORT_NODESTATE_BOUND 0x0010 1153fcf3ce44SJohn Forte 1154*291a2b48SSukumar Swaminathan uint32_t reserved; 1155fcf3ce44SJohn Forte } dfc_vport_nodeinfo_entry_t; 1156fcf3ce44SJohn Forte 1157*291a2b48SSukumar Swaminathan typedef struct dfc_vport_get_nodeinfo 1158*291a2b48SSukumar Swaminathan { 1159*291a2b48SSukumar Swaminathan uint32_t NumberOfEntries; /* number of nodes */ 1160*291a2b48SSukumar Swaminathan dfc_vport_nodeinfo_entry_t entry[MAX_NODES]; /* start of array */ 1161fcf3ce44SJohn Forte } dfc_vport_get_nodeinfo_t; 1162fcf3ce44SJohn Forte 1163fcf3ce44SJohn Forte 1164*291a2b48SSukumar Swaminathan typedef struct dfc_vport_resource 1165*291a2b48SSukumar Swaminathan { 1166*291a2b48SSukumar Swaminathan uint32_t vpi_max; 1167*291a2b48SSukumar Swaminathan uint32_t vpi_inuse; 1168*291a2b48SSukumar Swaminathan uint32_t rpi_max; 1169*291a2b48SSukumar Swaminathan uint32_t rpi_inuse; 1170fcf3ce44SJohn Forte } dfc_vport_resource_t; 1171fcf3ce44SJohn Forte 1172fcf3ce44SJohn Forte 1173*291a2b48SSukumar Swaminathan typedef struct dfc_vlinkinfo 1174*291a2b48SSukumar Swaminathan { 1175*291a2b48SSukumar Swaminathan uint32_t api_versions; 1176fcf3ce44SJohn Forte 1177*291a2b48SSukumar Swaminathan uint8_t linktype; 1178*291a2b48SSukumar Swaminathan uint8_t state; 1179*291a2b48SSukumar Swaminathan uint8_t fail_reason; 1180*291a2b48SSukumar Swaminathan uint8_t prev_fail_reason; 1181fcf3ce44SJohn Forte #define VPORT_FAIL_UNKNOWN 0 1182fcf3ce44SJohn Forte #define VPORT_FAIL_LINKDOWN 1 1183fcf3ce44SJohn Forte #define VPORT_FAIL_FAB_UNSUPPORTED 2 1184fcf3ce44SJohn Forte #define VPORT_FAIL_FAB_NORESOURCES 3 1185fcf3ce44SJohn Forte #define VPORT_FAIL_FAB_LOGOUT 4 1186fcf3ce44SJohn Forte #define VPORT_FAIL_HBA_NORESOURCES 5 1187fcf3ce44SJohn Forte 1188*291a2b48SSukumar Swaminathan uint8_t wwnn[8]; 1189*291a2b48SSukumar Swaminathan uint8_t wwpn[8]; 1190fcf3ce44SJohn Forte 1191*291a2b48SSukumar Swaminathan void *vlink; 1192fcf3ce44SJohn Forte 1193*291a2b48SSukumar Swaminathan uint32_t vpi_max; 1194*291a2b48SSukumar Swaminathan uint32_t vpi_inuse; 1195*291a2b48SSukumar Swaminathan uint32_t rpi_max; 1196*291a2b48SSukumar Swaminathan uint32_t rpi_inuse; 1197fcf3ce44SJohn Forte } dfc_vlinkinfo_t; 1198fcf3ce44SJohn Forte 1199fcf3ce44SJohn Forte #endif /* NPIV_SUPPORT */ 1200fcf3ce44SJohn Forte 1201fcf3ce44SJohn Forte 1202fcf3ce44SJohn Forte #ifdef DHCHAP_SUPPORT 1203fcf3ce44SJohn Forte 1204fcf3ce44SJohn Forte /* DHCHAP return code */ 1205fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_NOT_CONFIGURED 0x8001 1206fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_AUTH_FAILED_NO_SA_FOUND 0x8002 1207fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_AUTH_INIT_OK_AUTH_FAILED 0x8003 1208fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_COMPARE_FAILED 0x8004 1209fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_WWN_NOT_FOUND 0x8005 1210fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_PASSWORD_INVALID 0x8006 1211fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_INVALID_ENTITY 0x8007 1212fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_ENTITY_NOT_ACTIVE 0x8008 1213fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_INVALID_OPERATION 0x8009 1214fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_OUT_OF_RESOURCES 0x800a 1215fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_AUTHENTICATION_GOINGON 0x800b 1216fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_INVALID_BOARD_NO 0x800c 1217fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_IO_ERROR 0x800d 1218fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_CREATE_STORKEY_ERROR 0x800e 1219fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_CREATE_PARMKEY_ERROR 0x800f 1220fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_CREATE_AUTHKEY_ERROR 0x8010 1221*291a2b48SSukumar Swaminathan #define DFC_AUTH_STATUS_LOCAL_REMOTE_PASSWORD_SAME 0x8011 1222fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_CREATE_BORDKEY_ERROR 0x8020 1223fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_DRVTYPE_NOT_SUPPORTED 0x8030 1224fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_AUTHENTICATION_NOT_SUPPORTED 0x8031 1225fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_GENERAL_ERROR 0x8032 1226fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_CONFIG_NOT_FOUND 0x8034 1227fcf3ce44SJohn Forte #define DFC_AUTH_STATUS_NOT_PRIVILEGE_USER 0x8040 1228fcf3ce44SJohn Forte 1229fcf3ce44SJohn Forte 1230*291a2b48SSukumar Swaminathan typedef struct dfc_fcsp_config 1231*291a2b48SSukumar Swaminathan { 1232*291a2b48SSukumar Swaminathan HBA_WWN lwwpn; 1233*291a2b48SSukumar Swaminathan HBA_WWN rwwpn; 1234*291a2b48SSukumar Swaminathan 1235*291a2b48SSukumar Swaminathan uint16_t auth_tov; /* seconds */ 1236*291a2b48SSukumar Swaminathan #define DFC_AUTH_TOV_MIN 20 1237*291a2b48SSukumar Swaminathan #define DFC_AUTH_TOV_MAX 1000 1238*291a2b48SSukumar Swaminathan #define DFC_AUTH_TOV_DEFAULT 45 1239*291a2b48SSukumar Swaminathan 1240*291a2b48SSukumar Swaminathan uint8_t auth_mode; 1241*291a2b48SSukumar Swaminathan #define DFC_AUTH_MODE_DISABLED 1 1242*291a2b48SSukumar Swaminathan #define DFC_AUTH_MODE_ACTIVE 2 1243*291a2b48SSukumar Swaminathan #define DFC_AUTH_MODE_PASSIVE 3 1244*291a2b48SSukumar Swaminathan #define DFC_AUTH_MODE_DEFAULT DFC_AUTH_MODE_DISABLED 1245*291a2b48SSukumar Swaminathan 1246*291a2b48SSukumar Swaminathan uint8_t auth_bidir:1; 1247*291a2b48SSukumar Swaminathan #define DFC_AUTH_BIDIR_DISABLED 0 1248*291a2b48SSukumar Swaminathan #define DFC_AUTH_BIDIR_ENABLED 1 1249*291a2b48SSukumar Swaminathan #define DFC_AUTH_BIDIR_DEFAULT DFC_AUTH_BIDIR_DISABLED 1250*291a2b48SSukumar Swaminathan uint8_t reserved:7; 1251*291a2b48SSukumar Swaminathan 1252*291a2b48SSukumar Swaminathan uint8_t type_priority[4]; 1253*291a2b48SSukumar Swaminathan #define DFC_AUTH_TYPE_DHCHAP 1 /* Only one currently supported */ 1254*291a2b48SSukumar Swaminathan #define DFC_AUTH_TYPE_FCAP 2 1255*291a2b48SSukumar Swaminathan #define DFC_AUTH_TYPE_FCPAP 3 1256*291a2b48SSukumar Swaminathan #define DFC_AUTH_TYPE_KERBEROS 4 1257*291a2b48SSukumar Swaminathan #define DFC_AUTH_TYPE_MAX 4 1258*291a2b48SSukumar Swaminathan #define DFC_AUTH_TYPE_DEFAULT0 DFC_AUTH_TYPE_DHCHAP 1259*291a2b48SSukumar Swaminathan #define DFC_AUTH_TYPE_DEFAULT1 0 1260*291a2b48SSukumar Swaminathan #define DFC_AUTH_TYPE_DEFAULT2 0 1261*291a2b48SSukumar Swaminathan #define DFC_AUTH_TYPE_DEFAULT3 0 1262*291a2b48SSukumar Swaminathan 1263*291a2b48SSukumar Swaminathan uint8_t hash_priority[4]; 1264*291a2b48SSukumar Swaminathan #define DFC_AUTH_HASH_MD5 1 1265*291a2b48SSukumar Swaminathan #define DFC_AUTH_HASH_SHA1 2 1266*291a2b48SSukumar Swaminathan #define DFC_AUTH_HASH_MAX 2 1267*291a2b48SSukumar Swaminathan #define DFC_AUTH_HASH_DEFAULT0 DFC_AUTH_HASH_MD5 1268*291a2b48SSukumar Swaminathan #define DFC_AUTH_HASH_DEFAULT1 DFC_AUTH_HASH_SHA1 1269*291a2b48SSukumar Swaminathan #define DFC_AUTH_HASH_DEFAULT2 0 1270*291a2b48SSukumar Swaminathan #define DFC_AUTH_HASH_DEFAULT3 0 1271*291a2b48SSukumar Swaminathan 1272*291a2b48SSukumar Swaminathan uint8_t group_priority[8]; 1273*291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_NULL 1 1274*291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_1024 2 1275*291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_1280 3 1276*291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_1536 4 1277*291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_2048 5 1278*291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_MAX 5 1279*291a2b48SSukumar Swaminathan 1280*291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_DEFAULT0 DFC_AUTH_GROUP_NULL 1281*291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_DEFAULT1 DFC_AUTH_GROUP_1024 1282*291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_DEFAULT2 DFC_AUTH_GROUP_1280 1283*291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_DEFAULT3 DFC_AUTH_GROUP_1536 1284*291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_DEFAULT4 DFC_AUTH_GROUP_2048 1285*291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_DEFAULT5 0 1286*291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_DEFAULT6 0 1287*291a2b48SSukumar Swaminathan #define DFC_AUTH_GROUP_DEFAULT7 0 1288*291a2b48SSukumar Swaminathan 1289*291a2b48SSukumar Swaminathan uint32_t reauth_tov; /* minutes */ 1290*291a2b48SSukumar Swaminathan #define DFC_REAUTH_TOV_MIN 0 1291*291a2b48SSukumar Swaminathan #define DFC_REAUTH_TOV_MAX 7200 1292*291a2b48SSukumar Swaminathan #define DFC_REAUTH_TOV_DEFAULT 1440 1293fcf3ce44SJohn Forte } dfc_fcsp_config_t; 1294fcf3ce44SJohn Forte 1295fcf3ce44SJohn Forte 1296*291a2b48SSukumar Swaminathan typedef struct dfc_password 1297*291a2b48SSukumar Swaminathan { 1298*291a2b48SSukumar Swaminathan uint16_t length; 1299fcf3ce44SJohn Forte #define DFC_PASSWORD_LENGTH_MIN 8 1300fcf3ce44SJohn Forte #define DFC_PASSWORD_LENGTH_MAX 128 1301fcf3ce44SJohn Forte 1302*291a2b48SSukumar Swaminathan uint16_t type; 1303fcf3ce44SJohn Forte #define DFC_PASSWORD_TYPE_ASCII 1 1304fcf3ce44SJohn Forte #define DFC_PASSWORD_TYPE_BINARY 2 1305fcf3ce44SJohn Forte #define DFC_PASSWORD_TYPE_IGNORE 3 1306fcf3ce44SJohn Forte 1307*291a2b48SSukumar Swaminathan uint8_t password[DFC_PASSWORD_LENGTH_MAX]; 1308fcf3ce44SJohn Forte } dfc_password_t; 1309fcf3ce44SJohn Forte 1310*291a2b48SSukumar Swaminathan typedef struct dfc_auth_password 1311*291a2b48SSukumar Swaminathan { 1312*291a2b48SSukumar Swaminathan HBA_WWN lwwpn; 1313*291a2b48SSukumar Swaminathan HBA_WWN rwwpn; 1314fcf3ce44SJohn Forte 1315*291a2b48SSukumar Swaminathan dfc_password_t lpw; 1316*291a2b48SSukumar Swaminathan dfc_password_t rpw; 1317fcf3ce44SJohn Forte 1318*291a2b48SSukumar Swaminathan dfc_password_t lpw_new; 1319*291a2b48SSukumar Swaminathan dfc_password_t rpw_new; 1320fcf3ce44SJohn Forte } dfc_auth_password_t; 1321fcf3ce44SJohn Forte 1322fcf3ce44SJohn Forte 1323*291a2b48SSukumar Swaminathan typedef struct dfc_auth_cfglist 1324*291a2b48SSukumar Swaminathan { 1325*291a2b48SSukumar Swaminathan uint32_t cnt; 1326*291a2b48SSukumar Swaminathan HBA_WWN rwwpn[1]; 1327fcf3ce44SJohn Forte } dfc_auth_cfglist_t; 1328fcf3ce44SJohn Forte 1329fcf3ce44SJohn Forte 1330*291a2b48SSukumar Swaminathan typedef struct dfc_auth_status 1331*291a2b48SSukumar Swaminathan { 1332*291a2b48SSukumar Swaminathan HBA_WWN lwwpn; 1333*291a2b48SSukumar Swaminathan HBA_WWN rwwpn; 1334fcf3ce44SJohn Forte 1335*291a2b48SSukumar Swaminathan uint8_t auth_state; 1336fcf3ce44SJohn Forte #define DFC_AUTH_STATE_OFF 1 1337fcf3ce44SJohn Forte #define DFC_AUTH_STATE_INP 2 1338fcf3ce44SJohn Forte #define DFC_AUTH_STATE_ON 3 1339fcf3ce44SJohn Forte #define DFC_AUTH_STATE_FAILED 4 1340fcf3ce44SJohn Forte 1341*291a2b48SSukumar Swaminathan uint8_t auth_failReason; 1342fcf3ce44SJohn Forte #define DFC_AUTH_FAIL_GENERIC 1 1343fcf3ce44SJohn Forte #define DFC_AUTH_FAIL_ELS_TMO 2 1344fcf3ce44SJohn Forte #define DFC_AUTH_FAIL_XACT_TMO 3 1345fcf3ce44SJohn Forte #define DFC_AUTH_FAIL_LS_RJT 4 1346fcf3ce44SJohn Forte #define DFC_AUTH_FAIL_BSY_LS_RJT 5 1347fcf3ce44SJohn Forte #define DFC_AUTH_FAIL_REJECTED 6 1348fcf3ce44SJohn Forte 1349*291a2b48SSukumar Swaminathan uint8_t type_priority; 1350*291a2b48SSukumar Swaminathan uint8_t group_priority; 1351fcf3ce44SJohn Forte 1352*291a2b48SSukumar Swaminathan uint8_t hash_priority; 1353*291a2b48SSukumar Swaminathan uint8_t localAuth :1; 1354*291a2b48SSukumar Swaminathan uint8_t remoteAuth :1; 1355*291a2b48SSukumar Swaminathan uint8_t pad :6; 1356*291a2b48SSukumar Swaminathan uint16_t reserved0; 1357fcf3ce44SJohn Forte 1358*291a2b48SSukumar Swaminathan uint32_t time_from_last_auth; /* seconds */ 1359*291a2b48SSukumar Swaminathan uint32_t time_until_next_auth; /* seconds */ 1360fcf3ce44SJohn Forte 1361*291a2b48SSukumar Swaminathan uint32_t reserved1; 1362*291a2b48SSukumar Swaminathan uint32_t reserved2; 1363fcf3ce44SJohn Forte } dfc_auth_status_t; 1364fcf3ce44SJohn Forte 1365fcf3ce44SJohn Forte #endif /* DHCHAP_SUPPORT */ 1366fcf3ce44SJohn Forte 1367fcf3ce44SJohn Forte /* 1368fcf3ce44SJohn Forte * Start of FCP specific structures 1369fcf3ce44SJohn Forte */ 1370fcf3ce44SJohn Forte 1371fcf3ce44SJohn Forte #ifndef MAX_FCP_SNS 1372*291a2b48SSukumar Swaminathan typedef struct emlxs_fcp_rsp 1373*291a2b48SSukumar Swaminathan { 1374*291a2b48SSukumar Swaminathan uint32_t rspRsvd1; /* FC Word 0, byte 0:3 */ 1375*291a2b48SSukumar Swaminathan uint32_t rspRsvd2; /* FC Word 1, byte 0:3 */ 1376*291a2b48SSukumar Swaminathan 1377*291a2b48SSukumar Swaminathan uint8_t rspStatus0; /* FCP_STATUS byte 0 (reserved) */ 1378*291a2b48SSukumar Swaminathan uint8_t rspStatus1; /* FCP_STATUS byte 1 (reserved) */ 1379*291a2b48SSukumar Swaminathan uint8_t rspStatus2; /* FCP_STATUS byte 2 field validity */ 1380*291a2b48SSukumar Swaminathan #define RSP_LEN_VALID 0x01 /* bit 0 */ 1381*291a2b48SSukumar Swaminathan #define SNS_LEN_VALID 0x02 /* bit 1 */ 1382*291a2b48SSukumar Swaminathan #define RESID_OVER 0x04 /* bit 2 */ 1383*291a2b48SSukumar Swaminathan #define RESID_UNDER 0x08 /* bit 3 */ 1384*291a2b48SSukumar Swaminathan uint8_t rspStatus3; /* FCP_STATUS byte 3 SCSI status byte */ 1385fcf3ce44SJohn Forte #define SCSI_STAT_GOOD 0x00 1386fcf3ce44SJohn Forte #define SCSI_STAT_CHECK_COND 0x02 1387fcf3ce44SJohn Forte #define SCSI_STAT_COND_MET 0x04 1388fcf3ce44SJohn Forte #define SCSI_STAT_BUSY 0x08 1389fcf3ce44SJohn Forte #define SCSI_STAT_INTERMED 0x10 1390fcf3ce44SJohn Forte #define SCSI_STAT_INTERMED_CM 0x14 1391fcf3ce44SJohn Forte #define SCSI_STAT_RES_CNFLCT 0x18 1392fcf3ce44SJohn Forte #define SCSI_STAT_CMD_TERM 0x22 1393fcf3ce44SJohn Forte #define SCSI_STAT_QUE_FULL 0x28 1394fcf3ce44SJohn Forte #define SCSI_STAT_ACA_ACTIVE 0x30 1395fcf3ce44SJohn Forte #define SCSI_STAT_TASK_ABORT 0x40 1396fcf3ce44SJohn Forte 1397*291a2b48SSukumar Swaminathan uint32_t rspResId; /* Residual xfer if RESID_xxxx set in */ 1398*291a2b48SSukumar Swaminathan /* fcpStatus2 */ 1399*291a2b48SSukumar Swaminathan /* Received in Big Endian format */ 1400*291a2b48SSukumar Swaminathan uint32_t rspSnsLen; /* Length of sense data in fcpSnsInfo */ 1401*291a2b48SSukumar Swaminathan /* received in Big Endian format */ 1402*291a2b48SSukumar Swaminathan uint32_t rspRspLen; /* Length of FCP response data in */ 1403*291a2b48SSukumar Swaminathan /* fcpRspInfo */ 1404*291a2b48SSukumar Swaminathan /* Received In Big Endian format */ 1405fcf3ce44SJohn Forte 1406*291a2b48SSukumar Swaminathan uint8_t rspInfo0; /* FCP_RSP_INFO byte 0 (reserved) */ 1407*291a2b48SSukumar Swaminathan uint8_t rspInfo1; /* FCP_RSP_INFO byte 1 (reserved) */ 1408*291a2b48SSukumar Swaminathan uint8_t rspInfo2; /* FCP_RSP_INFO byte 2 (reserved) */ 1409*291a2b48SSukumar Swaminathan uint8_t rspInfo3; /* FCP_RSP_INFO RSP_CODE byte 3 */ 1410fcf3ce44SJohn Forte 1411fcf3ce44SJohn Forte #define RSP_NO_FAILURE 0x00 1412fcf3ce44SJohn Forte #define RSP_DATA_BURST_ERR 0x01 1413fcf3ce44SJohn Forte #define RSP_CMD_FIELD_ERR 0x02 1414fcf3ce44SJohn Forte #define RSP_RO_MISMATCH_ERR 0x03 1415fcf3ce44SJohn Forte #define RSP_TM_NOT_SUPPORTED 0x04 /* Task mgmt function not supported */ 1416fcf3ce44SJohn Forte #define RSP_TM_NOT_COMPLETED 0x05 /* Task mgmt function not performed */ 1417fcf3ce44SJohn Forte 1418*291a2b48SSukumar Swaminathan uint32_t rspInfoRsvd; /* FCP_RSP_INFO bytes 4-7 (reserved) */ 1419fcf3ce44SJohn Forte 1420fcf3ce44SJohn Forte /* 1421*291a2b48SSukumar Swaminathan * Define maximum size of SCSI Sense buffer. 1422*291a2b48SSukumar Swaminathan * Seagate never issues more than 18 bytes of Sense data. 1423fcf3ce44SJohn Forte */ 1424fcf3ce44SJohn Forte #define MAX_FCP_SNS 128 1425*291a2b48SSukumar Swaminathan uint8_t rspSnsInfo[MAX_FCP_SNS]; 1426fcf3ce44SJohn Forte } emlxs_fcp_rsp; 1427fcf3ce44SJohn Forte typedef emlxs_fcp_rsp FCP_RSP; 1428*291a2b48SSukumar Swaminathan #endif /* MAX_FCP_SNS */ 1429fcf3ce44SJohn Forte 1430fcf3ce44SJohn Forte 1431fcf3ce44SJohn Forte #ifndef FC_LUN_SHIFT 1432*291a2b48SSukumar Swaminathan typedef struct emlxs_fcp_cmd 1433*291a2b48SSukumar Swaminathan { 1434*291a2b48SSukumar Swaminathan uint32_t fcpLunMsl; /* most significant word (32 bits) */ 1435*291a2b48SSukumar Swaminathan uint32_t fcpLunLsl; /* least significant word (32 bits) */ 1436fcf3ce44SJohn Forte 1437fcf3ce44SJohn Forte /* 1438*291a2b48SSukumar Swaminathan * # of bits to shift lun id to end up in right payload word, 1439*291a2b48SSukumar Swaminathan * little endian = 8, big = 16. 1440fcf3ce44SJohn Forte */ 1441fcf3ce44SJohn Forte #ifdef EMLXS_LITTLE_ENDIAN 1442fcf3ce44SJohn Forte #define FC_LUN_SHIFT 8 1443fcf3ce44SJohn Forte #define FC_ADDR_MODE_SHIFT 0 1444fcf3ce44SJohn Forte #endif 1445fcf3ce44SJohn Forte #ifdef EMLXS_BIG_ENDIAN 1446fcf3ce44SJohn Forte #define FC_LUN_SHIFT 16 1447fcf3ce44SJohn Forte #define FC_ADDR_MODE_SHIFT 24 1448fcf3ce44SJohn Forte #endif 1449fcf3ce44SJohn Forte 1450*291a2b48SSukumar Swaminathan uint8_t fcpCntl0; /* FCP_CNTL byte 0 (reserved) */ 1451*291a2b48SSukumar Swaminathan uint8_t fcpCntl1; /* FCP_CNTL byte 1 task codes */ 1452*291a2b48SSukumar Swaminathan #define SIMPLE_Q 0x00 1453*291a2b48SSukumar Swaminathan #define HEAD_OF_Q 0x01 1454*291a2b48SSukumar Swaminathan #define ORDERED_Q 0x02 1455*291a2b48SSukumar Swaminathan #define ACA_Q 0x04 1456*291a2b48SSukumar Swaminathan #define UNTAGGED 0x05 1457*291a2b48SSukumar Swaminathan 1458*291a2b48SSukumar Swaminathan uint8_t fcpCntl2; /* FCP_CTL byte 2 task management */ 1459*291a2b48SSukumar Swaminathan /* codes */ 1460*291a2b48SSukumar Swaminathan #define ABORT_TASK_SET 0x02 /* Bit 1 */ 1461*291a2b48SSukumar Swaminathan #define CLEAR_TASK_SET 0x04 /* bit 2 */ 1462*291a2b48SSukumar Swaminathan #define LUN_RESET 0x10 /* bit 4 */ 1463*291a2b48SSukumar Swaminathan #define TARGET_RESET 0x20 /* bit 5 */ 1464*291a2b48SSukumar Swaminathan #define CLEAR_ACA 0x40 /* bit 6 */ 1465*291a2b48SSukumar Swaminathan #define TERMINATE_TASK 0x80 /* bit 7 */ 1466*291a2b48SSukumar Swaminathan 1467*291a2b48SSukumar Swaminathan uint8_t fcpCntl3; 1468*291a2b48SSukumar Swaminathan #define WRITE_DATA 0x01 /* Bit 0 */ 1469*291a2b48SSukumar Swaminathan #define READ_DATA 0x02 /* Bit 1 */ 1470*291a2b48SSukumar Swaminathan 1471*291a2b48SSukumar Swaminathan uint8_t fcpCdb[16]; /* SRB cdb field is copied here */ 1472*291a2b48SSukumar Swaminathan uint32_t fcpDl; /* Total transfer length */ 1473fcf3ce44SJohn Forte } emlxs_fcp_cmd_t; 1474fcf3ce44SJohn Forte typedef emlxs_fcp_cmd_t FCP_CMND; 1475*291a2b48SSukumar Swaminathan #endif /* FC_LUN_SHIFT */ 1476fcf3ce44SJohn Forte 1477fcf3ce44SJohn Forte 1478fcf3ce44SJohn Forte /* 1479fcf3ce44SJohn Forte * Used by libdfc (SendScsiCmd, SendFcpCmd, DFC_SendScsiCmdV2, DFC_SendFcpCmdV2 1480fcf3ce44SJohn Forte * and emlxs_dfc_send_scsi_fcp functions 1481fcf3ce44SJohn Forte */ 1482*291a2b48SSukumar Swaminathan typedef struct dfc_send_scsi_fcp_cmd_info 1483*291a2b48SSukumar Swaminathan { 1484*291a2b48SSukumar Swaminathan HBA_WWN src_wwn; 1485*291a2b48SSukumar Swaminathan HBA_WWN dst_wwn; 1486*291a2b48SSukumar Swaminathan uint32_t cnt1; 1487*291a2b48SSukumar Swaminathan uint32_t cnt2; 1488*291a2b48SSukumar Swaminathan uint32_t ver; 1489fcf3ce44SJohn Forte } dfc_send_scsi_fcp_cmd_info_t; 1490*291a2b48SSukumar Swaminathan 1491*291a2b48SSukumar Swaminathan #define SCSI_RSP_CNT(x) x.cnt1 1492*291a2b48SSukumar Swaminathan #define SCSI_SNS_CNT(x) x.cnt2 1493*291a2b48SSukumar Swaminathan #define FC_DATA_CNT(x) x.cnt1 1494*291a2b48SSukumar Swaminathan #define FC_RSP_CNT(x) x.cnt2 1495*291a2b48SSukumar Swaminathan #define DFC_SEND_SCSI_FCP_V1 1 1496*291a2b48SSukumar Swaminathan #define DFC_SEND_SCSI_FCP_V2 2 1497fcf3ce44SJohn Forte 1498fcf3ce44SJohn Forte #ifdef __cplusplus 1499fcf3ce44SJohn Forte } 1500fcf3ce44SJohn Forte #endif 1501fcf3ce44SJohn Forte 1502fcf3ce44SJohn Forte #endif /* _EMLXS_DFCLIB_H */ 1503