dditypes.h revision 737d277a27d4872543f597e35c470e7510f61f03
1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License, Version 1.0 only
6 * (the "License").  You may not use this file except in compliance
7 * with the License.
8 *
9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10 * or http://www.opensolaris.org/os/licensing.
11 * See the License for the specific language governing permissions
12 * and limitations under the License.
13 *
14 * When distributing Covered Code, include this CDDL HEADER in each
15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16 * If applicable, add the following below this CDDL HEADER, with the
17 * fields enclosed by brackets "[]" replaced with your own identifying
18 * information: Portions Copyright [yyyy] [name of copyright owner]
19 *
20 * CDDL HEADER END
21 */
22/*
23 * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
24 * Use is subject to license terms.
25 */
26
27#ifndef	_SYS_DDITYPES_H
28#define	_SYS_DDITYPES_H
29
30#pragma ident	"%Z%%M%	%I%	%E% SMI"
31
32#include <sys/isa_defs.h>
33
34#ifdef	__cplusplus
35extern "C" {
36#endif
37
38#ifndef	_ASM
39/*
40 * DMA types
41 *
42 * A DMA handle represent a "DMA object".  A DMA object is an abstraction
43 * that represents the potential source or destination of DMA transfers to
44 * or from a device.  The DMA object is the highest level description of
45 * the source or destination and is not suitable for the actual transfer.
46 *
47 * Note, that we avoid the specific references to "mapping". The fact that
48 * a transfer requires mapping is an artifact of the specific architectural
49 * implementation.
50 */
51typedef	struct __ddi_dma_handle *ddi_dma_handle_t;
52
53/*
54 * A dma window type represents a "DMA window".  A DMA window is a portion
55 * of a dma object or might be the entire object. A DMA window has had system
56 * resources allocated to it and is prepared to be transferred into or
57 * out of. Examples of system resources are DVMA mapping resources and
58 * intermediate transfer buffer resources.
59 *
60 */
61typedef	struct __ddi_dma_win *ddi_dma_win_t;
62
63
64/*
65 * A dma segment type represents a "DMA segment".  A dma segment is a
66 * contiguous portion of a DMA window which is entirely addressable by the
67 * device for a transfer operation.  One example where DMA segments are
68 * required is where the system does not contain DVMA capability and
69 * the object or window may be non-contiguous.  In this example the
70 * object or window will be broken into smaller contiguous segments.
71 * Another example is where a device or some intermediary bus adapter has
72 * some upper limit on its transfer size (i.e. an 8-bit address register).
73 * In this example the object or window will be broken into smaller
74 * addressable segments.
75 */
76typedef	struct __ddi_dma_seg *ddi_dma_seg_t;
77
78/*
79 * A DMA cookie contains DMA address information required to
80 * program a DMA engine
81 */
82typedef struct {
83	union {
84		uint64_t	_dmac_ll;	/* 64 bit DMA address */
85		uint32_t 	_dmac_la[2];    /* 2 x 32 bit address */
86	} _dmu;
87	size_t		dmac_size;	/* DMA cookie size */
88	uint_t		dmac_type;	/* bus specific type bits */
89} ddi_dma_cookie_t;
90
91#define	dmac_laddress	_dmu._dmac_ll
92#ifdef _LONG_LONG_HTOL
93#define	dmac_notused    _dmu._dmac_la[0]
94#define	dmac_address    _dmu._dmac_la[1]
95#else
96#define	dmac_address	_dmu._dmac_la[0]
97#define	dmac_notused	_dmu._dmac_la[1]
98#endif
99
100/*
101 * Interrupt types
102 */
103
104/*
105 * Both ddi_iblock_cookie_t and ddi_idevice_cookie_t are
106 * obsolete data structures.
107 *
108 * lock initialization type
109 */
110typedef struct __ddi_iblock_cookie *ddi_iblock_cookie_t;
111typedef union {
112	struct {
113		ushort_t	_idev_vector;	/* vector - bus dependent */
114		ushort_t	_idev_priority;	/* priority - bus dependent */
115	} idu;
116	uint_t	idev_softint;	/* Soft interrupt register bit(s) */
117} ddi_idevice_cookie_t;
118#define	idev_vector	idu._idev_vector
119#define	idev_priority	idu._idev_priority
120
121/*
122 * register specification
123 */
124typedef struct __ddi_regspec *ddi_regspec_t;
125
126/*
127 * interrupt specification
128 */
129typedef struct __ddi_intrspec *ddi_intrspec_t;
130
131/*
132 * ddi_softintr_t is an obsolete data structure.
133 *
134 * soft interrupt id
135 */
136typedef struct __ddi_softintr *ddi_softintr_t;
137
138/*
139 * opaque device info handle
140 */
141typedef struct __dev_info *dev_info_t;
142
143/*
144 * Mapping cookie for devmap(9E)
145 */
146typedef struct __ddi_devmap_data *ddi_devmap_data_t;
147
148/*
149 * Opaque Device id
150 */
151typedef struct __ddi_devid *ddi_devid_t;
152
153/*
154 * Device id types
155 */
156#define	DEVID_NONE		0
157#define	DEVID_SCSI3_WWN		1
158#define	DEVID_SCSI_SERIAL	2
159#define	DEVID_FAB		3
160#define	DEVID_ENCAP		4
161#define	DEVID_ATA_SERIAL	5
162#define	DEVID_SCSI3_VPD_T10	6
163#define	DEVID_SCSI3_VPD_EUI	7
164#define	DEVID_SCSI3_VPD_NAA	8
165#define	DEVID_MAXTYPE		8
166
167/*
168 * Device id scsi encode versions
169 */
170#define	DEVID_SCSI_ENCODE_VERSION1		0
171#define	DEVID_SCSI_ENCODE_VERSION2		1
172#define	DEVID_SCSI_ENCODE_VERSION_LATEST	DEVID_SCSI_ENCODE_VERSION2
173
174/* minor name values for devid lookup interfaces */
175#define	DEVID_MINOR_NAME_ALL		((char *)0)
176#define	DEVID_MINOR_NAME_ALL_CHR	((char *)1)
177#define	DEVID_MINOR_NAME_ALL_BLK	((char *)2)
178
179/*
180 * Define ddi_devmap_cmd types. This should probably be elsewhere.
181 */
182typedef enum {
183	DDI_DEVMAP_VALIDATE = 0		/* Check mapping, but do nothing */
184} ddi_devmap_cmd_t;
185
186/*
187 * Definitions for node state.
188 *
189 * NOTE: DS_ATTACHED and DS_READY should only be used by the devcfg.c state
190 * model code itself, other code should use i_ddi_devi_attached() to avoid
191 * logic errors associated with transient DS_READY->DS_ATTACHED->DS_READY
192 * state changes while the node is attached.
193 */
194typedef enum {
195	DS_INVAL = -1,
196	DS_PROTO = 0,
197	DS_LINKED,	/* in orphan list */
198	DS_BOUND,	/* in per-driver list */
199	DS_INITIALIZED, /* bus address assigned */
200	DS_PROBED,	/* device known to exist */
201	DS_ATTACHED,	/* don't use, see NOTE above: driver attached */
202	DS_READY	/* don't use, see NOTE above: post attach complete */
203} ddi_node_state_t;
204
205/*
206 * NDI Event Service
207 */
208typedef enum {EPL_KERNEL, EPL_INTERRUPT, EPL_HIGHLEVEL} ddi_plevel_t;
209typedef struct ddi_event_cookie *ddi_eventcookie_t;
210typedef struct ddi_event_callbacks *ddi_callback_id_t;
211
212#endif	/* !_ASM */
213
214#ifdef	_KERNEL
215#ifndef _ASM
216
217/*
218 * Device Access Attributes
219 */
220
221typedef struct ddi_device_acc_attr {
222	ushort_t devacc_attr_version;
223	uchar_t devacc_attr_endian_flags;
224	uchar_t devacc_attr_dataorder;
225	uchar_t devacc_attr_access;		/* access error protection */
226} ddi_device_acc_attr_t;
227
228#define	DDI_DEVICE_ATTR_V0 	0x0001
229#define	DDI_DEVICE_ATTR_V1 	0x0002
230
231/*
232 * endian-ness flags
233 */
234#define	 DDI_NEVERSWAP_ACC	0x00
235#define	 DDI_STRUCTURE_LE_ACC	0x01
236#define	 DDI_STRUCTURE_BE_ACC	0x02
237
238/*
239 * Data ordering values
240 */
241#define	DDI_STRICTORDER_ACC	0x00
242#define	DDI_UNORDERED_OK_ACC    0x01
243#define	DDI_MERGING_OK_ACC	0x02
244#define	DDI_LOADCACHING_OK_ACC  0x03
245#define	DDI_STORECACHING_OK_ACC 0x04
246
247/*
248 * Data size
249 */
250#define	DDI_DATA_SZ01_ACC	1
251#define	DDI_DATA_SZ02_ACC	2
252#define	DDI_DATA_SZ04_ACC	4
253#define	DDI_DATA_SZ08_ACC	8
254
255/*
256 * Data Access Handle
257 */
258#define	VERS_ACCHDL 			0x0001
259
260typedef struct __ddi_acc_handle *ddi_acc_handle_t;
261
262typedef struct ddi_acc_hdl {
263	int	ah_vers;		/* version number */
264	void	*ah_bus_private;	/* bus private pointer */
265	void 	*ah_platform_private; 	/* platform private pointer */
266	dev_info_t *ah_dip;		/* requesting device */
267
268	uint_t	ah_rnumber;		/* register number */
269	caddr_t	ah_addr;		/* address of mapping */
270
271	off_t	ah_offset;		/* offset of mapping */
272	off_t	ah_len;			/* length of mapping */
273	uint_t	ah_hat_flags;		/* hat flags used to map object */
274	pfn_t	ah_pfn;			/* physical page frame number */
275	uint_t	ah_pnum;		/* number of contiguous pages */
276	ulong_t	ah_xfermodes;		/* data transfer modes */
277	ddi_device_acc_attr_t ah_acc;	/* device access attributes */
278} ddi_acc_hdl_t;
279
280/*
281 * Used by DDI_CTLOPS_POKE and DDI_CTLOPS_PEEK for peek/poke and cautious acc
282 */
283typedef struct {
284	size_t			size;
285	uintptr_t		dev_addr;
286	uintptr_t		host_addr;
287	ddi_acc_handle_t	handle;
288	size_t			repcount;
289	uint_t			flags;
290} peekpoke_ctlops_t;
291
292#endif	/* !_ASM */
293
294/*
295 * devacc_attr_access error protection types
296 */
297#define	DDI_DEFAULT_ACC		0x01	/* take default action */
298#define	DDI_FLAGERR_ACC		0x02	/* protected against access faults */
299#define	DDI_CAUTIOUS_ACC	0x03	/* high protection against faults */
300
301#endif	/* _KERNEL */
302
303#ifdef	__cplusplus
304}
305#endif
306
307#endif	/* _SYS_DDITYPES_H */
308