1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 /*
22  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
23  * Use is subject to license terms.
24  */
25 
26 #ifndef	_SYS_DDI_INTR_IMPL_H
27 #define	_SYS_DDI_INTR_IMPL_H
28 
29 #pragma ident	"%Z%%M%	%I%	%E% SMI"
30 
31 /*
32  * Sun DDI interrupt implementation specific definitions
33  */
34 
35 #ifdef	__cplusplus
36 extern "C" {
37 #endif
38 
39 #ifdef _KERNEL
40 
41 /*
42  * Typedef for interrupt ops
43  */
44 typedef enum {
45 	DDI_INTROP_SUPPORTED_TYPES = 1,	/* 1 get supported interrupts types */
46 	DDI_INTROP_NINTRS,		/* 2 get num of interrupts supported */
47 	DDI_INTROP_ALLOC,		/* 3 allocate interrupt handle */
48 	DDI_INTROP_GETPRI,		/* 4 get priority */
49 	DDI_INTROP_SETPRI,		/* 5 set priority */
50 	DDI_INTROP_ADDISR,		/* 6 add interrupt handler */
51 	DDI_INTROP_DUPVEC,		/* 7 duplicate interrupt handler */
52 	DDI_INTROP_ENABLE,		/* 8 enable interrupt */
53 	DDI_INTROP_BLOCKENABLE,		/* 9 block enable interrupts */
54 	DDI_INTROP_BLOCKDISABLE,	/* 10 block disable interrupts */
55 	DDI_INTROP_DISABLE,		/* 11 disable interrupt */
56 	DDI_INTROP_REMISR,		/* 12 remove interrupt handler */
57 	DDI_INTROP_FREE,		/* 13 free interrupt handle */
58 	DDI_INTROP_GETCAP,		/* 14 get capacity */
59 	DDI_INTROP_SETCAP,		/* 15 set capacity */
60 	DDI_INTROP_SETMASK,		/* 16 set mask */
61 	DDI_INTROP_CLRMASK,		/* 17 clear mask */
62 	DDI_INTROP_GETPENDING,		/* 18 get pending interrupt */
63 	DDI_INTROP_NAVAIL		/* 19 get num of available interrupts */
64 } ddi_intr_op_t;
65 
66 /* Version number used in the handles */
67 #define	DDI_INTR_VERSION_1	1
68 #define	DDI_INTR_VERSION	DDI_INTR_VERSION_1
69 
70 /*
71  * One such data structure is allocated per ddi_intr_handle_t
72  * This is the incore copy of the regular interrupt info.
73  */
74 typedef struct ddi_intr_handle_impl {
75 	dev_info_t		*ih_dip;	/* dip associated with handle */
76 	uint16_t		ih_type;	/* interrupt type being used */
77 	ushort_t		ih_inum;	/* interrupt number */
78 	uint32_t		ih_vector;	/* vector number */
79 	uint16_t		ih_ver;		/* Version */
80 	uint_t			ih_state;	/* interrupt handle state */
81 	uint_t			ih_cap;		/* interrupt capabilities */
82 	uint_t			ih_pri;		/* priority - bus dependent */
83 	krwlock_t		ih_rwlock;	/* read/write lock per handle */
84 
85 	uint_t			(*ih_cb_func)(caddr_t, caddr_t);
86 	void			*ih_cb_arg1;
87 	void			*ih_cb_arg2;
88 
89 	/*
90 	 * The following 3 members are used to support MSI-X specific features
91 	 */
92 	uint_t			ih_flags;	/* Misc flags */
93 	uint_t			ih_dup_cnt;	/* # of dupped msi-x vectors */
94 	struct ddi_intr_handle_impl	*ih_main;
95 						/* pntr to the main vector */
96 	/*
97 	 * The next set of members are for 'scratch' purpose only.
98 	 * The DDI interrupt framework uses them internally and their
99 	 * interpretation is left to the framework. For now,
100 	 *	scratch1	- used to send NINTRs information
101 	 *			  to various nexus drivers.
102 	 *	scratch2	- used to send 'behavior' flag
103 	 *			  information to the nexus drivers
104 	 *			  from ddi_intr_alloc().  It is also
105 	 *			  used to send 'h_array' to the nexus drivers
106 	 *			  for ddi_intr_block_enable/disable() on x86.
107 	 *	private		- On X86 it usually carries a pointer to
108 	 *			  ihdl_plat_t.  Not used on SPARC platforms.
109 	 */
110 	void			*ih_private;	/* Platform specific data */
111 	uint_t			ih_scratch1;	/* Scratch1: #interrupts */
112 	void			*ih_scratch2;	/* Scratch2: flag/h_array */
113 } ddi_intr_handle_impl_t;
114 
115 /* values for ih_state (strictly for interrupt handle) */
116 #define	DDI_IHDL_STATE_ALLOC	0x01	/* Allocated. ddi_intr_alloc() called */
117 #define	DDI_IHDL_STATE_ADDED	0x02	/* Added interrupt handler */
118 					/* ddi_intr_add_handler() called */
119 #define	DDI_IHDL_STATE_ENABLE	0x04	/* Enabled. ddi_intr_enable() called */
120 
121 #define	DDI_INTR_IS_MSI_OR_MSIX(type) \
122 	((type) == DDI_INTR_TYPE_MSI || (type) == DDI_INTR_TYPE_MSIX)
123 
124 #define	DDI_INTR_BEHAVIOR_FLAG_VALID(f) \
125 	    (((f) == DDI_INTR_ALLOC_NORMAL) || ((f) == DDI_INTR_ALLOC_STRICT))
126 
127 #define	DDI_INTR_TYPE_FLAG_VALID(t) \
128 	    (((t) == DDI_INTR_TYPE_FIXED) || \
129 	    ((t) == DDI_INTR_TYPE_MSI) || \
130 	    ((t) == DDI_INTR_TYPE_MSIX))
131 
132 /* values for ih_flags */
133 #define	DDI_INTR_MSIX_DUP	0x01	/* MSI-X vector which has been dupped */
134 
135 struct av_softinfo;
136 
137 /*
138  * One such data structure is allocated per ddi_soft_intr_handle
139  * This is the incore copy of the softint info.
140  */
141 typedef struct ddi_softint_hdl_impl {
142 	dev_info_t	*ih_dip;		/* dip associated with handle */
143 	uint_t		ih_pri;			/* priority - bus dependent */
144 	krwlock_t	ih_rwlock;		/* read/write lock per handle */
145 	struct av_softinfo *ih_pending;		/* whether softint is pending */
146 
147 	uint_t		(*ih_cb_func)(caddr_t, caddr_t);
148 						/* cb function for soft ints */
149 	void		*ih_cb_arg1;		/* arg1 of callback function */
150 	void		*ih_cb_arg2;		/* arg2 passed to "trigger" */
151 
152 	/*
153 	 * The next member is for 'scratch' purpose only.
154 	 * The DDI interrupt framework uses it internally and its
155 	 * interpretation is left to the framework.
156 	 *	private		- used by the DDI framework to pass back
157 	 *			  and forth 'softid' information on SPARC
158 	 *			  side only. Not used on X86 platform.
159 	 */
160 	void		*ih_private;		/* Platform specific data */
161 } ddi_softint_hdl_impl_t;
162 
163 /* Softint internal implementation defines */
164 #define	DDI_SOFT_INTR_PRI_M	4
165 #define	DDI_SOFT_INTR_PRI_H	6
166 
167 /*
168  * One such data structure is allocated for MSI-X enabled
169  * device. If no MSI-X is enabled then it is NULL
170  */
171 typedef struct ddi_intr_msix {
172 	/* MSI-X Table related information */
173 	ddi_acc_handle_t	msix_tbl_hdl;		/* MSI-X table handle */
174 	uint32_t		*msix_tbl_addr;		/* MSI-X table addr */
175 	uint32_t		msix_tbl_offset;	/* MSI-X table offset */
176 
177 	/* MSI-X PBA Table related information */
178 	ddi_acc_handle_t	msix_pba_hdl;		/* MSI-X PBA handle */
179 	uint32_t		*msix_pba_addr;		/* MSI-X PBA addr */
180 	uint32_t		msix_pba_offset;	/* MSI-X PBA offset */
181 
182 	ddi_device_acc_attr_t	msix_dev_attr;		/* MSI-X device attr */
183 } ddi_intr_msix_t;
184 
185 
186 /*
187  * One such data structure is allocated for each dip.
188  * It has interrupt related information that can be
189  * stored/retrieved for convenience.
190  */
191 typedef struct devinfo_intr {
192 	/* These three fields show what the device is capable of */
193 	uint_t		devi_intr_sup_types;	/* Intrs supported by device */
194 
195 	ddi_intr_msix_t	*devi_msix_p;		/* MSI-X info, if supported */
196 
197 	/* Next three fields show current status for the device */
198 	uint_t		devi_intr_curr_type;	/* Interrupt type being used */
199 	uint_t		devi_intr_sup_nintrs;	/* #intr supported */
200 	uint_t		devi_intr_curr_nintrs;	/* #intr currently being used */
201 
202 	ddi_intr_handle_t **devi_intr_handle_p;	/* Hdl for legacy intr APIs */
203 
204 #if defined(__i386) || defined(__amd64)
205 	/* Save the PCI config space handle */
206 	ddi_acc_handle_t devi_cfg_handle;
207 	int		 devi_cap_ptr;		/* MSI or MSI-X cap pointer */
208 #endif
209 } devinfo_intr_t;
210 
211 #define	NEXUS_HAS_INTR_OP(dip)	\
212 	((DEVI(dip)->devi_ops->devo_bus_ops) && \
213 	(DEVI(dip)->devi_ops->devo_bus_ops->busops_rev >= BUSO_REV_9) && \
214 	(DEVI(dip)->devi_ops->devo_bus_ops->bus_intr_op))
215 
216 int	i_ddi_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t op,
217 	    ddi_intr_handle_impl_t *hdlp, void *result);
218 
219 int	i_ddi_add_softint(ddi_softint_hdl_impl_t *);
220 void	i_ddi_remove_softint(ddi_softint_hdl_impl_t *);
221 int	i_ddi_trigger_softint(ddi_softint_hdl_impl_t *, void *);
222 int	i_ddi_set_softint_pri(ddi_softint_hdl_impl_t *, uint_t);
223 
224 void	i_ddi_intr_devi_init(dev_info_t *dip);
225 void	i_ddi_intr_devi_fini(dev_info_t *dip);
226 
227 uint_t	i_ddi_intr_get_supported_types(dev_info_t *dip);
228 void	i_ddi_intr_set_supported_types(dev_info_t *dip, int sup_type);
229 uint_t	i_ddi_intr_get_current_type(dev_info_t *dip);
230 void	i_ddi_intr_set_current_type(dev_info_t *dip, int intr_type);
231 uint_t	i_ddi_intr_get_supported_nintrs(dev_info_t *dip, int intr_type);
232 void	i_ddi_intr_set_supported_nintrs(dev_info_t *dip, int nintrs);
233 uint_t	i_ddi_intr_get_current_nintrs(dev_info_t *dip);
234 void	i_ddi_intr_set_current_nintrs(dev_info_t *dip, int nintrs);
235 
236 ddi_intr_handle_t *i_ddi_get_intr_handle(dev_info_t *dip, int inum);
237 void	i_ddi_set_intr_handle(dev_info_t *dip, int inum,
238 	    ddi_intr_handle_t *hdlp);
239 
240 ddi_intr_msix_t	*i_ddi_get_msix(dev_info_t *dip);
241 void	i_ddi_set_msix(dev_info_t *dip, ddi_intr_msix_t *msix_p);
242 
243 #if defined(__i386) || defined(__amd64)
244 ddi_acc_handle_t	i_ddi_get_pci_config_handle(dev_info_t *dip);
245 void	i_ddi_set_pci_config_handle(dev_info_t *dip, ddi_acc_handle_t handle);
246 int	i_ddi_get_msi_msix_cap_ptr(dev_info_t *dip);
247 void	i_ddi_set_msi_msix_cap_ptr(dev_info_t *dip, int cap_ptr);
248 #endif
249 
250 int32_t i_ddi_get_intr_weight(dev_info_t *);
251 int32_t i_ddi_set_intr_weight(dev_info_t *, int32_t);
252 
253 void	i_ddi_alloc_intr_phdl(ddi_intr_handle_impl_t *);
254 void	i_ddi_free_intr_phdl(ddi_intr_handle_impl_t *);
255 
256 #define	DDI_INTR_ASSIGN_HDLR_N_ARGS(hdlp, func, arg1, arg2) \
257 	hdlp->ih_cb_func = func; \
258 	hdlp->ih_cb_arg1 = arg1; \
259 	hdlp->ih_cb_arg2 = arg2;
260 
261 #ifdef DEBUG
262 #define	I_DDI_VERIFY_MSIX_HANDLE(hdlp)					\
263 	if ((hdlp->ih_type == DDI_INTR_TYPE_MSIX) && 			\
264 	    (hdlp->ih_flags & DDI_INTR_MSIX_DUP)) {			\
265 		ASSERT(hdlp->ih_dip == hdlp->ih_main->ih_dip);		\
266 		ASSERT(hdlp->ih_type == hdlp->ih_main->ih_type);	\
267 		ASSERT(hdlp->ih_vector == hdlp->ih_main->ih_vector);	\
268 		ASSERT(hdlp->ih_ver == hdlp->ih_main->ih_ver);		\
269 		ASSERT(hdlp->ih_cap == hdlp->ih_main->ih_cap);		\
270 		ASSERT(hdlp->ih_pri == hdlp->ih_main->ih_pri);		\
271 	}
272 #else
273 #define	I_DDI_VERIFY_MSIX_HANDLE(hdlp)
274 #endif
275 
276 #else	/* _KERNEL */
277 
278 typedef struct devinfo_intr devinfo_intr_t;
279 
280 #endif	/* _KERNEL */
281 
282 /*
283  * Used only by old DDI interrupt interfaces.
284  */
285 
286 /*
287  * This structure represents one interrupt possible from the given
288  * device. It is used in an array for devices with multiple interrupts.
289  */
290 struct intrspec {
291 	uint_t intrspec_pri;		/* interrupt priority */
292 	uint_t intrspec_vec;		/* vector # (0 if none) */
293 	uint_t (*intrspec_func)();	/* function to call for interrupt, */
294 					/* If (uint_t (*)()) 0, none. */
295 					/* If (uint_t (*)()) 1, then */
296 };
297 
298 #ifdef _KERNEL
299 
300 /*
301  * NOTE:
302  *	The following 4 busops entry points are obsoleted with version
303  *	9 or greater. Use i_ddi_intr_op interface in place of these
304  *	obsolete interfaces.
305  *
306  *	Remove these busops entry points and all related data structures
307  *	in future minor/major solaris release.
308  */
309 typedef enum {DDI_INTR_CTLOPS_NONE} ddi_intr_ctlop_t;
310 
311 /* The following are the obsolete interfaces */
312 ddi_intrspec_t	i_ddi_get_intrspec(dev_info_t *dip, dev_info_t *rdip,
313 	    uint_t inumber);
314 
315 int	i_ddi_add_intrspec(dev_info_t *dip, dev_info_t *rdip,
316 	    ddi_intrspec_t intrspec, ddi_iblock_cookie_t *iblock_cookiep,
317 	    ddi_idevice_cookie_t *idevice_cookiep,
318 	    uint_t (*int_handler)(caddr_t int_handler_arg),
319 	    caddr_t int_handler_arg, int kind);
320 
321 void	i_ddi_remove_intrspec(dev_info_t *dip, dev_info_t *rdip,
322 	    ddi_intrspec_t intrspec, ddi_iblock_cookie_t iblock_cookie);
323 
324 int	i_ddi_intr_ctlops(dev_info_t *dip, dev_info_t *rdip,
325 	    ddi_intr_ctlop_t op, void *arg, void *val);
326 
327 #endif	/* _KERNEL */
328 
329 #ifdef	__cplusplus
330 }
331 #endif
332 
333 #endif	/* _SYS_DDI_INTR_IMPL_H */
334