17c478bd9Sstevel@tonic-gate /*
27c478bd9Sstevel@tonic-gate  * CDDL HEADER START
37c478bd9Sstevel@tonic-gate  *
47c478bd9Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
5102cb92eSjohnny  * Common Development and Distribution License (the "License").
6102cb92eSjohnny  * You may not use this file except in compliance with the License.
77c478bd9Sstevel@tonic-gate  *
87c478bd9Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
97c478bd9Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
107c478bd9Sstevel@tonic-gate  * See the License for the specific language governing permissions
117c478bd9Sstevel@tonic-gate  * and limitations under the License.
127c478bd9Sstevel@tonic-gate  *
137c478bd9Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
147c478bd9Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
157c478bd9Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
167c478bd9Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
177c478bd9Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
187c478bd9Sstevel@tonic-gate  *
197c478bd9Sstevel@tonic-gate  * CDDL HEADER END
207c478bd9Sstevel@tonic-gate  */
217c478bd9Sstevel@tonic-gate /*
22d84bdf75Segillett  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
237c478bd9Sstevel@tonic-gate  * Use is subject to license terms.
247c478bd9Sstevel@tonic-gate  */
257c478bd9Sstevel@tonic-gate 
267c478bd9Sstevel@tonic-gate #ifndef	_SYS_DDI_INTR_IMPL_H
277c478bd9Sstevel@tonic-gate #define	_SYS_DDI_INTR_IMPL_H
287c478bd9Sstevel@tonic-gate 
297c478bd9Sstevel@tonic-gate #pragma ident	"%Z%%M%	%I%	%E% SMI"
307c478bd9Sstevel@tonic-gate 
317c478bd9Sstevel@tonic-gate /*
327c478bd9Sstevel@tonic-gate  * Sun DDI interrupt implementation specific definitions
337c478bd9Sstevel@tonic-gate  */
347c478bd9Sstevel@tonic-gate 
357c478bd9Sstevel@tonic-gate #ifdef	__cplusplus
367c478bd9Sstevel@tonic-gate extern "C" {
377c478bd9Sstevel@tonic-gate #endif
387c478bd9Sstevel@tonic-gate 
397c478bd9Sstevel@tonic-gate #ifdef _KERNEL
407c478bd9Sstevel@tonic-gate 
417c478bd9Sstevel@tonic-gate /*
427c478bd9Sstevel@tonic-gate  * Typedef for interrupt ops
437c478bd9Sstevel@tonic-gate  */
447c478bd9Sstevel@tonic-gate typedef enum {
457c478bd9Sstevel@tonic-gate 	DDI_INTROP_SUPPORTED_TYPES = 1,	/* 1 get supported interrupts types */
467c478bd9Sstevel@tonic-gate 	DDI_INTROP_NINTRS,		/* 2 get num of interrupts supported */
477c478bd9Sstevel@tonic-gate 	DDI_INTROP_ALLOC,		/* 3 allocate interrupt handle */
487c478bd9Sstevel@tonic-gate 	DDI_INTROP_GETPRI,		/* 4 get priority */
497c478bd9Sstevel@tonic-gate 	DDI_INTROP_SETPRI,		/* 5 set priority */
507c478bd9Sstevel@tonic-gate 	DDI_INTROP_ADDISR,		/* 6 add interrupt handler */
517c478bd9Sstevel@tonic-gate 	DDI_INTROP_DUPVEC,		/* 7 duplicate interrupt handler */
527c478bd9Sstevel@tonic-gate 	DDI_INTROP_ENABLE,		/* 8 enable interrupt */
537c478bd9Sstevel@tonic-gate 	DDI_INTROP_BLOCKENABLE,		/* 9 block enable interrupts */
547c478bd9Sstevel@tonic-gate 	DDI_INTROP_BLOCKDISABLE,	/* 10 block disable interrupts */
557c478bd9Sstevel@tonic-gate 	DDI_INTROP_DISABLE,		/* 11 disable interrupt */
567c478bd9Sstevel@tonic-gate 	DDI_INTROP_REMISR,		/* 12 remove interrupt handler */
577c478bd9Sstevel@tonic-gate 	DDI_INTROP_FREE,		/* 13 free interrupt handle */
587c478bd9Sstevel@tonic-gate 	DDI_INTROP_GETCAP,		/* 14 get capacity */
597c478bd9Sstevel@tonic-gate 	DDI_INTROP_SETCAP,		/* 15 set capacity */
607c478bd9Sstevel@tonic-gate 	DDI_INTROP_SETMASK,		/* 16 set mask */
617c478bd9Sstevel@tonic-gate 	DDI_INTROP_CLRMASK,		/* 17 clear mask */
627c478bd9Sstevel@tonic-gate 	DDI_INTROP_GETPENDING,		/* 18 get pending interrupt */
637c478bd9Sstevel@tonic-gate 	DDI_INTROP_NAVAIL		/* 19 get num of available interrupts */
647c478bd9Sstevel@tonic-gate } ddi_intr_op_t;
657c478bd9Sstevel@tonic-gate 
667c478bd9Sstevel@tonic-gate /* Version number used in the handles */
677c478bd9Sstevel@tonic-gate #define	DDI_INTR_VERSION_1	1
687c478bd9Sstevel@tonic-gate #define	DDI_INTR_VERSION	DDI_INTR_VERSION_1
697c478bd9Sstevel@tonic-gate 
707c478bd9Sstevel@tonic-gate /*
717c478bd9Sstevel@tonic-gate  * One such data structure is allocated per ddi_intr_handle_t
727c478bd9Sstevel@tonic-gate  * This is the incore copy of the regular interrupt info.
737c478bd9Sstevel@tonic-gate  */
747c478bd9Sstevel@tonic-gate typedef struct ddi_intr_handle_impl {
757c478bd9Sstevel@tonic-gate 	dev_info_t		*ih_dip;	/* dip associated with handle */
767c478bd9Sstevel@tonic-gate 	uint16_t		ih_type;	/* interrupt type being used */
777c478bd9Sstevel@tonic-gate 	ushort_t		ih_inum;	/* interrupt number */
78a195726fSgovinda 	uint32_t		ih_vector;	/* vector number */
797c478bd9Sstevel@tonic-gate 	uint16_t		ih_ver;		/* Version */
807c478bd9Sstevel@tonic-gate 	uint_t			ih_state;	/* interrupt handle state */
817c478bd9Sstevel@tonic-gate 	uint_t			ih_cap;		/* interrupt capabilities */
827c478bd9Sstevel@tonic-gate 	uint_t			ih_pri;		/* priority - bus dependent */
837c478bd9Sstevel@tonic-gate 	krwlock_t		ih_rwlock;	/* read/write lock per handle */
847c478bd9Sstevel@tonic-gate 
857c478bd9Sstevel@tonic-gate 	uint_t			(*ih_cb_func)(caddr_t, caddr_t);
867c478bd9Sstevel@tonic-gate 	void			*ih_cb_arg1;
877c478bd9Sstevel@tonic-gate 	void			*ih_cb_arg2;
887c478bd9Sstevel@tonic-gate 
8920036fe5Segillett 	/*
9020036fe5Segillett 	 * The following 3 members are used to support MSI-X specific features
9120036fe5Segillett 	 */
9220036fe5Segillett 	uint_t			ih_flags;	/* Misc flags */
9320036fe5Segillett 	uint_t			ih_dup_cnt;	/* # of dupped msi-x vectors */
9420036fe5Segillett 	struct ddi_intr_handle_impl	*ih_main;
9520036fe5Segillett 						/* pntr to the main vector */
967c478bd9Sstevel@tonic-gate 	/*
977c478bd9Sstevel@tonic-gate 	 * The next set of members are for 'scratch' purpose only.
987c478bd9Sstevel@tonic-gate 	 * The DDI interrupt framework uses them internally and their
997c478bd9Sstevel@tonic-gate 	 * interpretation is left to the framework. For now,
1007c478bd9Sstevel@tonic-gate 	 *	scratch1	- used to send NINTRs information
1017c478bd9Sstevel@tonic-gate 	 *			  to various nexus drivers.
1027c478bd9Sstevel@tonic-gate 	 *	scratch2	- used to send 'behavior' flag
1037c478bd9Sstevel@tonic-gate 	 *			  information to the nexus drivers
104102cb92eSjohnny 	 *			  from ddi_intr_alloc().  It is also
105102cb92eSjohnny 	 *			  used to send 'h_array' to the nexus drivers
106102cb92eSjohnny 	 *			  for ddi_intr_block_enable/disable() on x86.
1077a364d25Sschwartz 	 *	private		- On X86 it usually carries a pointer to
1087a364d25Sschwartz 	 *			  ihdl_plat_t.  Not used on SPARC platforms.
1097c478bd9Sstevel@tonic-gate 	 */
1107c478bd9Sstevel@tonic-gate 	void			*ih_private;	/* Platform specific data */
1117c478bd9Sstevel@tonic-gate 	uint_t			ih_scratch1;	/* Scratch1: #interrupts */
112102cb92eSjohnny 	void			*ih_scratch2;	/* Scratch2: flag/h_array */
1137c478bd9Sstevel@tonic-gate } ddi_intr_handle_impl_t;
1147c478bd9Sstevel@tonic-gate 
1157c478bd9Sstevel@tonic-gate /* values for ih_state (strictly for interrupt handle) */
1167c478bd9Sstevel@tonic-gate #define	DDI_IHDL_STATE_ALLOC	0x01	/* Allocated. ddi_intr_alloc() called */
1177c478bd9Sstevel@tonic-gate #define	DDI_IHDL_STATE_ADDED	0x02	/* Added interrupt handler */
1187c478bd9Sstevel@tonic-gate 					/* ddi_intr_add_handler() called */
1197c478bd9Sstevel@tonic-gate #define	DDI_IHDL_STATE_ENABLE	0x04	/* Enabled. ddi_intr_enable() called */
1207c478bd9Sstevel@tonic-gate 
1217c478bd9Sstevel@tonic-gate #define	DDI_INTR_IS_MSI_OR_MSIX(type) \
1227c478bd9Sstevel@tonic-gate 	((type) == DDI_INTR_TYPE_MSI || (type) == DDI_INTR_TYPE_MSIX)
1237c478bd9Sstevel@tonic-gate 
1242326332eSanish #define	DDI_INTR_BEHAVIOR_FLAG_VALID(f) \
1252326332eSanish 	    (((f) == DDI_INTR_ALLOC_NORMAL) || ((f) == DDI_INTR_ALLOC_STRICT))
1262326332eSanish 
127d626b9f5Sanish #define	DDI_INTR_TYPE_FLAG_VALID(t) \
128d626b9f5Sanish 	    (((t) == DDI_INTR_TYPE_FIXED) || \
129d626b9f5Sanish 	    ((t) == DDI_INTR_TYPE_MSI) || \
130d626b9f5Sanish 	    ((t) == DDI_INTR_TYPE_MSIX))
131d626b9f5Sanish 
13220036fe5Segillett /* values for ih_flags */
13320036fe5Segillett #define	DDI_INTR_MSIX_DUP	0x01	/* MSI-X vector which has been dupped */
13420036fe5Segillett 
135*ef643aefSegillett /* Maximum number of MSI resources to allocate */
136*ef643aefSegillett #define	DDI_MAX_MSI_ALLOC	2
137*ef643aefSegillett 
138*ef643aefSegillett /*
139*ef643aefSegillett  * The following MSI-X limits will change with Interrupt Resource Management
140*ef643aefSegillett  * (IRM) support.
141*ef643aefSegillett  */
142*ef643aefSegillett /* Default number of MSI-X resources to allocate */
143*ef643aefSegillett #define	DDI_DEFAULT_MSIX_ALLOC	2
144*ef643aefSegillett 
145*ef643aefSegillett /* Maximum number of MSI-X resources to allocate */
146*ef643aefSegillett #define	DDI_MAX_MSIX_ALLOC	8
147d84bdf75Segillett 
148e23a7e34Slq struct av_softinfo;
149e23a7e34Slq 
1507c478bd9Sstevel@tonic-gate /*
1517c478bd9Sstevel@tonic-gate  * One such data structure is allocated per ddi_soft_intr_handle
1527c478bd9Sstevel@tonic-gate  * This is the incore copy of the softint info.
1537c478bd9Sstevel@tonic-gate  */
1547c478bd9Sstevel@tonic-gate typedef struct ddi_softint_hdl_impl {
1557c478bd9Sstevel@tonic-gate 	dev_info_t	*ih_dip;		/* dip associated with handle */
1567c478bd9Sstevel@tonic-gate 	uint_t		ih_pri;			/* priority - bus dependent */
1577c478bd9Sstevel@tonic-gate 	krwlock_t	ih_rwlock;		/* read/write lock per handle */
158e23a7e34Slq 	struct av_softinfo *ih_pending;		/* whether softint is pending */
1597c478bd9Sstevel@tonic-gate 
1607c478bd9Sstevel@tonic-gate 	uint_t		(*ih_cb_func)(caddr_t, caddr_t);
1617c478bd9Sstevel@tonic-gate 						/* cb function for soft ints */
1627c478bd9Sstevel@tonic-gate 	void		*ih_cb_arg1;		/* arg1 of callback function */
1637c478bd9Sstevel@tonic-gate 	void		*ih_cb_arg2;		/* arg2 passed to "trigger" */
1647c478bd9Sstevel@tonic-gate 
1657c478bd9Sstevel@tonic-gate 	/*
1667c478bd9Sstevel@tonic-gate 	 * The next member is for 'scratch' purpose only.
1677c478bd9Sstevel@tonic-gate 	 * The DDI interrupt framework uses it internally and its
1687c478bd9Sstevel@tonic-gate 	 * interpretation is left to the framework.
1697c478bd9Sstevel@tonic-gate 	 *	private		- used by the DDI framework to pass back
1707c478bd9Sstevel@tonic-gate 	 *			  and forth 'softid' information on SPARC
1717c478bd9Sstevel@tonic-gate 	 *			  side only. Not used on X86 platform.
1727c478bd9Sstevel@tonic-gate 	 */
1737c478bd9Sstevel@tonic-gate 	void		*ih_private;		/* Platform specific data */
1747c478bd9Sstevel@tonic-gate } ddi_softint_hdl_impl_t;
1757c478bd9Sstevel@tonic-gate 
1767c478bd9Sstevel@tonic-gate /* Softint internal implementation defines */
1777c478bd9Sstevel@tonic-gate #define	DDI_SOFT_INTR_PRI_M	4
1787c478bd9Sstevel@tonic-gate #define	DDI_SOFT_INTR_PRI_H	6
1797c478bd9Sstevel@tonic-gate 
1807c478bd9Sstevel@tonic-gate /*
1817c478bd9Sstevel@tonic-gate  * One such data structure is allocated for MSI-X enabled
1827c478bd9Sstevel@tonic-gate  * device. If no MSI-X is enabled then it is NULL
1837c478bd9Sstevel@tonic-gate  */
1847c478bd9Sstevel@tonic-gate typedef struct ddi_intr_msix {
1857c478bd9Sstevel@tonic-gate 	/* MSI-X Table related information */
1867c478bd9Sstevel@tonic-gate 	ddi_acc_handle_t	msix_tbl_hdl;		/* MSI-X table handle */
1879c75c6bfSgovinda 	uint32_t		*msix_tbl_addr;		/* MSI-X table addr */
1889c75c6bfSgovinda 	uint32_t		msix_tbl_offset;	/* MSI-X table offset */
1897c478bd9Sstevel@tonic-gate 
1907c478bd9Sstevel@tonic-gate 	/* MSI-X PBA Table related information */
1917c478bd9Sstevel@tonic-gate 	ddi_acc_handle_t	msix_pba_hdl;		/* MSI-X PBA handle */
1929c75c6bfSgovinda 	uint32_t		*msix_pba_addr;		/* MSI-X PBA addr */
1939c75c6bfSgovinda 	uint32_t		msix_pba_offset;	/* MSI-X PBA offset */
1947c478bd9Sstevel@tonic-gate 
1957c478bd9Sstevel@tonic-gate 	ddi_device_acc_attr_t	msix_dev_attr;		/* MSI-X device attr */
1967c478bd9Sstevel@tonic-gate } ddi_intr_msix_t;
1977c478bd9Sstevel@tonic-gate 
1987c478bd9Sstevel@tonic-gate 
1997c478bd9Sstevel@tonic-gate /*
2007c478bd9Sstevel@tonic-gate  * One such data structure is allocated for each dip.
2017c478bd9Sstevel@tonic-gate  * It has interrupt related information that can be
2027c478bd9Sstevel@tonic-gate  * stored/retrieved for convenience.
2037c478bd9Sstevel@tonic-gate  */
2047c478bd9Sstevel@tonic-gate typedef struct devinfo_intr {
2057c478bd9Sstevel@tonic-gate 	/* These three fields show what the device is capable of */
2067c478bd9Sstevel@tonic-gate 	uint_t		devi_intr_sup_types;	/* Intrs supported by device */
2077c478bd9Sstevel@tonic-gate 
2087c478bd9Sstevel@tonic-gate 	ddi_intr_msix_t	*devi_msix_p;		/* MSI-X info, if supported */
2097c478bd9Sstevel@tonic-gate 
2107c478bd9Sstevel@tonic-gate 	/* Next three fields show current status for the device */
2117c478bd9Sstevel@tonic-gate 	uint_t		devi_intr_curr_type;	/* Interrupt type being used */
2127c478bd9Sstevel@tonic-gate 	uint_t		devi_intr_sup_nintrs;	/* #intr supported */
2137c478bd9Sstevel@tonic-gate 	uint_t		devi_intr_curr_nintrs;	/* #intr currently being used */
2147c478bd9Sstevel@tonic-gate 
2157c478bd9Sstevel@tonic-gate 	ddi_intr_handle_t **devi_intr_handle_p;	/* Hdl for legacy intr APIs */
216d12abe7cSanish 
217d12abe7cSanish #if defined(__i386) || defined(__amd64)
218d12abe7cSanish 	/* Save the PCI config space handle */
219d12abe7cSanish 	ddi_acc_handle_t devi_cfg_handle;
220d12abe7cSanish 	int		 devi_cap_ptr;		/* MSI or MSI-X cap pointer */
221d12abe7cSanish #endif
2227c478bd9Sstevel@tonic-gate } devinfo_intr_t;
2237c478bd9Sstevel@tonic-gate 
2247c478bd9Sstevel@tonic-gate #define	NEXUS_HAS_INTR_OP(dip)	\
2257c478bd9Sstevel@tonic-gate 	((DEVI(dip)->devi_ops->devo_bus_ops) && \
2267c478bd9Sstevel@tonic-gate 	(DEVI(dip)->devi_ops->devo_bus_ops->busops_rev >= BUSO_REV_9) && \
2277c478bd9Sstevel@tonic-gate 	(DEVI(dip)->devi_ops->devo_bus_ops->bus_intr_op))
2287c478bd9Sstevel@tonic-gate 
2297c478bd9Sstevel@tonic-gate int	i_ddi_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t op,
2307c478bd9Sstevel@tonic-gate 	    ddi_intr_handle_impl_t *hdlp, void *result);
2317c478bd9Sstevel@tonic-gate 
2327c478bd9Sstevel@tonic-gate int	i_ddi_add_softint(ddi_softint_hdl_impl_t *);
2337c478bd9Sstevel@tonic-gate void	i_ddi_remove_softint(ddi_softint_hdl_impl_t *);
234b08160e2Sgovinda int	i_ddi_trigger_softint(ddi_softint_hdl_impl_t *, void *);
2357c478bd9Sstevel@tonic-gate int	i_ddi_set_softint_pri(ddi_softint_hdl_impl_t *, uint_t);
2367c478bd9Sstevel@tonic-gate 
2377c478bd9Sstevel@tonic-gate void	i_ddi_intr_devi_init(dev_info_t *dip);
2387c478bd9Sstevel@tonic-gate void	i_ddi_intr_devi_fini(dev_info_t *dip);
2397c478bd9Sstevel@tonic-gate 
2407c478bd9Sstevel@tonic-gate uint_t	i_ddi_intr_get_supported_types(dev_info_t *dip);
2417c478bd9Sstevel@tonic-gate void	i_ddi_intr_set_supported_types(dev_info_t *dip, int sup_type);
2427c478bd9Sstevel@tonic-gate uint_t	i_ddi_intr_get_current_type(dev_info_t *dip);
2437c478bd9Sstevel@tonic-gate void	i_ddi_intr_set_current_type(dev_info_t *dip, int intr_type);
2447c478bd9Sstevel@tonic-gate uint_t	i_ddi_intr_get_supported_nintrs(dev_info_t *dip, int intr_type);
2457c478bd9Sstevel@tonic-gate void	i_ddi_intr_set_supported_nintrs(dev_info_t *dip, int nintrs);
2467c478bd9Sstevel@tonic-gate uint_t	i_ddi_intr_get_current_nintrs(dev_info_t *dip);
2477c478bd9Sstevel@tonic-gate void	i_ddi_intr_set_current_nintrs(dev_info_t *dip, int nintrs);
2487c478bd9Sstevel@tonic-gate 
249a195726fSgovinda ddi_intr_handle_t *i_ddi_get_intr_handle(dev_info_t *dip, int inum);
2507c478bd9Sstevel@tonic-gate void	i_ddi_set_intr_handle(dev_info_t *dip, int inum,
2517c478bd9Sstevel@tonic-gate 	    ddi_intr_handle_t *hdlp);
2527c478bd9Sstevel@tonic-gate 
2537c478bd9Sstevel@tonic-gate ddi_intr_msix_t	*i_ddi_get_msix(dev_info_t *dip);
2547c478bd9Sstevel@tonic-gate void	i_ddi_set_msix(dev_info_t *dip, ddi_intr_msix_t *msix_p);
2557c478bd9Sstevel@tonic-gate 
256d12abe7cSanish #if defined(__i386) || defined(__amd64)
257d12abe7cSanish ddi_acc_handle_t	i_ddi_get_pci_config_handle(dev_info_t *dip);
258d12abe7cSanish void	i_ddi_set_pci_config_handle(dev_info_t *dip, ddi_acc_handle_t handle);
259d12abe7cSanish int	i_ddi_get_msi_msix_cap_ptr(dev_info_t *dip);
260d12abe7cSanish void	i_ddi_set_msi_msix_cap_ptr(dev_info_t *dip, int cap_ptr);
261d12abe7cSanish #endif
262d12abe7cSanish 
263*ef643aefSegillett uint_t	i_ddi_get_msix_alloc_limit(dev_info_t *dip);
264*ef643aefSegillett 
2657c478bd9Sstevel@tonic-gate int32_t i_ddi_get_intr_weight(dev_info_t *);
2667c478bd9Sstevel@tonic-gate int32_t i_ddi_set_intr_weight(dev_info_t *, int32_t);
2677c478bd9Sstevel@tonic-gate 
2687a364d25Sschwartz void	i_ddi_alloc_intr_phdl(ddi_intr_handle_impl_t *);
2697a364d25Sschwartz void	i_ddi_free_intr_phdl(ddi_intr_handle_impl_t *);
2707a364d25Sschwartz 
2717c478bd9Sstevel@tonic-gate #define	DDI_INTR_ASSIGN_HDLR_N_ARGS(hdlp, func, arg1, arg2) \
2727c478bd9Sstevel@tonic-gate 	hdlp->ih_cb_func = func; \
2737c478bd9Sstevel@tonic-gate 	hdlp->ih_cb_arg1 = arg1; \
2747c478bd9Sstevel@tonic-gate 	hdlp->ih_cb_arg2 = arg2;
2757c478bd9Sstevel@tonic-gate 
27620036fe5Segillett #ifdef DEBUG
27720036fe5Segillett #define	I_DDI_VERIFY_MSIX_HANDLE(hdlp)					\
27820036fe5Segillett 	if ((hdlp->ih_type == DDI_INTR_TYPE_MSIX) && 			\
27920036fe5Segillett 	    (hdlp->ih_flags & DDI_INTR_MSIX_DUP)) {			\
28020036fe5Segillett 		ASSERT(hdlp->ih_dip == hdlp->ih_main->ih_dip);		\
28120036fe5Segillett 		ASSERT(hdlp->ih_type == hdlp->ih_main->ih_type);	\
28220036fe5Segillett 		ASSERT(hdlp->ih_vector == hdlp->ih_main->ih_vector);	\
28320036fe5Segillett 		ASSERT(hdlp->ih_ver == hdlp->ih_main->ih_ver);		\
28420036fe5Segillett 		ASSERT(hdlp->ih_cap == hdlp->ih_main->ih_cap);		\
28520036fe5Segillett 		ASSERT(hdlp->ih_pri == hdlp->ih_main->ih_pri);		\
28620036fe5Segillett 	}
28720036fe5Segillett #else
28820036fe5Segillett #define	I_DDI_VERIFY_MSIX_HANDLE(hdlp)
28920036fe5Segillett #endif
29020036fe5Segillett 
2917c478bd9Sstevel@tonic-gate #else	/* _KERNEL */
2927c478bd9Sstevel@tonic-gate 
2937c478bd9Sstevel@tonic-gate typedef struct devinfo_intr devinfo_intr_t;
2947c478bd9Sstevel@tonic-gate 
2957c478bd9Sstevel@tonic-gate #endif	/* _KERNEL */
2967c478bd9Sstevel@tonic-gate 
2977c478bd9Sstevel@tonic-gate /*
2987c478bd9Sstevel@tonic-gate  * Used only by old DDI interrupt interfaces.
2997c478bd9Sstevel@tonic-gate  */
3007c478bd9Sstevel@tonic-gate 
3017c478bd9Sstevel@tonic-gate /*
3027c478bd9Sstevel@tonic-gate  * This structure represents one interrupt possible from the given
3037c478bd9Sstevel@tonic-gate  * device. It is used in an array for devices with multiple interrupts.
3047c478bd9Sstevel@tonic-gate  */
3057c478bd9Sstevel@tonic-gate struct intrspec {
3067c478bd9Sstevel@tonic-gate 	uint_t intrspec_pri;		/* interrupt priority */
3077c478bd9Sstevel@tonic-gate 	uint_t intrspec_vec;		/* vector # (0 if none) */
3087c478bd9Sstevel@tonic-gate 	uint_t (*intrspec_func)();	/* function to call for interrupt, */
3097c478bd9Sstevel@tonic-gate 					/* If (uint_t (*)()) 0, none. */
3107c478bd9Sstevel@tonic-gate 					/* If (uint_t (*)()) 1, then */
3117c478bd9Sstevel@tonic-gate };
3127c478bd9Sstevel@tonic-gate 
3137c478bd9Sstevel@tonic-gate #ifdef _KERNEL
3147c478bd9Sstevel@tonic-gate 
315a54f81fbSanish /*
316a54f81fbSanish  * Figure out how many FIXED nintrs are supported
317a54f81fbSanish  */
318a54f81fbSanish int	i_ddi_get_intx_nintrs(dev_info_t *dip);
319a54f81fbSanish 
3207c478bd9Sstevel@tonic-gate /*
3217c478bd9Sstevel@tonic-gate  * NOTE:
3227c478bd9Sstevel@tonic-gate  *	The following 4 busops entry points are obsoleted with version
3237c478bd9Sstevel@tonic-gate  *	9 or greater. Use i_ddi_intr_op interface in place of these
3247c478bd9Sstevel@tonic-gate  *	obsolete interfaces.
3257c478bd9Sstevel@tonic-gate  *
3267c478bd9Sstevel@tonic-gate  *	Remove these busops entry points and all related data structures
3277c478bd9Sstevel@tonic-gate  *	in future minor/major solaris release.
3287c478bd9Sstevel@tonic-gate  */
3297c478bd9Sstevel@tonic-gate typedef enum {DDI_INTR_CTLOPS_NONE} ddi_intr_ctlop_t;
3307c478bd9Sstevel@tonic-gate 
331d84bdf75Segillett /* The following are obsolete interfaces */
3327c478bd9Sstevel@tonic-gate ddi_intrspec_t	i_ddi_get_intrspec(dev_info_t *dip, dev_info_t *rdip,
3337c478bd9Sstevel@tonic-gate 	    uint_t inumber);
3347c478bd9Sstevel@tonic-gate 
3357c478bd9Sstevel@tonic-gate int	i_ddi_add_intrspec(dev_info_t *dip, dev_info_t *rdip,
3367c478bd9Sstevel@tonic-gate 	    ddi_intrspec_t intrspec, ddi_iblock_cookie_t *iblock_cookiep,
3377c478bd9Sstevel@tonic-gate 	    ddi_idevice_cookie_t *idevice_cookiep,
3387c478bd9Sstevel@tonic-gate 	    uint_t (*int_handler)(caddr_t int_handler_arg),
3397c478bd9Sstevel@tonic-gate 	    caddr_t int_handler_arg, int kind);
3407c478bd9Sstevel@tonic-gate 
3417c478bd9Sstevel@tonic-gate void	i_ddi_remove_intrspec(dev_info_t *dip, dev_info_t *rdip,
3427c478bd9Sstevel@tonic-gate 	    ddi_intrspec_t intrspec, ddi_iblock_cookie_t iblock_cookie);
3437c478bd9Sstevel@tonic-gate 
3447c478bd9Sstevel@tonic-gate int	i_ddi_intr_ctlops(dev_info_t *dip, dev_info_t *rdip,
3457c478bd9Sstevel@tonic-gate 	    ddi_intr_ctlop_t op, void *arg, void *val);
3467c478bd9Sstevel@tonic-gate 
3477c478bd9Sstevel@tonic-gate #endif	/* _KERNEL */
3487c478bd9Sstevel@tonic-gate 
3497c478bd9Sstevel@tonic-gate #ifdef	__cplusplus
3507c478bd9Sstevel@tonic-gate }
3517c478bd9Sstevel@tonic-gate #endif
3527c478bd9Sstevel@tonic-gate 
3537c478bd9Sstevel@tonic-gate #endif	/* _SYS_DDI_INTR_IMPL_H */
354