1*7c478bd9Sstevel@tonic-gate /*
2*7c478bd9Sstevel@tonic-gate  * CDDL HEADER START
3*7c478bd9Sstevel@tonic-gate  *
4*7c478bd9Sstevel@tonic-gate  * The contents of this file are subject to the terms of the
5*7c478bd9Sstevel@tonic-gate  * Common Development and Distribution License, Version 1.0 only
6*7c478bd9Sstevel@tonic-gate  * (the "License").  You may not use this file except in compliance
7*7c478bd9Sstevel@tonic-gate  * with the License.
8*7c478bd9Sstevel@tonic-gate  *
9*7c478bd9Sstevel@tonic-gate  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10*7c478bd9Sstevel@tonic-gate  * or http://www.opensolaris.org/os/licensing.
11*7c478bd9Sstevel@tonic-gate  * See the License for the specific language governing permissions
12*7c478bd9Sstevel@tonic-gate  * and limitations under the License.
13*7c478bd9Sstevel@tonic-gate  *
14*7c478bd9Sstevel@tonic-gate  * When distributing Covered Code, include this CDDL HEADER in each
15*7c478bd9Sstevel@tonic-gate  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16*7c478bd9Sstevel@tonic-gate  * If applicable, add the following below this CDDL HEADER, with the
17*7c478bd9Sstevel@tonic-gate  * fields enclosed by brackets "[]" replaced with your own identifying
18*7c478bd9Sstevel@tonic-gate  * information: Portions Copyright [yyyy] [name of copyright owner]
19*7c478bd9Sstevel@tonic-gate  *
20*7c478bd9Sstevel@tonic-gate  * CDDL HEADER END
21*7c478bd9Sstevel@tonic-gate  */
22*7c478bd9Sstevel@tonic-gate /*
23*7c478bd9Sstevel@tonic-gate  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
24*7c478bd9Sstevel@tonic-gate  * Use is subject to license terms.
25*7c478bd9Sstevel@tonic-gate  */
26*7c478bd9Sstevel@tonic-gate 
27*7c478bd9Sstevel@tonic-gate #ifndef	_SYS_DDI_INTR_IMPL_H
28*7c478bd9Sstevel@tonic-gate #define	_SYS_DDI_INTR_IMPL_H
29*7c478bd9Sstevel@tonic-gate 
30*7c478bd9Sstevel@tonic-gate #pragma ident	"%Z%%M%	%I%	%E% SMI"
31*7c478bd9Sstevel@tonic-gate 
32*7c478bd9Sstevel@tonic-gate /*
33*7c478bd9Sstevel@tonic-gate  * Sun DDI interrupt implementation specific definitions
34*7c478bd9Sstevel@tonic-gate  */
35*7c478bd9Sstevel@tonic-gate 
36*7c478bd9Sstevel@tonic-gate #ifdef	__cplusplus
37*7c478bd9Sstevel@tonic-gate extern "C" {
38*7c478bd9Sstevel@tonic-gate #endif
39*7c478bd9Sstevel@tonic-gate 
40*7c478bd9Sstevel@tonic-gate #ifdef _KERNEL
41*7c478bd9Sstevel@tonic-gate 
42*7c478bd9Sstevel@tonic-gate /*
43*7c478bd9Sstevel@tonic-gate  * Typedef for interrupt ops
44*7c478bd9Sstevel@tonic-gate  */
45*7c478bd9Sstevel@tonic-gate typedef enum {
46*7c478bd9Sstevel@tonic-gate 	DDI_INTROP_SUPPORTED_TYPES = 1,	/* 1 get supported interrupts types */
47*7c478bd9Sstevel@tonic-gate 	DDI_INTROP_NINTRS,		/* 2 get num of interrupts supported */
48*7c478bd9Sstevel@tonic-gate 	DDI_INTROP_ALLOC,		/* 3 allocate interrupt handle */
49*7c478bd9Sstevel@tonic-gate 	DDI_INTROP_GETPRI,		/* 4 get priority */
50*7c478bd9Sstevel@tonic-gate 	DDI_INTROP_SETPRI,		/* 5 set priority */
51*7c478bd9Sstevel@tonic-gate 	DDI_INTROP_ADDISR,		/* 6 add interrupt handler */
52*7c478bd9Sstevel@tonic-gate 	DDI_INTROP_DUPVEC,		/* 7 duplicate interrupt handler */
53*7c478bd9Sstevel@tonic-gate 	DDI_INTROP_ENABLE,		/* 8 enable interrupt */
54*7c478bd9Sstevel@tonic-gate 	DDI_INTROP_BLOCKENABLE,		/* 9 block enable interrupts */
55*7c478bd9Sstevel@tonic-gate 	DDI_INTROP_BLOCKDISABLE,	/* 10 block disable interrupts */
56*7c478bd9Sstevel@tonic-gate 	DDI_INTROP_DISABLE,		/* 11 disable interrupt */
57*7c478bd9Sstevel@tonic-gate 	DDI_INTROP_REMISR,		/* 12 remove interrupt handler */
58*7c478bd9Sstevel@tonic-gate 	DDI_INTROP_FREE,		/* 13 free interrupt handle */
59*7c478bd9Sstevel@tonic-gate 	DDI_INTROP_GETCAP,		/* 14 get capacity */
60*7c478bd9Sstevel@tonic-gate 	DDI_INTROP_SETCAP,		/* 15 set capacity */
61*7c478bd9Sstevel@tonic-gate 	DDI_INTROP_SETMASK,		/* 16 set mask */
62*7c478bd9Sstevel@tonic-gate 	DDI_INTROP_CLRMASK,		/* 17 clear mask */
63*7c478bd9Sstevel@tonic-gate 	DDI_INTROP_GETPENDING,		/* 18 get pending interrupt */
64*7c478bd9Sstevel@tonic-gate 	DDI_INTROP_NAVAIL		/* 19 get num of available interrupts */
65*7c478bd9Sstevel@tonic-gate } ddi_intr_op_t;
66*7c478bd9Sstevel@tonic-gate 
67*7c478bd9Sstevel@tonic-gate /* Version number used in the handles */
68*7c478bd9Sstevel@tonic-gate #define	DDI_INTR_VERSION_1	1
69*7c478bd9Sstevel@tonic-gate #define	DDI_INTR_VERSION	DDI_INTR_VERSION_1
70*7c478bd9Sstevel@tonic-gate 
71*7c478bd9Sstevel@tonic-gate /*
72*7c478bd9Sstevel@tonic-gate  * One such data structure is allocated per ddi_intr_handle_t
73*7c478bd9Sstevel@tonic-gate  * This is the incore copy of the regular interrupt info.
74*7c478bd9Sstevel@tonic-gate  */
75*7c478bd9Sstevel@tonic-gate typedef struct ddi_intr_handle_impl {
76*7c478bd9Sstevel@tonic-gate 	dev_info_t		*ih_dip;	/* dip associated with handle */
77*7c478bd9Sstevel@tonic-gate 	uint16_t		ih_type;	/* interrupt type being used */
78*7c478bd9Sstevel@tonic-gate 	ushort_t		ih_inum;	/* interrupt number */
79*7c478bd9Sstevel@tonic-gate 	ushort_t		ih_vector;	/* vector number */
80*7c478bd9Sstevel@tonic-gate 	uint16_t		ih_ver;		/* Version */
81*7c478bd9Sstevel@tonic-gate 	uint_t			ih_state;	/* interrupt handle state */
82*7c478bd9Sstevel@tonic-gate 	uint_t			ih_cap;		/* interrupt capabilities */
83*7c478bd9Sstevel@tonic-gate 	uint_t			ih_pri;		/* priority - bus dependent */
84*7c478bd9Sstevel@tonic-gate 	krwlock_t		ih_rwlock;	/* read/write lock per handle */
85*7c478bd9Sstevel@tonic-gate 
86*7c478bd9Sstevel@tonic-gate 	uint_t			(*ih_cb_func)(caddr_t, caddr_t);
87*7c478bd9Sstevel@tonic-gate 	void			*ih_cb_arg1;
88*7c478bd9Sstevel@tonic-gate 	void			*ih_cb_arg2;
89*7c478bd9Sstevel@tonic-gate 
90*7c478bd9Sstevel@tonic-gate 	/*
91*7c478bd9Sstevel@tonic-gate 	 * The next set of members are for 'scratch' purpose only.
92*7c478bd9Sstevel@tonic-gate 	 * The DDI interrupt framework uses them internally and their
93*7c478bd9Sstevel@tonic-gate 	 * interpretation is left to the framework. For now,
94*7c478bd9Sstevel@tonic-gate 	 *	scratch1	- used to send NINTRs information
95*7c478bd9Sstevel@tonic-gate 	 *			  to various nexus drivers.
96*7c478bd9Sstevel@tonic-gate 	 *	scratch2	- used to send 'behavior' flag
97*7c478bd9Sstevel@tonic-gate 	 *			  information to the nexus drivers
98*7c478bd9Sstevel@tonic-gate 	 *			  from ddi_intr_alloc()
99*7c478bd9Sstevel@tonic-gate 	 *	private		- used by the DDI framework to
100*7c478bd9Sstevel@tonic-gate 	 *			  pass back and forth 'vector' information
101*7c478bd9Sstevel@tonic-gate 	 *			  It is extensively used on the SPARC side
102*7c478bd9Sstevel@tonic-gate 	 *			  to temporarily hold the 'ddi_ispec_t'
103*7c478bd9Sstevel@tonic-gate 	 */
104*7c478bd9Sstevel@tonic-gate 	void			*ih_private;	/* Platform specific data */
105*7c478bd9Sstevel@tonic-gate 	uint_t			ih_scratch1;	/* Scratch1: #interrupts */
106*7c478bd9Sstevel@tonic-gate 	uint_t			ih_scratch2;	/* Scratch2: flag */
107*7c478bd9Sstevel@tonic-gate } ddi_intr_handle_impl_t;
108*7c478bd9Sstevel@tonic-gate 
109*7c478bd9Sstevel@tonic-gate /* values for ih_state (strictly for interrupt handle) */
110*7c478bd9Sstevel@tonic-gate #define	DDI_IHDL_STATE_ALLOC	0x01	/* Allocated. ddi_intr_alloc() called */
111*7c478bd9Sstevel@tonic-gate #define	DDI_IHDL_STATE_ADDED	0x02	/* Added interrupt handler */
112*7c478bd9Sstevel@tonic-gate 					/* ddi_intr_add_handler() called */
113*7c478bd9Sstevel@tonic-gate #define	DDI_IHDL_STATE_ENABLE	0x04	/* Enabled. ddi_intr_enable() called */
114*7c478bd9Sstevel@tonic-gate 
115*7c478bd9Sstevel@tonic-gate #define	DDI_INTR_IS_MSI_OR_MSIX(type) \
116*7c478bd9Sstevel@tonic-gate 	((type) == DDI_INTR_TYPE_MSI || (type) == DDI_INTR_TYPE_MSIX)
117*7c478bd9Sstevel@tonic-gate 
118*7c478bd9Sstevel@tonic-gate /*
119*7c478bd9Sstevel@tonic-gate  * One such data structure is allocated per ddi_soft_intr_handle
120*7c478bd9Sstevel@tonic-gate  * This is the incore copy of the softint info.
121*7c478bd9Sstevel@tonic-gate  */
122*7c478bd9Sstevel@tonic-gate typedef struct ddi_softint_hdl_impl {
123*7c478bd9Sstevel@tonic-gate 	dev_info_t	*ih_dip;		/* dip associated with handle */
124*7c478bd9Sstevel@tonic-gate 	uint_t		ih_pri;			/* priority - bus dependent */
125*7c478bd9Sstevel@tonic-gate 	krwlock_t	ih_rwlock;		/* read/write lock per handle */
126*7c478bd9Sstevel@tonic-gate 	uint_t		ih_pending;		/* whether softint is pending */
127*7c478bd9Sstevel@tonic-gate 
128*7c478bd9Sstevel@tonic-gate 	uint_t		(*ih_cb_func)(caddr_t, caddr_t);
129*7c478bd9Sstevel@tonic-gate 						/* cb function for soft ints */
130*7c478bd9Sstevel@tonic-gate 	void		*ih_cb_arg1;		/* arg1 of callback function */
131*7c478bd9Sstevel@tonic-gate 	void		*ih_cb_arg2;		/* arg2 passed to "trigger" */
132*7c478bd9Sstevel@tonic-gate 
133*7c478bd9Sstevel@tonic-gate 	/*
134*7c478bd9Sstevel@tonic-gate 	 * The next member is for 'scratch' purpose only.
135*7c478bd9Sstevel@tonic-gate 	 * The DDI interrupt framework uses it internally and its
136*7c478bd9Sstevel@tonic-gate 	 * interpretation is left to the framework.
137*7c478bd9Sstevel@tonic-gate 	 *	private		- used by the DDI framework to pass back
138*7c478bd9Sstevel@tonic-gate 	 *			  and forth 'softid' information on SPARC
139*7c478bd9Sstevel@tonic-gate 	 *			  side only. Not used on X86 platform.
140*7c478bd9Sstevel@tonic-gate 	 */
141*7c478bd9Sstevel@tonic-gate 	void		*ih_private;		/* Platform specific data */
142*7c478bd9Sstevel@tonic-gate } ddi_softint_hdl_impl_t;
143*7c478bd9Sstevel@tonic-gate 
144*7c478bd9Sstevel@tonic-gate /* Softint internal implementation defines */
145*7c478bd9Sstevel@tonic-gate #define	DDI_SOFT_INTR_PRI_M	4
146*7c478bd9Sstevel@tonic-gate #define	DDI_SOFT_INTR_PRI_H	6
147*7c478bd9Sstevel@tonic-gate 
148*7c478bd9Sstevel@tonic-gate /*
149*7c478bd9Sstevel@tonic-gate  * One such data structure is allocated for MSI-X enabled
150*7c478bd9Sstevel@tonic-gate  * device. If no MSI-X is enabled then it is NULL
151*7c478bd9Sstevel@tonic-gate  */
152*7c478bd9Sstevel@tonic-gate typedef struct ddi_intr_msix {
153*7c478bd9Sstevel@tonic-gate 	uint_t			msix_intrs_in_use;	/* MSI-X intrs in use */
154*7c478bd9Sstevel@tonic-gate 
155*7c478bd9Sstevel@tonic-gate 	/* MSI-X Table related information */
156*7c478bd9Sstevel@tonic-gate 	ddi_acc_handle_t	msix_tbl_hdl;		/* MSI-X table handle */
157*7c478bd9Sstevel@tonic-gate 	caddr_t			msix_tbl_addr;		/* MSI-X table addr */
158*7c478bd9Sstevel@tonic-gate 	offset_t		msix_tbl_offset;	/* MSI-X table offset */
159*7c478bd9Sstevel@tonic-gate 
160*7c478bd9Sstevel@tonic-gate 	/* MSI-X PBA Table related information */
161*7c478bd9Sstevel@tonic-gate 	ddi_acc_handle_t	msix_pba_hdl;		/* MSI-X PBA handle */
162*7c478bd9Sstevel@tonic-gate 	caddr_t			msix_pba_addr;		/* MSI-X PBA addr */
163*7c478bd9Sstevel@tonic-gate 	offset_t		msix_pba_offset;	/* MSI-X PBA offset */
164*7c478bd9Sstevel@tonic-gate 
165*7c478bd9Sstevel@tonic-gate 	ddi_device_acc_attr_t	msix_dev_attr;		/* MSI-X device attr */
166*7c478bd9Sstevel@tonic-gate } ddi_intr_msix_t;
167*7c478bd9Sstevel@tonic-gate 
168*7c478bd9Sstevel@tonic-gate 
169*7c478bd9Sstevel@tonic-gate /*
170*7c478bd9Sstevel@tonic-gate  * One such data structure is allocated for each dip.
171*7c478bd9Sstevel@tonic-gate  * It has interrupt related information that can be
172*7c478bd9Sstevel@tonic-gate  * stored/retrieved for convenience.
173*7c478bd9Sstevel@tonic-gate  */
174*7c478bd9Sstevel@tonic-gate typedef struct devinfo_intr {
175*7c478bd9Sstevel@tonic-gate 	/* These three fields show what the device is capable of */
176*7c478bd9Sstevel@tonic-gate 	uint_t		devi_intr_sup_types;	/* Intrs supported by device */
177*7c478bd9Sstevel@tonic-gate 
178*7c478bd9Sstevel@tonic-gate 	ddi_intr_msix_t	*devi_msix_p;		/* MSI-X info, if supported */
179*7c478bd9Sstevel@tonic-gate 
180*7c478bd9Sstevel@tonic-gate 	/* Next three fields show current status for the device */
181*7c478bd9Sstevel@tonic-gate 	uint_t		devi_intr_curr_type;	/* Interrupt type being used */
182*7c478bd9Sstevel@tonic-gate 	uint_t		devi_intr_sup_nintrs;	/* #intr supported */
183*7c478bd9Sstevel@tonic-gate 	uint_t		devi_intr_curr_nintrs;	/* #intr currently being used */
184*7c478bd9Sstevel@tonic-gate 
185*7c478bd9Sstevel@tonic-gate 	ddi_intr_handle_t **devi_intr_handle_p;	/* Hdl for legacy intr APIs */
186*7c478bd9Sstevel@tonic-gate } devinfo_intr_t;
187*7c478bd9Sstevel@tonic-gate 
188*7c478bd9Sstevel@tonic-gate #define	NEXUS_HAS_INTR_OP(dip)	\
189*7c478bd9Sstevel@tonic-gate 	((DEVI(dip)->devi_ops->devo_bus_ops) && \
190*7c478bd9Sstevel@tonic-gate 	(DEVI(dip)->devi_ops->devo_bus_ops->busops_rev >= BUSO_REV_9) && \
191*7c478bd9Sstevel@tonic-gate 	(DEVI(dip)->devi_ops->devo_bus_ops->bus_intr_op))
192*7c478bd9Sstevel@tonic-gate 
193*7c478bd9Sstevel@tonic-gate int	i_ddi_handle_intr_ops(dev_info_t *dip, dev_info_t *rdip,
194*7c478bd9Sstevel@tonic-gate 	    ddi_intr_op_t op, ddi_intr_handle_impl_t *hdlp, void *result);
195*7c478bd9Sstevel@tonic-gate int	i_ddi_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t op,
196*7c478bd9Sstevel@tonic-gate 	    ddi_intr_handle_impl_t *hdlp, void *result);
197*7c478bd9Sstevel@tonic-gate 
198*7c478bd9Sstevel@tonic-gate int	i_ddi_add_softint(ddi_softint_hdl_impl_t *);
199*7c478bd9Sstevel@tonic-gate void	i_ddi_remove_softint(ddi_softint_hdl_impl_t *);
200*7c478bd9Sstevel@tonic-gate int	i_ddi_trigger_softint(ddi_softint_hdl_impl_t *);
201*7c478bd9Sstevel@tonic-gate int	i_ddi_set_softint_pri(ddi_softint_hdl_impl_t *, uint_t);
202*7c478bd9Sstevel@tonic-gate 
203*7c478bd9Sstevel@tonic-gate void	i_ddi_intr_devi_init(dev_info_t *dip);
204*7c478bd9Sstevel@tonic-gate void	i_ddi_intr_devi_fini(dev_info_t *dip);
205*7c478bd9Sstevel@tonic-gate 
206*7c478bd9Sstevel@tonic-gate uint_t	i_ddi_intr_get_supported_types(dev_info_t *dip);
207*7c478bd9Sstevel@tonic-gate void	i_ddi_intr_set_supported_types(dev_info_t *dip, int sup_type);
208*7c478bd9Sstevel@tonic-gate uint_t	i_ddi_intr_get_current_type(dev_info_t *dip);
209*7c478bd9Sstevel@tonic-gate void	i_ddi_intr_set_current_type(dev_info_t *dip, int intr_type);
210*7c478bd9Sstevel@tonic-gate uint_t	i_ddi_intr_get_supported_nintrs(dev_info_t *dip, int intr_type);
211*7c478bd9Sstevel@tonic-gate void	i_ddi_intr_set_supported_nintrs(dev_info_t *dip, int nintrs);
212*7c478bd9Sstevel@tonic-gate uint_t	i_ddi_intr_get_current_nintrs(dev_info_t *dip);
213*7c478bd9Sstevel@tonic-gate void	i_ddi_intr_set_current_nintrs(dev_info_t *dip, int nintrs);
214*7c478bd9Sstevel@tonic-gate 
215*7c478bd9Sstevel@tonic-gate void	i_ddi_set_intr_handle(dev_info_t *dip, int inum,
216*7c478bd9Sstevel@tonic-gate 	    ddi_intr_handle_t *hdlp);
217*7c478bd9Sstevel@tonic-gate ddi_intr_handle_t *i_ddi_get_intr_handle(dev_info_t *dip, int inum);
218*7c478bd9Sstevel@tonic-gate 
219*7c478bd9Sstevel@tonic-gate ddi_intr_msix_t	*i_ddi_get_msix(dev_info_t *dip);
220*7c478bd9Sstevel@tonic-gate void	i_ddi_set_msix(dev_info_t *dip, ddi_intr_msix_t *msix_p);
221*7c478bd9Sstevel@tonic-gate 
222*7c478bd9Sstevel@tonic-gate int32_t i_ddi_get_intr_weight(dev_info_t *);
223*7c478bd9Sstevel@tonic-gate int32_t i_ddi_set_intr_weight(dev_info_t *, int32_t);
224*7c478bd9Sstevel@tonic-gate 
225*7c478bd9Sstevel@tonic-gate int	i_ddi_get_nintrs(dev_info_t *dip);
226*7c478bd9Sstevel@tonic-gate 
227*7c478bd9Sstevel@tonic-gate #define	DDI_INTR_ASSIGN_HDLR_N_ARGS(hdlp, func, arg1, arg2) \
228*7c478bd9Sstevel@tonic-gate 	hdlp->ih_cb_func = func; \
229*7c478bd9Sstevel@tonic-gate 	hdlp->ih_cb_arg1 = arg1; \
230*7c478bd9Sstevel@tonic-gate 	hdlp->ih_cb_arg2 = arg2;
231*7c478bd9Sstevel@tonic-gate 
232*7c478bd9Sstevel@tonic-gate #else	/* _KERNEL */
233*7c478bd9Sstevel@tonic-gate 
234*7c478bd9Sstevel@tonic-gate typedef struct devinfo_intr devinfo_intr_t;
235*7c478bd9Sstevel@tonic-gate 
236*7c478bd9Sstevel@tonic-gate #endif	/* _KERNEL */
237*7c478bd9Sstevel@tonic-gate 
238*7c478bd9Sstevel@tonic-gate /*
239*7c478bd9Sstevel@tonic-gate  * Used only by old DDI interrupt interfaces.
240*7c478bd9Sstevel@tonic-gate  */
241*7c478bd9Sstevel@tonic-gate 
242*7c478bd9Sstevel@tonic-gate /*
243*7c478bd9Sstevel@tonic-gate  * This structure represents one interrupt possible from the given
244*7c478bd9Sstevel@tonic-gate  * device. It is used in an array for devices with multiple interrupts.
245*7c478bd9Sstevel@tonic-gate  */
246*7c478bd9Sstevel@tonic-gate struct intrspec {
247*7c478bd9Sstevel@tonic-gate 	uint_t intrspec_pri;		/* interrupt priority */
248*7c478bd9Sstevel@tonic-gate 	uint_t intrspec_vec;		/* vector # (0 if none) */
249*7c478bd9Sstevel@tonic-gate 	uint_t (*intrspec_func)();	/* function to call for interrupt, */
250*7c478bd9Sstevel@tonic-gate 					/* If (uint_t (*)()) 0, none. */
251*7c478bd9Sstevel@tonic-gate 					/* If (uint_t (*)()) 1, then */
252*7c478bd9Sstevel@tonic-gate };
253*7c478bd9Sstevel@tonic-gate 
254*7c478bd9Sstevel@tonic-gate #ifdef _KERNEL
255*7c478bd9Sstevel@tonic-gate /*
256*7c478bd9Sstevel@tonic-gate  * This structure is allocated by i_ddi_add_softintr and its address is used
257*7c478bd9Sstevel@tonic-gate  * as a cookie passed back to the caller to be used later by
258*7c478bd9Sstevel@tonic-gate  * i_ddi_remove_softintr
259*7c478bd9Sstevel@tonic-gate  */
260*7c478bd9Sstevel@tonic-gate struct soft_intrspec {
261*7c478bd9Sstevel@tonic-gate 	struct dev_info *si_devi;	/* records dev_info of caller */
262*7c478bd9Sstevel@tonic-gate 	struct intrspec si_intrspec;	/* and the intrspec */
263*7c478bd9Sstevel@tonic-gate };
264*7c478bd9Sstevel@tonic-gate 
265*7c478bd9Sstevel@tonic-gate /*
266*7c478bd9Sstevel@tonic-gate  * NOTE:
267*7c478bd9Sstevel@tonic-gate  *	The following 4 busops entry points are obsoleted with version
268*7c478bd9Sstevel@tonic-gate  *	9 or greater. Use i_ddi_intr_op interface in place of these
269*7c478bd9Sstevel@tonic-gate  *	obsolete interfaces.
270*7c478bd9Sstevel@tonic-gate  *
271*7c478bd9Sstevel@tonic-gate  *	Remove these busops entry points and all related data structures
272*7c478bd9Sstevel@tonic-gate  *	in future minor/major solaris release.
273*7c478bd9Sstevel@tonic-gate  */
274*7c478bd9Sstevel@tonic-gate typedef enum {DDI_INTR_CTLOPS_NONE} ddi_intr_ctlop_t;
275*7c478bd9Sstevel@tonic-gate 
276*7c478bd9Sstevel@tonic-gate /* The following are the obsolete interfaces */
277*7c478bd9Sstevel@tonic-gate ddi_intrspec_t	i_ddi_get_intrspec(dev_info_t *dip, dev_info_t *rdip,
278*7c478bd9Sstevel@tonic-gate 	    uint_t inumber);
279*7c478bd9Sstevel@tonic-gate 
280*7c478bd9Sstevel@tonic-gate int	i_ddi_add_intrspec(dev_info_t *dip, dev_info_t *rdip,
281*7c478bd9Sstevel@tonic-gate 	    ddi_intrspec_t intrspec, ddi_iblock_cookie_t *iblock_cookiep,
282*7c478bd9Sstevel@tonic-gate 	    ddi_idevice_cookie_t *idevice_cookiep,
283*7c478bd9Sstevel@tonic-gate 	    uint_t (*int_handler)(caddr_t int_handler_arg),
284*7c478bd9Sstevel@tonic-gate 	    caddr_t int_handler_arg, int kind);
285*7c478bd9Sstevel@tonic-gate 
286*7c478bd9Sstevel@tonic-gate void	i_ddi_remove_intrspec(dev_info_t *dip, dev_info_t *rdip,
287*7c478bd9Sstevel@tonic-gate 	    ddi_intrspec_t intrspec, ddi_iblock_cookie_t iblock_cookie);
288*7c478bd9Sstevel@tonic-gate 
289*7c478bd9Sstevel@tonic-gate int	i_ddi_intr_ctlops(dev_info_t *dip, dev_info_t *rdip,
290*7c478bd9Sstevel@tonic-gate 	    ddi_intr_ctlop_t op, void *arg, void *val);
291*7c478bd9Sstevel@tonic-gate 
292*7c478bd9Sstevel@tonic-gate #endif	/* _KERNEL */
293*7c478bd9Sstevel@tonic-gate 
294*7c478bd9Sstevel@tonic-gate #ifdef	__cplusplus
295*7c478bd9Sstevel@tonic-gate }
296*7c478bd9Sstevel@tonic-gate #endif
297*7c478bd9Sstevel@tonic-gate 
298*7c478bd9Sstevel@tonic-gate #endif	/* _SYS_DDI_INTR_IMPL_H */
299