17c478bd9Sstevel@tonic-gate /* 27c478bd9Sstevel@tonic-gate * CDDL HEADER START 37c478bd9Sstevel@tonic-gate * 47c478bd9Sstevel@tonic-gate * The contents of this file are subject to the terms of the 57c478bd9Sstevel@tonic-gate * Common Development and Distribution License, Version 1.0 only 67c478bd9Sstevel@tonic-gate * (the "License"). You may not use this file except in compliance 77c478bd9Sstevel@tonic-gate * with the License. 87c478bd9Sstevel@tonic-gate * 97c478bd9Sstevel@tonic-gate * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 107c478bd9Sstevel@tonic-gate * or http://www.opensolaris.org/os/licensing. 117c478bd9Sstevel@tonic-gate * See the License for the specific language governing permissions 127c478bd9Sstevel@tonic-gate * and limitations under the License. 137c478bd9Sstevel@tonic-gate * 147c478bd9Sstevel@tonic-gate * When distributing Covered Code, include this CDDL HEADER in each 157c478bd9Sstevel@tonic-gate * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 167c478bd9Sstevel@tonic-gate * If applicable, add the following below this CDDL HEADER, with the 177c478bd9Sstevel@tonic-gate * fields enclosed by brackets "[]" replaced with your own identifying 187c478bd9Sstevel@tonic-gate * information: Portions Copyright [yyyy] [name of copyright owner] 197c478bd9Sstevel@tonic-gate * 207c478bd9Sstevel@tonic-gate * CDDL HEADER END 217c478bd9Sstevel@tonic-gate */ 227c478bd9Sstevel@tonic-gate /* 237c478bd9Sstevel@tonic-gate * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 247c478bd9Sstevel@tonic-gate * Use is subject to license terms. 257c478bd9Sstevel@tonic-gate */ 267c478bd9Sstevel@tonic-gate 277c478bd9Sstevel@tonic-gate #ifndef _SYS_DDI_INTR_IMPL_H 287c478bd9Sstevel@tonic-gate #define _SYS_DDI_INTR_IMPL_H 297c478bd9Sstevel@tonic-gate 307c478bd9Sstevel@tonic-gate #pragma ident "%Z%%M% %I% %E% SMI" 317c478bd9Sstevel@tonic-gate 327c478bd9Sstevel@tonic-gate /* 337c478bd9Sstevel@tonic-gate * Sun DDI interrupt implementation specific definitions 347c478bd9Sstevel@tonic-gate */ 357c478bd9Sstevel@tonic-gate 367c478bd9Sstevel@tonic-gate #ifdef __cplusplus 377c478bd9Sstevel@tonic-gate extern "C" { 387c478bd9Sstevel@tonic-gate #endif 397c478bd9Sstevel@tonic-gate 407c478bd9Sstevel@tonic-gate #ifdef _KERNEL 417c478bd9Sstevel@tonic-gate 427c478bd9Sstevel@tonic-gate /* 437c478bd9Sstevel@tonic-gate * Typedef for interrupt ops 447c478bd9Sstevel@tonic-gate */ 457c478bd9Sstevel@tonic-gate typedef enum { 467c478bd9Sstevel@tonic-gate DDI_INTROP_SUPPORTED_TYPES = 1, /* 1 get supported interrupts types */ 477c478bd9Sstevel@tonic-gate DDI_INTROP_NINTRS, /* 2 get num of interrupts supported */ 487c478bd9Sstevel@tonic-gate DDI_INTROP_ALLOC, /* 3 allocate interrupt handle */ 497c478bd9Sstevel@tonic-gate DDI_INTROP_GETPRI, /* 4 get priority */ 507c478bd9Sstevel@tonic-gate DDI_INTROP_SETPRI, /* 5 set priority */ 517c478bd9Sstevel@tonic-gate DDI_INTROP_ADDISR, /* 6 add interrupt handler */ 527c478bd9Sstevel@tonic-gate DDI_INTROP_DUPVEC, /* 7 duplicate interrupt handler */ 537c478bd9Sstevel@tonic-gate DDI_INTROP_ENABLE, /* 8 enable interrupt */ 547c478bd9Sstevel@tonic-gate DDI_INTROP_BLOCKENABLE, /* 9 block enable interrupts */ 557c478bd9Sstevel@tonic-gate DDI_INTROP_BLOCKDISABLE, /* 10 block disable interrupts */ 567c478bd9Sstevel@tonic-gate DDI_INTROP_DISABLE, /* 11 disable interrupt */ 577c478bd9Sstevel@tonic-gate DDI_INTROP_REMISR, /* 12 remove interrupt handler */ 587c478bd9Sstevel@tonic-gate DDI_INTROP_FREE, /* 13 free interrupt handle */ 597c478bd9Sstevel@tonic-gate DDI_INTROP_GETCAP, /* 14 get capacity */ 607c478bd9Sstevel@tonic-gate DDI_INTROP_SETCAP, /* 15 set capacity */ 617c478bd9Sstevel@tonic-gate DDI_INTROP_SETMASK, /* 16 set mask */ 627c478bd9Sstevel@tonic-gate DDI_INTROP_CLRMASK, /* 17 clear mask */ 637c478bd9Sstevel@tonic-gate DDI_INTROP_GETPENDING, /* 18 get pending interrupt */ 647c478bd9Sstevel@tonic-gate DDI_INTROP_NAVAIL /* 19 get num of available interrupts */ 657c478bd9Sstevel@tonic-gate } ddi_intr_op_t; 667c478bd9Sstevel@tonic-gate 677c478bd9Sstevel@tonic-gate /* Version number used in the handles */ 687c478bd9Sstevel@tonic-gate #define DDI_INTR_VERSION_1 1 697c478bd9Sstevel@tonic-gate #define DDI_INTR_VERSION DDI_INTR_VERSION_1 707c478bd9Sstevel@tonic-gate 717c478bd9Sstevel@tonic-gate /* 727c478bd9Sstevel@tonic-gate * One such data structure is allocated per ddi_intr_handle_t 737c478bd9Sstevel@tonic-gate * This is the incore copy of the regular interrupt info. 747c478bd9Sstevel@tonic-gate */ 757c478bd9Sstevel@tonic-gate typedef struct ddi_intr_handle_impl { 767c478bd9Sstevel@tonic-gate dev_info_t *ih_dip; /* dip associated with handle */ 777c478bd9Sstevel@tonic-gate uint16_t ih_type; /* interrupt type being used */ 787c478bd9Sstevel@tonic-gate ushort_t ih_inum; /* interrupt number */ 79a195726fSgovinda uint32_t ih_vector; /* vector number */ 807c478bd9Sstevel@tonic-gate uint16_t ih_ver; /* Version */ 817c478bd9Sstevel@tonic-gate uint_t ih_state; /* interrupt handle state */ 827c478bd9Sstevel@tonic-gate uint_t ih_cap; /* interrupt capabilities */ 837c478bd9Sstevel@tonic-gate uint_t ih_pri; /* priority - bus dependent */ 847c478bd9Sstevel@tonic-gate krwlock_t ih_rwlock; /* read/write lock per handle */ 857c478bd9Sstevel@tonic-gate 867c478bd9Sstevel@tonic-gate uint_t (*ih_cb_func)(caddr_t, caddr_t); 877c478bd9Sstevel@tonic-gate void *ih_cb_arg1; 887c478bd9Sstevel@tonic-gate void *ih_cb_arg2; 897c478bd9Sstevel@tonic-gate 907c478bd9Sstevel@tonic-gate /* 917c478bd9Sstevel@tonic-gate * The next set of members are for 'scratch' purpose only. 927c478bd9Sstevel@tonic-gate * The DDI interrupt framework uses them internally and their 937c478bd9Sstevel@tonic-gate * interpretation is left to the framework. For now, 947c478bd9Sstevel@tonic-gate * scratch1 - used to send NINTRs information 957c478bd9Sstevel@tonic-gate * to various nexus drivers. 967c478bd9Sstevel@tonic-gate * scratch2 - used to send 'behavior' flag 977c478bd9Sstevel@tonic-gate * information to the nexus drivers 987c478bd9Sstevel@tonic-gate * from ddi_intr_alloc() 99*7a364d25Sschwartz * private - On X86 it usually carries a pointer to 100*7a364d25Sschwartz * ihdl_plat_t. Not used on SPARC platforms. 1017c478bd9Sstevel@tonic-gate */ 1027c478bd9Sstevel@tonic-gate void *ih_private; /* Platform specific data */ 1037c478bd9Sstevel@tonic-gate uint_t ih_scratch1; /* Scratch1: #interrupts */ 1047c478bd9Sstevel@tonic-gate uint_t ih_scratch2; /* Scratch2: flag */ 1057c478bd9Sstevel@tonic-gate } ddi_intr_handle_impl_t; 1067c478bd9Sstevel@tonic-gate 1077c478bd9Sstevel@tonic-gate /* values for ih_state (strictly for interrupt handle) */ 1087c478bd9Sstevel@tonic-gate #define DDI_IHDL_STATE_ALLOC 0x01 /* Allocated. ddi_intr_alloc() called */ 1097c478bd9Sstevel@tonic-gate #define DDI_IHDL_STATE_ADDED 0x02 /* Added interrupt handler */ 1107c478bd9Sstevel@tonic-gate /* ddi_intr_add_handler() called */ 1117c478bd9Sstevel@tonic-gate #define DDI_IHDL_STATE_ENABLE 0x04 /* Enabled. ddi_intr_enable() called */ 1127c478bd9Sstevel@tonic-gate 1137c478bd9Sstevel@tonic-gate #define DDI_INTR_IS_MSI_OR_MSIX(type) \ 1147c478bd9Sstevel@tonic-gate ((type) == DDI_INTR_TYPE_MSI || (type) == DDI_INTR_TYPE_MSIX) 1157c478bd9Sstevel@tonic-gate 116a195726fSgovinda #define DDI_INTR_SUP_TYPES DDI_INTR_TYPE_FIXED|DDI_INTR_TYPE_MSI|\ 117a195726fSgovinda DDI_INTR_TYPE_MSIX 118a195726fSgovinda 1197c478bd9Sstevel@tonic-gate /* 1207c478bd9Sstevel@tonic-gate * One such data structure is allocated per ddi_soft_intr_handle 1217c478bd9Sstevel@tonic-gate * This is the incore copy of the softint info. 1227c478bd9Sstevel@tonic-gate */ 1237c478bd9Sstevel@tonic-gate typedef struct ddi_softint_hdl_impl { 1247c478bd9Sstevel@tonic-gate dev_info_t *ih_dip; /* dip associated with handle */ 1257c478bd9Sstevel@tonic-gate uint_t ih_pri; /* priority - bus dependent */ 1267c478bd9Sstevel@tonic-gate krwlock_t ih_rwlock; /* read/write lock per handle */ 1277c478bd9Sstevel@tonic-gate uint_t ih_pending; /* whether softint is pending */ 1287c478bd9Sstevel@tonic-gate 1297c478bd9Sstevel@tonic-gate uint_t (*ih_cb_func)(caddr_t, caddr_t); 1307c478bd9Sstevel@tonic-gate /* cb function for soft ints */ 1317c478bd9Sstevel@tonic-gate void *ih_cb_arg1; /* arg1 of callback function */ 1327c478bd9Sstevel@tonic-gate void *ih_cb_arg2; /* arg2 passed to "trigger" */ 1337c478bd9Sstevel@tonic-gate 1347c478bd9Sstevel@tonic-gate /* 1357c478bd9Sstevel@tonic-gate * The next member is for 'scratch' purpose only. 1367c478bd9Sstevel@tonic-gate * The DDI interrupt framework uses it internally and its 1377c478bd9Sstevel@tonic-gate * interpretation is left to the framework. 1387c478bd9Sstevel@tonic-gate * private - used by the DDI framework to pass back 1397c478bd9Sstevel@tonic-gate * and forth 'softid' information on SPARC 1407c478bd9Sstevel@tonic-gate * side only. Not used on X86 platform. 1417c478bd9Sstevel@tonic-gate */ 1427c478bd9Sstevel@tonic-gate void *ih_private; /* Platform specific data */ 1437c478bd9Sstevel@tonic-gate } ddi_softint_hdl_impl_t; 1447c478bd9Sstevel@tonic-gate 1457c478bd9Sstevel@tonic-gate /* Softint internal implementation defines */ 1467c478bd9Sstevel@tonic-gate #define DDI_SOFT_INTR_PRI_M 4 1477c478bd9Sstevel@tonic-gate #define DDI_SOFT_INTR_PRI_H 6 1487c478bd9Sstevel@tonic-gate 1497c478bd9Sstevel@tonic-gate /* 1507c478bd9Sstevel@tonic-gate * One such data structure is allocated for MSI-X enabled 1517c478bd9Sstevel@tonic-gate * device. If no MSI-X is enabled then it is NULL 1527c478bd9Sstevel@tonic-gate */ 1537c478bd9Sstevel@tonic-gate typedef struct ddi_intr_msix { 1547c478bd9Sstevel@tonic-gate uint_t msix_intrs_in_use; /* MSI-X intrs in use */ 1557c478bd9Sstevel@tonic-gate 1567c478bd9Sstevel@tonic-gate /* MSI-X Table related information */ 1577c478bd9Sstevel@tonic-gate ddi_acc_handle_t msix_tbl_hdl; /* MSI-X table handle */ 1587c478bd9Sstevel@tonic-gate caddr_t msix_tbl_addr; /* MSI-X table addr */ 1597c478bd9Sstevel@tonic-gate offset_t msix_tbl_offset; /* MSI-X table offset */ 1607c478bd9Sstevel@tonic-gate 1617c478bd9Sstevel@tonic-gate /* MSI-X PBA Table related information */ 1627c478bd9Sstevel@tonic-gate ddi_acc_handle_t msix_pba_hdl; /* MSI-X PBA handle */ 1637c478bd9Sstevel@tonic-gate caddr_t msix_pba_addr; /* MSI-X PBA addr */ 1647c478bd9Sstevel@tonic-gate offset_t msix_pba_offset; /* MSI-X PBA offset */ 1657c478bd9Sstevel@tonic-gate 1667c478bd9Sstevel@tonic-gate ddi_device_acc_attr_t msix_dev_attr; /* MSI-X device attr */ 1677c478bd9Sstevel@tonic-gate } ddi_intr_msix_t; 1687c478bd9Sstevel@tonic-gate 1697c478bd9Sstevel@tonic-gate 1707c478bd9Sstevel@tonic-gate /* 1717c478bd9Sstevel@tonic-gate * One such data structure is allocated for each dip. 1727c478bd9Sstevel@tonic-gate * It has interrupt related information that can be 1737c478bd9Sstevel@tonic-gate * stored/retrieved for convenience. 1747c478bd9Sstevel@tonic-gate */ 1757c478bd9Sstevel@tonic-gate typedef struct devinfo_intr { 1767c478bd9Sstevel@tonic-gate /* These three fields show what the device is capable of */ 1777c478bd9Sstevel@tonic-gate uint_t devi_intr_sup_types; /* Intrs supported by device */ 1787c478bd9Sstevel@tonic-gate 1797c478bd9Sstevel@tonic-gate ddi_intr_msix_t *devi_msix_p; /* MSI-X info, if supported */ 1807c478bd9Sstevel@tonic-gate 1817c478bd9Sstevel@tonic-gate /* Next three fields show current status for the device */ 1827c478bd9Sstevel@tonic-gate uint_t devi_intr_curr_type; /* Interrupt type being used */ 1837c478bd9Sstevel@tonic-gate uint_t devi_intr_sup_nintrs; /* #intr supported */ 1847c478bd9Sstevel@tonic-gate uint_t devi_intr_curr_nintrs; /* #intr currently being used */ 1857c478bd9Sstevel@tonic-gate 1867c478bd9Sstevel@tonic-gate ddi_intr_handle_t **devi_intr_handle_p; /* Hdl for legacy intr APIs */ 1877c478bd9Sstevel@tonic-gate } devinfo_intr_t; 1887c478bd9Sstevel@tonic-gate 1897c478bd9Sstevel@tonic-gate #define NEXUS_HAS_INTR_OP(dip) \ 1907c478bd9Sstevel@tonic-gate ((DEVI(dip)->devi_ops->devo_bus_ops) && \ 1917c478bd9Sstevel@tonic-gate (DEVI(dip)->devi_ops->devo_bus_ops->busops_rev >= BUSO_REV_9) && \ 1927c478bd9Sstevel@tonic-gate (DEVI(dip)->devi_ops->devo_bus_ops->bus_intr_op)) 1937c478bd9Sstevel@tonic-gate 1947c478bd9Sstevel@tonic-gate int i_ddi_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t op, 1957c478bd9Sstevel@tonic-gate ddi_intr_handle_impl_t *hdlp, void *result); 1967c478bd9Sstevel@tonic-gate 1977c478bd9Sstevel@tonic-gate int i_ddi_add_softint(ddi_softint_hdl_impl_t *); 1987c478bd9Sstevel@tonic-gate void i_ddi_remove_softint(ddi_softint_hdl_impl_t *); 199b08160e2Sgovinda int i_ddi_trigger_softint(ddi_softint_hdl_impl_t *, void *); 2007c478bd9Sstevel@tonic-gate int i_ddi_set_softint_pri(ddi_softint_hdl_impl_t *, uint_t); 2017c478bd9Sstevel@tonic-gate 2027c478bd9Sstevel@tonic-gate void i_ddi_intr_devi_init(dev_info_t *dip); 2037c478bd9Sstevel@tonic-gate void i_ddi_intr_devi_fini(dev_info_t *dip); 2047c478bd9Sstevel@tonic-gate 2057c478bd9Sstevel@tonic-gate uint_t i_ddi_intr_get_supported_types(dev_info_t *dip); 2067c478bd9Sstevel@tonic-gate void i_ddi_intr_set_supported_types(dev_info_t *dip, int sup_type); 2077c478bd9Sstevel@tonic-gate uint_t i_ddi_intr_get_current_type(dev_info_t *dip); 2087c478bd9Sstevel@tonic-gate void i_ddi_intr_set_current_type(dev_info_t *dip, int intr_type); 2097c478bd9Sstevel@tonic-gate uint_t i_ddi_intr_get_supported_nintrs(dev_info_t *dip, int intr_type); 2107c478bd9Sstevel@tonic-gate void i_ddi_intr_set_supported_nintrs(dev_info_t *dip, int nintrs); 2117c478bd9Sstevel@tonic-gate uint_t i_ddi_intr_get_current_nintrs(dev_info_t *dip); 2127c478bd9Sstevel@tonic-gate void i_ddi_intr_set_current_nintrs(dev_info_t *dip, int nintrs); 2137c478bd9Sstevel@tonic-gate 214a195726fSgovinda ddi_intr_handle_t *i_ddi_get_intr_handle(dev_info_t *dip, int inum); 2157c478bd9Sstevel@tonic-gate void i_ddi_set_intr_handle(dev_info_t *dip, int inum, 2167c478bd9Sstevel@tonic-gate ddi_intr_handle_t *hdlp); 2177c478bd9Sstevel@tonic-gate 2187c478bd9Sstevel@tonic-gate ddi_intr_msix_t *i_ddi_get_msix(dev_info_t *dip); 2197c478bd9Sstevel@tonic-gate void i_ddi_set_msix(dev_info_t *dip, ddi_intr_msix_t *msix_p); 2207c478bd9Sstevel@tonic-gate 2217c478bd9Sstevel@tonic-gate int32_t i_ddi_get_intr_weight(dev_info_t *); 2227c478bd9Sstevel@tonic-gate int32_t i_ddi_set_intr_weight(dev_info_t *, int32_t); 2237c478bd9Sstevel@tonic-gate 224*7a364d25Sschwartz void i_ddi_alloc_intr_phdl(ddi_intr_handle_impl_t *); 225*7a364d25Sschwartz void i_ddi_free_intr_phdl(ddi_intr_handle_impl_t *); 226*7a364d25Sschwartz 2277c478bd9Sstevel@tonic-gate #define DDI_INTR_ASSIGN_HDLR_N_ARGS(hdlp, func, arg1, arg2) \ 2287c478bd9Sstevel@tonic-gate hdlp->ih_cb_func = func; \ 2297c478bd9Sstevel@tonic-gate hdlp->ih_cb_arg1 = arg1; \ 2307c478bd9Sstevel@tonic-gate hdlp->ih_cb_arg2 = arg2; 2317c478bd9Sstevel@tonic-gate 2327c478bd9Sstevel@tonic-gate #else /* _KERNEL */ 2337c478bd9Sstevel@tonic-gate 2347c478bd9Sstevel@tonic-gate typedef struct devinfo_intr devinfo_intr_t; 2357c478bd9Sstevel@tonic-gate 2367c478bd9Sstevel@tonic-gate #endif /* _KERNEL */ 2377c478bd9Sstevel@tonic-gate 2387c478bd9Sstevel@tonic-gate /* 2397c478bd9Sstevel@tonic-gate * Used only by old DDI interrupt interfaces. 2407c478bd9Sstevel@tonic-gate */ 2417c478bd9Sstevel@tonic-gate 2427c478bd9Sstevel@tonic-gate /* 2437c478bd9Sstevel@tonic-gate * This structure represents one interrupt possible from the given 2447c478bd9Sstevel@tonic-gate * device. It is used in an array for devices with multiple interrupts. 2457c478bd9Sstevel@tonic-gate */ 2467c478bd9Sstevel@tonic-gate struct intrspec { 2477c478bd9Sstevel@tonic-gate uint_t intrspec_pri; /* interrupt priority */ 2487c478bd9Sstevel@tonic-gate uint_t intrspec_vec; /* vector # (0 if none) */ 2497c478bd9Sstevel@tonic-gate uint_t (*intrspec_func)(); /* function to call for interrupt, */ 2507c478bd9Sstevel@tonic-gate /* If (uint_t (*)()) 0, none. */ 2517c478bd9Sstevel@tonic-gate /* If (uint_t (*)()) 1, then */ 2527c478bd9Sstevel@tonic-gate }; 2537c478bd9Sstevel@tonic-gate 2547c478bd9Sstevel@tonic-gate #ifdef _KERNEL 2557c478bd9Sstevel@tonic-gate 2567c478bd9Sstevel@tonic-gate /* 2577c478bd9Sstevel@tonic-gate * NOTE: 2587c478bd9Sstevel@tonic-gate * The following 4 busops entry points are obsoleted with version 2597c478bd9Sstevel@tonic-gate * 9 or greater. Use i_ddi_intr_op interface in place of these 2607c478bd9Sstevel@tonic-gate * obsolete interfaces. 2617c478bd9Sstevel@tonic-gate * 2627c478bd9Sstevel@tonic-gate * Remove these busops entry points and all related data structures 2637c478bd9Sstevel@tonic-gate * in future minor/major solaris release. 2647c478bd9Sstevel@tonic-gate */ 2657c478bd9Sstevel@tonic-gate typedef enum {DDI_INTR_CTLOPS_NONE} ddi_intr_ctlop_t; 2667c478bd9Sstevel@tonic-gate 2677c478bd9Sstevel@tonic-gate /* The following are the obsolete interfaces */ 2687c478bd9Sstevel@tonic-gate ddi_intrspec_t i_ddi_get_intrspec(dev_info_t *dip, dev_info_t *rdip, 2697c478bd9Sstevel@tonic-gate uint_t inumber); 2707c478bd9Sstevel@tonic-gate 2717c478bd9Sstevel@tonic-gate int i_ddi_add_intrspec(dev_info_t *dip, dev_info_t *rdip, 2727c478bd9Sstevel@tonic-gate ddi_intrspec_t intrspec, ddi_iblock_cookie_t *iblock_cookiep, 2737c478bd9Sstevel@tonic-gate ddi_idevice_cookie_t *idevice_cookiep, 2747c478bd9Sstevel@tonic-gate uint_t (*int_handler)(caddr_t int_handler_arg), 2757c478bd9Sstevel@tonic-gate caddr_t int_handler_arg, int kind); 2767c478bd9Sstevel@tonic-gate 2777c478bd9Sstevel@tonic-gate void i_ddi_remove_intrspec(dev_info_t *dip, dev_info_t *rdip, 2787c478bd9Sstevel@tonic-gate ddi_intrspec_t intrspec, ddi_iblock_cookie_t iblock_cookie); 2797c478bd9Sstevel@tonic-gate 2807c478bd9Sstevel@tonic-gate int i_ddi_intr_ctlops(dev_info_t *dip, dev_info_t *rdip, 2817c478bd9Sstevel@tonic-gate ddi_intr_ctlop_t op, void *arg, void *val); 2827c478bd9Sstevel@tonic-gate 2837c478bd9Sstevel@tonic-gate #endif /* _KERNEL */ 2847c478bd9Sstevel@tonic-gate 2857c478bd9Sstevel@tonic-gate #ifdef __cplusplus 2867c478bd9Sstevel@tonic-gate } 2877c478bd9Sstevel@tonic-gate #endif 2887c478bd9Sstevel@tonic-gate 2897c478bd9Sstevel@tonic-gate #endif /* _SYS_DDI_INTR_IMPL_H */ 290