18eea8e29Sap /*
28eea8e29Sap  * CDDL HEADER START
38eea8e29Sap  *
48eea8e29Sap  * The contents of this file are subject to the terms of the
58eea8e29Sap  * Common Development and Distribution License, Version 1.0 only
68eea8e29Sap  * (the "License").  You may not use this file except in compliance
78eea8e29Sap  * with the License.
88eea8e29Sap  *
98eea8e29Sap  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
108eea8e29Sap  * or http://www.opensolaris.org/os/licensing.
118eea8e29Sap  * See the License for the specific language governing permissions
128eea8e29Sap  * and limitations under the License.
138eea8e29Sap  *
148eea8e29Sap  * When distributing Covered Code, include this CDDL HEADER in each
158eea8e29Sap  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
168eea8e29Sap  * If applicable, add the following below this CDDL HEADER, with the
178eea8e29Sap  * fields enclosed by brackets "[]" replaced with your own identifying
188eea8e29Sap  * information: Portions Copyright [yyyy] [name of copyright owner]
198eea8e29Sap  *
208eea8e29Sap  * CDDL HEADER END
218eea8e29Sap  */
228eea8e29Sap /*
238eea8e29Sap  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
248eea8e29Sap  * Use is subject to license terms.
25*80d5689fSPatrick Mooney  * Copyright 2017 Joyent, Inc.
268eea8e29Sap  */
278eea8e29Sap 
288eea8e29Sap #ifndef _SYS_1394_TARGETS_DCAM1394_DCAM_H
298eea8e29Sap #define	_SYS_1394_TARGETS_DCAM1394_DCAM_H
308eea8e29Sap 
318eea8e29Sap #include <sys/modctl.h>
328eea8e29Sap #include <sys/ksynch.h>
338eea8e29Sap #include <sys/types.h>
348eea8e29Sap #include <sys/dditypes.h>
358eea8e29Sap #include <sys/1394/t1394.h>
368eea8e29Sap #include <sys/dcam/dcam1394_io.h>
378eea8e29Sap 
388eea8e29Sap #ifdef	__cplusplus
398eea8e29Sap extern "C" {
408eea8e29Sap #endif
418eea8e29Sap 
428eea8e29Sap #define	ILP32_PTR_SIZE	4	/* caller's data model type	*/
438eea8e29Sap #define	LP64_PTR_SIZE 	8
448eea8e29Sap 
458eea8e29Sap #define	DCAM_POWER_OFF	0	/* power management state	*/
468eea8e29Sap #define	DCAM_POWER_ON	1
478eea8e29Sap 
488eea8e29Sap #define	DCAM1394_MINOR_CTRL	0x80		/* this is the control device */
498eea8e29Sap 
508eea8e29Sap #define	DCAM1394_FLAG_ATTACH_COMPLETE	0x1  /* dcam_attach() is complete */
518eea8e29Sap #define	DCAM1394_FLAG_OPEN		0x2  /* driver is open */
528eea8e29Sap #define	DCAM1394_FLAG_OPEN_CAPTURE	0x4  /* device is open for capture */
538eea8e29Sap #define	DCAM1394_FLAG_OPEN_CONTROL	0x8  /* device is open for control */
548eea8e29Sap #define	DCAM1394_FLAG_FRAME_RCV_INIT	0x10
558eea8e29Sap #define	DCAM1394_FLAG_FRAME_RCVING	0x20
568eea8e29Sap #define	DCAM1394_FLAG_READ_REQ_PROC	0x40
578eea8e29Sap #define	DCAM1394_FLAG_READ_REQ_INVALID	0x80
588eea8e29Sap 
598eea8e29Sap #define	IS_VALID	0x1
608eea8e29Sap #define	IS_PRESENT	0x2
618eea8e29Sap #define	CAP_GET		0x4
628eea8e29Sap #define	CAP_SET		0x8
638eea8e29Sap #define	CAP_CTRL_SET	0x10
648eea8e29Sap 
658eea8e29Sap #define	MAX_STR_LEN	50
668eea8e29Sap 
678eea8e29Sap #define	DEV_TO_INSTANCE(d) (getminor(d) & 0x7f)
688eea8e29Sap 
698eea8e29Sap typedef uint_t
708eea8e29Sap     dcam1394_param_attr_t[DCAM1394_NUM_PARAM][DCAM1394_NUM_SUBPARAM];
718eea8e29Sap 
728eea8e29Sap typedef struct buff_info_s {
738eea8e29Sap 	uint_t			vid_mode;
748eea8e29Sap 	unsigned int		seq_num;
758eea8e29Sap 	hrtime_t		timestamp;
768eea8e29Sap 	caddr_t			kaddr_p;		/* kernel data buffer */
778eea8e29Sap 	ddi_dma_handle_t	dma_handle;		/* bind handle */
788eea8e29Sap 	ddi_acc_handle_t	data_acc_handle;  	/* acc handle */
798eea8e29Sap 	ddi_dma_cookie_t	dma_cookie;		/* cookie */
808eea8e29Sap 	size_t			real_len;    		/* mem len */
818eea8e29Sap 	uint_t			dma_cookie_count;	/* cookie count */
828eea8e29Sap } buff_info_t;
838eea8e29Sap 
848eea8e29Sap #define	MAX_NUM_READ_PTRS 1
858eea8e29Sap 
868eea8e29Sap typedef struct ring_buff_s {
878eea8e29Sap 	size_t		 num_buffs;
888eea8e29Sap 	size_t		 buff_num_bytes;
898eea8e29Sap 	buff_info_t	*buff_info_array_p;
908eea8e29Sap 	int		 num_read_ptrs;
918eea8e29Sap 	int		 read_ptr_incr_val;
928eea8e29Sap 	size_t		 read_ptr_pos[MAX_NUM_READ_PTRS];
938eea8e29Sap 	uint_t		 status[MAX_NUM_READ_PTRS];
948eea8e29Sap 	size_t		 write_ptr_pos;
958eea8e29Sap } ring_buff_t;
968eea8e29Sap 
978eea8e29Sap typedef struct dcam_state_s {
988eea8e29Sap 	dev_info_t			*dip;
998eea8e29Sap 	int				instance;
1008eea8e29Sap 	int				usr_model;
1018eea8e29Sap 	t1394_handle_t			sl_handle;
1028eea8e29Sap 	t1394_attachinfo_t		attachinfo;
1038eea8e29Sap 	t1394_targetinfo_t		targetinfo;
1048eea8e29Sap 	t1394_isoch_singleinfo_t	sii;
1058eea8e29Sap 	t1394_isoch_single_out_t	sii_output_args;
1068eea8e29Sap 	t1394_isoch_single_handle_t	sii_hdl;
1078eea8e29Sap 	t1394_isoch_dma_handle_t 	isoch_handle;
1088eea8e29Sap 	kmutex_t			softc_mutex;
1098eea8e29Sap 	kmutex_t			dcam_frame_is_done_mutex;
1108eea8e29Sap 	dcam1394_param_attr_t		param_attr;
1118eea8e29Sap 
1128eea8e29Sap 	ixl1394_command_t		*ixlp;
1138eea8e29Sap 
1148eea8e29Sap 	ring_buff_t			*ring_buff_p;
1158eea8e29Sap 	unsigned int			seq_count;
1168eea8e29Sap 	uint_t				reader_flags[MAX_NUM_READ_PTRS];
1178eea8e29Sap 	uint_t				flags;
1188eea8e29Sap 	int				cur_vid_mode;
1198eea8e29Sap 	int				cur_frame_rate;
1208eea8e29Sap 	int				cur_ring_buff_capacity;
1218eea8e29Sap 	int				param_status;
1228eea8e29Sap 	int				camera_online;
1238eea8e29Sap 	int				pm_open_count;
1248eea8e29Sap 	int				pm_cable_power;
1258eea8e29Sap 	int				suspended;
1268eea8e29Sap 	ddi_callback_id_t		event_id;
1278eea8e29Sap } dcam_state_t;
1288eea8e29Sap 
1298eea8e29Sap int _init(void);
1308eea8e29Sap int _info(struct modinfo *modinfop);
1318eea8e29Sap int _fini(void);
1328eea8e29Sap 
1338eea8e29Sap int dcam_attach(dev_info_t *dip, ddi_attach_cmd_t cmd);
1348eea8e29Sap int dcam_power(dev_info_t *dip, int component, int level);
1358eea8e29Sap int dcam_getinfo(dev_info_t *dip, ddi_info_cmd_t cmd, void *arg, void **result);
1368eea8e29Sap int dcam_identify(dev_info_t *dip);
1378eea8e29Sap int dcam_detach(dev_info_t *dip, ddi_detach_cmd_t cmd);
1388eea8e29Sap int dcam_open(dev_t *devp, int flag, int otyp, cred_t *credp);
1398eea8e29Sap int dcam_close(dev_t dev, int flags, int otyp, cred_t *credp);
1408eea8e29Sap int dcam_read(dev_t dev, struct uio *uio, cred_t *credp);
1418eea8e29Sap int dcam_write(dev_t dev, struct uio *uio, cred_t *credp);
1428eea8e29Sap int dcam_mmap(dev_t dev, off_t off, int prot);
1438eea8e29Sap int dcam_devmap(dev_t dev, devmap_cookie_t dhp, offset_t off, size_t len,
1448eea8e29Sap     size_t *maplen, uint_t model);
1458eea8e29Sap int dcam_ioctl(dev_t dev, int cmd, intptr_t arg, int mode,
1468eea8e29Sap     cred_t *credp, int *rvalp);
1478eea8e29Sap int dcam_chpoll(dev_t dev, short events, int anyyet, short *reventsp,
1488eea8e29Sap     struct pollhead **phpp);
1498eea8e29Sap int dcam_intr(caddr_t dcam_softc_p);
1508eea8e29Sap void dcam_bus_reset_notify(dev_info_t *dip, ddi_eventcookie_t ev_cookie,
1518eea8e29Sap     void *arg, void *impl_data);
1528eea8e29Sap 
1538eea8e29Sap 
1548eea8e29Sap ring_buff_t *ring_buff_create(dcam_state_t *softc_p, size_t num_buffs,
1558eea8e29Sap     size_t buff_num_bytes);
1568eea8e29Sap void ring_buff_free(dcam_state_t *softc_p, ring_buff_t *ring_buff_p);
1578eea8e29Sap int ring_buff_reader_add(ring_buff_t *ring_buff_p);
1588eea8e29Sap int ring_buff_reader_remove(ring_buff_t *ring_buff_p, int reader_id);
1598eea8e29Sap buff_info_t *ring_buff_read_ptr_buff_get(ring_buff_t *ring_buff_p, int
1608eea8e29Sap     reader_id);
1618eea8e29Sap size_t ring_buff_read_ptr_pos_get(ring_buff_t *ring_buff_p, int read_ptr_id);
1628eea8e29Sap void ring_buff_read_ptr_incr(ring_buff_t *ring_buff_p, int read_ptr_id);
1638eea8e29Sap size_t ring_buff_write_ptr_pos_get(ring_buff_t *ring_buff_p);
1648eea8e29Sap void ring_buff_write_ptr_incr(ring_buff_t *ring_buff_p);
1658eea8e29Sap int dcam_frame_rcv_stop(dcam_state_t *softc_p);
1668eea8e29Sap int dcam1394_ioctl_frame_rcv_start(dcam_state_t *softc_p);
1678eea8e29Sap 
1688eea8e29Sap #ifdef	__cplusplus
1698eea8e29Sap }
1708eea8e29Sap #endif
1718eea8e29Sap 
1728eea8e29Sap #endif	/* _SYS_1394_TARGETS_DCAM1394_DCAM_H */
173