1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 */ 22/* 23 * Copyright (c) 1995-2001 by Sun Microsystems, Inc. 24 * All rights reserved. 25 */ 26 27#ifndef _CIS_HANDLERS_H 28#define _CIS_HANDLERS_H 29 30#pragma ident "%Z%%M% %I% %E% SMI" 31 32#ifdef __cplusplus 33extern "C" { 34#endif 35 36/* 37 * This is the CIS tuple handler header file. 38 * 39 * Each tuple that we recognize and are prepared to handle is assigned a 40 * cistpl_callout_t structure. This lets us specify a handler for 41 * this tuple, as well as flags that describe this tuple and which 42 * are used by the CIS interpreter and tuple parser. 43 */ 44typedef struct cistpl_callout_t { 45 cisdata_t type; /* type of tuple */ 46 cisdata_t subtype; /* only used for CISTPL_FUNCE */ 47 uint32_t flags; /* misc flags */ 48 uint32_t (*handler)(); /* tuple handler */ 49 char *text; /* name of tuple */ 50} cistpl_callout_t; 51 52/* 53 * Flags that are used by a tuple handler to specify what action it 54 * should perform. 55 */ 56#define HANDTPL_NOERROR 0x000000000 /* no error */ 57#define HANDTPL_SET_FLAGS 0x000000001 /* set tuple flags */ 58#define HANDTPL_COPY_DONE 0x000000002 /* tuple data copy is done */ 59#define HANDTPL_PARSE_LTUPLE 0x000000004 /* parse tuple, return opt data */ 60#define HANDTPL_RETURN_NAME 0x000000008 /* return tuple name string */ 61 62/* 63 * This flag is returned by tuple handlers if they encounter an error. It 64 * is returned by cis_list_lcreate if any of the tuple handlers have 65 * return an error while processing the CIS. 66 * 67 * Note that the following bit is reserved: 68 * #define BAD_CIS_ADDR 0x080000000 69 * It appears in cis.h and is used to indicate that cis_list_create 70 * tried to read past the end of the mapped in CIS space. 71 */ 72#define HANDTPL_ERROR 0x001000000 /* handler returned an error */ 73 74/* 75 * General-use constants and macros that aren't specific to a tuple. 76 */ 77#define CISTPL_EXT_BIT 0x080 /* additional extension bytes follow */ 78 79/* 80 * Constants, macros and structures used by cistpl_devspeed and 81 * cis_convert_devspeed functions. 82 */ 83#define CISTPL_DEVSPEED_TABLE 0x000000001 /* use the device speed table */ 84#define CISTPL_DEVSPEED_EXT 0x000000002 /* use the extended speed table */ 85#define CISTPL_DEVSPEED_MAX_TBL 8 /* max devspeed table entries */ 86#define CISTPL_DEVSPEED_MAX_EXP 8 /* max exponent entries */ 87#define CISTPL_DEVSPEED_MAX_MAN 16 /* max mantissa entries */ 88#define CISTPL_DEVSPEED_TBL(t) cistpl_devspeed_struct.table[(t) & \ 89 (CISTPL_DEVSPEED_MAX_TBL - 1)] 90#define CISTPL_DEVSPEED_MAN(m) cistpl_devspeed_struct.mantissa[(m) & \ 91 (CISTPL_DEVSPEED_MAX_MAN - 1)] 92#define CISTPL_DEVSPEED_EXP(e) cistpl_devspeed_struct.exponent[(e) & \ 93 (CISTPL_DEVSPEED_MAX_EXP - 1)] 94typedef struct cistpl_devspeed_struct_t { 95 uint32_t *table; 96 uint32_t *tenfac; 97 uint32_t *mantissa; 98 uint32_t *exponent; 99} cistpl_devspeed_struct_t; 100 101/* 102 * Constants, flags and structure typedefs that are used by specific tuples. 103 * 104 * CISTPL_DEVICE, CISTPL_DEVICE_A, CISTPL_DEVICE_OC and CISTPL_DEVICE_OA 105 */ 106#define CISTPL_DEVICE_DTYPE_NULL 0x00 /* a NULL device (hole) */ 107#define CISTPL_DEVICE_DTYPE_ROM 0x01 /* device is of type ROM */ 108#define CISTPL_DEVICE_DTYPE_OTPROM 0x02 /* device is of type OTPROM */ 109#define CISTPL_DEVICE_DTYPE_EPROM 0x03 /* device is of type EPROM */ 110#define CISTPL_DEVICE_DTYPE_EEPROM 0x04 /* device is of type EEPROM */ 111#define CISTPL_DEVICE_DTYPE_FLASH 0x05 /* device is of type FLASH */ 112#define CISTPL_DEVICE_DTYPE_SRAM 0x06 /* device is of type SRAM */ 113#define CISTPL_DEVICE_DTYPE_DRAM 0x07 /* device is of type DRAM */ 114#define CISTPL_DEVICE_DTYPE_RSVD_8 0x08 /* reserved */ 115#define CISTPL_DEVICE_DTYPE_RSVD_9 0x09 /* reserved */ 116#define CISTPL_DEVICE_DTYPE_RSVD_a 0x0a /* reserved */ 117#define CISTPL_DEVICE_DTYPE_RSVD_b 0x0b /* reserved */ 118#define CISTPL_DEVICE_DTYPE_RSVD_c 0x0c /* reserved */ 119#define CISTPL_DEVICE_DTYPE_FUNCSPEC 0x0d /* device is of type FUNCSPEC */ 120#define CISTPL_DEVICE_DTYPE_EXTEND 0x0e /* device is of type extended */ 121#define CISTPL_DEVICE_DTYPE_RSVD_f 0x0f /* reserved */ 122 123/* 124 * Flags for cistpl_device_node_t->flags member for CISTPL_DEVICE 125 * and CISTPL_DEVICE_A tuples 126 */ 127#define CISTPL_DEVICE_WPS 0x00000001 /* WPS bit is set */ 128/* 129 * Flags and values for cistpl_device_node_t->flags member for 130 * CISTPL_DEVICE_OC and CISTPL_DEVICE_OA tuples 131 */ 132#define CISTPL_DEVICE_OC_MWAIT 0x00010000 /* use MWAIT */ 133#define CISTPL_DEVICE_OC_Vcc_MASK 0x00060000 /* mask for Vcc value */ 134#define CISTPL_DEVICE_OC_Vcc5 0x00000000 /* 5.0 volt operation */ 135#define CISTPL_DEVICE_OC_Vcc33 0x00020000 /* 3.3 volt operation */ 136#define CISTPL_DEVICE_OC_VccXX 0x00040000 /* X.X volt operation */ 137#define CISTPL_DEVICE_OC_VccYY 0x00060000 /* Y.Y volt operation */ 138/* 139 * CISTPL_DEVICE_MAX_DEVICES defines the maximum number of devices that 140 * we can parse in a CISTPL_DEVICE{...} tuple 141 */ 142#define CISTPL_DEVICE_MAX_DEVICES 10 143 144/* 145 * CISTPL_DEVICE_SPEED_SIZE_IGNORE if the device speed is set to this, then 146 * ignore the speed and size values 147 */ 148#define CISTPL_DEVICE_SPEED_SIZE_IGNORE 0x0ff /* ignore size and speed info */ 149 150typedef struct cistpl_device_node_t { 151 uint32_t flags; /* flags specific to this device */ 152 uint32_t speed; /* device speed in device speed code format */ 153 uint32_t nS_speed; /* device speed in nS */ 154 uint32_t type; /* device type */ 155 uint32_t size; /* device size */ 156 uint32_t size_in_bytes; /* device size in bytes */ 157} cistpl_device_node_t; 158 159typedef struct cistpl_device_t { 160 uint32_t num_devices; /* number of devices found */ 161 cistpl_device_node_t devnode[CISTPL_DEVICE_MAX_DEVICES]; 162} cistpl_device_t; 163 164/* 165 * CISTPL_CONFIG 166 */ 167#define MAKE_CONFIG_REG_ADDR(base, reg) (base + (reg * 2)) 168#define CISTPL_CONFIG_MAX_CONFIG_REGS 128 /* max num config regs */ 169typedef struct cistpl_config_t { 170 uint32_t present; /* register present flags */ 171 uint32_t nr; /* number of config registers found */ 172 uint32_t hr; /* highest config register index found */ 173 uint32_t regs[CISTPL_CONFIG_MAX_CONFIG_REGS]; /* reg offsets */ 174 uint32_t base; /* base offset of config registers */ 175 uint32_t last; /* last config index */ 176} cistpl_config_t; 177 178/* 179 * CISTPL_VERS_1 180 */ 181#define CISTPL_VERS_1_MAX_PROD_STRINGS 4 /* max number product strings */ 182typedef struct cistpl_vers_1_t { 183 uint32_t major; /* major version number */ 184 uint32_t minor; /* minor version number */ 185 uint32_t ns; /* number of information strings */ 186 /* pointers to product information strings */ 187 char pi[CISTPL_VERS_1_MAX_PROD_STRINGS][CIS_MAX_TUPLE_DATA_LEN]; 188} cistpl_vers_1_t; 189 190/* 191 * CISTPL_VERS_2 192 */ 193typedef struct cistpl_vers_2_t { 194 uint32_t vers; /* version number */ 195 uint32_t comply; /* level of compliance */ 196 uint32_t dindex; /* byte address of first data byte in card */ 197 uint32_t reserved; /* two reserved bytes */ 198 uint32_t vspec8; /* vendor specific (byte 8) */ 199 uint32_t vspec9; /* vendor specific (byte 9) */ 200 uint32_t nhdr; /* number of copies of CIS present on device */ 201 char oem[CIS_MAX_TUPLE_DATA_LEN]; /* Vendor of software that */ 202 /* formatted card */ 203 char info[CIS_MAX_TUPLE_DATA_LEN]; /* Informational message */ 204 /* about card */ 205} cistpl_vers_2_t; 206 207/* 208 * CISTPL_JEDEC_A and CISTPL_JEDEC_C 209 */ 210#define CISTPL_JEDEC_MAX_IDENTIFIERS 4 211typedef struct jedec_ident_t { 212 uint32_t id; /* manufacturer id */ 213 uint32_t info; /* manufacturer specific info */ 214} jedec_ident_t; 215 216typedef struct cistpl_jedec_t { 217 uint32_t nid; /* # of JEDEC identifiers present */ 218 jedec_ident_t jid[CISTPL_JEDEC_MAX_IDENTIFIERS]; 219} cistpl_jedec_t; 220 221/* 222 * CISTPL_FORMAT and CISTPL_FORMAT_A 223 * 224 * These tuples describe the data recording format for a region. 225 */ 226typedef struct cistpl_format_t { 227 uint32_t type; /* format type code */ 228 uint32_t edc_length; /* error detection code length */ 229 uint32_t edc_type; /* error detection code type */ 230 uint32_t offset; /* offset of first byte of data in this part */ 231 uint32_t nbytes; /* number of bytes of data in this partition */ 232 union { 233 struct disk { 234 uint32_t bksize; /* block size */ 235 uint32_t nblocks; /* nblocks data for disk-like device */ 236 uint32_t edcloc; /* location of error detection code */ 237 } disk; 238 struct mem { 239 uint32_t flags; /* various flags */ 240 uint32_t reserved; /* reserved byte */ 241 caddr_t address; /* physical addr for mem-like device */ 242 uint32_t edcloc; /* location of error detection code */ 243 } mem; 244 } dev; 245} cistpl_format_t; 246 247/* 248 * device format types 249 */ 250#define TPLFMTTYPE_DISK 0x00 /* disk-like format */ 251#define TPLFMTTYPE_MEM 0x01 /* memory-like format */ 252#define TPLFMTTYPE_VS 0x80 /* vendor specific format */ 253 254/* 255 * error detection code types 256 */ 257#define TPLFMTEDC_NONE 0x00 /* no error detection code */ 258#define TPLFMTEDC_CKSUM 0x01 /* arithmetic checksum is used */ 259#define TPLFMTEDC_CRC 0x02 /* 16-bit CRC */ 260#define TPLFMTEDC_PCC 0x03 /* whole-partition arithmetic checksum */ 261#define TPLFMTEDC_VS 0x80 /* vendor specific error checking */ 262 263#define EDC_LENGTH_MASK 0x07 264#define EDC_TYPE_MASK 0x0f 265#define EDC_TYPE_SHIFT 3 266 267/* 268 * flags for memory-like devices 269 */ 270#define TPLFMTFLAGS_ADDR 0x01 /* address is valid */ 271#define TPLFMTFLAGS_AUTO 0x02 /* automatically map memory region */ 272 273/* 274 * CISTPL_GEOMETRY 275 */ 276typedef struct cistpl_geometry_t { 277 uint32_t spt; 278 uint32_t tpc; 279 uint32_t ncyl; 280} cistpl_geometry_t; 281 282/* 283 * CISTPL_BYTEORDER 284 */ 285typedef struct cistpl_byteorder_t { 286 uint32_t order; /* byte order code */ 287 uint32_t map; /* byte mapping code */ 288} cistpl_byteorder_t; 289 290/* 291 * byte order and mapping codes 292 */ 293#define TPLBYTEORD_LOW 0x00 /* specifies little endian order */ 294#define TPLBYTEORD_HIGH 0x01 /* specifies big endian order */ 295#define TPLBYTEORD_VS 0x80 /* vendor specific order 0x80-0xFF */ 296 297#define TPLBYTEMAP_LOW 0x00 /* byte zero is least significant byte */ 298#define TPLBYTEMAP_HIGH 0x01 /* byte zero is most significant byte */ 299#define TPLBYTEMAP_VS 0x80 /* vendor specific mapping */ 300 301/* 302 * CISTPL_DATE 303 */ 304typedef struct cistpl_date_t { 305 uint32_t time; 306 uint32_t day; 307} cistpl_date_t; 308 309/* 310 * CISTPL_BATTERY 311 */ 312typedef struct cistpl_battery_t { 313 uint32_t rday; /* replacement date */ 314 uint32_t xday; /* expiration date */ 315} cistpl_battery_t; 316 317/* 318 * CISTPL_ORG 319 */ 320typedef struct cistpl_org_t { 321 uint32_t type; /* data organization code */ 322 char desc[CIS_MAX_TUPLE_DATA_LEN]; /* text description of */ 323 /* this organization */ 324} cistpl_org_t; 325 326/* 327 * CISTPL_MANFID 328 */ 329typedef struct cistpl_manfid_t { 330 uint32_t manf; /* PCMCIA PC Card manufacturer code */ 331 uint32_t card; /* manufacturer information */ 332} cistpl_manfid_t; 333 334/* 335 * CISTPL_FUNCID 336 */ 337typedef struct cistpl_funcid_t { 338 uint32_t function; /* PC Card function code */ 339 uint32_t sysinit; /* system initialization mask */ 340} cistpl_funcid_t; 341 342/* 343 * Function types for CISTPL_FUNCID; note that the TPLFUNC_UNKNOWN is 344 * not defined by the PCMCIA standard. 345 * 346 * Definitions for cistpl_funcid_t->function 347 */ 348#define TPLFUNC_MULTI 0x000 /* vendor-specific multifunction card */ 349#define TPLFUNC_MEMORY 0x001 /* memory card */ 350#define TPLFUNC_SERIAL 0x002 /* serial I/O port */ 351#define TPLFUNC_PARALLEL 0x003 /* parallel printer port */ 352#define TPLFUNC_FIXED 0x004 /* fixed disk, silicon or removeable */ 353#define TPLFUNC_VIDEO 0x005 /* video interface */ 354#define TPLFUNC_LAN 0x006 /* Local Area Network adapter */ 355#define TPLFUNC_AIMS 0x007 /* Auto Incrementing Mass Storage */ 356#define TPLFUNC_SCSI 0x008 /* SCSI bridge */ 357#define TPLFUNC_SECURITY 0x009 /* Security Cards */ 358#define TPLFUNC_VENDOR_SPECIFIC 0x0fe /* Vendor Specific */ 359#define TPLFUNC_UNKNOWN 0x0ff /* unknown function(s) */ 360/* 361 * Definitions for cistpl_funcid_t->sysinit 362 */ 363#define TPLINIT_POST 0x01 /* POST should attempt configure */ 364#define TPLINIT_ROM 0x02 /* map ROM during sys init */ 365 366/* 367 * CISTPL_FUNCE 368 */ 369typedef struct cistpl_funce_t { 370 uint32_t function; /* type of extended data */ 371 uint32_t subfunction; 372 union { 373 struct serial { 374 uint32_t ua; /* UART in use */ 375 uint32_t uc; /* UART capabilities */ 376 } serial; 377 struct modem { 378 uint32_t fc; /* supported flow control methods */ 379 uint32_t cb; /* size of DCE command buffer */ 380 uint32_t eb; /* size of DCE to DCE buffer */ 381 uint32_t tb; /* size of DTE to DCE buffer */ 382 } modem; 383 struct data_modem { 384 uint32_t ud; /* highest data rate */ 385 uint32_t ms; /* modulation standards */ 386 /* err correct proto and non-CCITT modulation */ 387 uint32_t em; 388 uint32_t dc; /* data compression protocols */ 389 uint32_t cm; /* command protocols */ 390 uint32_t ex; /* escape mechanisms */ 391 uint32_t dy; /* standardized data encryption */ 392 uint32_t ef; /* misc. end user features */ 393 uint32_t ncd; /* number of country codes */ 394 uchar_t cd[16]; /* CCITT country code */ 395 } data_modem; 396 struct fax { 397 uint32_t uf; /* highest data rate in DTE/UART */ 398 uint32_t fm; /* CCITT modulation standards */ 399 uint32_t fy; /* standardized data encryption */ 400 uint32_t fs; /* feature selection */ 401 uint32_t ncf; /* number of country codes */ 402 uchar_t cf[16]; /* CCITT country codes */ 403 } fax; 404 struct voice { 405 uint32_t uv; /* highest data rate */ 406 uint32_t nsr; 407 uint32_t sr[16]; /* voice sampling rates (*100) */ 408 uint32_t nss; 409 uint32_t ss[16]; /* voice sample sizes (*10) */ 410 uint32_t nsc; 411 uint32_t sc[16]; /* voice compression methods */ 412 } voice; 413 struct lan { 414 uint32_t tech; /* network technology */ 415 uint32_t speed; /* media bit or baud rate */ 416 uint32_t media; /* network media supported */ 417 uint32_t con; /* open/closed connector standard */ 418 uint32_t id_sz; /* length of lan station id */ 419 uchar_t id[16]; /* station ID */ 420 } lan; 421 } data; 422} cistpl_funce_t; 423 424/* serial port subfunctions */ 425#define TPLFE_SUB_SERIAL 0 /* serial port */ 426#define TPLFE_SUB_MODEM_COMMON 1 /* common modem interface */ 427#define TPLFE_SUB_MODEM_DATA 2 /* data modem services */ 428#define TPLFE_SUB_MODEM_FAX 3 /* fax modem services */ 429#define TPLFE_SUB_VOICE 4 /* voice services */ 430/* modem subfunctions for description of capabilities */ 431#define TPLFE_CAP_MODEM_DATA 5 /* data modem capabilities */ 432#define TPLFE_CAP_MODEM_FAX 6 /* fax modem capabilities */ 433#define TPLFE_CAP_MODEM_VOICE 7 /* voice modem capabilities */ 434/* serial port subfunctions for description of capabilities */ 435#define TPLFE_CAP_SERIAL_DATA 8 /* serial port capabilities - data modem */ 436#define TPLFE_CAP_SERIAL_FAX 9 /* serial port capabilities - fax modem */ 437#define TPLFE_CAP_SERIAL_VOICE 10 /* serial port capabilities - voice */ 438 439/* serial port UART definitions */ 440#define TPLFE_UA_8250 0 /* Intel 8250 */ 441#define TPLFE_UA_16450 1 /* NS 16450 */ 442#define TPLFE_UA_16550 2 /* NS 16550 */ 443 444/* serial port capabilities definitions */ 445#define TPLFE_UC_PARITY_SPACE 0x0001 /* space parity supported */ 446#define TPLFE_UC_PARITY_MARK 0x0002 /* mark parity supported */ 447#define TPLFE_UC_PARITY_ODD 0x0004 /* odd parity supported */ 448#define TPLFE_UC_PARITY_EVEN 0x0008 /* even parity supported */ 449#define TPLFE_UC_CS5 0x0100 /* 5 bit characters supported */ 450#define TPLFE_UC_CS6 0x0200 /* 6 bit characters supported */ 451#define TPLFE_UC_CS7 0x0400 /* 7 bit characters supported */ 452#define TPLFE_UC_CS8 0x0800 /* 8 bit characters supported */ 453#define TPLFE_UC_STOP_1 0x1000 /* 1 stop bit supported */ 454#define TPLFE_UC_STOP_15 0x2000 /* 1.5 stop bits supported */ 455#define TPLFE_UC_STOP_2 0x4000 /* 2 stop bits supported */ 456 457/* modem flow control methods */ 458#define TPLFE_FC_TX_XONOFF 0x01 /* transmit XON/XOFF */ 459#define TPLFE_FC_RX_XONOFF 0x02 /* receiver XON/XOFF */ 460#define TPLFE_FC_TX_HW 0x04 /* transmit hardware flow control (CTS) */ 461#define TPLFE_FC_RX_HW 0x08 /* receiver hardware flow control (RTS) */ 462#define TPLFE_FC_TRANS 0x10 /* tranparent flow control */ 463 464/* modem modulation standards */ 465#define TPLFE_MS_BELL103 0x0001 /* 300bps */ 466#define TPLFE_MS_V21 0x0002 /* 300bps (V.21) */ 467#define TPLFE_MS_V23 0x0004 /* 600/1200bps (V.23) */ 468#define TPLFE_MS_V22AB 0x0008 /* 1200bps (V.22A V.22B) */ 469#define TPLFE_MS_BELL212 0x0010 /* 2400bsp (US Bell 212) */ 470#define TPLFE_MS_V22BIS 0x0020 /* 2400bps (V.22bis) */ 471#define TPLFE_MS_V26 0x0040 /* 2400bps leased line (V.26) */ 472#define TPLFE_MS_V26BIS 0x0080 /* 2400bps (V.26bis) */ 473#define TPLFE_MS_V27BIS 0x0100 /* 4800/2400bps leased line (V.27bis) */ 474#define TPLFE_MS_V29 0x0200 /* 9600/7200/4800 leased line (V.29) */ 475#define TPLFE_MS_V32 0x0400 /* up to 9600bps (V.32) */ 476#define TPLFE_MS_V32BIS 0x0800 /* up to 14400bps (V.32bis) */ 477#define TPLFE_MS_VFAST 0x1000 /* up to 28800 V.FAST */ 478 479/* modem error correction/detection protocols */ 480#define TPLFE_EM_MNP 0x01 /* MNP levels 2-4 */ 481#define TPLFE_EM_V42 0x02 /* CCITT LAPM (V.42) */ 482 483/* modem data compression protocols */ 484#define TPLFE_DC_V42BIS 0x01 /* CCITT compression V.42 */ 485#define TPLFE_DC_MNP5 0x02 /* MNP compression (uses MNP 2, 3 or 4) */ 486 487/* modem command protocols */ 488#define TPLFE_CM_AT1 0x01 /* ANSI/EIA/TIA 602 "Action" commands */ 489#define TPLFE_CM_AT2 0x02 /* ANSI/EIA/TIA 602 "ACE/DCE IF Params" */ 490#define TPLFE_CM_AT3 0x04 /* ANSI/EIA/TIA 602 "Ace Parameters" */ 491#define TPLFE_CM_MNP_AT 0x08 /* MNP specificat AT commands */ 492#define TPLFE_CM_V25BIS 0x10 /* V.25bis calling commands */ 493#define TPLFE_CM_V25A 0x20 /* V.25bis test procedures */ 494#define TPLFE_CM_DMCL 0x40 /* DMCL command mode */ 495 496/* modem escape mechanism */ 497#define TPLFE_EX_BREAK 0x01 /* BREAK support standardized */ 498#define TPLFE_EX_PLUS 0x02 /* +++ returns to command mode */ 499#define TPLFE_EX_UD 0x04 /* user defined escape character */ 500 501/* modem miscellaneous features */ 502#define TPLFE_EF_CALLERID 0x01 /* Caller ID is supported */ 503 504/* fax modulation standards */ 505#define TPLFE_FM_V21C2 0x01 /* 300bps (V.21-C2) */ 506#define TPLFE_FM_V27TER 0x02 /* 4800/2400bps (V.27ter) */ 507#define TPLFE_FM_V29 0x04 /* 9600/7200/4800 leased line (V.29) */ 508#define TPLFE_FM_V17 0x08 /* 14.4K/12K/9600/7200bps (V.17) */ 509#define TPLFE_FM_V33 0x10 /* 14.4K/12K/9600/7200 lease line (V.33) */ 510 511/* fax feature selection */ 512#define TPLFE_FS_T3 0x01 /* Group 2 (T.3) service class */ 513#define TPLFE_FS_T4 0x02 /* Group 3 (T.4) service class */ 514#define TPLFE_FS_T6 0x04 /* Group 4 (T.6) service class */ 515#define TPLFE_FS_ECM 0x08 /* Error Correction Modeer */ 516#define TPLFE_FS_VOICEREQ 0x10 /* voice requests allowed */ 517#define TPLFE_FS_POLLING 0x20 /* polling support */ 518#define TPLFE_FS_FTP 0x40 /* file transfer support */ 519#define TPLFE_FS_PASSWORD 0x80 /* password support */ 520 521/* LAN tuple definitions */ 522#define TPLFE_NETWORK_INFO 0x00 523 524/* LAN technology types */ 525#define TPLFE_LAN_TECH_ARCNET 1 526#define TPLFE_LAN_TECH_ETHERNET 2 527#define TPLFE_LAN_TECH_TOKENRING 3 528#define TPLFE_LAN_TECH_LOCALTALK 4 529#define TPLFE_LAN_TECH_FDDI 5 530#define TPLFE_LAN_TECH_ATM 6 531#define TPLFE_LAN_TECH_WIRELESS 7 532 533/* LAN media types */ 534#define TPLFE_LAN_MEDIA_INHERENT 0 535#define TPLFE_LAN_MEDIA_UTP 1 536#define TPLFE_LAN_MEDIA_STP 2 537#define TPLFE_LAN_MEDIA_THIN_COAX 3 538#define TPLFE_LAN_MEDIA_THICK_COAX 4 539#define TPLFE_LAN_MEDIA_FIBER 5 540#define TPLFE_LAN_MEDIA_SSR_902 6 541#define TPLFE_LAN_MEDIA_SSR_2_4 7 542#define TPLFE_LAN_MEDIA_SSR_5_4 8 543#define TPLFE_LAN_MEDIA_DIFFUSE_IR 9 544#define TPLFE_LAN_MEDIA_PTP_IR 10 545 546/* 547 * CISTPL_CFTABLE_ENTRY 548 * 549 * These flags and macros are used internally to the handler. 550 */ 551 /* mask to get the config entry number from TPCE_INDX */ 552#define CISTPL_CFTABLE_TPCE_CFGENTRYM 0x03f 553 /* default config bit in TPCE_INDX */ 554#define CISTPL_CFTABLE_TPCE_DEFAULTM 0x040 555 /* interface config byte follows */ 556#define CISTPL_CFTABLE_TPCE_IFM 0x080 557 558 /* power bit mask for tpce_fs */ 559#define CISTPL_CFTABLE_TPCE_FS_PWRM 0x003 560 /* Vcc, Vpp1 and Vpp2 descriptions */ 561#define CISTPL_CFTABLE_TPCE_FS_PWR_VPP2M 0x003 562 /* Vcc and Vpp1=Vpp2 descriptions */ 563#define CISTPL_CFTABLE_TPCE_FS_PWR_VPP1M 0x002 564 /* Vcc description only */ 565#define CISTPL_CFTABLE_TPCE_FS_PWR_VCCM 0x001 566 /* no connection on sleep/power down */ 567#define CISTPL_CFTABLE_PD_NC_SLEEPM 0x07d 568 /* zero value required */ 569#define CISTPL_CFTABLE_PD_ZEROM 0x07e 570 /* no connection ever */ 571#define CISTPL_CFTABLE_PD_NCM 0x07f 572 573 /* timing data exists */ 574#define CISTPL_CFTABLE_TPCE_FS_TDM 0x004 575 /* WAIT scale mask */ 576#define CISTPL_CFTABLE_TPCE_FS_TD_WAITM 0x003 577#define GET_TPCE_FS_TD_WAITS(sf) ((sf)& \ 578 CISTPL_CFTABLE_TPCE_FS_TD_WAITM) 579 /* RDY/BSY scale mask */ 580#define CISTPL_CFTABLE_TPCE_FS_TD_RDYM 0x01c 581#define GET_TPCE_FS_TD_RDYS(sf) (((sf)>>2)& \ 582 CISTPL_CFTABLE_TPCE_FS_TD_RDYM) 583 /* RSVD scale mask */ 584#define CISTPL_CFTABLE_TPCE_FS_TD_RSVDM 0x0e0 585#define GET_TPCE_FS_TD_RSVDS(sf) (((sf)>>5)& \ 586 CISTPL_CFTABLE_TPCE_FS_TD_RSVDM) 587 588#define CISTPL_CFTABLE_TPCE_FS_IOM 0x008 /* I/O data exists */ 589 /* I/O addr lines mask */ 590#define CISTPL_CFTABLE_TPCE_FS_IO_ALM 0x01f 591 /* RANGE bit in TPCE_IO */ 592#define CISTPL_CFTABLE_TPCE_FS_IO_RANGEM 0x080 593 /* max of 16 I/O ranges */ 594#define CISTPL_CFTABLE_ENTRY_MAX_IO_RANGES 16 595 596#define CISTPL_CFTABLE_TPCE_FS_IRQM 0x010 /* IRQ data exists */ 597 /* extended IRQ mask exists */ 598#define CISTPL_CFTABLE_TPCE_FS_IRQ_MASKM 0x010 599 600#define CISTPL_CFTABLE_TPCE_FS_MEMM 0x060 /* mem space mask */ 601 /* space selection byte ... */ 602#define CISTPL_CFTABLE_TPCE_FS_MEM3M 0x060 603 /* length (2 bytes) and card address (2 bytes) */ 604#define CISTPL_CFTABLE_TPCE_FS_MEM2M 0x040 605 /* single 2-byte length */ 606#define CISTPL_CFTABLE_TPCE_FS_MEM1M 0x020 607 /* max of 8 mem space descriptors */ 608#define CISTPL_CFTABLE_ENTRY_MAX_MEM_WINDOWS 8 609 /* number of bytes/page description */ 610#define CISTPL_CFTABLE_TPCE_FS_MEM_PGSIZE 256 611 /* host addr info present */ 612#define CISTPL_CFTABLE_TPCE_FS_MEM_HOSTM 0x080 613 614#define CISTPL_CFTABLE_TPCE_FS_MISCM 0x080 /* misc fields mask */ 615 616/* 617 * Constants, macros, structures and flags used by cistpl_pd_parse() 618 * cistpl_expd_parse() and the CISTPL_CFTABLE_ENTRY tuple handler. 619 */ 620#define CISTPL_PD_MAN(m) cistpl_pd_struct.mantissa[m&15] 621#define CISTPL_PD_EXP(e) cistpl_pd_struct.exponent[e&7] 622typedef struct cistpl_pd_struct_t { 623 uint32_t *mantissa; 624 uint32_t *exponent; 625} cistpl_pd_struct_t; 626 627/* 628 * These flags are passed to the caller in the cistpl_cftable_entry_t->flags 629 * field and indicate what interface information is available. The low 630 * order byte of this field is reserved and no flags should be defined 631 * to exist there. 632 */ 633#define CISTPL_CFTABLE_TPCE_DEFAULT 0x000000100 /* this is a default conf */ 634 635/* interface config description present flags */ 636#define CISTPL_CFTABLE_TPCE_IF 0x000000200 /* if config byte exists */ 637/* 638 * When the CISTPL_CFTABLE_TPCE_IF flag is set, the following flags 639 * are available in the ifc member of the cistpl_cftable_entry_t 640 * structure. 641 */ 642#define CISTPL_CFTABLE_TPCE_IF_MEMORY 0x00 /* memory interface */ 643#define CISTPL_CFTABLE_TPCE_IF_IO_MEM 0x01 /* IO and memory */ 644#define CISTPL_CFTABLE_TPCE_IF_RSVD_2 0x02 /* reserved */ 645#define CISTPL_CFTABLE_TPCE_IF_RSVD_3 0x03 /* reserved */ 646#define CISTPL_CFTABLE_TPCE_IF_CUSTOM_0 0x04 /* custom interface 0 */ 647#define CISTPL_CFTABLE_TPCE_IF_CUSTOM_1 0x05 /* custom interface 1 */ 648#define CISTPL_CFTABLE_TPCE_IF_CUSTOM_2 0x06 /* custom interface 2 */ 649#define CISTPL_CFTABLE_TPCE_IF_CUSTOM_3 0x07 /* custom interface 3 */ 650#define CISTPL_CFTABLE_TPCE_IF_RSVD_8 0x08 /* reserved */ 651#define CISTPL_CFTABLE_TPCE_IF_RSVD_9 0x09 /* reserved */ 652#define CISTPL_CFTABLE_TPCE_IF_RSVD_a 0x0a /* reserved */ 653#define CISTPL_CFTABLE_TPCE_IF_RSVD_b 0x0b /* reserved */ 654#define CISTPL_CFTABLE_TPCE_IF_RSVD_c 0x0c /* reserved */ 655#define CISTPL_CFTABLE_TPCE_IF_RSVD_d 0x0d /* reserved */ 656#define CISTPL_CFTABLE_TPCE_IF_RSVD_e 0x0e /* reserved */ 657#define CISTPL_CFTABLE_TPCE_IF_RSVD_f 0x0f /* reserved */ 658#define CISTPL_CFTABLE_TPCE_IF_MASK 0x0f /* interface type mask */ 659#define CISTPL_CFTABLE_TPCE_IF_BVD 0x10 /* BVD active in PRR */ 660#define CISTPL_CFTABLE_TPCE_IF_WP 0x20 /* WP active in PRR */ 661#define CISTPL_CFTABLE_TPCE_IF_RDY 0x40 /* RDY active in PRR */ 662#define CISTPL_CFTABLE_TPCE_IF_MWAIT 0x80 /* WAIT - mem cycles */ 663 664/* power description present flags */ 665#define CISTPL_CFTABLE_TPCE_FS_PWR 0x000001000 /* power info exists */ 666 667/* timing description present flags */ 668#define CISTPL_CFTABLE_TPCE_FS_TD 0x000010000 /* timing info exists */ 669 670/* I/O description present flags */ 671#define CISTPL_CFTABLE_TPCE_FS_IO 0x000100000 /* I/O information exists */ 672 673/* IRQ description present flags */ 674#define CISTPL_CFTABLE_TPCE_FS_IRQ 0x000200000 /* IRQ information exists */ 675 676/* memory space description present flags */ 677#define CISTPL_CFTABLE_TPCE_FS_MEM 0x001000000 /* MEM space info exists */ 678 679/* misc description present flags */ 680#define CISTPL_CFTABLE_TPCE_FS_MISC 0x002000000 /* MISC info exists */ 681 682/* additional information tuples present flags */ 683#define CISTPL_CFTABLE_TPCE_FS_STCE_EV 0x004000000 /* STCE_EV exists */ 684#define CISTPL_CFTABLE_TPCE_FS_STCE_PD 0x008000000 /* STCE_PD exists */ 685 686/* 687 * Power description flags and structures. 688 * 689 * The following eight values represent what the power description structure 690 * parameter selection byte tells us is present. A copy of this byte 691 * is in the low order byte of each parameter's flag field. 692 */ 693#define CISTPL_CFTABLE_PD_NOMV 0x001 /* nominal supply voltage */ 694#define CISTPL_CFTABLE_PD_MINV 0x002 /* minimum supply voltage */ 695#define CISTPL_CFTABLE_PD_MAXV 0x004 /* maximum supply voltage */ 696#define CISTPL_CFTABLE_PD_STATICI 0x008 /* continuous supply current */ 697 /* max current required averaged over 1 second */ 698#define CISTPL_CFTABLE_PD_AVGI 0x010 699 /* maximum current required averaged over 10mS */ 700#define CISTPL_CFTABLE_PD_PEAKI 0x020 701 /* power down supply curent required */ 702#define CISTPL_CFTABLE_PD_PDOWNI 0x040 703 /* power supply is about to blow up */ 704#define CISTPL_CFTABLE_PD_RFU 0x080 705 706/* 707 * For each voltage/current parameter, there is an associated flags field. 708 * The following flags are in this field. The low order byte of each 709 * of these flags fields also contains a copy of the power description 710 * structure parameter selection byte as read from the tuple, that's why 711 * we start the flag values at 0x0100 and go up from there. 712 */ 713 /* this parameter exists */ 714#define CISTPL_CFTABLE_PD_EXISTS 0x000000100 715 /* multiply return value by 10 */ 716#define CISTPL_CFTABLE_PD_MUL10 0x000000200 717 /* no connection on sleep/power down */ 718#define CISTPL_CFTABLE_PD_NC_SLEEP 0x000001000 719 /* zero value required */ 720#define CISTPL_CFTABLE_PD_ZERO 0x000002000 721 /* no connection ever */ 722#define CISTPL_CFTABLE_PD_NC 0x000004000 723 724typedef struct cistpl_cftable_entry_pwr_t { 725 uint32_t nomV; /* nominal supply voltage */ 726 uint32_t nomV_flags; 727 uint32_t minV; /* minimum supply voltage */ 728 uint32_t minV_flags; 729 uint32_t maxV; /* maximum supply voltage */ 730 uint32_t maxV_flags; 731 uint32_t staticI; /* continuous supply current */ 732 uint32_t staticI_flags; 733 uint32_t avgI; /* max current required */ 734 /* averaged over 1 sec. */ 735 uint32_t avgI_flags; 736 uint32_t peakI; /* max current required */ 737 /* averaged over 10mS */ 738 uint32_t peakI_flags; 739 uint32_t pdownI; /* power down supply curent required */ 740 uint32_t pdownI_flags; 741} cistpl_cftable_entry_pwr_t; 742 743/* 744 * Flags for the global power description structure. These show up in 745 * the flags field of the structure. 746 */ 747#define CISTPL_CFTABLE_TPCE_FS_PWR_VCC 0x000000001 /* Vcc description valid */ 748#define CISTPL_CFTABLE_TPCE_FS_PWR_VPP1 0x000000002 /* vpp1 description valid */ 749#define CISTPL_CFTABLE_TPCE_FS_PWR_VPP2 0x000000004 /* Vpp2 description valid */ 750 751typedef struct cistpl_cftable_entry_pd_t { 752 uint32_t flags; /* which descriptions are valid */ 753 struct cistpl_cftable_entry_pwr_t pd_vcc; /* VCC power description */ 754 struct cistpl_cftable_entry_pwr_t pd_vpp1; /* Vpp1 power description */ 755 struct cistpl_cftable_entry_pwr_t pd_vpp2; /* Vpp2 power description */ 756} cistpl_cftable_entry_pd_t; 757 758/* 759 * Device speed structure. Each field is only valid if the 760 * CISTPL_CFTABLE_TPCE_FS_TD flag is set. 761 * 762 * The following flags describe which timing information is available. 763 * They appear in the flags field of the device speed structure. 764 */ 765 /* WAIT timing exists */ 766#define CISTPL_CFTABLE_TPCE_FS_TD_WAIT 0x000000001 767 /* RDY/BSY timing exists */ 768#define CISTPL_CFTABLE_TPCE_FS_TD_RDY 0x000000002 769 /* RSVD timing exists */ 770#define CISTPL_CFTABLE_TPCE_FS_TD_RSVD 0x000000004 771 772typedef struct cistpl_cftable_entry_speed_t { 773 uint32_t flags; /* which timing information is present */ 774 uint32_t wait; /* max WAIT time in device speed format */ 775 uint32_t nS_wait; /* max WAIT time in nS */ 776 uint32_t rdybsy; /* max RDY/BSY time in device speed format */ 777 uint32_t nS_rdybsy; /* max RDY/BSY time in nS */ 778 uint32_t rsvd; /* max RSVD time in device speed format */ 779 uint32_t nS_rsvd; /* max RSVD time in nS */ 780} cistpl_cftable_entry_speed_t; 781 782/* 783 * Device I/O range description structures. Only valid if the 784 * CISTPL_CFTABLE_TPCE_FS_IO flag is set. 785 * 786 * The following flags describe the IO description information. They 787 * appear in the flags field of the IO space description structure. 788 */ 789#define CISTPL_CFTABLE_TPCE_FS_IO_BUS 0x060 /* bus width mask */ 790#define CISTPL_CFTABLE_TPCE_FS_IO_BUS8 0x020 /* 8-bit flag */ 791#define CISTPL_CFTABLE_TPCE_FS_IO_BUS16 0x040 /* 16-bit flag */ 792#define CISTPL_CFTABLE_TPCE_FS_IO_RANGE 0x080 /* IO address ranges exist */ 793 794typedef struct cistpl_cftable_entry_io_range_t { 795 uint32_t addr; /* I/O start address */ 796 uint32_t length; /* I/O register length */ 797} cistpl_cftable_entry_io_range_t; 798typedef struct cistpl_cftable_entry_io_t { 799 uint32_t flags; /* direct copy of TPCE_IO byte in tuple */ 800 uint32_t addr_lines; /* number of decoded I/O address lines */ 801 uint32_t ranges; /* number of I/O ranges */ 802 struct cistpl_cftable_entry_io_range_t 803 range[CISTPL_CFTABLE_ENTRY_MAX_IO_RANGES]; 804} cistpl_cftable_entry_io_t; 805 806/* 807 * Device IRQ description structure. Only valid if the 808 * CISTPL_CFTABLE_TPCE_FS_IRQ flag is set. 809 */ 810typedef struct cistpl_cftable_entry_irq_t { 811 uint32_t flags; /* direct copy of TPCE_IR byte in tuple */ 812 uint32_t irqs; /* bit mask for each allowed IRQ */ 813} cistpl_cftable_entry_irq_t; 814 815/* 816 * Device memory space description structure. Only valid if the 817 * CISTPL_CFTABLE_TPCE_FS_MEM flag is set. 818 * 819 * The following flags describe the memory description information. They 820 * appear in the flags field of the memory space description structure. 821 */ 822 /* space descriptors */ 823#define CISTPL_CFTABLE_TPCE_FS_MEM3 0x000000001 824 /* host_addr=card_addr */ 825#define CISTPL_CFTABLE_TPCE_FS_MEM2 0x000000002 826 /* card address=0, any host address */ 827#define CISTPL_CFTABLE_TPCE_FS_MEM1 0x000000004 828 /* if host address is present in MEM3 */ 829#define CISTPL_CFTABLE_TPCE_FS_MEM_HOST 0x000000008 830 831typedef struct cistpl_cftable_entry_mem_window_t { 832 uint32_t length; /* length of this window */ 833 uint32_t card_addr; /* card address */ 834 uint32_t host_addr; /* host address */ 835} cistpl_cftable_entry_mem_window_t; 836typedef struct cistpl_cftable_entry_mem_t { 837 uint32_t flags; /* memory desc type and host addr info */ 838 uint32_t windows; /* number of memory space descriptors */ 839 cistpl_cftable_entry_mem_window_t 840 window[CISTPL_CFTABLE_ENTRY_MAX_MEM_WINDOWS]; 841} cistpl_cftable_entry_mem_t; 842 843/* 844 * Devices misc description structure. Only valid if the 845 * CISTPL_CFTABLE_TPCE_FS_MISC flag is set. 846 */ 847#define CISTPL_CFTABLE_TPCE_FS_MISC_MAX 2 /* # bytes we understand */ 848#define CISTPL_CFTABLE_TPCE_MI_MTC_MASK 0x00000007 /* max twin cards mask */ 849#define CISTPL_CFTABLE_TPCE_MI_AUDIO 0x00000008 /* audio on BVD2 */ 850#define CISTPL_CFTABLE_TPCE_MI_READONLY 0x00000010 /* R/O storage */ 851#define CISTPL_CFTABLE_TPCE_MI_PWRDOWN 0x00000020 /* powerdown capable */ 852#define CISTPL_CFTABLE_TPCE_MI_DRQ_MASK 0x00000c00 /* DMAREQ mask */ 853#define CISTPL_CFTABLE_TPCE_MI_DRQ_SPK 0x00000400 /* DMAREQ on SPKR */ 854#define CISTPL_CFTABLE_TPCE_MI_DRQ_IOIS 0x00000800 /* DMAREQ on IOIS16 */ 855#define CISTPL_CFTABLE_TPCE_MI_DRQ_INP 0x00000c00 /* DMAREQ on INPACK */ 856#define CISTPL_CFTABLE_TPCE_MI_DMA_8 0x00000000 /* DMA width 8 bits */ 857#define CISTPL_CFTABLE_TPCE_MI_DMA_16 0x00001000 /* DMA width 16 bits */ 858 859typedef struct cistpl_cftable_entry_misc_t { 860 uint32_t flags; /* misc features flags */ 861} cistpl_cftable_entry_misc_t; 862 863/* 864 * Additional information sub-tuples defines and structure 865 */ 866#define STCE_EV 0x0c0 /* Environment Descriptor Subtuple */ 867#define STCE_PD 0x0c1 /* Physical Device Name Subtuple */ 868typedef struct cistpl_cftable_entry_stce_ev_t { 869 char stev_strs[CIS_MAX_TUPLE_DATA_LEN]; 870} cistpl_cftable_entry_stce_ev_t; 871 872typedef struct cistpl_cftable_entry_stce_pd_t { 873 char stpd_strs[CIS_MAX_TUPLE_DATA_LEN]; 874} cistpl_cftable_entry_stce_pd_t; 875 876/* 877 * cistpl_cftable_entry_t - this is the struct that the caller passes 878 * to the CISTPL_CFTABLE_ENTRY handler 879 */ 880typedef struct cistpl_cftable_entry_t { 881 uint32_t flags; /* which descriptions are valid */ 882 uint32_t ifc; /* interface description info */ 883 uint32_t pin; /* values for PRR */ 884 uint32_t index; /* configuration index number */ 885 struct cistpl_cftable_entry_pd_t pd; /* power requirements description */ 886 struct cistpl_cftable_entry_speed_t speed; /* device speed description */ 887 struct cistpl_cftable_entry_io_t io; /* device I/O map */ 888 struct cistpl_cftable_entry_irq_t irq; /* device IRQ utilization */ 889 struct cistpl_cftable_entry_mem_t mem; /* device memory space */ 890 struct cistpl_cftable_entry_misc_t misc; /* misc device features */ 891} cistpl_cftable_entry_t; 892 893/* 894 * CISTPL_LINKTARGET 895 * 896 * This tuple is used to verify that tuple chains other than the primary 897 * chain which starts at offset 0 in Attribute Memory are valid. All 898 * secondary tuple chains are required to contain this tuple as the 899 * first tuple of the chain. 900 * This tuple must have a link field of at least MIN_LINKTARGET_LENGTH and 901 * must contain the byte pattern CISTPL_LINKTARGET_MAGIC. 902 * LINKTARGET_AC_HEADER_LENGTH is the number of bytes contained in a 903 * valid CISTPL_LINKTARGET tuple header. 904 */ 905#define MIN_LINKTARGET_LENGTH 3 906#define CISTPL_LINKTARGET_MAGIC "CIS" 907#define LINKTARGET_AC_HEADER_LENGTH 2 908 909typedef struct cistpl_linktarget_t { 910 uint32_t length; /* number of bytes in tpltg_tag */ 911 char tpltg_tag[CIS_MAX_TUPLE_DATA_LEN]; 912} cistpl_linktarget_t; 913 914/* 915 * CISTPL_LONGLINK_A and CISTPL_LONGLINK_C 916 * 917 * Both of these tuples are processed the same way. The target address is 918 * really an offset from the beginning of the specified address space 919 * and is not a virtual address. 920 * This tuple must have a link field of at least MIN_LONGLINK_AC_LENGTH. 921 */ 922#define MIN_LONGLINK_AC_LENGTH 4 923 924typedef struct cistpl_longlink_ac_t { 925 uint32_t flags; /* space flags */ 926 uint32_t tpll_addr; /* target address, normalized */ 927} cistpl_longlink_ac_t; 928/* 929 * Flags for cistpl_longlink_ac_t->flags 930 */ 931#define CISTPL_LONGLINK_AC_AM 0x0001 /* longlink to AM */ 932#define CISTPL_LONGLINK_AC_CM 0x0002 /* longlink to CM */ 933 934/* 935 * CISTPL_LONGLINK_MFC 936 * 937 * This tuple describes the start of the function-specific CIS for each 938 * function on a multi-function card. 939 * 940 * This tuple must have a link field of at least MIN_LONGLINK_AC_LENGTH. 941 */ 942#define MIN_LONGLINK_MFC_LENGTH 6 943#define MIN_LONGLINK_MFC_NREGS 1 944 945typedef struct cis_function_t { 946 uint32_t tas; /* target address space of function */ 947 uint32_t addr; /* target address offset */ 948} cis_function_t; 949 950typedef struct cistpl_longlink_mfc_t { 951 uint32_t nfuncs; /* number of functions */ 952 uint32_t nregs; /* number of config register sets */ 953 cis_function_t function[CIS_MAX_FUNCTIONS]; 954} cistpl_longlink_mfc_t; 955/* 956 * Flags for cistpl_longlink_mfc_t->function[n]->tas 957 */ 958#define CISTPL_LONGLINK_MFC_TAS_AM 0x00 /* CIS in attribute memory */ 959#define CISTPL_LONGLINK_MFC_TAS_CM 0x01 /* CIS in common memory */ 960 961/* 962 * CISTPL_LONGLINK_CB 963 * 964 * This tuple describes the start of a function's CIS chain 965 * for CardBus cards 966 */ 967typedef struct cistpl_longlink_cb_t { 968 uint32_t flags; /* address space flags */ 969 uint32_t addr; /* raw (unproessed) address value */ 970 union { 971 /* device-dependant config space info */ 972 struct { 973 uint32_t offset; /* offset within config space */ 974 } cfg; 975 /* memory space info */ 976 struct { 977 uint32_t asi; /* BAR */ 978 uint32_t offset; /* offset within BAR space */ 979 } mem; 980 /* expansion ROM space info */ 981 struct { 982 uint32_t image; /* image number */ 983 uint32_t offset; /* offset from iamge base */ 984 } rom; 985 } space; 986} cistpl_longlink_cb_t; 987/* 988 * Flags for cistpl_longlink_cb_t->flags 989 */ 990#define CISTPL_LONGLINK_CB_CFG 0x0001 /* config space info valid */ 991#define CISTPL_LONGLINK_CB_MEM 0x0002 /* memory space info valid */ 992#define CISTPL_LONGLINK_CB_ROM 0x0004 /* expansion ROM space info valid */ 993 994/* 995 * CISTPL_SPCL 996 * 997 * This tuple is the Special Purpose tuple and it's contents are dependant 998 * on the meaning of the header information in this tuple. 999 */ 1000typedef struct cistpl_spcl_t { 1001 uint32_t id; /* tuple contents identification */ 1002 uint32_t seq; /* data sequence number */ 1003 uint32_t bytes; /* number of bytes following */ 1004 uchar_t data[CIS_MAX_TUPLE_DATA_LEN]; 1005} cistpl_spcl_t; 1006/* 1007 * Flags for cistpl_spcl_t->seq 1008 */ 1009#define CISTPL_SPCL_SEQ_END 0x080 /* last tuple in sequence */ 1010 1011/* 1012 * CISTPL_SWIL 1013 * 1014 * This tuple describes the software interleaving of data within a 1015 * partition on the card. 1016 */ 1017typedef struct cistpl_swil_t { 1018 uint32_t intrlv; /* interleave */ 1019} cistpl_swil_t; 1020 1021/* 1022 * CISTPL_BAR 1023 * 1024 * This tuple describes the CardBus Base Address Registers 1025 */ 1026typedef struct cistpl_bar_t { 1027 uint32_t attributes; /* attributes */ 1028 uint32_t size; /* BAR size */ 1029} cistpl_bar_t; 1030/* 1031 * Flags for cistpl_bar_t->attributes 1032 */ 1033#define CISTPL_BAR_ASI_MASK 0x007 /* Base Address Register mask */ 1034#define CISTPL_BAR_ASI_BAR_1 0x001 /* Base Address Register 1 */ 1035#define CISTPL_BAR_ASI_BAR_2 0x002 /* Base Address Register 2 */ 1036#define CISTPL_BAR_ASI_BAR_3 0x003 /* Base Address Register 3 */ 1037#define CISTPL_BAR_ASI_BAR_4 0x004 /* Base Address Register 4 */ 1038#define CISTPL_BAR_ASI_BAR_5 0x005 /* Base Address Register 5 */ 1039#define CISTPL_BAR_ASI_BAR_6 0x006 /* Base Address Register 6 */ 1040#define CISTPL_BAR_ASI_BAR_7 0x007 /* Base Address Register 7 */ 1041#define CISTPL_BAR_ASI_EXP_ROM 0x007 /* Expansion ROM BAR */ 1042 1043#define CISTPL_BAR_AS_MEM 0x000 /* BAR is of type memory */ 1044#define CISTPL_BAR_AS_IO 0x008 /* BAR is of type IO */ 1045 1046#define CISTPL_BAR_PREFETCH_CACHE_MASK 0x060 /* prefetch/cache mask */ 1047#define CISTPL_BAR_PREFETCH 0x020 /* prefetchable not cacheable */ 1048#define CISTPL_BAR_PREFETCH_CACHE 0x040 /* prefetchable and cacheable */ 1049 1050#define CISTPL_BAR_BELOW_1MB 0x080 /* must locate within first MB */ 1051 1052/* 1053 * CISTPL_DEVICEGEO and CISTPL_DEVICEGEO_A 1054 * 1055 * These tuples describe the device geometry of memory partitions. 1056 */ 1057#define CISTPL_DEVICEGEO_MAX_PARTITIONS 42 1058typedef struct cistpl_devicegeo_info_t { 1059 uint32_t bus; /* card interface width in bytes */ 1060 uint32_t ebs; /* minimum erase block size */ 1061 uint32_t rbs; /* minimum read block size */ 1062 uint32_t wbs; /* minimum write bock size */ 1063 uint32_t part; /* segment partition subdivisions */ 1064 uint32_t hwil; /* hardware interleave */ 1065} cistpl_devicegeo_info_t; 1066typedef struct cistpl_devicegeo_t { 1067 cistpl_devicegeo_info_t info[CISTPL_DEVICEGEO_MAX_PARTITIONS]; 1068} cistpl_devicegeo_t; 1069 1070/* 1071 * The cistpl_get_tuple_name_t used to support the HANDTPL_RETURN_NAME 1072 * operation of the CIS parser. 1073 */ 1074typedef struct cistpl_get_tuple_name_t { 1075 char name[CIS_MAX_TUPLE_NAME_LEN]; 1076} cistpl_get_tuple_name_t; 1077 1078/* 1079 * cisparse_t - the structure that unifies all tuple parsing structures 1080 */ 1081typedef union cisparse_t { 1082 cistpl_config_t cistpl_config; 1083 cistpl_device_t cistpl_device; 1084 cistpl_vers_1_t cistpl_vers_1; 1085 cistpl_vers_2_t cistpl_vers_2; 1086 cistpl_jedec_t cistpl_jedec; 1087 cistpl_format_t cistpl_format; 1088 cistpl_geometry_t cistpl_geometry; 1089 cistpl_byteorder_t cistpl_byteorder; 1090 cistpl_date_t cistpl_date; 1091 cistpl_battery_t cistpl_battery; 1092 cistpl_org_t cistpl_org; 1093 cistpl_manfid_t cistpl_manfid; 1094 cistpl_funcid_t cistpl_funcid; 1095 cistpl_funce_t cistpl_funce; 1096 cistpl_cftable_entry_t cistpl_cftable_entry; 1097 cistpl_linktarget_t cistpl_linktarget; 1098 cistpl_longlink_ac_t cistpl_longlink_ac; 1099 cistpl_longlink_mfc_t cistpl_longlink_mfc; 1100 cistpl_spcl_t cistpl_spcl; 1101 cistpl_swil_t cistpl_swil; 1102 cistpl_bar_t cistpl_bar; 1103 cistpl_devicegeo_t cistpl_devicegeo; 1104 cistpl_longlink_cb_t cistpl_longlink_cb; 1105 cistpl_get_tuple_name_t cistpl_get_tuple_name; 1106 /* members below are for legacy support - REMOVE THEM BEFORE FCS!! */ 1107 cistpl_config_t config; 1108 cistpl_device_t device; 1109 cistpl_vers_1_t version_1; 1110 cistpl_vers_2_t version_2; 1111 cistpl_jedec_t jedec; 1112 cistpl_format_t format; 1113 cistpl_geometry_t geometry; 1114 cistpl_byteorder_t byteorder; 1115 cistpl_date_t date; 1116 cistpl_battery_t battery; 1117 cistpl_org_t org; 1118 cistpl_manfid_t manfid; 1119 cistpl_funcid_t funcid; 1120 cistpl_funce_t funce; 1121 cistpl_cftable_entry_t cftable; 1122 cistpl_linktarget_t linktarget; 1123 cistpl_longlink_ac_t longlink_ac; 1124 cistpl_longlink_mfc_t longlink_mfc; 1125 cistpl_spcl_t spcl; 1126 cistpl_swil_t swil; 1127 cistpl_bar_t bar; 1128 cistpl_devicegeo_t devgeo; 1129 cistpl_longlink_cb_t longlink_cb; 1130 cistpl_get_tuple_name_t tuple_name; 1131} cisparse_t; 1132 1133#ifdef __cplusplus 1134} 1135#endif 1136 1137#endif /* _CIS_HANDLERS_H */ 1138