1a23fd11yl/*
2a23fd11yl * CDDL HEADER START
3a23fd11yl *
4a23fd11yl * The contents of this file are subject to the terms of the
5a23fd11yl * Common Development and Distribution License (the "License").
6a23fd11yl * You may not use this file except in compliance with the License.
7a23fd11yl *
8a23fd11yl * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9a23fd11yl * or http://www.opensolaris.org/os/licensing.
10a23fd11yl * See the License for the specific language governing permissions
11a23fd11yl * and limitations under the License.
12a23fd11yl *
13a23fd11yl * When distributing Covered Code, include this CDDL HEADER in each
14a23fd11yl * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15a23fd11yl * If applicable, add the following below this CDDL HEADER, with the
16a23fd11yl * fields enclosed by brackets "[]" replaced with your own identifying
17a23fd11yl * information: Portions Copyright [yyyy] [name of copyright owner]
18a23fd11yl *
19a23fd11yl * CDDL HEADER END
20a23fd11yl *
218347601yl * Copyright (c) 2002-2006 Neterion, Inc.
22a23fd11yl */
23a23fd11yl
24a23fd11yl#ifndef XGE_HAL_MGMT_H
25a23fd11yl#define XGE_HAL_MGMT_H
26a23fd11yl
27a23fd11yl#include "xge-os-pal.h"
28a23fd11yl#include "xge-debug.h"
29a23fd11yl#include "xgehal-types.h"
30a23fd11yl#include "xgehal-config.h"
31a23fd11yl#include "xgehal-stats.h"
32a23fd11yl#include "xgehal-regs.h"
338347601yl#include "xgehal-device.h"
348347601yl
358347601yl__EXTERN_BEGIN_DECLS
36a23fd11yl
37a23fd11yl/**
38a23fd11yl * struct xge_hal_mgmt_about_info_t - About info.
39a23fd11yl * @vendor: PCI Vendor ID.
40a23fd11yl * @device: PCI Device ID.
41a23fd11yl * @subsys_vendor: PCI Subsystem Vendor ID.
42a23fd11yl * @subsys_device: PCI Subsystem Device ID.
43a23fd11yl * @board_rev: PCI Board revision, e.g. 3 - for Xena 3.
44a23fd11yl * @vendor_name: Neterion, Inc.
45a23fd11yl * @chip_name: Xframe.
46a23fd11yl * @media: Fiber, copper.
47a23fd11yl * @hal_major: HAL major version number.
48a23fd11yl * @hal_minor: HAL minor version number.
49a23fd11yl * @hal_fix: HAL fix number.
50a23fd11yl * @hal_build: HAL build number.
51a23fd11yl * @ll_major: Link-layer ULD major version number.
52a23fd11yl * @ll_minor: Link-layer ULD minor version number.
53a23fd11yl * @ll_fix: Link-layer ULD fix version number.
54a23fd11yl * @ll_build: Link-layer ULD build number.
557eced41xw * @transponder_temperature: TODO
56a23fd11yl */
57a23fd11yltypedef struct xge_hal_mgmt_about_info_t {
58a23fd11yl	u16		vendor;
59a23fd11yl	u16		device;
60a23fd11yl	u16		subsys_vendor;
61a23fd11yl	u16		subsys_device;
62a23fd11yl	u8		board_rev;
63a23fd11yl	char		vendor_name[16];
64a23fd11yl	char		chip_name[16];
65a23fd11yl	char		media[16];
66a23fd11yl	char		hal_major[4];
67a23fd11yl	char		hal_minor[4];
68a23fd11yl	char		hal_fix[4];
69a23fd11yl	char		hal_build[16];
70a23fd11yl	char		ll_major[4];
71a23fd11yl	char		ll_minor[4];
72a23fd11yl	char		ll_fix[4];
73a23fd11yl	char		ll_build[16];
748347601yl	u32		transponder_temperature;
75a23fd11yl} xge_hal_mgmt_about_info_t;
76a23fd11yl
77a23fd11yltypedef xge_hal_stats_hw_info_t		xge_hal_mgmt_hw_stats_t;
787eced41xwtypedef xge_hal_stats_pcim_info_t	xge_hal_mgmt_pcim_stats_t;
79a23fd11yltypedef xge_hal_stats_sw_err_t		xge_hal_mgmt_sw_stats_t;
80a23fd11yltypedef xge_hal_stats_device_info_t	xge_hal_mgmt_device_stats_t;
81a23fd11yltypedef xge_hal_stats_channel_info_t	xge_hal_mgmt_channel_stats_t;
82a23fd11yltypedef xge_hal_device_config_t		xge_hal_mgmt_device_config_t;
83a23fd11yltypedef xge_hal_driver_config_t		xge_hal_mgmt_driver_config_t;
84a23fd11yltypedef xge_hal_pci_config_t		xge_hal_mgmt_pci_config_t;
85a23fd11yl
86a23fd11ylxge_hal_status_e
87a23fd11ylxge_hal_mgmt_about(xge_hal_device_h devh, xge_hal_mgmt_about_info_t *about_info,
88a23fd11yl		int size);
89a23fd11yl
90a23fd11ylxge_hal_status_e
91a23fd11ylxge_hal_mgmt_hw_stats(xge_hal_device_h devh, xge_hal_mgmt_hw_stats_t *hw_stats,
92a23fd11yl		int size);
93a23fd11yl
94a23fd11ylxge_hal_status_e
95a23fd11ylxge_hal_mgmt_hw_stats_off(xge_hal_device_h devh, int off, int size, char *out);
96a23fd11yl
97a23fd11ylxge_hal_status_e
987eced41xwxge_hal_mgmt_pcim_stats(xge_hal_device_h devh,
997eced41xw		xge_hal_mgmt_pcim_stats_t *pcim_stats, int size);
1007eced41xw
1017eced41xwxge_hal_status_e
1027eced41xwxge_hal_mgmt_pcim_stats_off(xge_hal_device_h devh, int off, int size,
1037eced41xw		char *out);
1047eced41xw
1057eced41xwxge_hal_status_e
106a23fd11ylxge_hal_mgmt_sw_stats(xge_hal_device_h devh, xge_hal_mgmt_sw_stats_t *hw_stats,
107a23fd11yl		int size);
108a23fd11yl
109a23fd11ylxge_hal_status_e
110a23fd11ylxge_hal_mgmt_device_stats(xge_hal_device_h devh,
111a23fd11yl		xge_hal_mgmt_device_stats_t *device_stats, int size);
112a23fd11yl
113a23fd11ylxge_hal_status_e
114a23fd11ylxge_hal_mgmt_channel_stats(xge_hal_channel_h channelh,
115a23fd11yl		xge_hal_mgmt_channel_stats_t *channel_stats, int size);
116a23fd11yl
117a23fd11ylxge_hal_status_e
118a23fd11ylxge_hal_mgmt_reg_read(xge_hal_device_h devh, int bar_id, unsigned int offset,
119a23fd11yl		u64 *value);
120a23fd11yl
121a23fd11ylxge_hal_status_e
122a23fd11ylxge_hal_mgmt_reg_write(xge_hal_device_h	devh, int bar_id, unsigned int offset,
123a23fd11yl		u64 value);
124a23fd11yl
125a23fd11ylxge_hal_status_e
126a23fd11ylxge_hal_mgmt_pcireg_read(xge_hal_device_h devh, unsigned int offset,
127a23fd11yl		int bits, u32 *value);
128a23fd11yl
129a23fd11ylxge_hal_status_e
130a23fd11ylxge_hal_mgmt_device_config(xge_hal_device_h devh,
131a23fd11yl		xge_hal_mgmt_device_config_t *dev_config, int size);
132a23fd11yl
133a23fd11ylxge_hal_status_e
134a23fd11ylxge_hal_mgmt_driver_config(xge_hal_mgmt_driver_config_t *drv_config,
135a23fd11yl		int size);
136a23fd11yl
137a23fd11ylxge_hal_status_e
138a23fd11ylxge_hal_mgmt_pci_config(xge_hal_device_h devh,
139a23fd11yl		xge_hal_mgmt_pci_config_t *pci_config, int size);
140a23fd11yl
1418347601ylxge_hal_status_e
1428347601ylxge_hal_pma_loopback( xge_hal_device_h devh, int enable );
1438347601yl
1448347601ylxge_hal_status_e
1458347601ylxge_hal_rldram_test(xge_hal_device_h devh, u64 * data);
1468347601yl
1478347601ylu16
1488347601ylxge_hal_mdio_read( xge_hal_device_h devh, u32 mmd_type, u64 addr );
1498347601yl
1508347601ylxge_hal_status_e
1518347601ylxge_hal_mdio_write( xge_hal_device_h devh, u32 mmd_type, u64 addr, u32 value );
1528347601yl
1538347601ylu32
1548347601ylxge_hal_read_xfp_current_temp(xge_hal_device_h devh);
1558347601yl
1567eced41xwxge_hal_status_e
1577eced41xwxge_hal_read_eeprom(xge_hal_device_h devh, int off, u32* data);
1587eced41xw
1597eced41xwxge_hal_status_e
1607eced41xwxge_hal_write_eeprom(xge_hal_device_h devh, int off, u32 data, int cnt);
1617eced41xw
1627eced41xwxge_hal_status_e
1637eced41xwxge_hal_register_test(xge_hal_device_h devh, u64 *data);
1647eced41xw
1657eced41xwxge_hal_status_e
1667eced41xwxge_hal_eeprom_test(xge_hal_device_h devh, u64 *data);
1677eced41xw
1687eced41xwxge_hal_status_e
1697eced41xwxge_hal_bist_test(xge_hal_device_h devh, u64 *data);
1707eced41xw
1717eced41xwxge_hal_status_e
1727eced41xwxge_hal_link_test(xge_hal_device_h devh, u64 *data);
1737eced41xw
1747eced41xwint
1757eced41xwxge_hal_setpause_data(xge_hal_device_h devh, int tx, int rx);
1767eced41xw
1777eced41xwvoid
1787eced41xwxge_hal_getpause_data(xge_hal_device_h devh, int *tx, int *rx);
1797eced41xw
1808347601ylvoid
1818347601yl__hal_updt_stats_xpak(xge_hal_device_t *hldev);
1828347601yl
1837eced41xwvoid
1847eced41xw__hal_chk_xpak_counter(xge_hal_device_t *hldev, int type, u32 value);
1857eced41xw
186a23fd11yl#ifdef XGE_TRACE_INTO_CIRCULAR_ARR
187a23fd11ylxge_hal_status_e
188a23fd11ylxge_hal_mgmt_trace_read(char *buffer, unsigned buf_size, unsigned *offset,
189a23fd11yl		unsigned *read_length);
190a23fd11yl#endif
191a23fd11yl
192a23fd11ylvoid
193a23fd11ylxge_hal_restore_link_led(xge_hal_device_h devh);
194a23fd11yl
195a23fd11yl
196a23fd11ylvoid
197a23fd11ylxge_hal_flick_link_led(xge_hal_device_h devh);
198a23fd11yl
199a23fd11yl/*
200a23fd11yl * Some set of Xena3 Cards were known to have some link LED
201a23fd11yl * Problems. This macro identifies if the card is among them
202a23fd11yl * given its Sub system ID.
203a23fd11yl */
204a23fd11yl#define CARDS_WITH_FAULTY_LINK_INDICATORS(subid) \
205a23fd11yl		((((subid >= 0x600B) && (subid <= 0x600D)) || \
206a23fd11yl		 ((subid >= 0x640B) && (subid <= 0x640D))) ? 1 : 0)
2078347601yl#define CHECKBIT(value, nbit) (value & (1 << nbit))
208a23fd11yl
209a23fd11yl#ifdef XGE_HAL_USE_MGMT_AUX
210a23fd11yl#include "xgehal-mgmtaux.h"
211a23fd11yl#endif
212a23fd11yl
2138347601yl__EXTERN_END_DECLS
2148347601yl
215a23fd11yl#endif /* XGE_HAL_MGMT_H */
216