1*2ca5b659SJoost Mulders /* 2*2ca5b659SJoost Mulders * CDDL HEADER START 3*2ca5b659SJoost Mulders * 4*2ca5b659SJoost Mulders * The contents of this file are subject to the terms of the 5*2ca5b659SJoost Mulders * Common Development and Distribution License (the "License"). 6*2ca5b659SJoost Mulders * You may not use this file except in compliance with the License. 7*2ca5b659SJoost Mulders * 8*2ca5b659SJoost Mulders * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9*2ca5b659SJoost Mulders * or http://www.opensolaris.org/os/licensing. 10*2ca5b659SJoost Mulders * See the License for the specific language governing permissions 11*2ca5b659SJoost Mulders * and limitations under the License. 12*2ca5b659SJoost Mulders * 13*2ca5b659SJoost Mulders * When distributing Covered Code, include this CDDL HEADER in each 14*2ca5b659SJoost Mulders * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15*2ca5b659SJoost Mulders * If applicable, add the following below this CDDL HEADER, with the 16*2ca5b659SJoost Mulders * fields enclosed by brackets "[]" replaced with your own identifying 17*2ca5b659SJoost Mulders * information: Portions Copyright [yyyy] [name of copyright owner] 18*2ca5b659SJoost Mulders * 19*2ca5b659SJoost Mulders * CDDL HEADER END 20*2ca5b659SJoost Mulders */ 21*2ca5b659SJoost Mulders 22*2ca5b659SJoost Mulders /* 23*2ca5b659SJoost Mulders * Copyright 2009 Sun Microsystems, Inc. All rights reserved. 24*2ca5b659SJoost Mulders * Use is subject to license terms. 25*2ca5b659SJoost Mulders */ 26*2ca5b659SJoost Mulders 27*2ca5b659SJoost Mulders #ifndef _VR_H 28*2ca5b659SJoost Mulders #define _VR_H 29*2ca5b659SJoost Mulders 30*2ca5b659SJoost Mulders #ifdef __cplusplus 31*2ca5b659SJoost Mulders extern "C" { 32*2ca5b659SJoost Mulders #endif 33*2ca5b659SJoost Mulders 34*2ca5b659SJoost Mulders /* 35*2ca5b659SJoost Mulders * Number of descriptor entries for each ring. The no. of descriptors is bound 36*2ca5b659SJoost Mulders * to 4K per ring (256 entries a 16 bytes). 37*2ca5b659SJoost Mulders */ 38*2ca5b659SJoost Mulders #define VR_TX_N_DESC 128 39*2ca5b659SJoost Mulders #define VR_RX_N_DESC 256 40*2ca5b659SJoost Mulders 41*2ca5b659SJoost Mulders /* 42*2ca5b659SJoost Mulders * The number of TX interrupts to "schedule" on the ring. 43*2ca5b659SJoost Mulders */ 44*2ca5b659SJoost Mulders #define VR_TX_INTRS_RING 3 45*2ca5b659SJoost Mulders 46*2ca5b659SJoost Mulders /* 47*2ca5b659SJoost Mulders * The the periodic check interval of 2 seconds, in nano seconds 48*2ca5b659SJoost Mulders */ 49*2ca5b659SJoost Mulders #define VR_CHECK_INTERVAL (2000 * 1000 * 1000) 50*2ca5b659SJoost Mulders 51*2ca5b659SJoost Mulders /* 52*2ca5b659SJoost Mulders * The number of TX checks that must pass without progress before we decide 53*2ca5b659SJoost Mulders * to reset the adapter. 54*2ca5b659SJoost Mulders */ 55*2ca5b659SJoost Mulders #define VR_MAXTXCHECKS 12 56*2ca5b659SJoost Mulders 57*2ca5b659SJoost Mulders /* 58*2ca5b659SJoost Mulders * All possible interrupts with the unwanted commented. 59*2ca5b659SJoost Mulders */ 60*2ca5b659SJoost Mulders #define VR_ICR0_CFG (VR_ICR0_RX_DONE | \ 61*2ca5b659SJoost Mulders VR_ICR0_TX_DONE | \ 62*2ca5b659SJoost Mulders VR_ICR0_RX_ERR | \ 63*2ca5b659SJoost Mulders VR_ICR0_TX_ERR | \ 64*2ca5b659SJoost Mulders VR_ICR0_TX_BUF_UFLOW| \ 65*2ca5b659SJoost Mulders VR_ICR0_RX_LINKERR | \ 66*2ca5b659SJoost Mulders VR_ICR0_BUSERR | \ 67*2ca5b659SJoost Mulders /* VR_ICR0_STATSMAX | */ \ 68*2ca5b659SJoost Mulders /* VR_ICR0_RX_EARLY | */ \ 69*2ca5b659SJoost Mulders VR_ICR0_TX_FIFO_UFLOW | \ 70*2ca5b659SJoost Mulders VR_ICR0_RX_FIFO_OFLOW | \ 71*2ca5b659SJoost Mulders VR_ICR0_RX_DROPPED | \ 72*2ca5b659SJoost Mulders VR_ICR0_RX_NOBUF | \ 73*2ca5b659SJoost Mulders VR_ICR0_TX_ABORT | \ 74*2ca5b659SJoost Mulders VR_ICR0_LINKSTATUS | \ 75*2ca5b659SJoost Mulders VR_ICR0_GENERAL) 76*2ca5b659SJoost Mulders 77*2ca5b659SJoost Mulders #define VR_ICR1_CFG (/* VR_ICR1_TIMER0 | */ \ 78*2ca5b659SJoost Mulders /* VR_ICR1_TIMER1 | */ \ 79*2ca5b659SJoost Mulders /* VR_ICR1_PHYEVENT | */ \ 80*2ca5b659SJoost Mulders /* VR_ICR1_TDERR | */ \ 81*2ca5b659SJoost Mulders /* VR_ICR1_SSRCI | */ \ 82*2ca5b659SJoost Mulders /* VR_ICR1_UINTR_SET| */ \ 83*2ca5b659SJoost Mulders /* VR_ICR1_UINTR_CLR| */ \ 84*2ca5b659SJoost Mulders /* VR_ICR1_PWEI */) 85*2ca5b659SJoost Mulders 86*2ca5b659SJoost Mulders /* 87*2ca5b659SJoost Mulders * Our definitions of RX and TX errors. 88*2ca5b659SJoost Mulders */ 89*2ca5b659SJoost Mulders #define VR_ISR_TX_ERR_BITS (VR_ICR0_TX_ERR | \ 90*2ca5b659SJoost Mulders VR_ICR0_TX_BUF_UFLOW | \ 91*2ca5b659SJoost Mulders VR_ICR0_TX_FIFO_UFLOW | \ 92*2ca5b659SJoost Mulders VR_ICR0_TX_ABORT) 93*2ca5b659SJoost Mulders 94*2ca5b659SJoost Mulders #define VR_ISR_RX_ERR_BITS (VR_ICR0_RX_ERR | \ 95*2ca5b659SJoost Mulders VR_ICR0_RX_LINKERR | \ 96*2ca5b659SJoost Mulders VR_ICR0_RX_FIFO_OFLOW | \ 97*2ca5b659SJoost Mulders VR_ICR0_RX_DROPPED | \ 98*2ca5b659SJoost Mulders VR_ICR0_RX_NOBUF) 99*2ca5b659SJoost Mulders 100*2ca5b659SJoost Mulders #define VR_ISR_SYS_ERR_BITS (VR_ICR0_BUSERR) 101*2ca5b659SJoost Mulders 102*2ca5b659SJoost Mulders #define VR_ISR_ERR_BITS (VR_ISR_TX_ERR_BITS | \ 103*2ca5b659SJoost Mulders VR_ISR_RX_ERR_BITS | \ 104*2ca5b659SJoost Mulders VR_ISR_SYS_ERR_BITS) 105*2ca5b659SJoost Mulders #define VR_TX_MAX_INTR_DISTANCE \ 106*2ca5b659SJoost Mulders (VR_TX_N_DESC / VR_TX_INTRS_RING) 107*2ca5b659SJoost Mulders 108*2ca5b659SJoost Mulders 109*2ca5b659SJoost Mulders #define MODULENAME "vr" /* Our name */ 110*2ca5b659SJoost Mulders #define VR_SLOPSZ 2 111*2ca5b659SJoost Mulders #define VR_MAX_PKTSZ (ETHERMAX + ETHERFCSL + VLAN_TAGSZ + VR_SLOPSZ) 112*2ca5b659SJoost Mulders #define VR_DMABUFSZ (VR_MAX_PKTSZ) 113*2ca5b659SJoost Mulders #define VR_MMI_WAITINCR (10) 114*2ca5b659SJoost Mulders #define VR_MMI_WAITMAX (10000) 115*2ca5b659SJoost Mulders #define VR_CAM_SZ (32) 116*2ca5b659SJoost Mulders 117*2ca5b659SJoost Mulders /* 118*2ca5b659SJoost Mulders * PCI identification for the Rhine's. 119*2ca5b659SJoost Mulders */ 120*2ca5b659SJoost Mulders #define VR_PCI_VIA_VENID 0x1106 121*2ca5b659SJoost Mulders #define VR_PCI_DEVID_RHINE 0x3043 122*2ca5b659SJoost Mulders #define VR_PCI_DEVID_RHINE_IIIM 0x3053 123*2ca5b659SJoost Mulders #define VR_PCI_DEVID_RHINE_II2 0x3065 124*2ca5b659SJoost Mulders #define VR_PCI_DEVID_RHINE_III 0x3106 125*2ca5b659SJoost Mulders #define VR_PCI_DEVID_RHINE_II 0x6100 126*2ca5b659SJoost Mulders 127*2ca5b659SJoost Mulders #define VR_PCI_REVID_VT86C100A_E 0x04 128*2ca5b659SJoost Mulders #define VR_PCI_REVID_VT6102_A 0x40 129*2ca5b659SJoost Mulders #define VR_PCI_REVID_VT6102_C 0x42 130*2ca5b659SJoost Mulders #define VR_PCI_REVID_VT6105_A0 0x80 131*2ca5b659SJoost Mulders #define VR_PCI_REVID_VT6105_B0 0x83 132*2ca5b659SJoost Mulders #define VR_PCI_REVID_VT6105_LOM 0x8A 133*2ca5b659SJoost Mulders #define VR_PCI_REVID_VT6107_A0 0x8C 134*2ca5b659SJoost Mulders #define VR_PCI_REVID_VT6107_A1 0x8D 135*2ca5b659SJoost Mulders #define VR_PCI_REVID_VT6105M_A0 0x90 136*2ca5b659SJoost Mulders #define VR_PCI_REVID_VT6105M_B1 0x94 137*2ca5b659SJoost Mulders 138*2ca5b659SJoost Mulders /* 139*2ca5b659SJoost Mulders * Feature bits for the different cards. 140*2ca5b659SJoost Mulders */ 141*2ca5b659SJoost Mulders #define VR_FEATURE_NONE (0) 142*2ca5b659SJoost Mulders #define VR_FEATURE_RX_PAUSE_CAP (1 << 0) /* can receive pauses */ 143*2ca5b659SJoost Mulders #define VR_FEATURE_TX_PAUSE_CAP (1 << 1) /* can transmit pauses */ 144*2ca5b659SJoost Mulders #define VR_FEATURE_MRDLNMULTIPLE (1 << 2) /* can read mult cache lines */ 145*2ca5b659SJoost Mulders #define VR_FEATURE_TXCHKSUM (1 << 3) /* can do TX TCP checksum */ 146*2ca5b659SJoost Mulders #define VR_FEATURE_RXCHKSUM (1 << 4) /* can do RX TCP checksum */ 147*2ca5b659SJoost Mulders #define VR_FEATURE_CAMSUPPORT (1 << 5) /* has a CAM filter */ 148*2ca5b659SJoost Mulders #define VR_FEATURE_VLANTAGGING (1 << 6) /* can do VLAN tagging */ 149*2ca5b659SJoost Mulders #define VR_FEATURE_MIBCOUNTER (1 << 7) /* has a MIB counter */ 150*2ca5b659SJoost Mulders 151*2ca5b659SJoost Mulders /* 152*2ca5b659SJoost Mulders * Bug bits for the different cards. 153*2ca5b659SJoost Mulders */ 154*2ca5b659SJoost Mulders #define VR_BUG_NONE (0) 155*2ca5b659SJoost Mulders #define VR_BUG_TXALIGN (1 << 0) /* needs aligned TX */ 156*2ca5b659SJoost Mulders #define VR_BUG_NEEDMODE10T (1 << 1) /* chip needs mode10t secret */ 157*2ca5b659SJoost Mulders #define VR_BUG_NEEDMIION (1 << 2) /* chip needs miion secret */ 158*2ca5b659SJoost Mulders #define VR_BUG_NEEDMODE2PCEROPT (1 << 3) /* chip needs pceropt */ 159*2ca5b659SJoost Mulders #define VR_BUG_NO_TXQUEUEING (1 << 4) /* chip cannot queue tx */ 160*2ca5b659SJoost Mulders #define VR_BUG_NO_MEMIO (1 << 5) /* chip cannot memory space */ 161*2ca5b659SJoost Mulders #define VR_BUG_MIIPOLLSTOP (1 << 6) /* special to stop polling */ 162*2ca5b659SJoost Mulders 163*2ca5b659SJoost Mulders #define VR_GET8(acc, p) \ 164*2ca5b659SJoost Mulders ddi_get8((acc)->hdl, \ 165*2ca5b659SJoost Mulders (uint8_t *)((void *)((acc)->addr + (p)))) 166*2ca5b659SJoost Mulders #define VR_GET16(acc, p) \ 167*2ca5b659SJoost Mulders ddi_get16((acc)->hdl, \ 168*2ca5b659SJoost Mulders (uint16_t *)((void *)((acc)->addr + (p)))) 169*2ca5b659SJoost Mulders #define VR_GET32(acc, p) \ 170*2ca5b659SJoost Mulders ddi_get32((acc)->hdl, \ 171*2ca5b659SJoost Mulders (uint32_t *)((void *)((acc)->addr + (p)))) 172*2ca5b659SJoost Mulders 173*2ca5b659SJoost Mulders #define VR_PUT8(acc, p, v) \ 174*2ca5b659SJoost Mulders ddi_put8((acc)->hdl, \ 175*2ca5b659SJoost Mulders (uint8_t *)((void *)((acc)->addr + (p))), v) 176*2ca5b659SJoost Mulders #define VR_PUT16(acc, p, v) \ 177*2ca5b659SJoost Mulders ddi_put16((acc)->hdl, \ 178*2ca5b659SJoost Mulders (uint16_t *)((void *)((acc)->addr + (p))), v) 179*2ca5b659SJoost Mulders #define VR_PUT32(acc, p, v) \ 180*2ca5b659SJoost Mulders ddi_put32((acc)->hdl, \ 181*2ca5b659SJoost Mulders (uint32_t *)((void *)((acc)->addr + (p))), v) 182*2ca5b659SJoost Mulders 183*2ca5b659SJoost Mulders /* 184*2ca5b659SJoost Mulders * Clear bit b in register r. 185*2ca5b659SJoost Mulders */ 186*2ca5b659SJoost Mulders #define VR_CLRBIT8(acc, r, b) \ 187*2ca5b659SJoost Mulders VR_PUT8(acc, r, VR_GET8(acc, r) & ~(b)) 188*2ca5b659SJoost Mulders #define VR_CLRBIT16(acc, r, b) \ 189*2ca5b659SJoost Mulders VR_PUT16(acc, r, VR_GET16(acc, r) & ~(b)) 190*2ca5b659SJoost Mulders #define VR_CLRBIT32(acc, r, b) \ 191*2ca5b659SJoost Mulders VR_PUT32(acc, r, VR_GET32(acc, r) & ~(b)) 192*2ca5b659SJoost Mulders 193*2ca5b659SJoost Mulders /* 194*2ca5b659SJoost Mulders * Set bit b in register r. 195*2ca5b659SJoost Mulders */ 196*2ca5b659SJoost Mulders #define VR_SETBIT8(acc, r, b) \ 197*2ca5b659SJoost Mulders VR_PUT8(acc, r, (VR_GET8(acc, r) | (b))) 198*2ca5b659SJoost Mulders #define VR_SETBIT16(acc, r, b) \ 199*2ca5b659SJoost Mulders VR_PUT16(acc, r, (VR_GET16(acc, r) | (b))) 200*2ca5b659SJoost Mulders #define VR_SETBIT32(acc, r, b) \ 201*2ca5b659SJoost Mulders VR_PUT32(acc, r, (VR_GET32(acc, r) | (b))) 202*2ca5b659SJoost Mulders 203*2ca5b659SJoost Mulders /* 204*2ca5b659SJoost Mulders * Set bits b in register r to value v. 205*2ca5b659SJoost Mulders */ 206*2ca5b659SJoost Mulders #define VR_SETBITS8(acc, r, b, v) \ 207*2ca5b659SJoost Mulders VR_PUT8(acc, r, (VR_GET8(acc, r) & ~(b)) | (v)) 208*2ca5b659SJoost Mulders #define VR_SETBITS16(acc, r, b, v) \ 209*2ca5b659SJoost Mulders VR_PUT16(acc, r, (VR_GET16(acc, r) & ~(b)) | (v)) 210*2ca5b659SJoost Mulders #define VR_SETBITS32(acc, r, b, v) \ 211*2ca5b659SJoost Mulders VR_PUT32(acc, r, (VR_GET32(acc, r) & ~(b)) | (v)) 212*2ca5b659SJoost Mulders 213*2ca5b659SJoost Mulders /* 214*2ca5b659SJoost Mulders * The descriptor as used by the MAC. 215*2ca5b659SJoost Mulders */ 216*2ca5b659SJoost Mulders typedef struct { 217*2ca5b659SJoost Mulders uint32_t stat0; 218*2ca5b659SJoost Mulders uint32_t stat1; 219*2ca5b659SJoost Mulders uint32_t data; 220*2ca5b659SJoost Mulders uint32_t next; 221*2ca5b659SJoost Mulders } vr_chip_desc_t; 222*2ca5b659SJoost Mulders 223*2ca5b659SJoost Mulders /* 224*2ca5b659SJoost Mulders * A structure describing an DMA object. 225*2ca5b659SJoost Mulders */ 226*2ca5b659SJoost Mulders typedef struct data_dma { 227*2ca5b659SJoost Mulders ddi_dma_handle_t handle; 228*2ca5b659SJoost Mulders ddi_acc_handle_t acchdl; 229*2ca5b659SJoost Mulders uint32_t paddr; 230*2ca5b659SJoost Mulders char *buf; 231*2ca5b659SJoost Mulders size_t bufsz; 232*2ca5b659SJoost Mulders } vr_data_dma_t; 233*2ca5b659SJoost Mulders 234*2ca5b659SJoost Mulders /* 235*2ca5b659SJoost Mulders * A descriptor as used by the host. 236*2ca5b659SJoost Mulders */ 237*2ca5b659SJoost Mulders typedef struct vr_desc { 238*2ca5b659SJoost Mulders vr_chip_desc_t *cdesc; 239*2ca5b659SJoost Mulders uint32_t paddr; /* paddr of cdesc */ 240*2ca5b659SJoost Mulders uint32_t offset; /* offset to paddr */ 241*2ca5b659SJoost Mulders struct vr_desc *next; 242*2ca5b659SJoost Mulders vr_data_dma_t dmabuf; 243*2ca5b659SJoost Mulders } vr_desc_t; 244*2ca5b659SJoost Mulders 245*2ca5b659SJoost Mulders typedef struct vr_ring { 246*2ca5b659SJoost Mulders vr_desc_t *desc; 247*2ca5b659SJoost Mulders vr_chip_desc_t *cdesc; 248*2ca5b659SJoost Mulders uint32_t cdesc_paddr; 249*2ca5b659SJoost Mulders ddi_dma_handle_t handle; 250*2ca5b659SJoost Mulders ddi_acc_handle_t acchdl; 251*2ca5b659SJoost Mulders } vr_ring_t; 252*2ca5b659SJoost Mulders 253*2ca5b659SJoost Mulders typedef struct { 254*2ca5b659SJoost Mulders kmutex_t lock; 255*2ca5b659SJoost Mulders uint32_t ndesc; 256*2ca5b659SJoost Mulders uint32_t nfree; 257*2ca5b659SJoost Mulders uint32_t stallticks; 258*2ca5b659SJoost Mulders uint32_t resched; 259*2ca5b659SJoost Mulders uint32_t intr_distance; 260*2ca5b659SJoost Mulders vr_desc_t *ring; 261*2ca5b659SJoost Mulders vr_desc_t *wp; /* write pointer */ 262*2ca5b659SJoost Mulders vr_desc_t *cp; /* claim pointer */ 263*2ca5b659SJoost Mulders } vr_tx_t; 264*2ca5b659SJoost Mulders 265*2ca5b659SJoost Mulders typedef struct { 266*2ca5b659SJoost Mulders uint32_t ndesc; 267*2ca5b659SJoost Mulders vr_desc_t *ring; 268*2ca5b659SJoost Mulders vr_desc_t *rp; /* read pointer */ 269*2ca5b659SJoost Mulders } vr_rx_t; 270*2ca5b659SJoost Mulders 271*2ca5b659SJoost Mulders typedef enum { 272*2ca5b659SJoost Mulders VR_LINK_STATE_UNKNOWN = LINK_STATE_UNKNOWN, 273*2ca5b659SJoost Mulders VR_LINK_STATE_DOWN = LINK_STATE_DOWN, 274*2ca5b659SJoost Mulders VR_LINK_STATE_UP = LINK_STATE_UP 275*2ca5b659SJoost Mulders } vr_link_state_t; 276*2ca5b659SJoost Mulders 277*2ca5b659SJoost Mulders typedef enum { 278*2ca5b659SJoost Mulders VR_LINK_SPEED_UNKNOWN, 279*2ca5b659SJoost Mulders VR_LINK_SPEED_10MBS, 280*2ca5b659SJoost Mulders VR_LINK_SPEED_100MBS 281*2ca5b659SJoost Mulders } vr_link_speed_t; 282*2ca5b659SJoost Mulders 283*2ca5b659SJoost Mulders typedef enum { 284*2ca5b659SJoost Mulders VR_LINK_DUPLEX_UNKNOWN = LINK_DUPLEX_UNKNOWN, 285*2ca5b659SJoost Mulders VR_LINK_DUPLEX_FULL = LINK_DUPLEX_FULL, 286*2ca5b659SJoost Mulders VR_LINK_DUPLEX_HALF = LINK_DUPLEX_HALF 287*2ca5b659SJoost Mulders } vr_link_duplex_t; 288*2ca5b659SJoost Mulders 289*2ca5b659SJoost Mulders typedef enum { 290*2ca5b659SJoost Mulders VR_LINK_AUTONEG_UNKNOWN, 291*2ca5b659SJoost Mulders VR_LINK_AUTONEG_OFF, 292*2ca5b659SJoost Mulders VR_LINK_AUTONEG_ON 293*2ca5b659SJoost Mulders } vr_link_autoneg_t; 294*2ca5b659SJoost Mulders 295*2ca5b659SJoost Mulders /* 296*2ca5b659SJoost Mulders * Pause variations. 297*2ca5b659SJoost Mulders */ 298*2ca5b659SJoost Mulders typedef enum { 299*2ca5b659SJoost Mulders VR_PAUSE_UNKNOWN, 300*2ca5b659SJoost Mulders VR_PAUSE_NONE = LINK_FLOWCTRL_NONE, 301*2ca5b659SJoost Mulders VR_PAUSE_TRANSMIT = LINK_FLOWCTRL_TX, 302*2ca5b659SJoost Mulders VR_PAUSE_RECEIVE = LINK_FLOWCTRL_RX, 303*2ca5b659SJoost Mulders VR_PAUSE_BIDIRECTIONAL = LINK_FLOWCTRL_BI 304*2ca5b659SJoost Mulders } vr_link_flowctrl_t; 305*2ca5b659SJoost Mulders 306*2ca5b659SJoost Mulders /* 307*2ca5b659SJoost Mulders * Type of medium attachement unit. 308*2ca5b659SJoost Mulders */ 309*2ca5b659SJoost Mulders typedef enum { 310*2ca5b659SJoost Mulders VR_MAU_UNKNOWN = XCVR_UNDEFINED, 311*2ca5b659SJoost Mulders VR_MAU_NONE = XCVR_NONE, 312*2ca5b659SJoost Mulders VR_MAU_10 = XCVR_10, 313*2ca5b659SJoost Mulders VR_MAU_100T4 = XCVR_100T4, 314*2ca5b659SJoost Mulders VR_MAU_100X = XCVR_100X, 315*2ca5b659SJoost Mulders VR_MAU_100T2 = XCVR_100T2, 316*2ca5b659SJoost Mulders VR_MAU_1000X = XCVR_1000X, 317*2ca5b659SJoost Mulders VR_MAU_1000T = XCVR_1000T 318*2ca5b659SJoost Mulders } vr_mau_t; 319*2ca5b659SJoost Mulders 320*2ca5b659SJoost Mulders typedef struct { 321*2ca5b659SJoost Mulders vr_link_state_t state; 322*2ca5b659SJoost Mulders vr_link_speed_t speed; 323*2ca5b659SJoost Mulders vr_link_duplex_t duplex; 324*2ca5b659SJoost Mulders vr_link_flowctrl_t flowctrl; 325*2ca5b659SJoost Mulders vr_mau_t mau; 326*2ca5b659SJoost Mulders } vr_link_t; 327*2ca5b659SJoost Mulders 328*2ca5b659SJoost Mulders typedef enum { 329*2ca5b659SJoost Mulders CHIPSTATE_UNKNOWN, 330*2ca5b659SJoost Mulders CHIPSTATE_INITIALIZED, 331*2ca5b659SJoost Mulders CHIPSTATE_RUNNING, 332*2ca5b659SJoost Mulders CHIPSTATE_STOPPED, 333*2ca5b659SJoost Mulders CHIPSTATE_SLEEPING, 334*2ca5b659SJoost Mulders CHIPSTATE_SUSPENDED, 335*2ca5b659SJoost Mulders CHIPSTATE_SUSPENDED_RUNNING, 336*2ca5b659SJoost Mulders CHIPSTATE_ERROR 337*2ca5b659SJoost Mulders } vr_chip_state_t; 338*2ca5b659SJoost Mulders 339*2ca5b659SJoost Mulders typedef struct { 340*2ca5b659SJoost Mulders uint16_t control; 341*2ca5b659SJoost Mulders uint16_t status; 342*2ca5b659SJoost Mulders uint16_t identh; 343*2ca5b659SJoost Mulders uint16_t identl; 344*2ca5b659SJoost Mulders uint16_t anadv; 345*2ca5b659SJoost Mulders uint16_t lpable; 346*2ca5b659SJoost Mulders uint16_t anexp; 347*2ca5b659SJoost Mulders } mii_t; 348*2ca5b659SJoost Mulders 349*2ca5b659SJoost Mulders /* 350*2ca5b659SJoost Mulders * A structure defining the various types of cards and their habits. 351*2ca5b659SJoost Mulders */ 352*2ca5b659SJoost Mulders typedef struct { 353*2ca5b659SJoost Mulders uint8_t revmin; 354*2ca5b659SJoost Mulders uint8_t revmax; 355*2ca5b659SJoost Mulders char name[128]; 356*2ca5b659SJoost Mulders uint32_t bugs; 357*2ca5b659SJoost Mulders uint32_t features; 358*2ca5b659SJoost Mulders } chip_info_t; 359*2ca5b659SJoost Mulders 360*2ca5b659SJoost Mulders /* 361*2ca5b659SJoost Mulders * A structure describing the card. 362*2ca5b659SJoost Mulders */ 363*2ca5b659SJoost Mulders typedef struct { 364*2ca5b659SJoost Mulders uint16_t vendor; 365*2ca5b659SJoost Mulders uint16_t device; 366*2ca5b659SJoost Mulders uint8_t revision; 367*2ca5b659SJoost Mulders vr_chip_state_t state; 368*2ca5b659SJoost Mulders mii_t mii; 369*2ca5b659SJoost Mulders vr_link_t link; 370*2ca5b659SJoost Mulders chip_info_t info; 371*2ca5b659SJoost Mulders uint32_t phyaddr; 372*2ca5b659SJoost Mulders } vr_chip_t; 373*2ca5b659SJoost Mulders 374*2ca5b659SJoost Mulders /* 375*2ca5b659SJoost Mulders * Operational parameters. 376*2ca5b659SJoost Mulders */ 377*2ca5b659SJoost Mulders typedef struct { 378*2ca5b659SJoost Mulders uint16_t anadv_en; 379*2ca5b659SJoost Mulders uint16_t an_phymask; 380*2ca5b659SJoost Mulders uint16_t an_macmask; 381*2ca5b659SJoost Mulders vr_link_autoneg_t an_en; 382*2ca5b659SJoost Mulders uint32_t mtu; 383*2ca5b659SJoost Mulders } vr_param_t; 384*2ca5b659SJoost Mulders 385*2ca5b659SJoost Mulders typedef enum { 386*2ca5b659SJoost Mulders VR_SUCCESS = 0, 387*2ca5b659SJoost Mulders VR_FAILURE = 1 388*2ca5b659SJoost Mulders } vr_result_t; 389*2ca5b659SJoost Mulders 390*2ca5b659SJoost Mulders typedef struct { 391*2ca5b659SJoost Mulders uint64_t ether_stat_align_errors; 392*2ca5b659SJoost Mulders uint64_t ether_stat_carrier_errors; 393*2ca5b659SJoost Mulders uint64_t ether_stat_ex_collisions; 394*2ca5b659SJoost Mulders uint64_t ether_stat_fcs_errors; 395*2ca5b659SJoost Mulders uint64_t ether_stat_first_collisions; 396*2ca5b659SJoost Mulders uint64_t ether_stat_macrcv_errors; 397*2ca5b659SJoost Mulders uint64_t ether_stat_macxmt_errors; 398*2ca5b659SJoost Mulders uint64_t ether_stat_multi_collisions; 399*2ca5b659SJoost Mulders uint64_t ether_stat_toolong_errors; 400*2ca5b659SJoost Mulders uint64_t ether_stat_tooshort_errors; 401*2ca5b659SJoost Mulders uint64_t ether_stat_tx_late_collisions; 402*2ca5b659SJoost Mulders uint64_t ether_stat_defer_xmts; 403*2ca5b659SJoost Mulders uint64_t mac_stat_brdcstrcv; 404*2ca5b659SJoost Mulders uint64_t mac_stat_brdcstxmt; 405*2ca5b659SJoost Mulders uint64_t mac_stat_multixmt; 406*2ca5b659SJoost Mulders uint64_t mac_stat_collisions; 407*2ca5b659SJoost Mulders uint64_t mac_stat_ierrors; 408*2ca5b659SJoost Mulders uint64_t mac_stat_ipackets; 409*2ca5b659SJoost Mulders uint64_t mac_stat_multircv; 410*2ca5b659SJoost Mulders uint64_t mac_stat_norcvbuf; 411*2ca5b659SJoost Mulders uint64_t mac_stat_noxmtbuf; 412*2ca5b659SJoost Mulders uint64_t mac_stat_obytes; 413*2ca5b659SJoost Mulders uint64_t mac_stat_opackets; 414*2ca5b659SJoost Mulders uint64_t mac_stat_rbytes; 415*2ca5b659SJoost Mulders uint64_t mac_stat_underflows; 416*2ca5b659SJoost Mulders uint64_t mac_stat_overflows; 417*2ca5b659SJoost Mulders uint64_t cyclics; 418*2ca5b659SJoost Mulders uint64_t txchecks; 419*2ca5b659SJoost Mulders uint64_t intr_claimed; 420*2ca5b659SJoost Mulders uint64_t intr_unclaimed; 421*2ca5b659SJoost Mulders uint64_t linkchanges; 422*2ca5b659SJoost Mulders uint64_t txcpybytes; 423*2ca5b659SJoost Mulders uint64_t txmapbytes; 424*2ca5b659SJoost Mulders uint64_t rxcpybytes; 425*2ca5b659SJoost Mulders uint64_t rxmapbytes; 426*2ca5b659SJoost Mulders uint64_t txreclaim0; 427*2ca5b659SJoost Mulders uint64_t txreclaims; 428*2ca5b659SJoost Mulders uint32_t txstalls; 429*2ca5b659SJoost Mulders uint32_t resets; 430*2ca5b659SJoost Mulders uint32_t allocbfail; 431*2ca5b659SJoost Mulders } vr_stats_t; 432*2ca5b659SJoost Mulders 433*2ca5b659SJoost Mulders /* 434*2ca5b659SJoost Mulders * Access attributes for the card. 435*2ca5b659SJoost Mulders */ 436*2ca5b659SJoost Mulders typedef struct { 437*2ca5b659SJoost Mulders ddi_acc_handle_t hdl; 438*2ca5b659SJoost Mulders caddr_t addr; 439*2ca5b659SJoost Mulders pci_regspec_t reg; 440*2ca5b659SJoost Mulders } vr_acc_t; 441*2ca5b659SJoost Mulders 442*2ca5b659SJoost Mulders /* 443*2ca5b659SJoost Mulders * Instance state structure. 444*2ca5b659SJoost Mulders */ 445*2ca5b659SJoost Mulders typedef struct { 446*2ca5b659SJoost Mulders kmutex_t oplock; 447*2ca5b659SJoost Mulders dev_info_t *devinfo; 448*2ca5b659SJoost Mulders uint8_t vendor_ether_addr [ETHERADDRL]; 449*2ca5b659SJoost Mulders char ifname[12]; 450*2ca5b659SJoost Mulders mac_handle_t machdl; 451*2ca5b659SJoost Mulders ddi_intr_handle_t intr_hdl; 452*2ca5b659SJoost Mulders uint_t intr_pri; 453*2ca5b659SJoost Mulders kmutex_t intrlock; 454*2ca5b659SJoost Mulders vr_chip_t chip; 455*2ca5b659SJoost Mulders vr_ring_t txring; 456*2ca5b659SJoost Mulders vr_ring_t rxring; 457*2ca5b659SJoost Mulders vr_rx_t rx; 458*2ca5b659SJoost Mulders vr_tx_t tx; 459*2ca5b659SJoost Mulders ddi_periodic_t periodic_id; 460*2ca5b659SJoost Mulders int nsets; 461*2ca5b659SJoost Mulders vr_acc_t *regset; 462*2ca5b659SJoost Mulders vr_acc_t *acc_mem; 463*2ca5b659SJoost Mulders vr_acc_t *acc_io; 464*2ca5b659SJoost Mulders vr_acc_t *acc_cfg; 465*2ca5b659SJoost Mulders vr_acc_t *acc_reg; 466*2ca5b659SJoost Mulders vr_param_t param; 467*2ca5b659SJoost Mulders vr_stats_t stats; 468*2ca5b659SJoost Mulders struct kstat *ksp; 469*2ca5b659SJoost Mulders vr_param_t defaults; 470*2ca5b659SJoost Mulders uint32_t promisc; 471*2ca5b659SJoost Mulders uint32_t mhash0; 472*2ca5b659SJoost Mulders uint32_t mhash1; 473*2ca5b659SJoost Mulders uint32_t mcount; 474*2ca5b659SJoost Mulders uint32_t reset; 475*2ca5b659SJoost Mulders } vr_t; 476*2ca5b659SJoost Mulders 477*2ca5b659SJoost Mulders /* 478*2ca5b659SJoost Mulders * Function prototypes. 479*2ca5b659SJoost Mulders */ 480*2ca5b659SJoost Mulders int vr_mac_getstat(void *arg, uint_t stat, uint64_t *val); 481*2ca5b659SJoost Mulders int vr_mac_start(void *vrp); 482*2ca5b659SJoost Mulders void vr_mac_stop(void *vrp); 483*2ca5b659SJoost Mulders int vr_mac_set_promisc(void *vrp, boolean_t promiscflag); 484*2ca5b659SJoost Mulders int vr_mac_set_multicast(void *vrp, boolean_t add, 485*2ca5b659SJoost Mulders const uint8_t *mca); 486*2ca5b659SJoost Mulders int vr_mac_set_ether_addr(void *vrp, 487*2ca5b659SJoost Mulders const uint8_t *macaddr); 488*2ca5b659SJoost Mulders mblk_t *vr_mac_tx_enqueue_list(void *p, mblk_t *mp); 489*2ca5b659SJoost Mulders int vr_mac_getprop(void *arg, const char *pr_name, 490*2ca5b659SJoost Mulders mac_prop_id_t pr_num, uint_t pr_flags, 491*2ca5b659SJoost Mulders uint_t pr_valsize, void *pr_val, uint_t *perm); 492*2ca5b659SJoost Mulders int vr_mac_setprop(void *arg, const char *pr_name, 493*2ca5b659SJoost Mulders mac_prop_id_t pr_num, 494*2ca5b659SJoost Mulders uint_t pr_valsize, const void *pr_val); 495*2ca5b659SJoost Mulders uint_t vr_intr(caddr_t arg1, caddr_t arg2); 496*2ca5b659SJoost Mulders #ifdef __cplusplus 497*2ca5b659SJoost Mulders } 498*2ca5b659SJoost Mulders #endif 499*2ca5b659SJoost Mulders #endif /* _VR_H */ 500