12ca5b65Joost Mulders/*
22ca5b65Joost Mulders * CDDL HEADER START
32ca5b65Joost Mulders *
42ca5b65Joost Mulders * The contents of this file are subject to the terms of the
52ca5b65Joost Mulders * Common Development and Distribution License (the "License").
62ca5b65Joost Mulders * You may not use this file except in compliance with the License.
72ca5b65Joost Mulders *
82ca5b65Joost Mulders * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
92ca5b65Joost Mulders * or http://www.opensolaris.org/os/licensing.
102ca5b65Joost Mulders * See the License for the specific language governing permissions
112ca5b65Joost Mulders * and limitations under the License.
122ca5b65Joost Mulders *
132ca5b65Joost Mulders * When distributing Covered Code, include this CDDL HEADER in each
142ca5b65Joost Mulders * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
152ca5b65Joost Mulders * If applicable, add the following below this CDDL HEADER, with the
162ca5b65Joost Mulders * fields enclosed by brackets "[]" replaced with your own identifying
172ca5b65Joost Mulders * information: Portions Copyright [yyyy] [name of copyright owner]
182ca5b65Joost Mulders *
192ca5b65Joost Mulders * CDDL HEADER END
202ca5b65Joost Mulders */
212ca5b65Joost Mulders
222ca5b65Joost Mulders/*
230dc2366Venugopal Iyer * Copyright 2010 Sun Microsystems, Inc.  All rights reserved.
242ca5b65Joost Mulders * Use is subject to license terms.
252ca5b65Joost Mulders */
262ca5b65Joost Mulders
272ca5b65Joost Mulders#ifndef _VR_H
282ca5b65Joost Mulders#define	_VR_H
292ca5b65Joost Mulders
302ca5b65Joost Mulders#ifdef __cplusplus
312ca5b65Joost Mulders	extern "C" {
322ca5b65Joost Mulders#endif
332ca5b65Joost Mulders
342ca5b65Joost Mulders/*
352ca5b65Joost Mulders * Number of descriptor entries for each ring. The no. of descriptors is bound
362ca5b65Joost Mulders * to 4K per ring (256 entries a 16 bytes).
372ca5b65Joost Mulders */
382ca5b65Joost Mulders#define	VR_TX_N_DESC		128
392ca5b65Joost Mulders#define	VR_RX_N_DESC		256
402ca5b65Joost Mulders
412ca5b65Joost Mulders/*
422ca5b65Joost Mulders * The number of TX interrupts to "schedule" on the ring.
432ca5b65Joost Mulders */
442ca5b65Joost Mulders#define	VR_TX_INTRS_RING	3
452ca5b65Joost Mulders
462ca5b65Joost Mulders/*
472ca5b65Joost Mulders * The the periodic check interval of 2 seconds, in nano seconds
482ca5b65Joost Mulders */
492ca5b65Joost Mulders#define	VR_CHECK_INTERVAL	(2000 * 1000 * 1000)
502ca5b65Joost Mulders
512ca5b65Joost Mulders/*
522ca5b65Joost Mulders * The number of TX checks that must pass without progress before we decide
532ca5b65Joost Mulders * to reset the adapter.
542ca5b65Joost Mulders */
552ca5b65Joost Mulders#define	VR_MAXTXCHECKS		12
562ca5b65Joost Mulders
572ca5b65Joost Mulders/*
582ca5b65Joost Mulders * All possible interrupts with the unwanted commented.
592ca5b65Joost Mulders */
602ca5b65Joost Mulders#define	VR_ICR0_CFG	(VR_ICR0_RX_DONE	| \
612ca5b65Joost Mulders			    VR_ICR0_TX_DONE	| \
622ca5b65Joost Mulders			    VR_ICR0_RX_ERR	| \
632ca5b65Joost Mulders			    VR_ICR0_TX_ERR	| \
642ca5b65Joost Mulders			    VR_ICR0_TX_BUF_UFLOW| \
652ca5b65Joost Mulders			    VR_ICR0_RX_LINKERR	| \
662ca5b65Joost Mulders			    VR_ICR0_BUSERR	| \
672ca5b65Joost Mulders			    /* VR_ICR0_STATSMAX	| */ \
682ca5b65Joost Mulders			    /* VR_ICR0_RX_EARLY	| */ \
692ca5b65Joost Mulders			    VR_ICR0_TX_FIFO_UFLOW	| \
702ca5b65Joost Mulders			    VR_ICR0_RX_FIFO_OFLOW	| \
712ca5b65Joost Mulders			    VR_ICR0_RX_DROPPED	| \
722ca5b65Joost Mulders			    VR_ICR0_RX_NOBUF  	| \
732ca5b65Joost Mulders			    VR_ICR0_TX_ABORT	| \
742ca5b65Joost Mulders			    VR_ICR0_LINKSTATUS	| \
752ca5b65Joost Mulders			    VR_ICR0_GENERAL)
762ca5b65Joost Mulders
772ca5b65Joost Mulders#define	VR_ICR1_CFG	(/* VR_ICR1_TIMER0	| */ \
782ca5b65Joost Mulders			    /* VR_ICR1_TIMER1	| */ \
792ca5b65Joost Mulders			    /* VR_ICR1_PHYEVENT	| */ \
802ca5b65Joost Mulders			    /* VR_ICR1_TDERR	| */ \
812ca5b65Joost Mulders			    /* VR_ICR1_SSRCI	| */ \
822ca5b65Joost Mulders			    /* VR_ICR1_UINTR_SET| */ \
832ca5b65Joost Mulders			    /* VR_ICR1_UINTR_CLR| */ \
842ca5b65Joost Mulders			    /* VR_ICR1_PWEI */)
852ca5b65Joost Mulders
862ca5b65Joost Mulders/*
872ca5b65Joost Mulders * Our definitions of RX and TX errors.
882ca5b65Joost Mulders */
892ca5b65Joost Mulders#define	VR_ISR_TX_ERR_BITS	(VR_ICR0_TX_ERR | \
902ca5b65Joost Mulders					VR_ICR0_TX_BUF_UFLOW | \
912ca5b65Joost Mulders					VR_ICR0_TX_FIFO_UFLOW | \
922ca5b65Joost Mulders					VR_ICR0_TX_ABORT)
932ca5b65Joost Mulders
942ca5b65Joost Mulders#define	VR_ISR_RX_ERR_BITS	(VR_ICR0_RX_ERR | \
952ca5b65Joost Mulders					VR_ICR0_RX_LINKERR | \
962ca5b65Joost Mulders					VR_ICR0_RX_FIFO_OFLOW | \
972ca5b65Joost Mulders					VR_ICR0_RX_DROPPED | \
982ca5b65Joost Mulders					VR_ICR0_RX_NOBUF)
992ca5b65Joost Mulders
1002ca5b65Joost Mulders#define	VR_ISR_SYS_ERR_BITS	(VR_ICR0_BUSERR)
1012ca5b65Joost Mulders
1022ca5b65Joost Mulders#define	VR_ISR_ERR_BITS		(VR_ISR_TX_ERR_BITS | \
1032ca5b65Joost Mulders					VR_ISR_RX_ERR_BITS | \
1042ca5b65Joost Mulders					VR_ISR_SYS_ERR_BITS)
1052ca5b65Joost Mulders#define	VR_TX_MAX_INTR_DISTANCE \
1062ca5b65Joost Mulders			(VR_TX_N_DESC / VR_TX_INTRS_RING)
1072ca5b65Joost Mulders
1082ca5b65Joost Mulders
1092ca5b65Joost Mulders#define	MODULENAME		"vr"	/* Our name */
1102ca5b65Joost Mulders#define	VR_SLOPSZ		2
1112ca5b65Joost Mulders#define	VR_MAX_PKTSZ		(ETHERMAX + ETHERFCSL + VLAN_TAGSZ + VR_SLOPSZ)
1122ca5b65Joost Mulders#define	VR_DMABUFSZ		(VR_MAX_PKTSZ)
1132ca5b65Joost Mulders#define	VR_MMI_WAITINCR		(10)
1142ca5b65Joost Mulders#define	VR_MMI_WAITMAX		(10000)
1152ca5b65Joost Mulders#define	VR_CAM_SZ		(32)
1162ca5b65Joost Mulders
1172ca5b65Joost Mulders/*
1182ca5b65Joost Mulders * PCI identification for the Rhine's.
1192ca5b65Joost Mulders */
1202ca5b65Joost Mulders#define	VR_PCI_VIA_VENID		0x1106
1212ca5b65Joost Mulders#define	VR_PCI_DEVID_RHINE		0x3043
1222ca5b65Joost Mulders#define	VR_PCI_DEVID_RHINE_IIIM		0x3053
1232ca5b65Joost Mulders#define	VR_PCI_DEVID_RHINE_II2		0x3065
1242ca5b65Joost Mulders#define	VR_PCI_DEVID_RHINE_III		0x3106
1252ca5b65Joost Mulders#define	VR_PCI_DEVID_RHINE_II		0x6100
1262ca5b65Joost Mulders
1272ca5b65Joost Mulders#define	VR_PCI_REVID_VT86C100A_E	0x04
1282ca5b65Joost Mulders#define	VR_PCI_REVID_VT6102_A		0x40
1292ca5b65Joost Mulders#define	VR_PCI_REVID_VT6102_C		0x42
1302ca5b65Joost Mulders#define	VR_PCI_REVID_VT6105_A0		0x80
1312ca5b65Joost Mulders#define	VR_PCI_REVID_VT6105_B0		0x83
1322ca5b65Joost Mulders#define	VR_PCI_REVID_VT6105_LOM		0x8A
1332ca5b65Joost Mulders#define	VR_PCI_REVID_VT6107_A0		0x8C
1342ca5b65Joost Mulders#define	VR_PCI_REVID_VT6107_A1		0x8D
1352ca5b65Joost Mulders#define	VR_PCI_REVID_VT6105M_A0		0x90
1362ca5b65Joost Mulders#define	VR_PCI_REVID_VT6105M_B1		0x94
1372ca5b65Joost Mulders
1382ca5b65Joost Mulders/*
1392ca5b65Joost Mulders * Feature bits for the different cards.
1402ca5b65Joost Mulders */
1412ca5b65Joost Mulders#define	VR_FEATURE_NONE			(0)
1422ca5b65Joost Mulders#define	VR_FEATURE_RX_PAUSE_CAP		(1 << 0) /* can receive pauses */
1432ca5b65Joost Mulders#define	VR_FEATURE_TX_PAUSE_CAP		(1 << 1) /* can transmit pauses */
1442ca5b65Joost Mulders#define	VR_FEATURE_MRDLNMULTIPLE	(1 << 2) /* can read mult cache lines */
1452ca5b65Joost Mulders#define	VR_FEATURE_TXCHKSUM		(1 << 3) /* can do TX TCP checksum */
1462ca5b65Joost Mulders#define	VR_FEATURE_RXCHKSUM		(1 << 4) /* can do RX TCP checksum */
1472ca5b65Joost Mulders#define	VR_FEATURE_CAMSUPPORT		(1 << 5) /* has a CAM filter */
1482ca5b65Joost Mulders#define	VR_FEATURE_VLANTAGGING		(1 << 6) /* can do VLAN tagging */
1492ca5b65Joost Mulders#define	VR_FEATURE_MIBCOUNTER		(1 << 7) /* has a MIB counter */
1502ca5b65Joost Mulders
1512ca5b65Joost Mulders/*
1522ca5b65Joost Mulders * Bug bits for the different cards.
1532ca5b65Joost Mulders */
1542ca5b65Joost Mulders#define	VR_BUG_NONE			(0)
1552ca5b65Joost Mulders#define	VR_BUG_TXALIGN			(1 << 0) /* needs aligned TX */
1562ca5b65Joost Mulders#define	VR_BUG_NEEDMODE10T		(1 << 1) /* chip needs mode10t secret */
1572ca5b65Joost Mulders#define	VR_BUG_NEEDMIION		(1 << 2) /* chip needs miion secret */
1582ca5b65Joost Mulders#define	VR_BUG_NEEDMODE2PCEROPT		(1 << 3) /* chip needs pceropt */
1592ca5b65Joost Mulders#define	VR_BUG_NO_TXQUEUEING		(1 << 4) /* chip cannot queue tx */
1602ca5b65Joost Mulders#define	VR_BUG_NO_MEMIO			(1 << 5) /* chip cannot memory space */
1612ca5b65Joost Mulders#define	VR_BUG_MIIPOLLSTOP		(1 << 6) /* special to stop polling */
1622ca5b65Joost Mulders
1632ca5b65Joost Mulders#define	VR_GET8(acc, p)		\
1642ca5b65Joost Mulders		ddi_get8((acc)->hdl,	\
1652ca5b65Joost Mulders		    (uint8_t *)((void *)((acc)->addr + (p))))
1662ca5b65Joost Mulders#define	VR_GET16(acc, p)	\
1672ca5b65Joost Mulders		ddi_get16((acc)->hdl,	\
1682ca5b65Joost Mulders		    (uint16_t *)((void *)((acc)->addr + (p))))
1692ca5b65Joost Mulders#define	VR_GET32(acc, p)	\
1702ca5b65Joost Mulders		ddi_get32((acc)->hdl,	\
1712ca5b65Joost Mulders		    (uint32_t *)((void *)((acc)->addr + (p))))
1722ca5b65Joost Mulders
1732ca5b65Joost Mulders#define	VR_PUT8(acc, p, v)	\
1742ca5b65Joost Mulders		ddi_put8((acc)->hdl,	\
1752ca5b65Joost Mulders		    (uint8_t *)((void *)((acc)->addr + (p))), v)
1762ca5b65Joost Mulders#define	VR_PUT16(acc, p, v)	\
1772ca5b65Joost Mulders		ddi_put16((acc)->hdl,	\
1782ca5b65Joost Mulders		    (uint16_t *)((void *)((acc)->addr + (p))), v)
1792ca5b65Joost Mulders#define	VR_PUT32(acc, p, v)	\
1802ca5b65Joost Mulders		ddi_put32((acc)->hdl,	\
1812ca5b65Joost Mulders		    (uint32_t *)((void *)((acc)->addr + (p))), v)
1822ca5b65Joost Mulders
1832ca5b65Joost Mulders/*
1842ca5b65Joost Mulders * Clear bit b in register r.
1852ca5b65Joost Mulders */
1862ca5b65Joost Mulders#define	VR_CLRBIT8(acc, r, b)			\
1872ca5b65Joost Mulders		VR_PUT8(acc, r, VR_GET8(acc, r) & ~(b))
1882ca5b65Joost Mulders#define	VR_CLRBIT16(acc, r, b)			\
1892ca5b65Joost Mulders		VR_PUT16(acc, r, VR_GET16(acc, r) & ~(b))
1902ca5b65Joost Mulders#define	VR_CLRBIT32(acc, r, b)			\
1912ca5b65Joost Mulders		VR_PUT32(acc, r, VR_GET32(acc, r) & ~(b))
1922ca5b65Joost Mulders
1932ca5b65Joost Mulders/*
1942ca5b65Joost Mulders * Set bit b in register r.
1952ca5b65Joost Mulders */
1962ca5b65Joost Mulders#define	VR_SETBIT8(acc, r, b)			\
1972ca5b65Joost Mulders		VR_PUT8(acc, r, (VR_GET8(acc, r) | (b)))
1982ca5b65Joost Mulders#define	VR_SETBIT16(acc, r, b)			\
1992ca5b65Joost Mulders		VR_PUT16(acc, r, (VR_GET16(acc, r) | (b)))
2002ca5b65Joost Mulders#define	VR_SETBIT32(acc, r, b)			\
2012ca5b65Joost Mulders		VR_PUT32(acc, r, (VR_GET32(acc, r) | (b)))
2022ca5b65Joost Mulders
2032ca5b65Joost Mulders/*
2042ca5b65Joost Mulders * Set bits b in register r to value v.
2052ca5b65Joost Mulders */
2062ca5b65Joost Mulders#define	VR_SETBITS8(acc, r, b, v)			\
2072ca5b65Joost Mulders		VR_PUT8(acc, r, (VR_GET8(acc, r) & ~(b)) | (v))
2082ca5b65Joost Mulders#define	VR_SETBITS16(acc, r, b, v)			\
2092ca5b65Joost Mulders		VR_PUT16(acc, r, (VR_GET16(acc, r) & ~(b)) | (v))
2102ca5b65Joost Mulders#define	VR_SETBITS32(acc, r, b, v)			\
2112ca5b65Joost Mulders		VR_PUT32(acc, r, (VR_GET32(acc, r) & ~(b)) | (v))
2122ca5b65Joost Mulders
2132ca5b65Joost Mulders/*
2142ca5b65Joost Mulders * The descriptor as used by the MAC.
2152ca5b65Joost Mulders */
2162ca5b65Joost Mulderstypedef struct {
2172ca5b65Joost Mulders	uint32_t stat0;
2182ca5b65Joost Mulders	uint32_t stat1;
2192ca5b65Joost Mulders	uint32_t data;
2202ca5b65Joost Mulders	uint32_t next;
2212ca5b65Joost Mulders} vr_chip_desc_t;
2222ca5b65Joost Mulders
2232ca5b65Joost Mulders/*
2242ca5b65Joost Mulders * A structure describing an DMA object.
2252ca5b65Joost Mulders */
2262ca5b65Joost Mulderstypedef struct data_dma {
2272ca5b65Joost Mulders	ddi_dma_handle_t	handle;
2282ca5b65Joost Mulders	ddi_acc_handle_t	acchdl;
2292ca5b65Joost Mulders	uint32_t		paddr;
2302ca5b65Joost Mulders	char			*buf;
2312ca5b65Joost Mulders	size_t			bufsz;
2322ca5b65Joost Mulders} vr_data_dma_t;
2332ca5b65Joost Mulders
2342ca5b65Joost Mulders/*
2352ca5b65Joost Mulders * A descriptor as used by the host.
2362ca5b65Joost Mulders */
2372ca5b65Joost Mulderstypedef struct vr_desc {
2382ca5b65Joost Mulders	vr_chip_desc_t		*cdesc;
2392ca5b65Joost Mulders	uint32_t		paddr;		/* paddr of cdesc */
2402ca5b65Joost Mulders	uint32_t		offset;		/* offset to paddr */
2412ca5b65Joost Mulders	struct vr_desc		*next;
2422ca5b65Joost Mulders	vr_data_dma_t		dmabuf;
2432ca5b65Joost Mulders} vr_desc_t;
2442ca5b65Joost Mulders
2452ca5b65Joost Mulderstypedef struct vr_ring {
2462ca5b65Joost Mulders	vr_desc_t		*desc;
2472ca5b65Joost Mulders	vr_chip_desc_t		*cdesc;
2482ca5b65Joost Mulders	uint32_t		cdesc_paddr;
2492ca5b65Joost Mulders	ddi_dma_handle_t	handle;
2502ca5b65Joost Mulders	ddi_acc_handle_t	acchdl;
2512ca5b65Joost Mulders} vr_ring_t;
2522ca5b65Joost Mulders
2532ca5b65Joost Mulderstypedef struct {
2542ca5b65Joost Mulders	kmutex_t		lock;
2552ca5b65Joost Mulders	uint32_t		ndesc;
2562ca5b65Joost Mulders	uint32_t		nfree;
2572ca5b65Joost Mulders	uint32_t		stallticks;
2582ca5b65Joost Mulders	uint32_t		resched;
2592ca5b65Joost Mulders	uint32_t		intr_distance;
2602ca5b65Joost Mulders	vr_desc_t		*ring;
2612ca5b65Joost Mulders	vr_desc_t		*wp;			/* write pointer */
2622ca5b65Joost Mulders	vr_desc_t		*cp;			/* claim pointer */
2632ca5b65Joost Mulders} vr_tx_t;
2642ca5b65Joost Mulders
2652ca5b65Joost Mulderstypedef struct {
2662ca5b65Joost Mulders	uint32_t		ndesc;
2672ca5b65Joost Mulders	vr_desc_t		*ring;
2682ca5b65Joost Mulders	vr_desc_t		*rp;			/* read pointer */
2692ca5b65Joost Mulders} vr_rx_t;
2702ca5b65Joost Mulders
2712ca5b65Joost Mulderstypedef enum {
2732ca5b65Joost Mulders	VR_LINK_STATE_DOWN = LINK_STATE_DOWN,
2742ca5b65Joost Mulders	VR_LINK_STATE_UP = LINK_STATE_UP
2752ca5b65Joost Mulders} vr_link_state_t;
2762ca5b65Joost Mulders
2772ca5b65Joost Mulderstypedef enum {
2782ca5b65Joost Mulders	VR_LINK_SPEED_UNKNOWN,
2792ca5b65Joost Mulders	VR_LINK_SPEED_10MBS,
2802ca5b65Joost Mulders	VR_LINK_SPEED_100MBS
2812ca5b65Joost Mulders} vr_link_speed_t;
2822ca5b65Joost Mulders
2832ca5b65Joost Mulderstypedef enum {
2872ca5b65Joost Mulders} vr_link_duplex_t;
2882ca5b65Joost Mulders
2892ca5b65Joost Mulderstypedef enum {
2902ca5b65Joost Mulders	VR_LINK_AUTONEG_UNKNOWN,
2912ca5b65Joost Mulders	VR_LINK_AUTONEG_OFF,
2922ca5b65Joost Mulders	VR_LINK_AUTONEG_ON
2932ca5b65Joost Mulders} vr_link_autoneg_t;
2942ca5b65Joost Mulders
2952ca5b65Joost Mulders/*
2962ca5b65Joost Mulders * Pause variations.
2972ca5b65Joost Mulders */
2982ca5b65Joost Mulderstypedef enum {
2992ca5b65Joost Mulders	VR_PAUSE_UNKNOWN,
3002ca5b65Joost Mulders	VR_PAUSE_NONE = LINK_FLOWCTRL_NONE,
3022ca5b65Joost Mulders	VR_PAUSE_RECEIVE = LINK_FLOWCTRL_RX,
3042ca5b65Joost Mulders} vr_link_flowctrl_t;
3052ca5b65Joost Mulders
3062ca5b65Joost Mulders/*
3072ca5b65Joost Mulders * Type of medium attachement unit.
3082ca5b65Joost Mulders */
3092ca5b65Joost Mulderstypedef enum {
3102ca5b65Joost Mulders	VR_MAU_UNKNOWN = XCVR_UNDEFINED,
3112ca5b65Joost Mulders	VR_MAU_NONE = XCVR_NONE,
3122ca5b65Joost Mulders	VR_MAU_10 = XCVR_10,
3132ca5b65Joost Mulders	VR_MAU_100T4 = XCVR_100T4,
3142ca5b65Joost Mulders	VR_MAU_100X = XCVR_100X,
3152ca5b65Joost Mulders	VR_MAU_100T2 = XCVR_100T2,
3162ca5b65Joost Mulders	VR_MAU_1000X = XCVR_1000X,
3172ca5b65Joost Mulders	VR_MAU_1000T = XCVR_1000T
3182ca5b65Joost Mulders} vr_mau_t;
3192ca5b65Joost Mulders
3202ca5b65Joost Mulderstypedef struct {
3212ca5b65Joost Mulders	vr_link_state_t		state;
3222ca5b65Joost Mulders	vr_link_speed_t		speed;
3232ca5b65Joost Mulders	vr_link_duplex_t	duplex;
3242ca5b65Joost Mulders	vr_link_flowctrl_t	flowctrl;
3252ca5b65Joost Mulders	vr_mau_t		mau;
3262ca5b65Joost Mulders} vr_link_t;
3272ca5b65Joost Mulders
3282ca5b65Joost Mulderstypedef enum {
3292ca5b65Joost Mulders	CHIPSTATE_UNKNOWN,
3302ca5b65Joost Mulders	CHIPSTATE_INITIALIZED,
3312ca5b65Joost Mulders	CHIPSTATE_RUNNING,
3322ca5b65Joost Mulders	CHIPSTATE_STOPPED,
3332ca5b65Joost Mulders	CHIPSTATE_SLEEPING,
3342ca5b65Joost Mulders	CHIPSTATE_SUSPENDED,
3362ca5b65Joost Mulders	CHIPSTATE_ERROR
3372ca5b65Joost Mulders} vr_chip_state_t;
3382ca5b65Joost Mulders
3392ca5b65Joost Mulderstypedef struct {
3402ca5b65Joost Mulders	uint16_t	control;
3412ca5b65Joost Mulders	uint16_t	status;
3422ca5b65Joost Mulders	uint16_t	identh;
3432ca5b65Joost Mulders	uint16_t	identl;
3442ca5b65Joost Mulders	uint16_t	anadv;
3452ca5b65Joost Mulders	uint16_t	lpable;
3462ca5b65Joost Mulders	uint16_t	anexp;
3472ca5b65Joost Mulders} mii_t;
3482ca5b65Joost Mulders
3492ca5b65Joost Mulders/*
3502ca5b65Joost Mulders * A structure defining the various types of cards and their habits.
3512ca5b65Joost Mulders */
3522ca5b65Joost Mulderstypedef struct {
3532ca5b65Joost Mulders	uint8_t		revmin;
3542ca5b65Joost Mulders	uint8_t		revmax;
3552ca5b65Joost Mulders	char		name[128];
3562ca5b65Joost Mulders	uint32_t	bugs;
3572ca5b65Joost Mulders	uint32_t	features;
3582ca5b65Joost Mulders} chip_info_t;
3592ca5b65Joost Mulders
3602ca5b65Joost Mulders/*
3612ca5b65Joost Mulders * A structure describing the card.
3622ca5b65Joost Mulders */
3632ca5b65Joost Mulderstypedef struct {
3642ca5b65Joost Mulders	uint16_t		vendor;
3652ca5b65Joost Mulders	uint16_t		device;
3662ca5b65Joost Mulders	uint8_t			revision;
3672ca5b65Joost Mulders	vr_chip_state_t		state;
3682ca5b65Joost Mulders	mii_t			mii;
3692ca5b65Joost Mulders	vr_link_t		link;
3702ca5b65Joost Mulders	chip_info_t		info;
3712ca5b65Joost Mulders	uint32_t		phyaddr;
3722ca5b65Joost Mulders} vr_chip_t;
3732ca5b65Joost Mulders
3742ca5b65Joost Mulders/*
3752ca5b65Joost Mulders * Operational parameters.
3762ca5b65Joost Mulders */
3772ca5b65Joost Mulderstypedef struct {
3782ca5b65Joost Mulders	uint16_t		anadv_en;
3792ca5b65Joost Mulders	uint16_t		an_phymask;
3802ca5b65Joost Mulders	uint16_t		an_macmask;
3812ca5b65Joost Mulders	vr_link_autoneg_t	an_en;
3822ca5b65Joost Mulders	uint32_t		mtu;
3832ca5b65Joost Mulders} vr_param_t;
3842ca5b65Joost Mulders
3852ca5b65Joost Mulderstypedef enum {
3862ca5b65Joost Mulders	VR_SUCCESS = 0,
3872ca5b65Joost Mulders	VR_FAILURE = 1
3882ca5b65Joost Mulders} vr_result_t;
3892ca5b65Joost Mulders
3902ca5b65Joost Mulderstypedef struct {
3912ca5b65Joost Mulders	uint64_t	ether_stat_align_errors;
3922ca5b65Joost Mulders	uint64_t	ether_stat_carrier_errors;
3932ca5b65Joost Mulders	uint64_t	ether_stat_ex_collisions;
3942ca5b65Joost Mulders	uint64_t	ether_stat_fcs_errors;
3952ca5b65Joost Mulders	uint64_t	ether_stat_first_collisions;
3962ca5b65Joost Mulders	uint64_t	ether_stat_macrcv_errors;
3972ca5b65Joost Mulders	uint64_t	ether_stat_macxmt_errors;
3982ca5b65Joost Mulders	uint64_t	ether_stat_multi_collisions;
3992ca5b65Joost Mulders	uint64_t	ether_stat_toolong_errors;
4002ca5b65Joost Mulders	uint64_t	ether_stat_tooshort_errors;
4012ca5b65Joost Mulders	uint64_t	ether_stat_tx_late_collisions;
4022ca5b65Joost Mulders	uint64_t	ether_stat_defer_xmts;
4032ca5b65Joost Mulders	uint64_t	mac_stat_brdcstrcv;
4042ca5b65Joost Mulders	uint64_t	mac_stat_brdcstxmt;
4052ca5b65Joost Mulders	uint64_t	mac_stat_multixmt;
4062ca5b65Joost Mulders	uint64_t	mac_stat_collisions;
4072ca5b65Joost Mulders	uint64_t	mac_stat_ierrors;
4082ca5b65Joost Mulders	uint64_t	mac_stat_ipackets;
4092ca5b65Joost Mulders	uint64_t	mac_stat_multircv;
4102ca5b65Joost Mulders	uint64_t	mac_stat_norcvbuf;
4112ca5b65Joost Mulders	uint64_t	mac_stat_noxmtbuf;
4122ca5b65Joost Mulders	uint64_t	mac_stat_obytes;
4132ca5b65Joost Mulders	uint64_t	mac_stat_opackets;
4142ca5b65Joost Mulders	uint64_t	mac_stat_rbytes;
4152ca5b65Joost Mulders	uint64_t	mac_stat_underflows;
4162ca5b65Joost Mulders	uint64_t	mac_stat_overflows;
4172ca5b65Joost Mulders	uint64_t	cyclics;
4182ca5b65Joost Mulders	uint64_t	txchecks;
4192ca5b65Joost Mulders	uint64_t	intr_claimed;
4202ca5b65Joost Mulders	uint64_t	intr_unclaimed;
4212ca5b65Joost Mulders	uint64_t	linkchanges;
4222ca5b65Joost Mulders	uint64_t	txcpybytes;
4232ca5b65Joost Mulders	uint64_t	txmapbytes;
4242ca5b65Joost Mulders	uint64_t	rxcpybytes;
4252ca5b65Joost Mulders	uint64_t	rxmapbytes;
4262ca5b65Joost Mulders	uint64_t	txreclaim0;
4272ca5b65Joost Mulders	uint64_t	txreclaims;
4282ca5b65Joost Mulders	uint32_t	txstalls;
4292ca5b65Joost Mulders	uint32_t	resets;
4302ca5b65Joost Mulders	uint32_t	allocbfail;
4312ca5b65Joost Mulders} vr_stats_t;
4322ca5b65Joost Mulders
4332ca5b65Joost Mulders/*
4342ca5b65Joost Mulders * Access attributes for the card.
4352ca5b65Joost Mulders */
4362ca5b65Joost Mulderstypedef struct {
4372ca5b65Joost Mulders	ddi_acc_handle_t	hdl;
4382ca5b65Joost Mulders	caddr_t			addr;
4392ca5b65Joost Mulders	pci_regspec_t		reg;
4402ca5b65Joost Mulders} vr_acc_t;
4412ca5b65Joost Mulders
4422ca5b65Joost Mulders/*
4432ca5b65Joost Mulders * Instance state structure.
4442ca5b65Joost Mulders */
4452ca5b65Joost Mulderstypedef struct {
4462ca5b65Joost Mulders	kmutex_t		oplock;
4472ca5b65Joost Mulders	dev_info_t		*devinfo;
4482ca5b65Joost Mulders	uint8_t			vendor_ether_addr [ETHERADDRL];
4492ca5b65Joost Mulders	char			ifname[12];
4502ca5b65Joost Mulders	mac_handle_t		machdl;
4512ca5b65Joost Mulders	ddi_intr_handle_t	intr_hdl;
4522ca5b65Joost Mulders	uint_t			intr_pri;
4532ca5b65Joost Mulders	kmutex_t		intrlock;
4542ca5b65Joost Mulders	vr_chip_t		chip;
4552ca5b65Joost Mulders	vr_ring_t		txring;
4562ca5b65Joost Mulders	vr_ring_t		rxring;
4572ca5b65Joost Mulders	vr_rx_t			rx;
4582ca5b65Joost Mulders	vr_tx_t			tx;
4592ca5b65Joost Mulders	ddi_periodic_t		periodic_id;
4602ca5b65Joost Mulders	int			nsets;
4612ca5b65Joost Mulders	vr_acc_t		*regset;
4622ca5b65Joost Mulders	vr_acc_t		*acc_mem;
4632ca5b65Joost Mulders	vr_acc_t		*acc_io;
4642ca5b65Joost Mulders	vr_acc_t		*acc_cfg;
4652ca5b65Joost Mulders	vr_acc_t		*acc_reg;
4662ca5b65Joost Mulders	vr_param_t		param;
4672ca5b65Joost Mulders	vr_stats_t		stats;
4682ca5b65Joost Mulders	struct kstat		*ksp;
4692ca5b65Joost Mulders	vr_param_t		defaults;
4702ca5b65Joost Mulders	uint32_t		promisc;
4712ca5b65Joost Mulders	uint32_t		mhash0;
4722ca5b65Joost Mulders	uint32_t		mhash1;
4732ca5b65Joost Mulders	uint32_t		mcount;
4742ca5b65Joost Mulders	uint32_t		reset;
4752ca5b65Joost Mulders} vr_t;
4762ca5b65Joost Mulders
4772ca5b65Joost Mulders/*
4782ca5b65Joost Mulders * Function prototypes.
4792ca5b65Joost Mulders */
4802ca5b65Joost Muldersint			vr_mac_getstat(void *arg, uint_t stat, uint64_t *val);
4812ca5b65Joost Muldersint			vr_mac_start(void *vrp);
4822ca5b65Joost Muldersvoid			vr_mac_stop(void *vrp);
4832ca5b65Joost Muldersint			vr_mac_set_promisc(void *vrp, boolean_t promiscflag);
4842ca5b65Joost Muldersint			vr_mac_set_multicast(void *vrp, boolean_t add,
4852ca5b65Joost Mulders			    const uint8_t *mca);
4862ca5b65Joost Muldersint			vr_mac_set_ether_addr(void *vrp,
4872ca5b65Joost Mulders			    const uint8_t *macaddr);
4882ca5b65Joost Muldersmblk_t			*vr_mac_tx_enqueue_list(void *p, mblk_t *mp);
4892ca5b65Joost Muldersint			vr_mac_getprop(void *arg, const char *pr_name,
4900dc2366Venugopal Iyer			    mac_prop_id_t pr_num, uint_t pr_valsize,
4910dc2366Venugopal Iyer			    void *pr_val);
4922ca5b65Joost Muldersint			vr_mac_setprop(void *arg, const char *pr_name,
4932ca5b65Joost Mulders			    mac_prop_id_t pr_num,
4942ca5b65Joost Mulders			    uint_t pr_valsize, const void *pr_val);
4950dc2366Venugopal Iyervoid			vr_mac_propinfo(void *arg, const char *pr_name,
4960dc2366Venugopal Iyer			    mac_prop_id_t pr_num, mac_prop_info_handle_t prh);
4972ca5b65Joost Muldersuint_t			vr_intr(caddr_t arg1, caddr_t arg2);
4982ca5b65Joost Mulders#ifdef __cplusplus
4992ca5b65Joost Mulders}
5002ca5b65Joost Mulders#endif
5012ca5b65Joost Mulders#endif	/* _VR_H */