xref: /illumos-gate/usr/src/uts/common/io/usb/hcd/openhci/ohci.c (revision 3eb8c55c)

/*
 * CDDL HEADER START
 *
 * The contents of this file are subject to the terms of the
 * Common Development and Distribution License (the "License").
 * You may not use this file except in compliance with the License.
 *
 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
 * or http://www.opensolaris.org/os/licensing.
 * See the License for the specific language governing permissions
 * and limitations under the License.
 *
 * When distributing Covered Code, include this CDDL HEADER in each
 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
 * If applicable, add the following below this CDDL HEADER, with the
 * fields enclosed by brackets "[]" replaced with your own identifying
 * information: Portions Copyright [yyyy] [name of copyright owner]
 *
 * CDDL HEADER END
 */
/*
 * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
 * Use is subject to license terms.
 */


/*
 * Open Host Controller Driver (OHCI)
 *
 * The USB Open Host Controller driver is a software driver which interfaces
 * to the Universal Serial Bus layer (USBA) and the USB Open Host Controller.
 * The interface to USB Open Host Controller is defined by the OpenHCI	Host
 * Controller Interface.
 *
 * NOTE:
 *
 * Currently OHCI driver does not support the following features
 *
 * - Handle request with multiple TDs under short xfer conditions except for
 *   bulk transfers.
 */
#include <sys/usb/hcd/openhci/ohcid.h>

#include <sys/disp.h>
#include <sys/strsun.h>

/* Pointer to the state structure */
static void *ohci_statep;

int force_ohci_off = 1;

/* Number of instances */
#define	OHCI_INSTS	1

/* Adjustable variables for the size of the pools */
int ohci_ed_pool_size = OHCI_ED_POOL_SIZE;
int ohci_td_pool_size = OHCI_TD_POOL_SIZE;

/*
 * Initialize the values which are used for setting up head pointers for
 * the 32ms scheduling lists which starts from the HCCA.
 */
static uchar_t ohci_index[NUM_INTR_ED_LISTS / 2] = {0x0, 0x8, 0x4, 0xc,
						0x2, 0xa, 0x6, 0xe,
						0x1, 0x9, 0x5, 0xd,
						0x3, 0xb, 0x7, 0xf};
/* Debugging information */
uint_t ohci_errmask	= (uint_t)PRINT_MASK_ALL;
uint_t ohci_errlevel	= USB_LOG_L2;
uint_t ohci_instance_debug = (uint_t)-1;

/*
 * OHCI MSI tunable:
 *
 * By default MSI is enabled on all supported platforms.
 */
boolean_t ohci_enable_msi = B_TRUE;

/*
 * HCDI entry points
 *
 * The Host Controller Driver Interfaces (HCDI) are the software interfaces
 * between the Universal Serial Bus Driver (USBA) and the Host	Controller
 * Driver (HCD). The HCDI interfaces or entry points are subject to change.
 */
static int	ohci_hcdi_pipe_open(
				usba_pipe_handle_data_t	*ph,
				usb_flags_t		usb_flags);
static int	ohci_hcdi_pipe_close(
				usba_pipe_handle_data_t	*ph,
				usb_flags_t		usb_flags);
static int	ohci_hcdi_pipe_reset(
				usba_pipe_handle_data_t	*ph,
				usb_flags_t		usb_flags);
static void	ohci_hcdi_pipe_reset_data_toggle(
				usba_pipe_handle_data_t	*ph);
static int	ohci_hcdi_pipe_ctrl_xfer(
				usba_pipe_handle_data_t	*ph,
				usb_ctrl_req_t		*ctrl_reqp,
				usb_flags_t		usb_flags);
static int	ohci_hcdi_bulk_transfer_size(
				usba_device_t		*usba_device,
				size_t			*size);
static int	ohci_hcdi_pipe_bulk_xfer(
				usba_pipe_handle_data_t	*ph,
				usb_bulk_req_t		*bulk_reqp,
				usb_flags_t		usb_flags);
static int	ohci_hcdi_pipe_intr_xfer(
				usba_pipe_handle_data_t	*ph,
				usb_intr_req_t		*intr_req,
				usb_flags_t		usb_flags);
static int	ohci_hcdi_pipe_stop_intr_polling(
				usba_pipe_handle_data_t	*ph,
				usb_flags_t		usb_flags);
static int	ohci_hcdi_get_current_frame_number(
				usba_device_t		*usba_device,
				usb_frame_number_t	*frame_number);
static int	ohci_hcdi_get_max_isoc_pkts(
				usba_device_t		*usba_device,
				uint_t		*max_isoc_pkts_per_request);
static int	ohci_hcdi_pipe_isoc_xfer(
				usba_pipe_handle_data_t	*ph,
				usb_isoc_req_t		*isoc_reqp,
				usb_flags_t		usb_flags);
static int	ohci_hcdi_pipe_stop_isoc_polling(
				usba_pipe_handle_data_t	*ph,
				usb_flags_t		usb_flags);

/*
 * Internal Function Prototypes
 */

/* Host Controller Driver (HCD) initialization functions */
static void	ohci_set_dma_attributes(ohci_state_t	*ohcip);
static int	ohci_allocate_pools(ohci_state_t	*ohcip);
static void	ohci_decode_ddi_dma_addr_bind_handle_result(
				ohci_state_t		*ohcip,
				int			result);
static int	ohci_map_regs(ohci_state_t		*ohcip);
static int	ohci_register_intrs_and_init_mutex(
				ohci_state_t		*ohcip);
static int	ohci_add_intrs(ohci_state_t		*ohcip,
				int			intr_type);
static int	ohci_init_ctlr(ohci_state_t		*ohcip);
static int	ohci_init_hcca(ohci_state_t		*ohcip);
static void	ohci_build_interrupt_lattice(
				ohci_state_t		*ohcip);
static int	ohci_take_control(ohci_state_t		*ohcip);
static usba_hcdi_ops_t *ohci_alloc_hcdi_ops(
				ohci_state_t		*ohcip);

/* Host Controller Driver (HCD) deinitialization functions */
static int	ohci_cleanup(ohci_state_t		*ohcip);
static void	ohci_rem_intrs(ohci_state_t		*ohcip);
static int	ohci_cpr_suspend(ohci_state_t		*ohcip);
static int	ohci_cpr_resume(ohci_state_t		*ohcip);

/* Bandwidth Allocation functions */
static int	ohci_allocate_bandwidth(ohci_state_t	*ohcip,
				usba_pipe_handle_data_t	*ph,
				uint_t			*node);
static void	ohci_deallocate_bandwidth(ohci_state_t	*ohcip,
				usba_pipe_handle_data_t	*ph);
static int	ohci_compute_total_bandwidth(
				usb_ep_descr_t		*endpoint,
				usb_port_status_t	port_status,
				uint_t			*bandwidth);
static int	ohci_adjust_polling_interval(
				ohci_state_t		*ohcip,
				usb_ep_descr_t		*endpoint,
				usb_port_status_t	port_status);
static uint_t	ohci_lattice_height(uint_t		interval);
static uint_t	ohci_lattice_parent(uint_t		node);
static uint_t	ohci_leftmost_leaf(uint_t		node,
				uint_t			height);
static uint_t	ohci_hcca_intr_index(
				uint_t			node);
static uint_t	ohci_hcca_leaf_index(
				uint_t			leaf);
static uint_t	ohci_pow_2(uint_t x);
static uint_t	ohci_log_2(uint_t x);

/* Endpoint Descriptor (ED) related functions */
static uint_t	ohci_unpack_endpoint(ohci_state_t	*ohcip,
				usba_pipe_handle_data_t	*ph);
static void	ohci_insert_ed(ohci_state_t		*ohcip,
				usba_pipe_handle_data_t	*ph);
static void	ohci_insert_ctrl_ed(
				ohci_state_t		*ohcip,
				ohci_pipe_private_t	*pp);
static void	ohci_insert_bulk_ed(
				ohci_state_t		*ohcip,
				ohci_pipe_private_t	*pp);
static void	ohci_insert_intr_ed(
				ohci_state_t		*ohcip,
				ohci_pipe_private_t	*pp);
static void	ohci_insert_isoc_ed(
				ohci_state_t		*ohcip,
				ohci_pipe_private_t	*pp);
static void	ohci_modify_sKip_bit(ohci_state_t	*ohcip,
				ohci_pipe_private_t	*pp,
				skip_bit_t		action,
				usb_flags_t		flag);
static void	ohci_remove_ed(ohci_state_t		*ohcip,
				ohci_pipe_private_t	*pp);
static void	ohci_remove_ctrl_ed(
				ohci_state_t		*ohcip,
				ohci_pipe_private_t	*pp);
static void	ohci_remove_bulk_ed(
				ohci_state_t		*ohcip,
				ohci_pipe_private_t	*pp);
static void	ohci_remove_periodic_ed(
				ohci_state_t		*ohcip,
				ohci_pipe_private_t	*pp);
static void	ohci_insert_ed_on_reclaim_list(
				ohci_state_t		*ohcip,
				ohci_pipe_private_t	*pp);
static void	ohci_detach_ed_from_list(
				ohci_state_t		*ohcip,
				ohci_ed_t		*ept,
				uint_t			ept_type);
static ohci_ed_t *ohci_ed_iommu_to_cpu(
				ohci_state_t		*ohcip,
				uintptr_t		addr);

/* Transfer Descriptor (TD) related functions */
static int	ohci_initialize_dummy(ohci_state_t	*ohcip,
				ohci_ed_t		*ept);
static ohci_trans_wrapper_t *ohci_allocate_ctrl_resources(
				ohci_state_t		*ohcip,
				ohci_pipe_private_t	*pp,
				usb_ctrl_req_t		*ctrl_reqp,
				usb_flags_t		usb_flags);
static void	ohci_insert_ctrl_req(
				ohci_state_t		*ohcip,
				usba_pipe_handle_data_t	*ph,
				usb_ctrl_req_t		*ctrl_reqp,
				ohci_trans_wrapper_t	*tw,
				usb_flags_t		usb_flags);
static ohci_trans_wrapper_t *ohci_allocate_bulk_resources(
				ohci_state_t		*ohcip,
				ohci_pipe_private_t	*pp,
				usb_bulk_req_t		*bulk_reqp,
				usb_flags_t		usb_flags);
static void	ohci_insert_bulk_req(ohci_state_t	*ohcip,
				usba_pipe_handle_data_t	*ph,
				usb_bulk_req_t		*bulk_reqp,
				ohci_trans_wrapper_t	*tw,
				usb_flags_t		flags);
static int	ohci_start_pipe_polling(ohci_state_t	*ohcip,
				usba_pipe_handle_data_t	*ph,
				usb_flags_t		flags);
static void	ohci_set_periodic_pipe_polling(
				ohci_state_t		*ohcip,
				usba_pipe_handle_data_t	*ph);
static ohci_trans_wrapper_t *ohci_allocate_intr_resources(
				ohci_state_t		*ohcip,
				usba_pipe_handle_data_t	*ph,
				usb_intr_req_t		*intr_reqp,
				usb_flags_t		usb_flags);
static void	ohci_insert_intr_req(ohci_state_t	*ohcip,
				ohci_pipe_private_t	*pp,
				ohci_trans_wrapper_t	*tw,
				usb_flags_t		flags);
static int	ohci_stop_periodic_pipe_polling(
				ohci_state_t		*ohcip,
				usba_pipe_handle_data_t	*ph,
				usb_flags_t		flags);
static ohci_trans_wrapper_t *ohci_allocate_isoc_resources(
				ohci_state_t		*ohcip,
				usba_pipe_handle_data_t	*ph,
				usb_isoc_req_t		*isoc_reqp,
				usb_flags_t		usb_flags);
static int	ohci_insert_isoc_req(ohci_state_t	*ohcip,
				ohci_pipe_private_t	*pp,
				ohci_trans_wrapper_t	*tw,
				uint_t			flags);
static int	ohci_insert_hc_td(ohci_state_t		*ohcip,
				uint_t			hctd_ctrl,
				uint32_t		hctd_dma_offs,
				size_t			hctd_length,
				uint32_t		hctd_ctrl_phase,
				ohci_pipe_private_t	*pp,
				ohci_trans_wrapper_t	*tw);
static ohci_td_t *ohci_allocate_td_from_pool(
				ohci_state_t		*ohcip);
static void	ohci_fill_in_td(ohci_state_t		*ohcip,
				ohci_td_t		*td,
				ohci_td_t		*new_dummy,
				uint_t			hctd_ctrl,
				uint32_t		hctd_dma_offs,
				size_t			hctd_length,
				uint32_t		hctd_ctrl_phase,
				ohci_pipe_private_t	*pp,
				ohci_trans_wrapper_t	*tw);
static void	ohci_init_itd(
				ohci_state_t		*ohcip,
				ohci_trans_wrapper_t	*tw,
				uint_t			hctd_ctrl,
				uint32_t		index,
				ohci_td_t		*td);
static int	ohci_insert_td_with_frame_number(
				ohci_state_t		*ohcip,
				ohci_pipe_private_t	*pp,
				ohci_trans_wrapper_t	*tw,
				ohci_td_t		*current_td,
				ohci_td_t		*dummy_td);
static void	ohci_insert_td_on_tw(ohci_state_t	*ohcip,
				ohci_trans_wrapper_t	*tw,
				ohci_td_t		*td);
static void	ohci_done_list_tds(ohci_state_t		*ohcip,
				usba_pipe_handle_data_t	*ph);

/* Transfer Wrapper (TW) functions */
static ohci_trans_wrapper_t  *ohci_create_transfer_wrapper(
				ohci_state_t		*ohcip,
				ohci_pipe_private_t	*pp,
				size_t			length,
				uint_t			usb_flags);
static ohci_trans_wrapper_t  *ohci_create_isoc_transfer_wrapper(
				ohci_state_t		*ohcip,
				ohci_pipe_private_t	*pp,
				size_t			length,
				usb_isoc_pkt_descr_t	*descr,
				ushort_t		pkt_count,
				size_t			td_count,
				uint_t			usb_flags);
int	ohci_allocate_tds_for_tw(
				ohci_state_t		*ohcip,
				ohci_trans_wrapper_t	*tw,
				size_t			td_count);
static ohci_trans_wrapper_t  *ohci_allocate_tw_resources(
				ohci_state_t		*ohcip,
				ohci_pipe_private_t	*pp,
				size_t			length,
				usb_flags_t		usb_flags,
				size_t			td_count);
static void	ohci_free_tw_tds_resources(
				ohci_state_t		*ohcip,
				ohci_trans_wrapper_t	*tw);
static void	ohci_start_xfer_timer(
				ohci_state_t		*ohcip,
				ohci_pipe_private_t	*pp,
				ohci_trans_wrapper_t	*tw);
static void	ohci_stop_xfer_timer(
				ohci_state_t		*ohcip,
				ohci_trans_wrapper_t	*tw,
				uint_t			flag);
static void	ohci_xfer_timeout_handler(void		*arg);
static void	ohci_remove_tw_from_timeout_list(
				ohci_state_t		*ohcip,
				ohci_trans_wrapper_t	*tw);
static void	ohci_start_timer(ohci_state_t		*ohcip);
static void	ohci_free_dma_resources(ohci_state_t	*ohcip,
				usba_pipe_handle_data_t	*ph);
static void	ohci_free_tw(ohci_state_t		*ohcip,
				ohci_trans_wrapper_t	*tw);
static int	ohci_tw_rebind_cookie(
				ohci_state_t		*ohcip,
				ohci_pipe_private_t	*pp,
				ohci_trans_wrapper_t	*tw);

/* Interrupt Handling functions */
static uint_t	ohci_intr(caddr_t			arg1,
				caddr_t			arg2);
static void	ohci_handle_missed_intr(
				ohci_state_t		*ohcip);
static void	ohci_handle_ue(ohci_state_t		*ohcip);
static void	ohci_handle_endpoint_reclaimation(
				ohci_state_t		*ohcip);
static void	ohci_traverse_done_list(
				ohci_state_t		*ohcip,
				ohci_td_t		*head_done_list);
static ohci_td_t *ohci_reverse_done_list(
				ohci_state_t		*ohcip,
				ohci_td_t		*head_done_list);
static usb_cr_t	ohci_parse_error(ohci_state_t		*ohcip,
				ohci_td_t		*td);
static void	ohci_parse_isoc_error(
				ohci_state_t		*ohcip,
				ohci_pipe_private_t	*pp,
				ohci_trans_wrapper_t	*tw,
				ohci_td_t		*td);
static usb_cr_t ohci_check_for_error(
				ohci_state_t		*ohcip,
				ohci_pipe_private_t	*pp,
				ohci_trans_wrapper_t	*tw,
				ohci_td_t		*td,
				uint_t			ctrl);
static void	ohci_handle_error(
				ohci_state_t		*ohcip,
				ohci_td_t		*td,
				usb_cr_t		error);
static int	ohci_cleanup_data_underrun(
				ohci_state_t		*ohcip,
				ohci_pipe_private_t	*pp,
				ohci_trans_wrapper_t	*tw,
				ohci_td_t		*td);
static void	ohci_handle_normal_td(
				ohci_state_t		*ohcip,
				ohci_td_t		*td,
				ohci_trans_wrapper_t	*tw);
static void	ohci_handle_ctrl_td(ohci_state_t	*ohcip,
				ohci_pipe_private_t	*pp,
				ohci_trans_wrapper_t	*tw,
				ohci_td_t		*td,
				void			*);
static void	ohci_handle_bulk_td(ohci_state_t	*ohcip,
				ohci_pipe_private_t	*pp,
				ohci_trans_wrapper_t	*tw,
				ohci_td_t		*td,
				void			*);
static void	ohci_handle_intr_td(ohci_state_t	*ohcip,
				ohci_pipe_private_t	*pp,
				ohci_trans_wrapper_t	*tw,
				ohci_td_t		*td,
				void			*);
static void	ohci_handle_one_xfer_completion(
				ohci_state_t		*ohcip,
				ohci_trans_wrapper_t	*tw);
static void	ohci_handle_isoc_td(ohci_state_t	*ohcip,
				ohci_pipe_private_t	*pp,
				ohci_trans_wrapper_t	*tw,
				ohci_td_t		*td,
				void			*);
static void	ohci_sendup_td_message(
				ohci_state_t		*ohcip,
				ohci_pipe_private_t	*pp,
				ohci_trans_wrapper_t	*tw,
				ohci_td_t		*td,
				usb_cr_t		error);
static int	ohci_check_done_head(
				ohci_state_t *ohcip,
				ohci_td_t		*done_head);

/* Miscillaneous functions */
static void	ohci_cpr_cleanup(
				ohci_state_t		*ohcip);
static usb_req_attrs_t ohci_get_xfer_attrs(ohci_state_t *ohcip,
				ohci_pipe_private_t	*pp,
				ohci_trans_wrapper_t	*tw);
static int	ohci_allocate_periodic_in_resource(
				ohci_state_t		*ohcip,
				ohci_pipe_private_t	*pp,
				ohci_trans_wrapper_t	*tw,
				usb_flags_t		flags);
static int	ohci_wait_for_sof(
				ohci_state_t		*ohcip);
static void	ohci_pipe_cleanup(
				ohci_state_t		*ohcip,
				usba_pipe_handle_data_t	*ph);
static void	ohci_wait_for_transfers_completion(
				ohci_state_t		*ohcip,
				ohci_pipe_private_t	*pp);
static void	ohci_check_for_transfers_completion(
				ohci_state_t		*ohcip,
				ohci_pipe_private_t	*pp);
static void	ohci_save_data_toggle(ohci_state_t	*ohcip,
				usba_pipe_handle_data_t	*ph);
static void	ohci_restore_data_toggle(ohci_state_t	*ohcip,
				usba_pipe_handle_data_t	*ph);
static void	ohci_deallocate_periodic_in_resource(
				ohci_state_t		*ohcip,
				ohci_pipe_private_t	*pp,
				ohci_trans_wrapper_t	*tw);
static void	ohci_do_client_periodic_in_req_callback(
				ohci_state_t		*ohcip,
				ohci_pipe_private_t	*pp,
				usb_cr_t		completion_reason);
static void	ohci_hcdi_callback(
				usba_pipe_handle_data_t	*ph,
				ohci_trans_wrapper_t	*tw,
				usb_cr_t		completion_reason);

/* Kstat Support */
static void	ohci_create_stats(ohci_state_t		*ohcip);
static void	ohci_destroy_stats(ohci_state_t		*ohcip);
static void	ohci_do_byte_stats(
				ohci_state_t		*ohcip,
				size_t			len,
				uint8_t			attr,
				uint8_t			addr);
static void	ohci_do_intrs_stats(
				ohci_state_t		*ohcip,
				int			val);
static void	ohci_print_op_regs(ohci_state_t		*ohcip);
static void	ohci_print_ed(ohci_state_t		*ohcip,
				ohci_ed_t		*ed);
static void	ohci_print_td(ohci_state_t		*ohcip,
				ohci_td_t		*td);

/* extern */
int usba_hubdi_root_hub_power(dev_info_t *dip, int comp, int level);

/*
 * Device operations (dev_ops) entries function prototypes.
 *
 * We use the hub cbops since all nexus ioctl operations defined so far will
 * be executed by the root hub. The following are the Host Controller Driver
 * (HCD) entry points.
 *
 * the open/close/ioctl functions call the corresponding usba_hubdi_*
 * calls after looking up the dip thru the dev_t.
 */
static int	ohci_open(dev_t	*devp, int flags, int otyp, cred_t *credp);
static int	ohci_close(dev_t dev, int flag, int otyp, cred_t *credp);
static int	ohci_ioctl(dev_t dev, int cmd, intptr_t arg, int mode,
				cred_t *credp, int *rvalp);

static int	ohci_attach(dev_info_t *dip, ddi_attach_cmd_t cmd);
static int	ohci_detach(dev_info_t *dip, ddi_detach_cmd_t cmd);
static int	ohci_quiesce(dev_info_t *dip);

static int	ohci_info(dev_info_t *dip, ddi_info_cmd_t infocmd,
				void *arg, void **result);

static struct cb_ops ohci_cb_ops = {
	ohci_open,			/* Open */
	ohci_close,			/* Close */
	nodev,				/* Strategy */
	nodev,				/* Print */
	nodev,				/* Dump */
	nodev,				/* Read */
	nodev,				/* Write */
	ohci_ioctl,			/* Ioctl */
	nodev,				/* Devmap */
	nodev,				/* Mmap */
	nodev,				/* Segmap */
	nochpoll,			/* Poll */
	ddi_prop_op,			/* cb_prop_op */
	NULL,				/* Streamtab */
	D_MP				/* Driver compatibility flag */
};

static struct dev_ops ohci_ops = {
	DEVO_REV,			/* Devo_rev */
	0,				/* Refcnt */
	ohci_info,			/* Info */
	nulldev,			/* Identify */
	nulldev,			/* Probe */
	ohci_attach,			/* Attach */
	ohci_detach,			/* Detach */
	nodev,				/* Reset */
	&ohci_cb_ops,			/* Driver operations */
	&usba_hubdi_busops,		/* Bus operations */
	usba_hubdi_root_hub_power,	/* Power */
	ohci_quiesce,			/* Quiesce */
};

/*
 * The USBA library must be loaded for this driver.
 */
static struct modldrv modldrv = {
	&mod_driverops,		/* Type of module. This one is a driver */
	"USB OpenHCI Driver",	/* Name of the module. */
	&ohci_ops,		/* Driver ops */
};

static struct modlinkage modlinkage = {
	MODREV_1, (void *)&modldrv, NULL
};


int
_init(void)
{
	int error;

	/* Initialize the soft state structures */
	if ((error = ddi_soft_state_init(&ohci_statep, sizeof (ohci_state_t),
	    OHCI_INSTS)) != 0) {
		return (error);
	}

	/* Install the loadable module */
	if ((error = mod_install(&modlinkage)) != 0) {
		ddi_soft_state_fini(&ohci_statep);
	}

	return (error);
}


int
_info(struct modinfo *modinfop)
{
	return (mod_info(&modlinkage, modinfop));
}


int
_fini(void)
{
	int error;

	if ((error = mod_remove(&modlinkage)) == 0) {
		/* Release per module resources */
		ddi_soft_state_fini(&ohci_statep);
	}

	return (error);
}


/*
 * Host Controller Driver (HCD) entry points
 */

/*
 * ohci_attach:
 */
static int
ohci_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
{
	int			instance;
	ohci_state_t		*ohcip = NULL;
	usba_hcdi_register_args_t hcdi_args;

	switch (cmd) {
	case DDI_ATTACH:
		break;
	case DDI_RESUME:
		ohcip = ohci_obtain_state(dip);

		return (ohci_cpr_resume(ohcip));
	default:
		return (DDI_FAILURE);
	}

	/* Get the instance and create soft state */
	instance = ddi_get_instance(dip);

	if (ddi_soft_state_zalloc(ohci_statep, instance) != 0) {

		return (DDI_FAILURE);
	}

	ohcip = ddi_get_soft_state(ohci_statep, instance);
	if (ohcip == NULL) {

		return (DDI_FAILURE);
	}

	ohcip->ohci_flags = OHCI_ATTACH;

	ohcip->ohci_log_hdl = usb_alloc_log_hdl(dip, "ohci", &ohci_errlevel,
	    &ohci_errmask, &ohci_instance_debug, 0);

	ohcip->ohci_flags |= OHCI_ZALLOC;

	/* Set host controller soft state to initilization */
	ohcip->ohci_hc_soft_state = OHCI_CTLR_INIT_STATE;

	USB_DPRINTF_L4(PRINT_MASK_ATTA, ohcip->ohci_log_hdl,
	    "ohcip = 0x%p", (void *)ohcip);

	/* Initialize the DMA attributes */
	ohci_set_dma_attributes(ohcip);

	/* Save the dip and instance */
	ohcip->ohci_dip = dip;
	ohcip->ohci_instance = instance;

	/* Initialize the kstat structures */
	ohci_create_stats(ohcip);

	/* Create the td and ed pools */
	if (ohci_allocate_pools(ohcip) != DDI_SUCCESS) {
		(void) ohci_cleanup(ohcip);

		return (DDI_FAILURE);
	}

	/* Map the registers */
	if (ohci_map_regs(ohcip) != DDI_SUCCESS) {
		(void) ohci_cleanup(ohcip);

		return (DDI_FAILURE);
	}

	/* Get the ohci chip vendor and device id */
	ohcip->ohci_vendor_id = pci_config_get16(
	    ohcip->ohci_config_handle, PCI_CONF_VENID);
	ohcip->ohci_device_id = pci_config_get16(
	    ohcip->ohci_config_handle, PCI_CONF_DEVID);
	ohcip->ohci_rev_id = pci_config_get8(
	    ohcip->ohci_config_handle, PCI_CONF_REVID);

	/* Register interrupts */
	if (ohci_register_intrs_and_init_mutex(ohcip) != DDI_SUCCESS) {
		(void) ohci_cleanup(ohcip);

		return (DDI_FAILURE);
	}

	mutex_enter(&ohcip->ohci_int_mutex);

	/* Initialize the controller */
	if (ohci_init_ctlr(ohcip) != DDI_SUCCESS) {
		mutex_exit(&ohcip->ohci_int_mutex);
		(void) ohci_cleanup(ohcip);

		return (DDI_FAILURE);
	}

	/*
	 * At this point, the hardware wiil be okay.
	 * Initialize the usba_hcdi structure
	 */
	ohcip->ohci_hcdi_ops = ohci_alloc_hcdi_ops(ohcip);

	mutex_exit(&ohcip->ohci_int_mutex);

	/*
	 * Make this HCD instance known to USBA
	 * (dma_attr must be passed for USBA busctl's)
	 */
	hcdi_args.usba_hcdi_register_version = HCDI_REGISTER_VERSION;
	hcdi_args.usba_hcdi_register_dip = dip;
	hcdi_args.usba_hcdi_register_ops = ohcip->ohci_hcdi_ops;
	hcdi_args.usba_hcdi_register_dma_attr = &ohcip->ohci_dma_attr;

	/*
	 * Priority and iblock_cookie are one and the same
	 * (However, retaining hcdi_soft_iblock_cookie for now
	 * assigning it w/ priority. In future all iblock_cookie
	 * could just go)
	 */
	hcdi_args.usba_hcdi_register_iblock_cookie =
	    (ddi_iblock_cookie_t)(uintptr_t)ohcip->ohci_intr_pri;

	if (usba_hcdi_register(&hcdi_args, 0) != DDI_SUCCESS) {
		(void) ohci_cleanup(ohcip);

		return (DDI_FAILURE);
	}
	ohcip->ohci_flags |= OHCI_USBAREG;

	mutex_enter(&ohcip->ohci_int_mutex);

	if ((ohci_init_root_hub(ohcip)) != USB_SUCCESS) {
		mutex_exit(&ohcip->ohci_int_mutex);
		(void) ohci_cleanup(ohcip);

		return (DDI_FAILURE);
	}

	mutex_exit(&ohcip->ohci_int_mutex);

	/* Finally load the root hub driver */
	if (ohci_load_root_hub_driver(ohcip) != USB_SUCCESS) {
		(void) ohci_cleanup(ohcip);

		return (DDI_FAILURE);
	}
	ohcip->ohci_flags |= OHCI_RHREG;

	/* Display information in the banner */
	ddi_report_dev(dip);

	mutex_enter(&ohcip->ohci_int_mutex);

	/* Reset the ohci initilization flag */
	ohcip->ohci_flags &= ~OHCI_ATTACH;

	/* Print the Host Control's Operational registers */
	ohci_print_op_regs(ohcip);

	/* For RIO we need to call pci_report_pmcap */
	if (OHCI_IS_RIO(ohcip)) {

		(void) pci_report_pmcap(dip, PCI_PM_IDLESPEED, (void *)4000);
	}

	mutex_exit(&ohcip->ohci_int_mutex);

	USB_DPRINTF_L4(PRINT_MASK_ATTA, ohcip->ohci_log_hdl,
	    "ohci_attach: dip = 0x%p done", (void *)dip);

	return (DDI_SUCCESS);
}


/*
 * ohci_detach:
 */
int
ohci_detach(dev_info_t *dip, ddi_detach_cmd_t cmd)
{
	ohci_state_t		*ohcip = ohci_obtain_state(dip);

	USB_DPRINTF_L4(PRINT_MASK_ATTA, ohcip->ohci_log_hdl, "ohci_detach:");

	switch (cmd) {
	case DDI_DETACH:

		return (ohci_cleanup(ohcip));

	case DDI_SUSPEND:

		return (ohci_cpr_suspend(ohcip));
	default:

		return (DDI_FAILURE);
	}
}


/*
 * ohci_info:
 */
/* ARGSUSED */
static int
ohci_info(dev_info_t *dip, ddi_info_cmd_t infocmd, void *arg, void **result)
{
	dev_t			dev;
	ohci_state_t		*ohcip;
	int			instance;
	int			error = DDI_FAILURE;

	switch (infocmd) {
	case DDI_INFO_DEVT2DEVINFO:
		dev = (dev_t)arg;
		instance = OHCI_UNIT(dev);
		ohcip = ddi_get_soft_state(ohci_statep, instance);
		if (ohcip != NULL) {
			*result = (void *)ohcip->ohci_dip;
			if (*result != NULL) {
				error = DDI_SUCCESS;
			}
		} else {
			*result = NULL;
		}

		break;
	case DDI_INFO_DEVT2INSTANCE:
		dev = (dev_t)arg;
		instance = OHCI_UNIT(dev);
		*result = (void *)(uintptr_t)instance;
		error = DDI_SUCCESS;
		break;
	default:
		break;
	}

	return (error);
}


/*
 * cb_ops entry points
 */
static dev_info_t *
ohci_get_dip(dev_t dev)
{
	int		instance = OHCI_UNIT(dev);
	ohci_state_t	*ohcip = ddi_get_soft_state(ohci_statep, instance);

	if (ohcip) {

		return (ohcip->ohci_dip);
	} else {

		return (NULL);
	}
}


static int
ohci_open(dev_t *devp, int flags, int otyp, cred_t *credp)
{
	dev_info_t	*dip = ohci_get_dip(*devp);

	return (usba_hubdi_open(dip, devp, flags, otyp, credp));
}


static int
ohci_close(dev_t dev, int flag, int otyp, cred_t *credp)
{
	dev_info_t	*dip = ohci_get_dip(dev);

	return (usba_hubdi_close(dip, dev, flag, otyp, credp));
}


static int
ohci_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, cred_t *credp,
    int *rvalp)
{
	dev_info_t	*dip = ohci_get_dip(dev);

	return (usba_hubdi_ioctl(dip,
	    dev, cmd, arg, mode, credp, rvalp));
}


/*
 * Host Controller Driver (HCD) initialization functions
 */

/*
 * ohci_set_dma_attributes:
 *
 * Set the limits in the DMA attributes structure. Most of the values used
 * in the  DMA limit structres are the default values as specified by  the
 * Writing PCI device drivers document.
 */
static void
ohci_set_dma_attributes(ohci_state_t	*ohcip)
{
	USB_DPRINTF_L4(PRINT_MASK_ATTA, ohcip->ohci_log_hdl,
	    "ohci_set_dma_attributes:");

	/* Initialize the DMA attributes */
	ohcip->ohci_dma_attr.dma_attr_version = DMA_ATTR_V0;
	ohcip->ohci_dma_attr.dma_attr_addr_lo = 0x00000000ull;
	ohcip->ohci_dma_attr.dma_attr_addr_hi = 0xfffffffeull;

	/* 32 bit addressing */
	ohcip->ohci_dma_attr.dma_attr_count_max = OHCI_DMA_ATTR_COUNT_MAX;

	/* Byte alignment */
	ohcip->ohci_dma_attr.dma_attr_align = OHCI_DMA_ATTR_ALIGNMENT;

	/*
	 * Since PCI  specification is byte alignment, the
	 * burstsize field should be set to 1 for PCI devices.
	 */
	ohcip->ohci_dma_attr.dma_attr_burstsizes = 0x1;

	ohcip->ohci_dma_attr.dma_attr_minxfer = 0x1;
	ohcip->ohci_dma_attr.dma_attr_maxxfer = OHCI_DMA_ATTR_MAX_XFER;
	ohcip->ohci_dma_attr.dma_attr_seg = 0xffffffffull;
	ohcip->ohci_dma_attr.dma_attr_sgllen = 1;
	ohcip->ohci_dma_attr.dma_attr_granular = OHCI_DMA_ATTR_GRANULAR;
	ohcip->ohci_dma_attr.dma_attr_flags = 0;
}


/*
 * ohci_allocate_pools:
 *
 * Allocate the system memory for the Endpoint Descriptor (ED) and for the
 * Transfer Descriptor (TD) pools. Both ED and TD structures must be aligned
 * to a 16 byte boundary.
 */
static int
ohci_allocate_pools(ohci_state_t	*ohcip)
{
	ddi_device_acc_attr_t		dev_attr;
	size_t				real_length;
	int				result;
	uint_t				ccount;
	int				i;

	USB_DPRINTF_L4(PRINT_MASK_ATTA, ohcip->ohci_log_hdl,
	    "ohci_allocate_pools:");

	/* The host controller will be little endian */
	dev_attr.devacc_attr_version	= DDI_DEVICE_ATTR_V0;
	dev_attr.devacc_attr_endian_flags  = DDI_STRUCTURE_LE_ACC;
	dev_attr.devacc_attr_dataorder	= DDI_STRICTORDER_ACC;

	/* Byte alignment to TD alignment */
	ohcip->ohci_dma_attr.dma_attr_align = OHCI_DMA_ATTR_TD_ALIGNMENT;

	/* Allocate the TD pool DMA handle */
	if (ddi_dma_alloc_handle(ohcip->ohci_dip, &ohcip->ohci_dma_attr,
	    DDI_DMA_SLEEP, 0,
	    &ohcip->ohci_td_pool_dma_handle) != DDI_SUCCESS) {

		return (DDI_FAILURE);
	}

	/* Allocate the memory for the TD pool */
	if (ddi_dma_mem_alloc(ohcip->ohci_td_pool_dma_handle,
	    ohci_td_pool_size * sizeof (ohci_td_t),
	    &dev_attr,
	    DDI_DMA_CONSISTENT,
	    DDI_DMA_SLEEP,
	    0,
	    (caddr_t *)&ohcip->ohci_td_pool_addr,
	    &real_length,
	    &ohcip->ohci_td_pool_mem_handle)) {

		return (DDI_FAILURE);
	}

	/* Map the TD pool into the I/O address space */
	result = ddi_dma_addr_bind_handle(
	    ohcip->ohci_td_pool_dma_handle,
	    NULL,
	    (caddr_t)ohcip->ohci_td_pool_addr,
	    real_length,
	    DDI_DMA_RDWR | DDI_DMA_CONSISTENT,
	    DDI_DMA_SLEEP,
	    NULL,
	    &ohcip->ohci_td_pool_cookie,
	    &ccount);

	bzero((void *)ohcip->ohci_td_pool_addr,
	    ohci_td_pool_size * sizeof (ohci_td_t));

	/* Process the result */
	if (result == DDI_DMA_MAPPED) {
		/* The cookie count should be 1 */
		if (ccount != 1) {
			USB_DPRINTF_L2(PRINT_MASK_ATTA, ohcip->ohci_log_hdl,
			    "ohci_allocate_pools: More than 1 cookie");

			return (DDI_FAILURE);
		}
	} else {
		USB_DPRINTF_L4(PRINT_MASK_ATTA, ohcip->ohci_log_hdl,
		    "ohci_allocate_pools: Result = %d", result);

		ohci_decode_ddi_dma_addr_bind_handle_result(ohcip, result);

		return (DDI_FAILURE);
	}

	/*
	 * DMA addresses for TD pools are bound
	 */
	ohcip->ohci_dma_addr_bind_flag |= OHCI_TD_POOL_BOUND;

	/* Initialize the TD pool */
	for (i = 0; i < ohci_td_pool_size; i ++) {
		Set_TD(ohcip->ohci_td_pool_addr[i].hctd_state, HC_TD_FREE);
	}

	/* Byte alignment to ED alignment */
	ohcip->ohci_dma_attr.dma_attr_align = OHCI_DMA_ATTR_ED_ALIGNMENT;

	/* Allocate the ED pool DMA handle */
	if (ddi_dma_alloc_handle(ohcip->ohci_dip,
	    &ohcip->ohci_dma_attr,
	    DDI_DMA_SLEEP,
	    0,
	    &ohcip->ohci_ed_pool_dma_handle) != DDI_SUCCESS) {

		return (DDI_FAILURE);
	}

	/* Allocate the memory for the ED pool */
	if (ddi_dma_mem_alloc(ohcip->ohci_ed_pool_dma_handle,
	    ohci_ed_pool_size * sizeof (ohci_ed_t),
	    &dev_attr,
	    DDI_DMA_CONSISTENT,
	    DDI_DMA_SLEEP,
	    0,
	    (caddr_t *)&ohcip->ohci_ed_pool_addr,
	    &real_length,
	    &ohcip->ohci_ed_pool_mem_handle) != DDI_SUCCESS) {

		return (DDI_FAILURE);
	}

	result = ddi_dma_addr_bind_handle(ohcip->ohci_ed_pool_dma_handle,
	    NULL,
	    (caddr_t)ohcip->ohci_ed_pool_addr,
	    real_length,
	    DDI_DMA_RDWR | DDI_DMA_CONSISTENT,
	    DDI_DMA_SLEEP,
	    NULL,
	    &ohcip->ohci_ed_pool_cookie,
	    &ccount);

	bzero((void *)ohcip->ohci_ed_pool_addr,
	    ohci_ed_pool_size * sizeof (ohci_ed_t));

	/* Process the result */
	if (result == DDI_DMA_MAPPED) {
		/* The cookie count should be 1 */
		if (ccount != 1) {
			USB_DPRINTF_L2(PRINT_MASK_ATTA, ohcip->ohci_log_hdl,
			    "ohci_allocate_pools: More than 1 cookie");

			return (DDI_FAILURE);
		}
	} else {
		ohci_decode_ddi_dma_addr_bind_handle_result(ohcip, result);

		return (DDI_FAILURE);
	}

	/*
	 * DMA addresses for ED pools are bound
	 */
	ohcip->ohci_dma_addr_bind_flag |= OHCI_ED_POOL_BOUND;

	/* Initialize the ED pool */
	for (i = 0; i < ohci_ed_pool_size; i ++) {
		Set_ED(ohcip->ohci_ed_pool_addr[i].hced_state, HC_EPT_FREE);
	}

	return (DDI_SUCCESS);
}


/*
 * ohci_decode_ddi_dma_addr_bind_handle_result:
 *
 * Process the return values of ddi_dma_addr_bind_handle()
 */
static void
ohci_decode_ddi_dma_addr_bind_handle_result(
	ohci_state_t	*ohcip,
	int		result)
{
	USB_DPRINTF_L2(PRINT_MASK_ALLOC, ohcip->ohci_log_hdl,
	    "ohci_decode_ddi_dma_addr_bind_handle_result:");

	switch (result) {
	case DDI_DMA_PARTIAL_MAP:
		USB_DPRINTF_L2(PRINT_MASK_ALL, ohcip->ohci_log_hdl,
		    "Partial transfers not allowed");
		break;
	case DDI_DMA_INUSE:
		USB_DPRINTF_L2(PRINT_MASK_ALL,	ohcip->ohci_log_hdl,
		    "Handle is in use");
		break;
	case DDI_DMA_NORESOURCES:
		USB_DPRINTF_L2(PRINT_MASK_ALL,	ohcip->ohci_log_hdl,