1*49ef7e06SGarrett D'Amore /* 2*49ef7e06SGarrett D'Amore * Copyright (c) 2008-2016 Solarflare Communications Inc. 3*49ef7e06SGarrett D'Amore * All rights reserved. 4*49ef7e06SGarrett D'Amore * 5*49ef7e06SGarrett D'Amore * Redistribution and use in source and binary forms, with or without 6*49ef7e06SGarrett D'Amore * modification, are permitted provided that the following conditions are met: 7*49ef7e06SGarrett D'Amore * 8*49ef7e06SGarrett D'Amore * 1. Redistributions of source code must retain the above copyright notice, 9*49ef7e06SGarrett D'Amore * this list of conditions and the following disclaimer. 10*49ef7e06SGarrett D'Amore * 2. Redistributions in binary form must reproduce the above copyright notice, 11*49ef7e06SGarrett D'Amore * this list of conditions and the following disclaimer in the documentation 12*49ef7e06SGarrett D'Amore * and/or other materials provided with the distribution. 13*49ef7e06SGarrett D'Amore * 14*49ef7e06SGarrett D'Amore * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 15*49ef7e06SGarrett D'Amore * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 16*49ef7e06SGarrett D'Amore * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 17*49ef7e06SGarrett D'Amore * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR 18*49ef7e06SGarrett D'Amore * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 19*49ef7e06SGarrett D'Amore * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 20*49ef7e06SGarrett D'Amore * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 21*49ef7e06SGarrett D'Amore * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 22*49ef7e06SGarrett D'Amore * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 23*49ef7e06SGarrett D'Amore * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 24*49ef7e06SGarrett D'Amore * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25*49ef7e06SGarrett D'Amore * 26*49ef7e06SGarrett D'Amore * The views and conclusions contained in the software and documentation are 27*49ef7e06SGarrett D'Amore * those of the authors and should not be interpreted as representing official 28*49ef7e06SGarrett D'Amore * policies, either expressed or implied, of the FreeBSD Project. 29*49ef7e06SGarrett D'Amore */ 30*49ef7e06SGarrett D'Amore 31*49ef7e06SGarrett D'Amore #ifndef _SYS_SFXGE_H 32*49ef7e06SGarrett D'Amore #define _SYS_SFXGE_H 33*49ef7e06SGarrett D'Amore 34*49ef7e06SGarrett D'Amore #ifdef __cplusplus 35*49ef7e06SGarrett D'Amore extern "C" { 36*49ef7e06SGarrett D'Amore #endif 37*49ef7e06SGarrett D'Amore 38*49ef7e06SGarrett D'Amore #include <sys/types.h> 39*49ef7e06SGarrett D'Amore #include <sys/ddi.h> 40*49ef7e06SGarrett D'Amore #include <sys/sunddi.h> 41*49ef7e06SGarrett D'Amore #include <sys/stream.h> 42*49ef7e06SGarrett D'Amore #include <sys/ethernet.h> 43*49ef7e06SGarrett D'Amore #include <sys/cpuvar.h> 44*49ef7e06SGarrett D'Amore 45*49ef7e06SGarrett D'Amore #include <sys/mac.h> 46*49ef7e06SGarrett D'Amore #include <sys/mac_ether.h> 47*49ef7e06SGarrett D'Amore #include <sys/mac_provider.h> 48*49ef7e06SGarrett D'Amore 49*49ef7e06SGarrett D'Amore #include "sfxge_ioc.h" 50*49ef7e06SGarrett D'Amore #include "sfxge_debug.h" 51*49ef7e06SGarrett D'Amore 52*49ef7e06SGarrett D'Amore #include "efx.h" 53*49ef7e06SGarrett D'Amore #include "efx_regs.h" 54*49ef7e06SGarrett D'Amore 55*49ef7e06SGarrett D'Amore #ifdef _KERNEL 56*49ef7e06SGarrett D'Amore 57*49ef7e06SGarrett D'Amore #define SFXGE_DRIVER_NAME "sfxge" 58*49ef7e06SGarrett D'Amore 59*49ef7e06SGarrett D'Amore #define SFXGE_CPU_CACHE_SIZE 64 60*49ef7e06SGarrett D'Amore 61*49ef7e06SGarrett D'Amore typedef struct sfxge_s sfxge_t; 62*49ef7e06SGarrett D'Amore 63*49ef7e06SGarrett D'Amore typedef enum sfxge_intr_state_e { 64*49ef7e06SGarrett D'Amore SFXGE_INTR_UNINITIALIZED = 0, 65*49ef7e06SGarrett D'Amore SFXGE_INTR_INITIALIZED, 66*49ef7e06SGarrett D'Amore SFXGE_INTR_TESTING, 67*49ef7e06SGarrett D'Amore SFXGE_INTR_STARTED 68*49ef7e06SGarrett D'Amore } sfxge_intr_state_t; 69*49ef7e06SGarrett D'Amore 70*49ef7e06SGarrett D'Amore typedef struct sfxge_intr_s { 71*49ef7e06SGarrett D'Amore ddi_intr_handle_t *si_table; 72*49ef7e06SGarrett D'Amore int si_table_size; 73*49ef7e06SGarrett D'Amore int si_nalloc; 74*49ef7e06SGarrett D'Amore int si_type; 75*49ef7e06SGarrett D'Amore int si_cap; 76*49ef7e06SGarrett D'Amore efsys_mem_t si_mem; 77*49ef7e06SGarrett D'Amore uint64_t si_mask; 78*49ef7e06SGarrett D'Amore sfxge_intr_state_t si_state; 79*49ef7e06SGarrett D'Amore uint32_t si_zero_count; 80*49ef7e06SGarrett D'Amore int si_intr_pri; 81*49ef7e06SGarrett D'Amore } sfxge_intr_t; 82*49ef7e06SGarrett D'Amore 83*49ef7e06SGarrett D'Amore typedef enum sfxge_promisc_type_e { 84*49ef7e06SGarrett D'Amore SFXGE_PROMISC_OFF = 0, 85*49ef7e06SGarrett D'Amore SFXGE_PROMISC_ALL_MULTI, 86*49ef7e06SGarrett D'Amore SFXGE_PROMISC_ALL_PHYS 87*49ef7e06SGarrett D'Amore } sfxge_promisc_type_t; 88*49ef7e06SGarrett D'Amore 89*49ef7e06SGarrett D'Amore typedef enum sfxge_link_duplex_e { 90*49ef7e06SGarrett D'Amore SFXGE_LINK_DUPLEX_UNKNOWN = 0, 91*49ef7e06SGarrett D'Amore SFXGE_LINK_DUPLEX_HALF, 92*49ef7e06SGarrett D'Amore SFXGE_LINK_DUPLEX_FULL 93*49ef7e06SGarrett D'Amore } sfxge_link_duplex_t; 94*49ef7e06SGarrett D'Amore 95*49ef7e06SGarrett D'Amore typedef enum sfxge_unicst_type_e { 96*49ef7e06SGarrett D'Amore SFXGE_UNICST_BIA = 0, 97*49ef7e06SGarrett D'Amore SFXGE_UNICST_LAA, 98*49ef7e06SGarrett D'Amore SFXGE_UNICST_NTYPES 99*49ef7e06SGarrett D'Amore } sfxge_unicst_type_t; 100*49ef7e06SGarrett D'Amore 101*49ef7e06SGarrett D'Amore typedef struct sfxge_phy_s { 102*49ef7e06SGarrett D'Amore kstat_t *sp_ksp; 103*49ef7e06SGarrett D'Amore kstat_named_t *sp_stat; 104*49ef7e06SGarrett D'Amore uint32_t *sp_statbuf; 105*49ef7e06SGarrett D'Amore efsys_mem_t sp_mem; 106*49ef7e06SGarrett D'Amore } sfxge_phy_t; 107*49ef7e06SGarrett D'Amore 108*49ef7e06SGarrett D'Amore typedef enum sfxge_mac_state_e { 109*49ef7e06SGarrett D'Amore SFXGE_MAC_UNINITIALIZED = 0, 110*49ef7e06SGarrett D'Amore SFXGE_MAC_INITIALIZED, 111*49ef7e06SGarrett D'Amore SFXGE_MAC_STARTED 112*49ef7e06SGarrett D'Amore } sfxge_mac_state_t; 113*49ef7e06SGarrett D'Amore 114*49ef7e06SGarrett D'Amore typedef struct sfxge_mac_s { 115*49ef7e06SGarrett D'Amore sfxge_t *sm_sp; 116*49ef7e06SGarrett D'Amore efsys_mem_t sm_mem; 117*49ef7e06SGarrett D'Amore kstat_t *sm_ksp; 118*49ef7e06SGarrett D'Amore kstat_named_t *sm_stat; 119*49ef7e06SGarrett D'Amore uint8_t sm_bia[ETHERADDRL]; 120*49ef7e06SGarrett D'Amore uint8_t sm_laa[ETHERADDRL]; 121*49ef7e06SGarrett D'Amore boolean_t sm_laa_valid; 122*49ef7e06SGarrett D'Amore unsigned int sm_fcntl; 123*49ef7e06SGarrett D'Amore sfxge_promisc_type_t sm_promisc; 124*49ef7e06SGarrett D'Amore uint8_t sm_mcast_addr[EFX_MAC_MULTICAST_LIST_MAX * 125*49ef7e06SGarrett D'Amore ETHERADDRL]; /* List of multicast addresses to filter on */ 126*49ef7e06SGarrett D'Amore int sm_mcast_count; 127*49ef7e06SGarrett D'Amore clock_t sm_lbolt; 128*49ef7e06SGarrett D'Amore kmutex_t sm_lock; 129*49ef7e06SGarrett D'Amore efx_link_mode_t sm_link_mode; 130*49ef7e06SGarrett D'Amore unsigned int sm_link_speed; 131*49ef7e06SGarrett D'Amore sfxge_link_duplex_t sm_link_duplex; 132*49ef7e06SGarrett D'Amore boolean_t sm_link_up; 133*49ef7e06SGarrett D'Amore boolean_t sm_link_poll_reqd; 134*49ef7e06SGarrett D'Amore kcondvar_t sm_link_poll_kv; 135*49ef7e06SGarrett D'Amore boolean_t sm_mac_stats_timer_reqd; 136*49ef7e06SGarrett D'Amore boolean_t sm_mac_stats_pend; 137*49ef7e06SGarrett D'Amore ddi_taskq_t *sm_tqp; 138*49ef7e06SGarrett D'Amore sfxge_mac_state_t sm_state; 139*49ef7e06SGarrett D'Amore sfxge_phy_t sm_phy; 140*49ef7e06SGarrett D'Amore uint32_t sm_phy_cap_to_set; 141*49ef7e06SGarrett D'Amore uint32_t sm_phy_cap_to_unset; 142*49ef7e06SGarrett D'Amore } sfxge_mac_t; 143*49ef7e06SGarrett D'Amore 144*49ef7e06SGarrett D'Amore typedef enum sfxge_mon_state_e { 145*49ef7e06SGarrett D'Amore SFXGE_MON_UNINITIALIZED = 0, 146*49ef7e06SGarrett D'Amore SFXGE_MON_INITIALIZED, 147*49ef7e06SGarrett D'Amore SFXGE_MON_STARTED 148*49ef7e06SGarrett D'Amore } sfxge_mon_state_t; 149*49ef7e06SGarrett D'Amore 150*49ef7e06SGarrett D'Amore typedef struct sfxge_mon_s { 151*49ef7e06SGarrett D'Amore sfxge_t *sm_sp; 152*49ef7e06SGarrett D'Amore efx_mon_type_t sm_type; 153*49ef7e06SGarrett D'Amore unsigned int sm_devid; 154*49ef7e06SGarrett D'Amore kstat_t *sm_ksp; 155*49ef7e06SGarrett D'Amore kstat_named_t *sm_stat; 156*49ef7e06SGarrett D'Amore efx_mon_stat_value_t *sm_statbuf; 157*49ef7e06SGarrett D'Amore kmutex_t sm_lock; 158*49ef7e06SGarrett D'Amore sfxge_mon_state_t sm_state; 159*49ef7e06SGarrett D'Amore efsys_mem_t sm_mem; 160*49ef7e06SGarrett D'Amore int sm_polling; 161*49ef7e06SGarrett D'Amore } sfxge_mon_t; 162*49ef7e06SGarrett D'Amore 163*49ef7e06SGarrett D'Amore typedef enum sfxge_sram_state_e { 164*49ef7e06SGarrett D'Amore SFXGE_SRAM_UNINITIALIZED = 0, 165*49ef7e06SGarrett D'Amore SFXGE_SRAM_INITIALIZED, 166*49ef7e06SGarrett D'Amore SFXGE_SRAM_STARTED 167*49ef7e06SGarrett D'Amore } sfxge_sram_state_t; 168*49ef7e06SGarrett D'Amore 169*49ef7e06SGarrett D'Amore typedef struct sfxge_sram_s { 170*49ef7e06SGarrett D'Amore sfxge_t *ss_sp; 171*49ef7e06SGarrett D'Amore kmutex_t ss_lock; 172*49ef7e06SGarrett D'Amore struct map *ss_buf_tbl_map; 173*49ef7e06SGarrett D'Amore unsigned int ss_count; 174*49ef7e06SGarrett D'Amore sfxge_sram_state_t ss_state; 175*49ef7e06SGarrett D'Amore } sfxge_sram_t; 176*49ef7e06SGarrett D'Amore 177*49ef7e06SGarrett D'Amore typedef enum sfxge_mcdi_state_e { 178*49ef7e06SGarrett D'Amore SFXGE_MCDI_UNINITIALIZED = 0, 179*49ef7e06SGarrett D'Amore SFXGE_MCDI_INITIALIZED, 180*49ef7e06SGarrett D'Amore SFXGE_MCDI_BUSY, 181*49ef7e06SGarrett D'Amore SFXGE_MCDI_COMPLETED 182*49ef7e06SGarrett D'Amore } sfxge_mcdi_state_t; 183*49ef7e06SGarrett D'Amore 184*49ef7e06SGarrett D'Amore typedef struct sfxge_mcdi_s { 185*49ef7e06SGarrett D'Amore sfxge_t *sm_sp; 186*49ef7e06SGarrett D'Amore kmutex_t sm_lock; 187*49ef7e06SGarrett D'Amore sfxge_mcdi_state_t sm_state; 188*49ef7e06SGarrett D'Amore efx_mcdi_transport_t sm_emt; 189*49ef7e06SGarrett D'Amore efsys_mem_t sm_mem; 190*49ef7e06SGarrett D'Amore kcondvar_t sm_kv; /* MCDI poll complete */ 191*49ef7e06SGarrett D'Amore } sfxge_mcdi_t; 192*49ef7e06SGarrett D'Amore 193*49ef7e06SGarrett D'Amore #define SFXGE_NEVS 4096 194*49ef7e06SGarrett D'Amore #define SFXGE_RX_NDESCS 1024 195*49ef7e06SGarrett D'Amore #define SFXGE_TX_NDESCS 1024 196*49ef7e06SGarrett D'Amore #define SFXGE_TX_NLABELS EFX_EV_TX_NLABELS 197*49ef7e06SGarrett D'Amore 198*49ef7e06SGarrett D'Amore #define SFXGE_DEFAULT_RXQ_SIZE 1024 199*49ef7e06SGarrett D'Amore #define SFXGE_DEFAULT_MODERATION 30 200*49ef7e06SGarrett D'Amore 201*49ef7e06SGarrett D'Amore typedef enum sfxge_evq_state_e { 202*49ef7e06SGarrett D'Amore SFXGE_EVQ_UNINITIALIZED = 0, 203*49ef7e06SGarrett D'Amore SFXGE_EVQ_INITIALIZED, 204*49ef7e06SGarrett D'Amore SFXGE_EVQ_STARTING, 205*49ef7e06SGarrett D'Amore SFXGE_EVQ_STARTED 206*49ef7e06SGarrett D'Amore } sfxge_evq_state_t; 207*49ef7e06SGarrett D'Amore 208*49ef7e06SGarrett D'Amore #define SFXGE_EV_BATCH (SFXGE_NEVS / 4) 209*49ef7e06SGarrett D'Amore 210*49ef7e06SGarrett D'Amore typedef struct sfxge_txq_s sfxge_txq_t; 211*49ef7e06SGarrett D'Amore 212*49ef7e06SGarrett D'Amore typedef struct sfxge_evq_s { 213*49ef7e06SGarrett D'Amore union { 214*49ef7e06SGarrett D'Amore struct { 215*49ef7e06SGarrett D'Amore sfxge_t *__se_sp; 216*49ef7e06SGarrett D'Amore unsigned int __se_index; 217*49ef7e06SGarrett D'Amore efsys_mem_t __se_mem; 218*49ef7e06SGarrett D'Amore unsigned int __se_id; 219*49ef7e06SGarrett D'Amore kstat_t *__se_ksp; 220*49ef7e06SGarrett D'Amore kstat_named_t *__se_stat; 221*49ef7e06SGarrett D'Amore efx_ev_callbacks_t __se_eec; 222*49ef7e06SGarrett D'Amore sfxge_evq_state_t __se_state; 223*49ef7e06SGarrett D'Amore boolean_t __se_exception; 224*49ef7e06SGarrett D'Amore } __se_s1; 225*49ef7e06SGarrett D'Amore uint8_t __se_pad[SFXGE_CPU_CACHE_SIZE * 4]; 226*49ef7e06SGarrett D'Amore } __se_u1; 227*49ef7e06SGarrett D'Amore union { 228*49ef7e06SGarrett D'Amore struct { 229*49ef7e06SGarrett D'Amore kmutex_t __se_lock; 230*49ef7e06SGarrett D'Amore kcondvar_t __se_init_kv; 231*49ef7e06SGarrett D'Amore efx_evq_t *__se_eep; 232*49ef7e06SGarrett D'Amore unsigned int __se_count; 233*49ef7e06SGarrett D'Amore unsigned int __se_rx; 234*49ef7e06SGarrett D'Amore unsigned int __se_tx; 235*49ef7e06SGarrett D'Amore sfxge_txq_t *__se_stp; 236*49ef7e06SGarrett D'Amore sfxge_txq_t **__se_stpp; 237*49ef7e06SGarrett D'Amore processorid_t __se_cpu_id; 238*49ef7e06SGarrett D'Amore uint16_t __se_ev_batch; 239*49ef7e06SGarrett D'Amore } __se_s2; 240*49ef7e06SGarrett D'Amore uint8_t __se_pad[SFXGE_CPU_CACHE_SIZE]; 241*49ef7e06SGarrett D'Amore } __se_u2; 242*49ef7e06SGarrett D'Amore union { 243*49ef7e06SGarrett D'Amore struct { 244*49ef7e06SGarrett D'Amore sfxge_txq_t *__se_label_stp[SFXGE_TX_NLABELS]; 245*49ef7e06SGarrett D'Amore } __se_s3; 246*49ef7e06SGarrett D'Amore uint8_t __se_pad[SFXGE_CPU_CACHE_SIZE * 4]; 247*49ef7e06SGarrett D'Amore } __se_u3; 248*49ef7e06SGarrett D'Amore } sfxge_evq_t; 249*49ef7e06SGarrett D'Amore 250*49ef7e06SGarrett D'Amore #define se_sp __se_u1.__se_s1.__se_sp 251*49ef7e06SGarrett D'Amore #define se_index __se_u1.__se_s1.__se_index 252*49ef7e06SGarrett D'Amore #define se_mem __se_u1.__se_s1.__se_mem 253*49ef7e06SGarrett D'Amore #define se_id __se_u1.__se_s1.__se_id 254*49ef7e06SGarrett D'Amore #define se_ksp __se_u1.__se_s1.__se_ksp 255*49ef7e06SGarrett D'Amore #define se_stat __se_u1.__se_s1.__se_stat 256*49ef7e06SGarrett D'Amore #define se_eec __se_u1.__se_s1.__se_eec 257*49ef7e06SGarrett D'Amore #define se_state __se_u1.__se_s1.__se_state 258*49ef7e06SGarrett D'Amore #define se_exception __se_u1.__se_s1.__se_exception 259*49ef7e06SGarrett D'Amore 260*49ef7e06SGarrett D'Amore #define se_lock __se_u2.__se_s2.__se_lock 261*49ef7e06SGarrett D'Amore #define se_init_kv __se_u2.__se_s2.__se_init_kv 262*49ef7e06SGarrett D'Amore #define se_eep __se_u2.__se_s2.__se_eep 263*49ef7e06SGarrett D'Amore #define se_count __se_u2.__se_s2.__se_count 264*49ef7e06SGarrett D'Amore #define se_rx __se_u2.__se_s2.__se_rx 265*49ef7e06SGarrett D'Amore #define se_tx __se_u2.__se_s2.__se_tx 266*49ef7e06SGarrett D'Amore #define se_stp __se_u2.__se_s2.__se_stp 267*49ef7e06SGarrett D'Amore #define se_stpp __se_u2.__se_s2.__se_stpp 268*49ef7e06SGarrett D'Amore #define se_cpu_id __se_u2.__se_s2.__se_cpu_id 269*49ef7e06SGarrett D'Amore #define se_ev_batch __se_u2.__se_s2.__se_ev_batch 270*49ef7e06SGarrett D'Amore 271*49ef7e06SGarrett D'Amore #define se_label_stp __se_u3.__se_s3.__se_label_stp 272*49ef7e06SGarrett D'Amore 273*49ef7e06SGarrett D'Amore 274*49ef7e06SGarrett D'Amore #define SFXGE_MAGIC_RESERVED 0x8000 275*49ef7e06SGarrett D'Amore 276*49ef7e06SGarrett D'Amore #define SFXGE_MAGIC_DMAQ_LABEL_WIDTH 5 277*49ef7e06SGarrett D'Amore #define SFXGE_MAGIC_DMAQ_LABEL_MASK ((1 << SFXGE_MAGIC_DMAQ_LABEL_WIDTH) - 1) 278*49ef7e06SGarrett D'Amore 279*49ef7e06SGarrett D'Amore #define SFXGE_MAGIC_RX_QFLUSH_DONE \ 280*49ef7e06SGarrett D'Amore (SFXGE_MAGIC_RESERVED | (1 << SFXGE_MAGIC_DMAQ_LABEL_WIDTH)) 281*49ef7e06SGarrett D'Amore 282*49ef7e06SGarrett D'Amore #define SFXGE_MAGIC_RX_QFLUSH_FAILED \ 283*49ef7e06SGarrett D'Amore (SFXGE_MAGIC_RESERVED | (2 << SFXGE_MAGIC_DMAQ_LABEL_WIDTH)) 284*49ef7e06SGarrett D'Amore 285*49ef7e06SGarrett D'Amore #define SFXGE_MAGIC_RX_QFPP_TRIM \ 286*49ef7e06SGarrett D'Amore (SFXGE_MAGIC_RESERVED | (3 << SFXGE_MAGIC_DMAQ_LABEL_WIDTH)) 287*49ef7e06SGarrett D'Amore 288*49ef7e06SGarrett D'Amore #define SFXGE_MAGIC_TX_QFLUSH_DONE \ 289*49ef7e06SGarrett D'Amore (SFXGE_MAGIC_RESERVED | (4 << SFXGE_MAGIC_DMAQ_LABEL_WIDTH)) 290*49ef7e06SGarrett D'Amore 291*49ef7e06SGarrett D'Amore typedef struct sfxge_rxq_s sfxge_rxq_t; 292*49ef7e06SGarrett D'Amore 293*49ef7e06SGarrett D'Amore #define SFXGE_ETHERTYPE_LOOPBACK 0x9000 /* Xerox loopback */ 294*49ef7e06SGarrett D'Amore 295*49ef7e06SGarrett D'Amore typedef struct sfxge_rx_packet_s sfxge_rx_packet_t; 296*49ef7e06SGarrett D'Amore 297*49ef7e06SGarrett D'Amore struct sfxge_rx_packet_s { 298*49ef7e06SGarrett D'Amore union { 299*49ef7e06SGarrett D'Amore struct { 300*49ef7e06SGarrett D'Amore frtn_t __srp_free; 301*49ef7e06SGarrett D'Amore uint16_t __srp_flags; 302*49ef7e06SGarrett D'Amore uint16_t __srp_size; 303*49ef7e06SGarrett D'Amore mblk_t *__srp_mp; 304*49ef7e06SGarrett D'Amore struct ether_header *__srp_etherhp; 305*49ef7e06SGarrett D'Amore struct ip *__srp_iphp; 306*49ef7e06SGarrett D'Amore struct tcphdr *__srp_thp; 307*49ef7e06SGarrett D'Amore size_t __srp_off; 308*49ef7e06SGarrett D'Amore } __srp_s1; 309*49ef7e06SGarrett D'Amore uint8_t __srp_pad[SFXGE_CPU_CACHE_SIZE]; 310*49ef7e06SGarrett D'Amore } __srp_u1; 311*49ef7e06SGarrett D'Amore union { 312*49ef7e06SGarrett D'Amore struct { 313*49ef7e06SGarrett D'Amore sfxge_rxq_t *__srp_srp; 314*49ef7e06SGarrett D'Amore ddi_dma_handle_t __srp_dma_handle; 315*49ef7e06SGarrett D'Amore ddi_acc_handle_t __srp_acc_handle; 316*49ef7e06SGarrett D'Amore unsigned char *__srp_base; 317*49ef7e06SGarrett D'Amore size_t __srp_mblksize; 318*49ef7e06SGarrett D'Amore uint64_t __srp_addr; 319*49ef7e06SGarrett D'Amore boolean_t __srp_recycle; 320*49ef7e06SGarrett D'Amore caddr_t __srp_putp; 321*49ef7e06SGarrett D'Amore } __srp_s2; 322*49ef7e06SGarrett D'Amore uint8_t __srp_pad[SFXGE_CPU_CACHE_SIZE * 2]; 323*49ef7e06SGarrett D'Amore } __srp_u2; 324*49ef7e06SGarrett D'Amore }; 325*49ef7e06SGarrett D'Amore 326*49ef7e06SGarrett D'Amore #define srp_free __srp_u1.__srp_s1.__srp_free 327*49ef7e06SGarrett D'Amore #define srp_flags __srp_u1.__srp_s1.__srp_flags 328*49ef7e06SGarrett D'Amore #define srp_size __srp_u1.__srp_s1.__srp_size 329*49ef7e06SGarrett D'Amore #define srp_mp __srp_u1.__srp_s1.__srp_mp 330*49ef7e06SGarrett D'Amore #define srp_etherhp __srp_u1.__srp_s1.__srp_etherhp 331*49ef7e06SGarrett D'Amore #define srp_iphp __srp_u1.__srp_s1.__srp_iphp 332*49ef7e06SGarrett D'Amore #define srp_thp __srp_u1.__srp_s1.__srp_thp 333*49ef7e06SGarrett D'Amore #define srp_off __srp_u1.__srp_s1.__srp_off 334*49ef7e06SGarrett D'Amore 335*49ef7e06SGarrett D'Amore #define srp_srp __srp_u2.__srp_s2.__srp_srp 336*49ef7e06SGarrett D'Amore #define srp_dma_handle __srp_u2.__srp_s2.__srp_dma_handle 337*49ef7e06SGarrett D'Amore #define srp_acc_handle __srp_u2.__srp_s2.__srp_acc_handle 338*49ef7e06SGarrett D'Amore #define srp_base __srp_u2.__srp_s2.__srp_base 339*49ef7e06SGarrett D'Amore #define srp_mblksize __srp_u2.__srp_s2.__srp_mblksize 340*49ef7e06SGarrett D'Amore #define srp_addr __srp_u2.__srp_s2.__srp_addr 341*49ef7e06SGarrett D'Amore #define srp_recycle __srp_u2.__srp_s2.__srp_recycle 342*49ef7e06SGarrett D'Amore #define srp_putp __srp_u2.__srp_s2.__srp_putp 343*49ef7e06SGarrett D'Amore 344*49ef7e06SGarrett D'Amore #define SFXGE_RX_FPP_NSLOTS 8 345*49ef7e06SGarrett D'Amore #define SFXGE_RX_FPP_MASK (SFXGE_RX_FPP_NSLOTS - 1) 346*49ef7e06SGarrett D'Amore 347*49ef7e06SGarrett D'Amore /* Free packet pool putlist (dynamically allocated) */ 348*49ef7e06SGarrett D'Amore typedef struct sfxge_rx_fpp_putlist_s { 349*49ef7e06SGarrett D'Amore kmutex_t srfpl_lock; 350*49ef7e06SGarrett D'Amore unsigned int srfpl_count; 351*49ef7e06SGarrett D'Amore mblk_t *srfpl_putp; 352*49ef7e06SGarrett D'Amore mblk_t **srfpl_putpp; 353*49ef7e06SGarrett D'Amore } sfxge_rx_fpp_putlist_t; 354*49ef7e06SGarrett D'Amore 355*49ef7e06SGarrett D'Amore /* Free packet pool */ 356*49ef7e06SGarrett D'Amore typedef struct sfxge_rx_fpp_s { 357*49ef7e06SGarrett D'Amore caddr_t srfpp_putp; 358*49ef7e06SGarrett D'Amore unsigned int srfpp_loaned; 359*49ef7e06SGarrett D'Amore mblk_t *srfpp_get; 360*49ef7e06SGarrett D'Amore unsigned int srfpp_count; 361*49ef7e06SGarrett D'Amore unsigned int srfpp_min; 362*49ef7e06SGarrett D'Amore /* Low water mark: Don't trim to below this */ 363*49ef7e06SGarrett D'Amore unsigned int srfpp_lowat; 364*49ef7e06SGarrett D'Amore } sfxge_rx_fpp_t; 365*49ef7e06SGarrett D'Amore 366*49ef7e06SGarrett D'Amore typedef struct sfxge_rx_flow_s sfxge_rx_flow_t; 367*49ef7e06SGarrett D'Amore 368*49ef7e06SGarrett D'Amore struct sfxge_rx_flow_s { 369*49ef7e06SGarrett D'Amore uint32_t srf_tag; 370*49ef7e06SGarrett D'Amore /* in-order segment count */ 371*49ef7e06SGarrett D'Amore unsigned int srf_count; 372*49ef7e06SGarrett D'Amore uint16_t srf_tci; 373*49ef7e06SGarrett D'Amore uint32_t srf_saddr; 374*49ef7e06SGarrett D'Amore uint32_t srf_daddr; 375*49ef7e06SGarrett D'Amore uint16_t srf_sport; 376*49ef7e06SGarrett D'Amore uint16_t srf_dport; 377*49ef7e06SGarrett D'Amore /* sequence number */ 378*49ef7e06SGarrett D'Amore uint32_t srf_seq; 379*49ef7e06SGarrett D'Amore clock_t srf_lbolt; 380*49ef7e06SGarrett D'Amore mblk_t *srf_mp; 381*49ef7e06SGarrett D'Amore mblk_t **srf_mpp; 382*49ef7e06SGarrett D'Amore struct ether_header *srf_etherhp; 383*49ef7e06SGarrett D'Amore struct ip *srf_iphp; 384*49ef7e06SGarrett D'Amore struct tcphdr *srf_first_thp; 385*49ef7e06SGarrett D'Amore struct tcphdr *srf_last_thp; 386*49ef7e06SGarrett D'Amore size_t srf_len; 387*49ef7e06SGarrett D'Amore sfxge_rx_flow_t *srf_next; 388*49ef7e06SGarrett D'Amore }; 389*49ef7e06SGarrett D'Amore 390*49ef7e06SGarrett D'Amore #define SFXGE_MAX_FLOW 1024 391*49ef7e06SGarrett D'Amore #define SFXGE_SLOW_START 20 392*49ef7e06SGarrett D'Amore 393*49ef7e06SGarrett D'Amore typedef enum sfxge_flush_state_e { 394*49ef7e06SGarrett D'Amore SFXGE_FLUSH_INACTIVE = 0, 395*49ef7e06SGarrett D'Amore SFXGE_FLUSH_DONE, 396*49ef7e06SGarrett D'Amore SFXGE_FLUSH_PENDING, 397*49ef7e06SGarrett D'Amore SFXGE_FLUSH_FAILED 398*49ef7e06SGarrett D'Amore } sfxge_flush_state_t; 399*49ef7e06SGarrett D'Amore 400*49ef7e06SGarrett D'Amore typedef enum sfxge_rxq_state_e { 401*49ef7e06SGarrett D'Amore SFXGE_RXQ_UNINITIALIZED = 0, 402*49ef7e06SGarrett D'Amore SFXGE_RXQ_INITIALIZED, 403*49ef7e06SGarrett D'Amore SFXGE_RXQ_STARTED 404*49ef7e06SGarrett D'Amore } sfxge_rxq_state_t; 405*49ef7e06SGarrett D'Amore 406*49ef7e06SGarrett D'Amore 407*49ef7e06SGarrett D'Amore #define SFXGE_RX_BATCH 128 408*49ef7e06SGarrett D'Amore #define SFXGE_RX_NSTATS 8 /* note that *esballoc share one kstat */ 409*49ef7e06SGarrett D'Amore 410*49ef7e06SGarrett D'Amore struct sfxge_rxq_s { 411*49ef7e06SGarrett D'Amore union { 412*49ef7e06SGarrett D'Amore struct { 413*49ef7e06SGarrett D'Amore sfxge_t *__sr_sp; 414*49ef7e06SGarrett D'Amore unsigned int __sr_index; 415*49ef7e06SGarrett D'Amore efsys_mem_t __sr_mem; 416*49ef7e06SGarrett D'Amore unsigned int __sr_id; 417*49ef7e06SGarrett D'Amore unsigned int __sr_lowat; 418*49ef7e06SGarrett D'Amore unsigned int __sr_hiwat; 419*49ef7e06SGarrett D'Amore volatile timeout_id_t __sr_tid; 420*49ef7e06SGarrett D'Amore sfxge_rxq_state_t __sr_state; 421*49ef7e06SGarrett D'Amore } __sr_s1; 422*49ef7e06SGarrett D'Amore uint8_t __sr_pad[SFXGE_CPU_CACHE_SIZE * 2]; 423*49ef7e06SGarrett D'Amore } __sr_u1; 424*49ef7e06SGarrett D'Amore union { 425*49ef7e06SGarrett D'Amore struct { 426*49ef7e06SGarrett D'Amore sfxge_rx_packet_t **__sr_srpp; 427*49ef7e06SGarrett D'Amore unsigned int __sr_added; 428*49ef7e06SGarrett D'Amore unsigned int __sr_pushed; 429*49ef7e06SGarrett D'Amore unsigned int __sr_pending; 430*49ef7e06SGarrett D'Amore unsigned int __sr_completed; 431*49ef7e06SGarrett D'Amore unsigned int __sr_loopback; 432*49ef7e06SGarrett D'Amore mblk_t *__sr_mp; 433*49ef7e06SGarrett D'Amore mblk_t **__sr_mpp; 434*49ef7e06SGarrett D'Amore sfxge_rx_flow_t *__sr_flow; 435*49ef7e06SGarrett D'Amore sfxge_rx_flow_t *__sr_srfp; 436*49ef7e06SGarrett D'Amore sfxge_rx_flow_t **__sr_srfpp; 437*49ef7e06SGarrett D'Amore clock_t __sr_rto; 438*49ef7e06SGarrett D'Amore } __sr_s2; 439*49ef7e06SGarrett D'Amore uint8_t __sr_pad[SFXGE_CPU_CACHE_SIZE * 2]; 440*49ef7e06SGarrett D'Amore } __sr_u2; 441*49ef7e06SGarrett D'Amore union { 442*49ef7e06SGarrett D'Amore struct { 443*49ef7e06SGarrett D'Amore sfxge_rx_fpp_t __sr_fpp; 444*49ef7e06SGarrett D'Amore efx_rxq_t *__sr_erp; 445*49ef7e06SGarrett D'Amore volatile sfxge_flush_state_t __sr_flush; 446*49ef7e06SGarrett D'Amore kcondvar_t __sr_flush_kv; 447*49ef7e06SGarrett D'Amore kstat_t *__sr_ksp; 448*49ef7e06SGarrett D'Amore } __sr_s3; 449*49ef7e06SGarrett D'Amore uint8_t __sr_pad[SFXGE_CPU_CACHE_SIZE]; 450*49ef7e06SGarrett D'Amore } __sr_u3; 451*49ef7e06SGarrett D'Amore struct { 452*49ef7e06SGarrett D'Amore /* NB must match SFXGE_RX_NSTATS */ 453*49ef7e06SGarrett D'Amore uint32_t srk_rx_pkt_mem_limit; 454*49ef7e06SGarrett D'Amore uint32_t srk_kcache_alloc_nomem; 455*49ef7e06SGarrett D'Amore uint32_t srk_dma_alloc_nomem; 456*49ef7e06SGarrett D'Amore uint32_t srk_dma_alloc_fail; 457*49ef7e06SGarrett D'Amore uint32_t srk_dma_bind_nomem; 458*49ef7e06SGarrett D'Amore uint32_t srk_dma_bind_fail; 459*49ef7e06SGarrett D'Amore uint32_t srk_desballoc_fail; 460*49ef7e06SGarrett D'Amore uint32_t srk_rxq_empty_discard; 461*49ef7e06SGarrett D'Amore } sr_kstat; 462*49ef7e06SGarrett D'Amore }; 463*49ef7e06SGarrett D'Amore 464*49ef7e06SGarrett D'Amore #define sr_sp __sr_u1.__sr_s1.__sr_sp 465*49ef7e06SGarrett D'Amore #define sr_index __sr_u1.__sr_s1.__sr_index 466*49ef7e06SGarrett D'Amore #define sr_mem __sr_u1.__sr_s1.__sr_mem 467*49ef7e06SGarrett D'Amore #define sr_id __sr_u1.__sr_s1.__sr_id 468*49ef7e06SGarrett D'Amore #define sr_mrh __sr_u1.__sr_s1.__sr_mrh 469*49ef7e06SGarrett D'Amore #define sr_lowat __sr_u1.__sr_s1.__sr_lowat 470*49ef7e06SGarrett D'Amore #define sr_hiwat __sr_u1.__sr_s1.__sr_hiwat 471*49ef7e06SGarrett D'Amore #define sr_tid __sr_u1.__sr_s1.__sr_tid 472*49ef7e06SGarrett D'Amore #define sr_state __sr_u1.__sr_s1.__sr_state 473*49ef7e06SGarrett D'Amore 474*49ef7e06SGarrett D'Amore #define sr_srpp __sr_u2.__sr_s2.__sr_srpp 475*49ef7e06SGarrett D'Amore #define sr_added __sr_u2.__sr_s2.__sr_added 476*49ef7e06SGarrett D'Amore #define sr_pushed __sr_u2.__sr_s2.__sr_pushed 477*49ef7e06SGarrett D'Amore #define sr_pending __sr_u2.__sr_s2.__sr_pending 478*49ef7e06SGarrett D'Amore #define sr_completed __sr_u2.__sr_s2.__sr_completed 479*49ef7e06SGarrett D'Amore #define sr_loopback __sr_u2.__sr_s2.__sr_loopback 480*49ef7e06SGarrett D'Amore #define sr_mp __sr_u2.__sr_s2.__sr_mp 481*49ef7e06SGarrett D'Amore #define sr_mpp __sr_u2.__sr_s2.__sr_mpp 482*49ef7e06SGarrett D'Amore #define sr_flow __sr_u2.__sr_s2.__sr_flow 483*49ef7e06SGarrett D'Amore #define sr_srfp __sr_u2.__sr_s2.__sr_srfp 484*49ef7e06SGarrett D'Amore #define sr_srfpp __sr_u2.__sr_s2.__sr_srfpp 485*49ef7e06SGarrett D'Amore #define sr_rto __sr_u2.__sr_s2.__sr_rto 486*49ef7e06SGarrett D'Amore 487*49ef7e06SGarrett D'Amore #define sr_fpp __sr_u3.__sr_s3.__sr_fpp 488*49ef7e06SGarrett D'Amore #define sr_erp __sr_u3.__sr_s3.__sr_erp 489*49ef7e06SGarrett D'Amore #define sr_flush __sr_u3.__sr_s3.__sr_flush 490*49ef7e06SGarrett D'Amore #define sr_flush_kv __sr_u3.__sr_s3.__sr_flush_kv 491*49ef7e06SGarrett D'Amore #define sr_ksp __sr_u3.__sr_s3.__sr_ksp 492*49ef7e06SGarrett D'Amore 493*49ef7e06SGarrett D'Amore typedef struct sfxge_tx_packet_s sfxge_tx_packet_t; 494*49ef7e06SGarrett D'Amore 495*49ef7e06SGarrett D'Amore /* Packet type from parsing transmit packet */ 496*49ef7e06SGarrett D'Amore typedef enum sfxge_packet_type_e { 497*49ef7e06SGarrett D'Amore SFXGE_PACKET_TYPE_UNKNOWN = 0, 498*49ef7e06SGarrett D'Amore SFXGE_PACKET_TYPE_IPV4_TCP, 499*49ef7e06SGarrett D'Amore SFXGE_PACKET_TYPE_IPV4_UDP, 500*49ef7e06SGarrett D'Amore SFXGE_PACKET_TYPE_IPV4_SCTP, 501*49ef7e06SGarrett D'Amore SFXGE_PACKET_TYPE_IPV4_OTHER, 502*49ef7e06SGarrett D'Amore SFXGE_PACKET_NTYPES 503*49ef7e06SGarrett D'Amore } sfxge_packet_type_t; 504*49ef7e06SGarrett D'Amore 505*49ef7e06SGarrett D'Amore struct sfxge_tx_packet_s { 506*49ef7e06SGarrett D'Amore sfxge_tx_packet_t *stp_next; 507*49ef7e06SGarrett D'Amore mblk_t *stp_mp; 508*49ef7e06SGarrett D'Amore struct ether_header *stp_etherhp; 509*49ef7e06SGarrett D'Amore struct ip *stp_iphp; 510*49ef7e06SGarrett D'Amore struct tcphdr *stp_thp; 511*49ef7e06SGarrett D'Amore size_t stp_off; 512*49ef7e06SGarrett D'Amore size_t stp_size; 513*49ef7e06SGarrett D'Amore size_t stp_mss; 514*49ef7e06SGarrett D'Amore uint32_t stp_dpl_put_len; 515*49ef7e06SGarrett D'Amore }; 516*49ef7e06SGarrett D'Amore 517*49ef7e06SGarrett D'Amore #define SFXGE_TX_FPP_MAX 64 518*49ef7e06SGarrett D'Amore 519*49ef7e06SGarrett D'Amore typedef struct sfxge_tx_fpp_s { 520*49ef7e06SGarrett D'Amore sfxge_tx_packet_t *stf_stpp; 521*49ef7e06SGarrett D'Amore unsigned int stf_count; 522*49ef7e06SGarrett D'Amore } sfxge_tx_fpp_t; 523*49ef7e06SGarrett D'Amore 524*49ef7e06SGarrett D'Amore typedef struct sfxge_tx_mapping_s sfxge_tx_mapping_t; 525*49ef7e06SGarrett D'Amore 526*49ef7e06SGarrett D'Amore #define SFXGE_TX_MAPPING_NADDR (((1 << 16) >> 12) + 2) 527*49ef7e06SGarrett D'Amore 528*49ef7e06SGarrett D'Amore struct sfxge_tx_mapping_s { 529*49ef7e06SGarrett D'Amore sfxge_tx_mapping_t *stm_next; 530*49ef7e06SGarrett D'Amore sfxge_t *stm_sp; 531*49ef7e06SGarrett D'Amore mblk_t *stm_mp; 532*49ef7e06SGarrett D'Amore ddi_dma_handle_t stm_dma_handle; 533*49ef7e06SGarrett D'Amore caddr_t stm_base; 534*49ef7e06SGarrett D'Amore size_t stm_size; 535*49ef7e06SGarrett D'Amore size_t stm_off; 536*49ef7e06SGarrett D'Amore uint64_t stm_addr[SFXGE_TX_MAPPING_NADDR]; 537*49ef7e06SGarrett D'Amore }; 538*49ef7e06SGarrett D'Amore 539*49ef7e06SGarrett D'Amore typedef struct sfxge_tx_fmp_s { 540*49ef7e06SGarrett D'Amore sfxge_tx_mapping_t *stf_stmp; 541*49ef7e06SGarrett D'Amore unsigned int stf_count; 542*49ef7e06SGarrett D'Amore } sfxge_tx_fmp_t; 543*49ef7e06SGarrett D'Amore 544*49ef7e06SGarrett D'Amore typedef struct sfxge_tx_buffer_s sfxge_tx_buffer_t; 545*49ef7e06SGarrett D'Amore 546*49ef7e06SGarrett D'Amore struct sfxge_tx_buffer_s { 547*49ef7e06SGarrett D'Amore sfxge_tx_buffer_t *stb_next; 548*49ef7e06SGarrett D'Amore size_t stb_off; 549*49ef7e06SGarrett D'Amore efsys_mem_t stb_esm; 550*49ef7e06SGarrett D'Amore }; 551*49ef7e06SGarrett D'Amore 552*49ef7e06SGarrett D'Amore #define SFXGE_TX_BUFFER_SIZE 0x400 553*49ef7e06SGarrett D'Amore #define SFXGE_TX_HEADER_SIZE 0x100 554*49ef7e06SGarrett D'Amore #define SFXGE_TX_COPY_THRESHOLD 0x200 555*49ef7e06SGarrett D'Amore 556*49ef7e06SGarrett D'Amore typedef struct sfxge_tx_fbp_s { 557*49ef7e06SGarrett D'Amore sfxge_tx_buffer_t *stf_stbp; 558*49ef7e06SGarrett D'Amore unsigned int stf_count; 559*49ef7e06SGarrett D'Amore } sfxge_tx_fbp_t; 560*49ef7e06SGarrett D'Amore 561*49ef7e06SGarrett D'Amore typedef struct sfxge_tx_dpl_s { 562*49ef7e06SGarrett D'Amore uintptr_t std_put; 563*49ef7e06SGarrett D'Amore sfxge_tx_packet_t *std_get; 564*49ef7e06SGarrett D'Amore sfxge_tx_packet_t **std_getp; 565*49ef7e06SGarrett D'Amore unsigned int std_count; /* only get list count */ 566*49ef7e06SGarrett D'Amore unsigned int get_pkt_limit; 567*49ef7e06SGarrett D'Amore unsigned int put_pkt_limit; 568*49ef7e06SGarrett D'Amore unsigned int get_full_count; 569*49ef7e06SGarrett D'Amore unsigned int put_full_count; 570*49ef7e06SGarrett D'Amore } sfxge_tx_dpl_t; 571*49ef7e06SGarrett D'Amore 572*49ef7e06SGarrett D'Amore typedef enum sfxge_txq_state_e { 573*49ef7e06SGarrett D'Amore SFXGE_TXQ_UNINITIALIZED = 0, 574*49ef7e06SGarrett D'Amore SFXGE_TXQ_INITIALIZED, 575*49ef7e06SGarrett D'Amore SFXGE_TXQ_STARTED, 576*49ef7e06SGarrett D'Amore SFXGE_TXQ_FLUSH_PENDING, 577*49ef7e06SGarrett D'Amore SFXGE_TXQ_FLUSH_DONE, 578*49ef7e06SGarrett D'Amore SFXGE_TXQ_FLUSH_FAILED 579*49ef7e06SGarrett D'Amore } sfxge_txq_state_t; 580*49ef7e06SGarrett D'Amore 581*49ef7e06SGarrett D'Amore typedef enum sfxge_txq_type_e { 582*49ef7e06SGarrett D'Amore SFXGE_TXQ_NON_CKSUM = 0, 583*49ef7e06SGarrett D'Amore SFXGE_TXQ_IP_CKSUM, 584*49ef7e06SGarrett D'Amore SFXGE_TXQ_IP_TCP_UDP_CKSUM, 585*49ef7e06SGarrett D'Amore SFXGE_TXQ_NTYPES 586*49ef7e06SGarrett D'Amore } sfxge_txq_type_t; 587*49ef7e06SGarrett D'Amore 588*49ef7e06SGarrett D'Amore #define SFXGE_TXQ_UNBLOCK_LEVEL1 (EFX_TXQ_LIMIT(SFXGE_TX_NDESCS) / 4) 589*49ef7e06SGarrett D'Amore #define SFXGE_TXQ_UNBLOCK_LEVEL2 0 590*49ef7e06SGarrett D'Amore #define SFXGE_TXQ_NOT_BLOCKED -1 591*49ef7e06SGarrett D'Amore 592*49ef7e06SGarrett D'Amore #define SFXGE_TX_BATCH 64 593*49ef7e06SGarrett D'Amore 594*49ef7e06SGarrett D'Amore struct sfxge_txq_s { 595*49ef7e06SGarrett D'Amore union { 596*49ef7e06SGarrett D'Amore struct { 597*49ef7e06SGarrett D'Amore sfxge_t *__st_sp; 598*49ef7e06SGarrett D'Amore unsigned int __st_index; 599*49ef7e06SGarrett D'Amore unsigned int __st_label; 600*49ef7e06SGarrett D'Amore sfxge_txq_type_t __st_type; 601*49ef7e06SGarrett D'Amore unsigned int __st_evq; 602*49ef7e06SGarrett D'Amore efsys_mem_t __st_mem; 603*49ef7e06SGarrett D'Amore unsigned int __st_id; 604*49ef7e06SGarrett D'Amore kstat_t *__st_ksp; 605*49ef7e06SGarrett D'Amore kstat_named_t *__st_stat; 606*49ef7e06SGarrett D'Amore sfxge_txq_state_t __st_state; 607*49ef7e06SGarrett D'Amore } __st_s1; 608*49ef7e06SGarrett D'Amore uint8_t __st_pad[SFXGE_CPU_CACHE_SIZE * 2]; 609*49ef7e06SGarrett D'Amore } __st_u1; 610*49ef7e06SGarrett D'Amore union { 611*49ef7e06SGarrett D'Amore struct { 612*49ef7e06SGarrett D'Amore sfxge_tx_dpl_t __st_dpl; 613*49ef7e06SGarrett D'Amore } __st_s2; 614*49ef7e06SGarrett D'Amore uint8_t __st_pad[SFXGE_CPU_CACHE_SIZE]; 615*49ef7e06SGarrett D'Amore } __st_u2; 616*49ef7e06SGarrett D'Amore union { 617*49ef7e06SGarrett D'Amore struct { 618*49ef7e06SGarrett D'Amore kmutex_t __st_lock; 619*49ef7e06SGarrett D'Amore /* mapping pool - sfxge_tx_mapping_t */ 620*49ef7e06SGarrett D'Amore sfxge_tx_fmp_t __st_fmp; 621*49ef7e06SGarrett D'Amore /* buffer pool - sfxge_tx_buffer_t */ 622*49ef7e06SGarrett D'Amore sfxge_tx_fbp_t __st_fbp; 623*49ef7e06SGarrett D'Amore /* packet pool - sfxge_tx_packet_t */ 624*49ef7e06SGarrett D'Amore sfxge_tx_fpp_t __st_fpp; 625*49ef7e06SGarrett D'Amore efx_buffer_t *__st_eb; 626*49ef7e06SGarrett D'Amore unsigned int __st_n; 627*49ef7e06SGarrett D'Amore efx_txq_t *__st_etp; 628*49ef7e06SGarrett D'Amore sfxge_tx_mapping_t **__st_stmp; 629*49ef7e06SGarrett D'Amore sfxge_tx_buffer_t **__st_stbp; 630*49ef7e06SGarrett D'Amore mblk_t **__st_mp; 631*49ef7e06SGarrett D'Amore unsigned int __st_added; 632*49ef7e06SGarrett D'Amore unsigned int __st_reaped; 633*49ef7e06SGarrett D'Amore int __st_unblock; 634*49ef7e06SGarrett D'Amore } __st_s3; 635*49ef7e06SGarrett D'Amore uint8_t __st_pad[SFXGE_CPU_CACHE_SIZE * 3]; 636*49ef7e06SGarrett D'Amore } __st_u3; 637*49ef7e06SGarrett D'Amore union { 638*49ef7e06SGarrett D'Amore struct { 639*49ef7e06SGarrett D'Amore sfxge_txq_t *__st_next; 640*49ef7e06SGarrett D'Amore unsigned int __st_pending; 641*49ef7e06SGarrett D'Amore unsigned int __st_completed; 642*49ef7e06SGarrett D'Amore 643*49ef7e06SGarrett D'Amore } __st_s4; 644*49ef7e06SGarrett D'Amore uint8_t __st_pad[SFXGE_CPU_CACHE_SIZE]; 645*49ef7e06SGarrett D'Amore } __st_u4; 646*49ef7e06SGarrett D'Amore }; 647*49ef7e06SGarrett D'Amore 648*49ef7e06SGarrett D'Amore #define st_sp __st_u1.__st_s1.__st_sp 649*49ef7e06SGarrett D'Amore #define st_index __st_u1.__st_s1.__st_index 650*49ef7e06SGarrett D'Amore #define st_label __st_u1.__st_s1.__st_label 651*49ef7e06SGarrett D'Amore #define st_type __st_u1.__st_s1.__st_type 652*49ef7e06SGarrett D'Amore #define st_evq __st_u1.__st_s1.__st_evq 653*49ef7e06SGarrett D'Amore #define st_mem __st_u1.__st_s1.__st_mem 654*49ef7e06SGarrett D'Amore #define st_id __st_u1.__st_s1.__st_id 655*49ef7e06SGarrett D'Amore #define st_ksp __st_u1.__st_s1.__st_ksp 656*49ef7e06SGarrett D'Amore #define st_stat __st_u1.__st_s1.__st_stat 657*49ef7e06SGarrett D'Amore #define st_state __st_u1.__st_s1.__st_state 658*49ef7e06SGarrett D'Amore 659*49ef7e06SGarrett D'Amore #define st_dpl __st_u2.__st_s2.__st_dpl 660*49ef7e06SGarrett D'Amore 661*49ef7e06SGarrett D'Amore #define st_lock __st_u3.__st_s3.__st_lock 662*49ef7e06SGarrett D'Amore #define st_fmp __st_u3.__st_s3.__st_fmp 663*49ef7e06SGarrett D'Amore #define st_fbp __st_u3.__st_s3.__st_fbp 664*49ef7e06SGarrett D'Amore #define st_fpp __st_u3.__st_s3.__st_fpp 665*49ef7e06SGarrett D'Amore #define st_eb __st_u3.__st_s3.__st_eb 666*49ef7e06SGarrett D'Amore #define st_n __st_u3.__st_s3.__st_n 667*49ef7e06SGarrett D'Amore #define st_etp __st_u3.__st_s3.__st_etp 668*49ef7e06SGarrett D'Amore #define st_stmp __st_u3.__st_s3.__st_stmp 669*49ef7e06SGarrett D'Amore #define st_stbp __st_u3.__st_s3.__st_stbp 670*49ef7e06SGarrett D'Amore #define st_mp __st_u3.__st_s3.__st_mp 671*49ef7e06SGarrett D'Amore #define st_added __st_u3.__st_s3.__st_added 672*49ef7e06SGarrett D'Amore #define st_reaped __st_u3.__st_s3.__st_reaped 673*49ef7e06SGarrett D'Amore #define st_unblock __st_u3.__st_s3.__st_unblock 674*49ef7e06SGarrett D'Amore 675*49ef7e06SGarrett D'Amore #define st_next __st_u4.__st_s4.__st_next 676*49ef7e06SGarrett D'Amore #define st_pending __st_u4.__st_s4.__st_pending 677*49ef7e06SGarrett D'Amore #define st_completed __st_u4.__st_s4.__st_completed 678*49ef7e06SGarrett D'Amore 679*49ef7e06SGarrett D'Amore typedef enum sfxge_rx_scale_state_e { 680*49ef7e06SGarrett D'Amore SFXGE_RX_SCALE_UNINITIALIZED = 0, 681*49ef7e06SGarrett D'Amore SFXGE_RX_SCALE_INITIALIZED, 682*49ef7e06SGarrett D'Amore SFXGE_RX_SCALE_STARTED 683*49ef7e06SGarrett D'Amore } sfxge_rx_scale_state_t; 684*49ef7e06SGarrett D'Amore 685*49ef7e06SGarrett D'Amore #define SFXGE_RX_SCALE_MAX EFX_RSS_TBL_SIZE 686*49ef7e06SGarrett D'Amore 687*49ef7e06SGarrett D'Amore typedef struct sfxge_rx_scale_s { 688*49ef7e06SGarrett D'Amore kmutex_t srs_lock; 689*49ef7e06SGarrett D'Amore unsigned int *srs_cpu; 690*49ef7e06SGarrett D'Amore unsigned int srs_tbl[SFXGE_RX_SCALE_MAX]; 691*49ef7e06SGarrett D'Amore unsigned int srs_count; 692*49ef7e06SGarrett D'Amore kstat_t *srs_ksp; 693*49ef7e06SGarrett D'Amore sfxge_rx_scale_state_t srs_state; 694*49ef7e06SGarrett D'Amore } sfxge_rx_scale_t; 695*49ef7e06SGarrett D'Amore 696*49ef7e06SGarrett D'Amore 697*49ef7e06SGarrett D'Amore typedef enum sfxge_rx_coalesce_mode_e { 698*49ef7e06SGarrett D'Amore SFXGE_RX_COALESCE_OFF = 0, 699*49ef7e06SGarrett D'Amore SFXGE_RX_COALESCE_DISALLOW_PUSH = 1, 700*49ef7e06SGarrett D'Amore SFXGE_RX_COALESCE_ALLOW_PUSH = 2 701*49ef7e06SGarrett D'Amore } sfxge_rx_coalesce_mode_t; 702*49ef7e06SGarrett D'Amore 703*49ef7e06SGarrett D'Amore typedef enum sfxge_vpd_type_e { 704*49ef7e06SGarrett D'Amore SFXGE_VPD_ID = 0, 705*49ef7e06SGarrett D'Amore SFXGE_VPD_PN = 1, 706*49ef7e06SGarrett D'Amore SFXGE_VPD_SN = 2, 707*49ef7e06SGarrett D'Amore SFXGE_VPD_EC = 3, 708*49ef7e06SGarrett D'Amore SFXGE_VPD_MN = 4, 709*49ef7e06SGarrett D'Amore SFXGE_VPD_VD = 5, 710*49ef7e06SGarrett D'Amore SFXGE_VPD_VE = 6, 711*49ef7e06SGarrett D'Amore SFXGE_VPD_MAX = 7, 712*49ef7e06SGarrett D'Amore } sfxge_vpd_type_t; 713*49ef7e06SGarrett D'Amore 714*49ef7e06SGarrett D'Amore typedef struct sfxge_vpd_kstat_s { 715*49ef7e06SGarrett D'Amore kstat_t *svk_ksp; 716*49ef7e06SGarrett D'Amore kstat_named_t svk_stat[SFXGE_VPD_MAX]; 717*49ef7e06SGarrett D'Amore efx_vpd_value_t *svk_vv; 718*49ef7e06SGarrett D'Amore } sfxge_vpd_kstat_t; 719*49ef7e06SGarrett D'Amore 720*49ef7e06SGarrett D'Amore typedef struct sfxge_cfg_kstat_s { 721*49ef7e06SGarrett D'Amore struct { 722*49ef7e06SGarrett D'Amore kstat_named_t sck_mac; 723*49ef7e06SGarrett D'Amore kstat_named_t sck_version; 724*49ef7e06SGarrett D'Amore } kstat; 725*49ef7e06SGarrett D'Amore struct { 726*49ef7e06SGarrett D'Amore char sck_mac[64 + 1]; 727*49ef7e06SGarrett D'Amore } buf; 728*49ef7e06SGarrett D'Amore } sfxge_cfg_kstat_t; 729*49ef7e06SGarrett D'Amore 730*49ef7e06SGarrett D'Amore typedef enum sfxge_state_e { 731*49ef7e06SGarrett D'Amore SFXGE_UNINITIALIZED = 0, 732*49ef7e06SGarrett D'Amore SFXGE_INITIALIZED, 733*49ef7e06SGarrett D'Amore SFXGE_REGISTERED, 734*49ef7e06SGarrett D'Amore SFXGE_STARTING, 735*49ef7e06SGarrett D'Amore SFXGE_STARTED, 736*49ef7e06SGarrett D'Amore SFXGE_STOPPING 737*49ef7e06SGarrett D'Amore } sfxge_state_t; 738*49ef7e06SGarrett D'Amore 739*49ef7e06SGarrett D'Amore typedef enum sfxge_hw_err_e { 740*49ef7e06SGarrett D'Amore SFXGE_HW_OK = 0, 741*49ef7e06SGarrett D'Amore SFXGE_HW_ERR, 742*49ef7e06SGarrett D'Amore } sfxge_hw_err_t; 743*49ef7e06SGarrett D'Amore 744*49ef7e06SGarrett D'Amore typedef enum sfxge_action_on_hw_err_e { 745*49ef7e06SGarrett D'Amore SFXGE_RECOVER = 0, 746*49ef7e06SGarrett D'Amore SFXGE_INVISIBLE = 1, 747*49ef7e06SGarrett D'Amore SFXGE_LEAVE_DEAD = 2, 748*49ef7e06SGarrett D'Amore } sfxge_action_on_hw_err_t; 749*49ef7e06SGarrett D'Amore 750*49ef7e06SGarrett D'Amore typedef char *sfxge_mac_priv_prop_t; 751*49ef7e06SGarrett D'Amore 752*49ef7e06SGarrett D'Amore #define SFXGE_TOEPLITZ_KEY_LEN 40 753*49ef7e06SGarrett D'Amore 754*49ef7e06SGarrett D'Amore struct sfxge_s { 755*49ef7e06SGarrett D'Amore kmutex_t s_state_lock; 756*49ef7e06SGarrett D'Amore sfxge_state_t s_state; 757*49ef7e06SGarrett D'Amore dev_info_t *s_dip; 758*49ef7e06SGarrett D'Amore ddi_taskq_t *s_tqp; 759*49ef7e06SGarrett D'Amore ddi_acc_handle_t s_pci_handle; 760*49ef7e06SGarrett D'Amore uint16_t s_pci_venid; 761*49ef7e06SGarrett D'Amore uint16_t s_pci_devid; 762*49ef7e06SGarrett D'Amore #if EFSYS_OPT_MCDI_LOGGING 763*49ef7e06SGarrett D'Amore unsigned int s_bus_addr; 764*49ef7e06SGarrett D'Amore #endif 765*49ef7e06SGarrett D'Amore efx_family_t s_family; 766*49ef7e06SGarrett D'Amore unsigned int s_pcie_nlanes; 767*49ef7e06SGarrett D'Amore unsigned int s_pcie_linkspeed; 768*49ef7e06SGarrett D'Amore kmutex_t s_nic_lock; 769*49ef7e06SGarrett D'Amore efsys_bar_t s_bar; 770*49ef7e06SGarrett D'Amore sfxge_intr_t s_intr; 771*49ef7e06SGarrett D'Amore sfxge_mac_t s_mac; 772*49ef7e06SGarrett D'Amore sfxge_mon_t s_mon; 773*49ef7e06SGarrett D'Amore sfxge_sram_t s_sram; 774*49ef7e06SGarrett D'Amore sfxge_mcdi_t s_mcdi; 775*49ef7e06SGarrett D'Amore kmem_cache_t *s_eq0c; /* eventQ 0 */ 776*49ef7e06SGarrett D'Amore kmem_cache_t *s_eqXc; /* all other eventQs */ 777*49ef7e06SGarrett D'Amore sfxge_evq_t *s_sep[SFXGE_RX_SCALE_MAX]; 778*49ef7e06SGarrett D'Amore unsigned int s_ev_moderation; 779*49ef7e06SGarrett D'Amore kmem_cache_t *s_rqc; 780*49ef7e06SGarrett D'Amore sfxge_rxq_t *s_srp[SFXGE_RX_SCALE_MAX]; 781*49ef7e06SGarrett D'Amore sfxge_rx_scale_t s_rx_scale; 782*49ef7e06SGarrett D'Amore size_t s_rx_prefix_size; 783*49ef7e06SGarrett D'Amore size_t s_rx_buffer_size; 784*49ef7e06SGarrett D'Amore size_t s_rx_buffer_align; 785*49ef7e06SGarrett D'Amore sfxge_rx_coalesce_mode_t s_rx_coalesce_mode; 786*49ef7e06SGarrett D'Amore int64_t s_rx_pkt_mem_max; 787*49ef7e06SGarrett D'Amore volatile uint64_t s_rx_pkt_mem_alloc; 788*49ef7e06SGarrett D'Amore kmem_cache_t *s_rpc; 789*49ef7e06SGarrett D'Amore kmem_cache_t *s_tqc; 790*49ef7e06SGarrett D'Amore unsigned int s_tx_scale_base[SFXGE_TXQ_NTYPES]; 791*49ef7e06SGarrett D'Amore unsigned int s_tx_scale_max[SFXGE_TXQ_NTYPES]; 792*49ef7e06SGarrett D'Amore int s_tx_qcount; 793*49ef7e06SGarrett D'Amore sfxge_txq_t *s_stp[SFXGE_RX_SCALE_MAX * 794*49ef7e06SGarrett D'Amore SFXGE_TXQ_NTYPES]; /* Sparse array */ 795*49ef7e06SGarrett D'Amore kmem_cache_t *s_tpc; 796*49ef7e06SGarrett D'Amore int s_tx_flush_pending; 797*49ef7e06SGarrett D'Amore kmutex_t s_tx_flush_lock; 798*49ef7e06SGarrett D'Amore kcondvar_t s_tx_flush_kv; 799*49ef7e06SGarrett D'Amore kmem_cache_t *s_tbc; 800*49ef7e06SGarrett D'Amore kmem_cache_t *s_tmc; 801*49ef7e06SGarrett D'Amore efx_nic_t *s_enp; 802*49ef7e06SGarrett D'Amore sfxge_vpd_kstat_t s_vpd_kstat; 803*49ef7e06SGarrett D'Amore sfxge_cfg_kstat_t s_cfg_kstat; 804*49ef7e06SGarrett D'Amore kstat_t *s_cfg_ksp; 805*49ef7e06SGarrett D'Amore size_t s_mtu; 806*49ef7e06SGarrett D'Amore int s_rxq_poll_usec; 807*49ef7e06SGarrett D'Amore mac_callbacks_t s_mc; 808*49ef7e06SGarrett D'Amore mac_handle_t s_mh; 809*49ef7e06SGarrett D'Amore sfxge_mac_priv_prop_t *s_mac_priv_props; 810*49ef7e06SGarrett D'Amore int s_mac_priv_props_alloc; 811*49ef7e06SGarrett D'Amore volatile uint32_t s_nested_restarts; 812*49ef7e06SGarrett D'Amore uint32_t s_num_restarts; 813*49ef7e06SGarrett D'Amore uint32_t s_num_restarts_hw_err; 814*49ef7e06SGarrett D'Amore sfxge_hw_err_t s_hw_err; 815*49ef7e06SGarrett D'Amore sfxge_action_on_hw_err_t s_action_on_hw_err; 816*49ef7e06SGarrett D'Amore uint16_t s_rxq_size; 817*49ef7e06SGarrett D'Amore uint16_t s_evq0_size; 818*49ef7e06SGarrett D'Amore uint16_t s_evqX_size; 819*49ef7e06SGarrett D'Amore #if EFSYS_OPT_MCDI_LOGGING 820*49ef7e06SGarrett D'Amore int s_mcdi_logging; 821*49ef7e06SGarrett D'Amore #endif 822*49ef7e06SGarrett D'Amore const uint32_t *s_toeplitz_cache; 823*49ef7e06SGarrett D'Amore }; 824*49ef7e06SGarrett D'Amore 825*49ef7e06SGarrett D'Amore typedef struct sfxge_dma_buffer_attr_s { 826*49ef7e06SGarrett D'Amore dev_info_t *sdba_dip; 827*49ef7e06SGarrett D'Amore ddi_dma_attr_t *sdba_dattrp; 828*49ef7e06SGarrett D'Amore int (*sdba_callback) (caddr_t); 829*49ef7e06SGarrett D'Amore size_t sdba_length; 830*49ef7e06SGarrett D'Amore uint_t sdba_memflags; 831*49ef7e06SGarrett D'Amore ddi_device_acc_attr_t *sdba_devaccp; 832*49ef7e06SGarrett D'Amore uint_t sdba_bindflags; 833*49ef7e06SGarrett D'Amore int sdba_maxcookies; 834*49ef7e06SGarrett D'Amore boolean_t sdba_zeroinit; 835*49ef7e06SGarrett D'Amore } sfxge_dma_buffer_attr_t; 836*49ef7e06SGarrett D'Amore 837*49ef7e06SGarrett D'Amore extern const char sfxge_ident[]; 838*49ef7e06SGarrett D'Amore extern uint8_t sfxge_brdcst[]; 839*49ef7e06SGarrett D'Amore 840*49ef7e06SGarrett D'Amore extern kmutex_t sfxge_global_lock; 841*49ef7e06SGarrett D'Amore 842*49ef7e06SGarrett D'Amore extern unsigned int *sfxge_cpu; 843*49ef7e06SGarrett D'Amore 844*49ef7e06SGarrett D'Amore extern int sfxge_start(sfxge_t *, boolean_t); 845*49ef7e06SGarrett D'Amore extern void sfxge_stop(sfxge_t *); 846*49ef7e06SGarrett D'Amore extern void sfxge_ioctl(sfxge_t *, queue_t *, mblk_t *); 847*49ef7e06SGarrett D'Amore extern int sfxge_restart_dispatch(sfxge_t *, uint_t, 848*49ef7e06SGarrett D'Amore sfxge_hw_err_t, const char *, uint32_t); 849*49ef7e06SGarrett D'Amore 850*49ef7e06SGarrett D'Amore extern void sfxge_gld_link_update(sfxge_t *); 851*49ef7e06SGarrett D'Amore extern void sfxge_gld_mtu_update(sfxge_t *); 852*49ef7e06SGarrett D'Amore extern void sfxge_gld_rx_post(sfxge_t *, unsigned int, 853*49ef7e06SGarrett D'Amore mblk_t *); 854*49ef7e06SGarrett D'Amore extern void sfxge_gld_rx_push(sfxge_t *); 855*49ef7e06SGarrett D'Amore extern int sfxge_gld_register(sfxge_t *); 856*49ef7e06SGarrett D'Amore extern int sfxge_gld_unregister(sfxge_t *); 857*49ef7e06SGarrett D'Amore 858*49ef7e06SGarrett D'Amore extern int sfxge_dma_buffer_create(efsys_mem_t *, 859*49ef7e06SGarrett D'Amore const sfxge_dma_buffer_attr_t *); 860*49ef7e06SGarrett D'Amore extern void sfxge_dma_buffer_destroy(efsys_mem_t *); 861*49ef7e06SGarrett D'Amore 862*49ef7e06SGarrett D'Amore extern int sfxge_intr_init(sfxge_t *); 863*49ef7e06SGarrett D'Amore extern int sfxge_intr_start(sfxge_t *); 864*49ef7e06SGarrett D'Amore extern void sfxge_intr_stop(sfxge_t *); 865*49ef7e06SGarrett D'Amore extern void sfxge_intr_fini(sfxge_t *); 866*49ef7e06SGarrett D'Amore extern void sfxge_intr_fatal(sfxge_t *); 867*49ef7e06SGarrett D'Amore 868*49ef7e06SGarrett D'Amore extern int sfxge_ev_init(sfxge_t *); 869*49ef7e06SGarrett D'Amore extern int sfxge_ev_start(sfxge_t *); 870*49ef7e06SGarrett D'Amore extern void sfxge_ev_moderation_get(sfxge_t *, 871*49ef7e06SGarrett D'Amore unsigned int *); 872*49ef7e06SGarrett D'Amore extern int sfxge_ev_moderation_set(sfxge_t *, 873*49ef7e06SGarrett D'Amore unsigned int); 874*49ef7e06SGarrett D'Amore extern int sfxge_ev_qmoderate(sfxge_t *, unsigned int, 875*49ef7e06SGarrett D'Amore unsigned int); 876*49ef7e06SGarrett D'Amore extern int sfxge_ev_qpoll(sfxge_t *, unsigned int); 877*49ef7e06SGarrett D'Amore extern int sfxge_ev_qprime(sfxge_t *, unsigned int); 878*49ef7e06SGarrett D'Amore extern void sfxge_ev_stop(sfxge_t *); 879*49ef7e06SGarrett D'Amore extern void sfxge_ev_fini(sfxge_t *); 880*49ef7e06SGarrett D'Amore extern int sfxge_ev_txlabel_alloc(sfxge_t *sp, 881*49ef7e06SGarrett D'Amore unsigned int evq, sfxge_txq_t *stp, unsigned int *labelp); 882*49ef7e06SGarrett D'Amore extern int sfxge_ev_txlabel_free(sfxge_t *sp, 883*49ef7e06SGarrett D'Amore unsigned int evq, sfxge_txq_t *stp, unsigned int label); 884*49ef7e06SGarrett D'Amore 885*49ef7e06SGarrett D'Amore extern int sfxge_mon_init(sfxge_t *); 886*49ef7e06SGarrett D'Amore extern int sfxge_mon_start(sfxge_t *); 887*49ef7e06SGarrett D'Amore extern void sfxge_mon_stop(sfxge_t *); 888*49ef7e06SGarrett D'Amore extern void sfxge_mon_fini(sfxge_t *); 889*49ef7e06SGarrett D'Amore 890*49ef7e06SGarrett D'Amore extern int sfxge_mac_init(sfxge_t *); 891*49ef7e06SGarrett D'Amore extern int sfxge_mac_start(sfxge_t *, boolean_t); 892*49ef7e06SGarrett D'Amore extern void sfxge_mac_stat_get(sfxge_t *, unsigned int, 893*49ef7e06SGarrett D'Amore uint64_t *); 894*49ef7e06SGarrett D'Amore extern void sfxge_mac_link_check(sfxge_t *, boolean_t *); 895*49ef7e06SGarrett D'Amore extern void sfxge_mac_link_speed_get(sfxge_t *, 896*49ef7e06SGarrett D'Amore unsigned int *); 897*49ef7e06SGarrett D'Amore extern void sfxge_mac_link_duplex_get(sfxge_t *, 898*49ef7e06SGarrett D'Amore sfxge_link_duplex_t *); 899*49ef7e06SGarrett D'Amore extern void sfxge_mac_fcntl_get(sfxge_t *, unsigned int *); 900*49ef7e06SGarrett D'Amore extern int sfxge_mac_fcntl_set(sfxge_t *, unsigned int); 901*49ef7e06SGarrett D'Amore extern int sfxge_mac_unicst_get(sfxge_t *, 902*49ef7e06SGarrett D'Amore sfxge_unicst_type_t, uint8_t *); 903*49ef7e06SGarrett D'Amore extern int sfxge_mac_unicst_set(sfxge_t *, 904*49ef7e06SGarrett D'Amore uint8_t *); 905*49ef7e06SGarrett D'Amore extern int sfxge_mac_promisc_set(sfxge_t *, 906*49ef7e06SGarrett D'Amore sfxge_promisc_type_t); 907*49ef7e06SGarrett D'Amore extern int sfxge_mac_multicst_add(sfxge_t *, 908*49ef7e06SGarrett D'Amore uint8_t const *addr); 909*49ef7e06SGarrett D'Amore extern int sfxge_mac_multicst_remove(sfxge_t *, 910*49ef7e06SGarrett D'Amore uint8_t const *addr); 911*49ef7e06SGarrett D'Amore extern void sfxge_mac_stop(sfxge_t *); 912*49ef7e06SGarrett D'Amore extern void sfxge_mac_fini(sfxge_t *); 913*49ef7e06SGarrett D'Amore extern void sfxge_mac_link_update(sfxge_t *sp, 914*49ef7e06SGarrett D'Amore efx_link_mode_t mode); 915*49ef7e06SGarrett D'Amore 916*49ef7e06SGarrett D'Amore extern int sfxge_mcdi_init(sfxge_t *sp); 917*49ef7e06SGarrett D'Amore extern void sfxge_mcdi_fini(sfxge_t *sp); 918*49ef7e06SGarrett D'Amore extern int sfxge_mcdi_ioctl(sfxge_t *sp, 919*49ef7e06SGarrett D'Amore sfxge_mcdi_ioc_t *smip); 920*49ef7e06SGarrett D'Amore extern int sfxge_mcdi2_ioctl(sfxge_t *sp, 921*49ef7e06SGarrett D'Amore sfxge_mcdi2_ioc_t *smip); 922*49ef7e06SGarrett D'Amore 923*49ef7e06SGarrett D'Amore extern int sfxge_phy_init(sfxge_t *); 924*49ef7e06SGarrett D'Amore extern void sfxge_phy_link_mode_get(sfxge_t *, 925*49ef7e06SGarrett D'Amore efx_link_mode_t *); 926*49ef7e06SGarrett D'Amore extern void sfxge_phy_fini(sfxge_t *); 927*49ef7e06SGarrett D'Amore extern int sfxge_phy_kstat_init(sfxge_t *sp); 928*49ef7e06SGarrett D'Amore extern void sfxge_phy_kstat_fini(sfxge_t *sp); 929*49ef7e06SGarrett D'Amore extern uint8_t sfxge_phy_lp_cap_test(sfxge_t *sp, 930*49ef7e06SGarrett D'Amore uint32_t field); 931*49ef7e06SGarrett D'Amore extern int sfxge_phy_cap_apply(sfxge_t *sp, 932*49ef7e06SGarrett D'Amore boolean_t use_default); 933*49ef7e06SGarrett D'Amore extern uint8_t sfxge_phy_cap_test(sfxge_t *sp, uint32_t flags, 934*49ef7e06SGarrett D'Amore uint32_t field, boolean_t *mutablep); 935*49ef7e06SGarrett D'Amore extern int sfxge_phy_cap_set(sfxge_t *sp, uint32_t field, 936*49ef7e06SGarrett D'Amore int set); 937*49ef7e06SGarrett D'Amore 938*49ef7e06SGarrett D'Amore extern int sfxge_rx_init(sfxge_t *); 939*49ef7e06SGarrett D'Amore extern int sfxge_rx_start(sfxge_t *); 940*49ef7e06SGarrett D'Amore extern void sfxge_rx_coalesce_mode_get(sfxge_t *, 941*49ef7e06SGarrett D'Amore sfxge_rx_coalesce_mode_t *); 942*49ef7e06SGarrett D'Amore extern int sfxge_rx_coalesce_mode_set(sfxge_t *, 943*49ef7e06SGarrett D'Amore sfxge_rx_coalesce_mode_t); 944*49ef7e06SGarrett D'Amore extern unsigned int sfxge_rx_scale_prop_get(sfxge_t *); 945*49ef7e06SGarrett D'Amore extern void sfxge_rx_scale_update(void *); 946*49ef7e06SGarrett D'Amore extern int sfxge_rx_scale_count_get(sfxge_t *, 947*49ef7e06SGarrett D'Amore unsigned int *); 948*49ef7e06SGarrett D'Amore extern int sfxge_rx_scale_count_set(sfxge_t *, 949*49ef7e06SGarrett D'Amore unsigned int); 950*49ef7e06SGarrett D'Amore extern void sfxge_rx_qcomplete(sfxge_rxq_t *, boolean_t); 951*49ef7e06SGarrett D'Amore extern void sfxge_rx_qflush_done(sfxge_rxq_t *); 952*49ef7e06SGarrett D'Amore extern void sfxge_rx_qflush_failed(sfxge_rxq_t *); 953*49ef7e06SGarrett D'Amore extern void sfxge_rx_qfpp_trim(sfxge_rxq_t *); 954*49ef7e06SGarrett D'Amore extern void sfxge_rx_stop(sfxge_t *); 955*49ef7e06SGarrett D'Amore extern unsigned int sfxge_rx_loaned(sfxge_t *); 956*49ef7e06SGarrett D'Amore extern void sfxge_rx_fini(sfxge_t *); 957*49ef7e06SGarrett D'Amore 958*49ef7e06SGarrett D'Amore extern int sfxge_tx_init(sfxge_t *); 959*49ef7e06SGarrett D'Amore extern int sfxge_tx_start(sfxge_t *); 960*49ef7e06SGarrett D'Amore extern int sfxge_tx_packet_add(sfxge_t *, mblk_t *); 961*49ef7e06SGarrett D'Amore extern void sfxge_tx_qcomplete(sfxge_txq_t *); 962*49ef7e06SGarrett D'Amore extern void sfxge_tx_qflush_done(sfxge_txq_t *); 963*49ef7e06SGarrett D'Amore extern void sfxge_tx_stop(sfxge_t *); 964*49ef7e06SGarrett D'Amore extern void sfxge_tx_fini(sfxge_t *); 965*49ef7e06SGarrett D'Amore extern void sfxge_tx_qdpl_flush(sfxge_txq_t *stp); 966*49ef7e06SGarrett D'Amore 967*49ef7e06SGarrett D'Amore extern void sfxge_sram_init(sfxge_t *); 968*49ef7e06SGarrett D'Amore extern int sfxge_sram_buf_tbl_alloc(sfxge_t *, size_t, 969*49ef7e06SGarrett D'Amore uint32_t *); 970*49ef7e06SGarrett D'Amore extern int sfxge_sram_start(sfxge_t *); 971*49ef7e06SGarrett D'Amore extern int sfxge_sram_buf_tbl_set(sfxge_t *, uint32_t, 972*49ef7e06SGarrett D'Amore efsys_mem_t *, size_t); 973*49ef7e06SGarrett D'Amore extern void sfxge_sram_buf_tbl_clear(sfxge_t *, uint32_t, 974*49ef7e06SGarrett D'Amore size_t); 975*49ef7e06SGarrett D'Amore extern void sfxge_sram_stop(sfxge_t *); 976*49ef7e06SGarrett D'Amore extern void sfxge_sram_buf_tbl_free(sfxge_t *, uint32_t, 977*49ef7e06SGarrett D'Amore size_t); 978*49ef7e06SGarrett D'Amore extern void sfxge_sram_fini(sfxge_t *); 979*49ef7e06SGarrett D'Amore 980*49ef7e06SGarrett D'Amore extern sfxge_packet_type_t sfxge_pkthdr_parse(mblk_t *, 981*49ef7e06SGarrett D'Amore struct ether_header **, struct ip **, struct tcphdr **, size_t *, size_t *, 982*49ef7e06SGarrett D'Amore uint16_t *, uint16_t *); 983*49ef7e06SGarrett D'Amore 984*49ef7e06SGarrett D'Amore extern int sfxge_toeplitz_hash_init(sfxge_t *); 985*49ef7e06SGarrett D'Amore extern void sfxge_toeplitz_hash_fini(sfxge_t *); 986*49ef7e06SGarrett D'Amore extern uint32_t sfxge_toeplitz_hash(sfxge_t *, unsigned int, 987*49ef7e06SGarrett D'Amore uint8_t *, uint16_t, uint8_t *, uint16_t); 988*49ef7e06SGarrett D'Amore 989*49ef7e06SGarrett D'Amore /* 990*49ef7e06SGarrett D'Amore * 4-tuple hash for TCP/IPv4 used for LRO, TSO and TX queue selection. 991*49ef7e06SGarrett D'Amore * To compute the same hash value as Siena/Huntington hardware, the inputs 992*49ef7e06SGarrett D'Amore * must be in big endian (network) byte order. 993*49ef7e06SGarrett D'Amore */ 994*49ef7e06SGarrett D'Amore #define SFXGE_TCP_HASH(_sp, _raddr, _rport, _laddr, _lport, _hash) \ 995*49ef7e06SGarrett D'Amore do { \ 996*49ef7e06SGarrett D'Amore (_hash) = sfxge_toeplitz_hash(_sp, \ 997*49ef7e06SGarrett D'Amore sizeof (struct in_addr), \ 998*49ef7e06SGarrett D'Amore (uint8_t *)(_raddr), \ 999*49ef7e06SGarrett D'Amore (_rport), \ 1000*49ef7e06SGarrett D'Amore (uint8_t *)(_laddr), \ 1001*49ef7e06SGarrett D'Amore (_lport)); \ 1002*49ef7e06SGarrett D'Amore _NOTE(CONSTANTCONDITION) \ 1003*49ef7e06SGarrett D'Amore } while (B_FALSE) 1004*49ef7e06SGarrett D'Amore 1005*49ef7e06SGarrett D'Amore /* 1006*49ef7e06SGarrett D'Amore * 4-tuple hash for non-TCP IPv4 packets, used for TX queue selection. 1007*49ef7e06SGarrett D'Amore * For UDP or SCTP packets, calculate a 4-tuple hash using port numbers. 1008*49ef7e06SGarrett D'Amore * For other IPv4 non-TCP packets, use zero for the port numbers. 1009*49ef7e06SGarrett D'Amore */ 1010*49ef7e06SGarrett D'Amore #define SFXGE_IP_HASH(_sp, _raddr, _rport, _laddr, _lport, _hash) \ 1011*49ef7e06SGarrett D'Amore SFXGE_TCP_HASH((_sp), (_raddr), (_rport), (_laddr), (_lport), (_hash)) 1012*49ef7e06SGarrett D'Amore 1013*49ef7e06SGarrett D'Amore 1014*49ef7e06SGarrett D'Amore extern int sfxge_nvram_ioctl(sfxge_t *, sfxge_nvram_ioc_t *); 1015*49ef7e06SGarrett D'Amore 1016*49ef7e06SGarrett D'Amore extern int sfxge_pci_init(sfxge_t *); 1017*49ef7e06SGarrett D'Amore extern void sfxge_pcie_check_link(sfxge_t *, unsigned int, 1018*49ef7e06SGarrett D'Amore unsigned int); 1019*49ef7e06SGarrett D'Amore extern void sfxge_pci_fini(sfxge_t *); 1020*49ef7e06SGarrett D'Amore 1021*49ef7e06SGarrett D'Amore extern int sfxge_bar_init(sfxge_t *); 1022*49ef7e06SGarrett D'Amore extern void sfxge_bar_fini(sfxge_t *); 1023*49ef7e06SGarrett D'Amore 1024*49ef7e06SGarrett D'Amore extern int sfxge_vpd_ioctl(sfxge_t *, sfxge_vpd_ioc_t *); 1025*49ef7e06SGarrett D'Amore 1026*49ef7e06SGarrett D'Amore 1027*49ef7e06SGarrett D'Amore #endif /* _KERNEL */ 1028*49ef7e06SGarrett D'Amore 1029*49ef7e06SGarrett D'Amore #ifdef __cplusplus 1030*49ef7e06SGarrett D'Amore } 1031*49ef7e06SGarrett D'Amore #endif 1032*49ef7e06SGarrett D'Amore 1033*49ef7e06SGarrett D'Amore #endif /* _SYS_SFXGE_H */ 1034