1*14b24e2bSVaishali Kulkarni /*
2*14b24e2bSVaishali Kulkarni * CDDL HEADER START
3*14b24e2bSVaishali Kulkarni *
4*14b24e2bSVaishali Kulkarni * The contents of this file are subject to the terms of the
5*14b24e2bSVaishali Kulkarni * Common Development and Distribution License, v.1,  (the "License").
6*14b24e2bSVaishali Kulkarni * You may not use this file except in compliance with the License.
7*14b24e2bSVaishali Kulkarni *
8*14b24e2bSVaishali Kulkarni * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9*14b24e2bSVaishali Kulkarni * or http://opensource.org/licenses/CDDL-1.0.
10*14b24e2bSVaishali Kulkarni * See the License for the specific language governing permissions
11*14b24e2bSVaishali Kulkarni * and limitations under the License.
12*14b24e2bSVaishali Kulkarni *
13*14b24e2bSVaishali Kulkarni * When distributing Covered Code, include this CDDL HEADER in each
14*14b24e2bSVaishali Kulkarni * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15*14b24e2bSVaishali Kulkarni * If applicable, add the following below this CDDL HEADER, with the
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17*14b24e2bSVaishali Kulkarni * information: Portions Copyright [yyyy] [name of copyright owner]
18*14b24e2bSVaishali Kulkarni *
19*14b24e2bSVaishali Kulkarni * CDDL HEADER END
20*14b24e2bSVaishali Kulkarni */
21*14b24e2bSVaishali Kulkarni 
22*14b24e2bSVaishali Kulkarni /*
23*14b24e2bSVaishali Kulkarni * Copyright 2014-2017 Cavium, Inc.
24*14b24e2bSVaishali Kulkarni * The contents of this file are subject to the terms of the Common Development
25*14b24e2bSVaishali Kulkarni * and Distribution License, v.1,  (the "License").
26*14b24e2bSVaishali Kulkarni 
27*14b24e2bSVaishali Kulkarni * You may not use this file except in compliance with the License.
28*14b24e2bSVaishali Kulkarni 
29*14b24e2bSVaishali Kulkarni * You can obtain a copy of the License at available
30*14b24e2bSVaishali Kulkarni * at http://opensource.org/licenses/CDDL-1.0
31*14b24e2bSVaishali Kulkarni 
32*14b24e2bSVaishali Kulkarni * See the License for the specific language governing permissions and
33*14b24e2bSVaishali Kulkarni * limitations under the License.
34*14b24e2bSVaishali Kulkarni */
35*14b24e2bSVaishali Kulkarni 
36*14b24e2bSVaishali Kulkarni #ifndef _INIT_FW_FUNCS_H
37*14b24e2bSVaishali Kulkarni #define _INIT_FW_FUNCS_H
38*14b24e2bSVaishali Kulkarni /* Forward declarations */
39*14b24e2bSVaishali Kulkarni 
40*14b24e2bSVaishali Kulkarni struct init_qm_pq_params;
41*14b24e2bSVaishali Kulkarni 
42*14b24e2bSVaishali Kulkarni /**
43*14b24e2bSVaishali Kulkarni  * @brief ecore_qm_pf_mem_size - Prepare QM ILT sizes
44*14b24e2bSVaishali Kulkarni  *
45*14b24e2bSVaishali Kulkarni  * Returns the required host memory size in 4KB units.
46*14b24e2bSVaishali Kulkarni  * Must be called before all QM init HSI functions.
47*14b24e2bSVaishali Kulkarni  *
48*14b24e2bSVaishali Kulkarni  * @param pf_id -	physical function ID
49*14b24e2bSVaishali Kulkarni  * @param num_pf_cids - number of connections used by this PF
50*14b24e2bSVaishali Kulkarni  * @param num_vf_cids -	number of connections used by VFs of this PF
51*14b24e2bSVaishali Kulkarni  * @param num_tids -	number of tasks used by this PF
52*14b24e2bSVaishali Kulkarni  * @param num_pf_pqs -	number of PQs used by this PF
53*14b24e2bSVaishali Kulkarni  * @param num_vf_pqs -	number of PQs used by VFs of this PF
54*14b24e2bSVaishali Kulkarni  *
55*14b24e2bSVaishali Kulkarni  * @return The required host memory size in 4KB units.
56*14b24e2bSVaishali Kulkarni  */
57*14b24e2bSVaishali Kulkarni u32 ecore_qm_pf_mem_size(u8 pf_id,
58*14b24e2bSVaishali Kulkarni 						 u32 num_pf_cids,
59*14b24e2bSVaishali Kulkarni 						 u32 num_vf_cids,
60*14b24e2bSVaishali Kulkarni 						 u32 num_tids,
61*14b24e2bSVaishali Kulkarni 						 u16 num_pf_pqs,
62*14b24e2bSVaishali Kulkarni 						 u16 num_vf_pqs);
63*14b24e2bSVaishali Kulkarni 
64*14b24e2bSVaishali Kulkarni /**
65*14b24e2bSVaishali Kulkarni  * @brief ecore_qm_common_rt_init - Prepare QM runtime init values for the
66*14b24e2bSVaishali Kulkarni  * engine phase.
67*14b24e2bSVaishali Kulkarni  *
68*14b24e2bSVaishali Kulkarni  * @param p_hwfn -			  HW device data
69*14b24e2bSVaishali Kulkarni  * @param max_ports_per_engine -  max number of ports per engine in HW
70*14b24e2bSVaishali Kulkarni  * @param max_phys_tcs_per_port	- max number of physical TCs per port in HW
71*14b24e2bSVaishali Kulkarni  * @param pf_rl_en -		  enable per-PF rate limiters
72*14b24e2bSVaishali Kulkarni  * @param pf_wfq_en -		  enable per-PF WFQ
73*14b24e2bSVaishali Kulkarni  * @param vport_rl_en -		  enable per-VPORT rate limiters
74*14b24e2bSVaishali Kulkarni  * @param vport_wfq_en -	  enable per-VPORT WFQ
75*14b24e2bSVaishali Kulkarni  * @param port_params -		  array of size MAX_NUM_PORTS with parameters
76*14b24e2bSVaishali Kulkarni  *				  for each port
77*14b24e2bSVaishali Kulkarni  *
78*14b24e2bSVaishali Kulkarni  * @return 0 on success, -1 on error.
79*14b24e2bSVaishali Kulkarni  */
80*14b24e2bSVaishali Kulkarni int ecore_qm_common_rt_init(struct ecore_hwfn *p_hwfn,
81*14b24e2bSVaishali Kulkarni 							u8 max_ports_per_engine,
82*14b24e2bSVaishali Kulkarni 							u8 max_phys_tcs_per_port,
83*14b24e2bSVaishali Kulkarni 							bool pf_rl_en,
84*14b24e2bSVaishali Kulkarni 							bool pf_wfq_en,
85*14b24e2bSVaishali Kulkarni 							bool vport_rl_en,
86*14b24e2bSVaishali Kulkarni 							bool vport_wfq_en,
87*14b24e2bSVaishali Kulkarni 							struct init_qm_port_params port_params[MAX_NUM_PORTS]);
88*14b24e2bSVaishali Kulkarni 
89*14b24e2bSVaishali Kulkarni /**
90*14b24e2bSVaishali Kulkarni  * @brief ecore_qm_pf_rt_init - Prepare QM runtime init values for the PF phase
91*14b24e2bSVaishali Kulkarni  *
92*14b24e2bSVaishali Kulkarni  * @param p_hwfn -			  HW device data
93*14b24e2bSVaishali Kulkarni  * @param p_ptt -			  ptt window used for writing the registers
94*14b24e2bSVaishali Kulkarni  * @param port_id -		  port ID
95*14b24e2bSVaishali Kulkarni  * @param pf_id -		  PF ID
96*14b24e2bSVaishali Kulkarni  * @param max_phys_tcs_per_port	- max number of physical TCs per port in HW
97*14b24e2bSVaishali Kulkarni  * @param is_first_pf -		  1 = first PF in engine, 0 = othwerwise
98*14b24e2bSVaishali Kulkarni  * @param num_pf_cids -		  number of connections used by this PF
99*14b24e2bSVaishali Kulkarni  * @param num_vf_cids -		  number of connections used by VFs of this PF
100*14b24e2bSVaishali Kulkarni  * @param num_tids -		  number of tasks used by this PF
101*14b24e2bSVaishali Kulkarni  * @param start_pq -		  first Tx PQ ID associated with this PF
102*14b24e2bSVaishali Kulkarni  * @param num_pf_pqs -		  number of Tx PQs associated with this PF
103*14b24e2bSVaishali Kulkarni  *				  (non-VF)
104*14b24e2bSVaishali Kulkarni  * @param num_vf_pqs -		  number of Tx PQs associated with a VF
105*14b24e2bSVaishali Kulkarni  * @param start_vport -		  first VPORT ID associated with this PF
106*14b24e2bSVaishali Kulkarni  * @param num_vports -		  number of VPORTs associated with this PF
107*14b24e2bSVaishali Kulkarni  * @param pf_wfq -		  WFQ weight. if PF WFQ is globally disabled,
108*14b24e2bSVaishali Kulkarni  *				  the weight must be 0. otherwise, the weight
109*14b24e2bSVaishali Kulkarni  *				  must be non-zero.
110*14b24e2bSVaishali Kulkarni  * @param pf_rl -		  rate limit in Mb/sec units. a value of 0
111*14b24e2bSVaishali Kulkarni  *				  means don't configure. ignored if PF RL is
112*14b24e2bSVaishali Kulkarni  *				  globally disabled.
113*14b24e2bSVaishali Kulkarni  * @param pq_params -		  array of size (num_pf_pqs + num_vf_pqs) with
114*14b24e2bSVaishali Kulkarni  *				  parameters for each Tx PQ associated with the
115*14b24e2bSVaishali Kulkarni  *				  specified PF.
116*14b24e2bSVaishali Kulkarni  * @param vport_params -	  array of size num_vports with parameters for
117*14b24e2bSVaishali Kulkarni  *				  each associated VPORT.
118*14b24e2bSVaishali Kulkarni  *
119*14b24e2bSVaishali Kulkarni  * @return 0 on success, -1 on error.
120*14b24e2bSVaishali Kulkarni  */
121*14b24e2bSVaishali Kulkarni int ecore_qm_pf_rt_init(struct ecore_hwfn *p_hwfn,
122*14b24e2bSVaishali Kulkarni 						struct ecore_ptt *p_ptt,
123*14b24e2bSVaishali Kulkarni 						u8 port_id,
124*14b24e2bSVaishali Kulkarni 						u8 pf_id,
125*14b24e2bSVaishali Kulkarni 						u8 max_phys_tcs_per_port,
126*14b24e2bSVaishali Kulkarni 						bool is_first_pf,
127*14b24e2bSVaishali Kulkarni 						u32 num_pf_cids,
128*14b24e2bSVaishali Kulkarni 						u32 num_vf_cids,
129*14b24e2bSVaishali Kulkarni 						u32 num_tids,
130*14b24e2bSVaishali Kulkarni 						u16 start_pq,
131*14b24e2bSVaishali Kulkarni 						u16 num_pf_pqs,
132*14b24e2bSVaishali Kulkarni 						u16 num_vf_pqs,
133*14b24e2bSVaishali Kulkarni 						u8 start_vport,
134*14b24e2bSVaishali Kulkarni 						u8 num_vports,
135*14b24e2bSVaishali Kulkarni 						u16 pf_wfq,
136*14b24e2bSVaishali Kulkarni 						u32 pf_rl,
137*14b24e2bSVaishali Kulkarni 						struct init_qm_pq_params *pq_params,
138*14b24e2bSVaishali Kulkarni 						struct init_qm_vport_params *vport_params);
139*14b24e2bSVaishali Kulkarni 
140*14b24e2bSVaishali Kulkarni /**
141*14b24e2bSVaishali Kulkarni  * @brief ecore_init_pf_wfq - Initializes the WFQ weight of the specified PF
142*14b24e2bSVaishali Kulkarni  *
143*14b24e2bSVaishali Kulkarni  * @param p_hwfn -	   HW device data
144*14b24e2bSVaishali Kulkarni  * @param p_ptt -	   ptt window used for writing the registers
145*14b24e2bSVaishali Kulkarni  * @param pf_id	-  PF ID
146*14b24e2bSVaishali Kulkarni  * @param pf_wfq - WFQ weight. Must be non-zero.
147*14b24e2bSVaishali Kulkarni  *
148*14b24e2bSVaishali Kulkarni  * @return 0 on success, -1 on error.
149*14b24e2bSVaishali Kulkarni  */
150*14b24e2bSVaishali Kulkarni int ecore_init_pf_wfq(struct ecore_hwfn *p_hwfn,
151*14b24e2bSVaishali Kulkarni 					  struct ecore_ptt *p_ptt,
152*14b24e2bSVaishali Kulkarni 					  u8 pf_id,
153*14b24e2bSVaishali Kulkarni 					  u16 pf_wfq);
154*14b24e2bSVaishali Kulkarni 
155*14b24e2bSVaishali Kulkarni /**
156*14b24e2bSVaishali Kulkarni  * @brief ecore_init_pf_rl - Initializes the rate limit of the specified PF
157*14b24e2bSVaishali Kulkarni  *
158*14b24e2bSVaishali Kulkarni  * @param p_hwfn
159*14b24e2bSVaishali Kulkarni  * @param p_ptt -   ptt window used for writing the registers
160*14b24e2bSVaishali Kulkarni  * @param pf_id	- PF ID
161*14b24e2bSVaishali Kulkarni  * @param pf_rl	- rate limit in Mb/sec units
162*14b24e2bSVaishali Kulkarni  *
163*14b24e2bSVaishali Kulkarni  * @return 0 on success, -1 on error.
164*14b24e2bSVaishali Kulkarni  */
165*14b24e2bSVaishali Kulkarni int ecore_init_pf_rl(struct ecore_hwfn *p_hwfn,
166*14b24e2bSVaishali Kulkarni 					 struct ecore_ptt *p_ptt,
167*14b24e2bSVaishali Kulkarni 					 u8 pf_id,
168*14b24e2bSVaishali Kulkarni 					 u32 pf_rl);
169*14b24e2bSVaishali Kulkarni 
170*14b24e2bSVaishali Kulkarni /**
171*14b24e2bSVaishali Kulkarni  * @brief ecore_init_vport_wfq - Initializes the WFQ weight of the specified VPORT
172*14b24e2bSVaishali Kulkarni  *
173*14b24e2bSVaishali Kulkarni  * @param p_hwfn -		   HW device data
174*14b24e2bSVaishali Kulkarni  * @param p_ptt -		   ptt window used for writing the registers
175*14b24e2bSVaishali Kulkarni  * @param first_tx_pq_id - An array containing the first Tx PQ ID associated
176*14b24e2bSVaishali Kulkarni  *                         with the VPORT for each TC. This array is filled by
177*14b24e2bSVaishali Kulkarni  *                         ecore_qm_pf_rt_init
178*14b24e2bSVaishali Kulkarni  * @param vport_wfq -	   WFQ weight. Must be non-zero.
179*14b24e2bSVaishali Kulkarni  *
180*14b24e2bSVaishali Kulkarni  * @return 0 on success, -1 on error.
181*14b24e2bSVaishali Kulkarni  */
182*14b24e2bSVaishali Kulkarni int ecore_init_vport_wfq(struct ecore_hwfn *p_hwfn,
183*14b24e2bSVaishali Kulkarni 						 struct ecore_ptt *p_ptt,
184*14b24e2bSVaishali Kulkarni 						 u16 first_tx_pq_id[NUM_OF_TCS],
185*14b24e2bSVaishali Kulkarni 						 u16 vport_wfq);
186*14b24e2bSVaishali Kulkarni 
187*14b24e2bSVaishali Kulkarni /**
188*14b24e2bSVaishali Kulkarni  * @brief ecore_init_vport_rl - Initializes the rate limit of the specified
189*14b24e2bSVaishali Kulkarni  * VPORT.
190*14b24e2bSVaishali Kulkarni  *
191*14b24e2bSVaishali Kulkarni  * @param p_hwfn -	     HW device data
192*14b24e2bSVaishali Kulkarni  * @param p_ptt -	     ptt window used for writing the registers
193*14b24e2bSVaishali Kulkarni  * @param vport_id - VPORT ID
194*14b24e2bSVaishali Kulkarni  * @param vport_rl - rate limit in Mb/sec units
195*14b24e2bSVaishali Kulkarni  *
196*14b24e2bSVaishali Kulkarni  * @return 0 on success, -1 on error.
197*14b24e2bSVaishali Kulkarni  */
198*14b24e2bSVaishali Kulkarni int ecore_init_vport_rl(struct ecore_hwfn *p_hwfn,
199*14b24e2bSVaishali Kulkarni 						struct ecore_ptt *p_ptt,
200*14b24e2bSVaishali Kulkarni 						u8 vport_id,
201*14b24e2bSVaishali Kulkarni 						u32 vport_rl);
202*14b24e2bSVaishali Kulkarni 
203*14b24e2bSVaishali Kulkarni /**
204*14b24e2bSVaishali Kulkarni  * @brief ecore_send_qm_stop_cmd - Sends a stop command to the QM
205*14b24e2bSVaishali Kulkarni  *
206*14b24e2bSVaishali Kulkarni  * @param p_hwfn -		   HW device data
207*14b24e2bSVaishali Kulkarni  * @param p_ptt -		   ptt window used for writing the registers
208*14b24e2bSVaishali Kulkarni  * @param is_release_cmd - true for release, false for stop.
209*14b24e2bSVaishali Kulkarni  * @param is_tx_pq -	   true for Tx PQs, false for Other PQs.
210*14b24e2bSVaishali Kulkarni  * @param start_pq -	   first PQ ID to stop
211*14b24e2bSVaishali Kulkarni  * @param num_pqs -	   Number of PQs to stop, starting from start_pq.
212*14b24e2bSVaishali Kulkarni  *
213*14b24e2bSVaishali Kulkarni  * @return bool, true if successful, false if timeout occured while waiting for
214*14b24e2bSVaishali Kulkarni  * QM command done.
215*14b24e2bSVaishali Kulkarni  */
216*14b24e2bSVaishali Kulkarni bool ecore_send_qm_stop_cmd(struct ecore_hwfn *p_hwfn,
217*14b24e2bSVaishali Kulkarni 							struct ecore_ptt *p_ptt,
218*14b24e2bSVaishali Kulkarni 							bool is_release_cmd,
219*14b24e2bSVaishali Kulkarni 							bool is_tx_pq,
220*14b24e2bSVaishali Kulkarni 							u16 start_pq,
221*14b24e2bSVaishali Kulkarni 							u16 num_pqs);
222*14b24e2bSVaishali Kulkarni 
223*14b24e2bSVaishali Kulkarni #ifndef UNUSED_HSI_FUNC
224*14b24e2bSVaishali Kulkarni 
225*14b24e2bSVaishali Kulkarni /**
226*14b24e2bSVaishali Kulkarni  * @brief ecore_init_nig_ets - Initializes the NIG ETS arbiter
227*14b24e2bSVaishali Kulkarni  *
228*14b24e2bSVaishali Kulkarni  * Based on weight/priority requirements per-TC.
229*14b24e2bSVaishali Kulkarni  *
230*14b24e2bSVaishali Kulkarni  * @param p_hwfn -   HW device data
231*14b24e2bSVaishali Kulkarni  * @param p_ptt -   ptt window used for writing the registers.
232*14b24e2bSVaishali Kulkarni  * @param req -   the NIG ETS initialization requirements.
233*14b24e2bSVaishali Kulkarni  * @param is_lb	- if set, the loopback port arbiter is initialized, otherwise
234*14b24e2bSVaishali Kulkarni  *		  the physical port arbiter is initialized. The pure-LB TC
235*14b24e2bSVaishali Kulkarni  *		  requirements are ignored when is_lb is cleared.
236*14b24e2bSVaishali Kulkarni  */
237*14b24e2bSVaishali Kulkarni void ecore_init_nig_ets(struct ecore_hwfn *p_hwfn,
238*14b24e2bSVaishali Kulkarni 						struct ecore_ptt *p_ptt,
239*14b24e2bSVaishali Kulkarni 						struct init_ets_req* req,
240*14b24e2bSVaishali Kulkarni 						bool is_lb);
241*14b24e2bSVaishali Kulkarni 
242*14b24e2bSVaishali Kulkarni /**
243*14b24e2bSVaishali Kulkarni  * @brief ecore_init_nig_lb_rl - Initializes the NIG LB RLs
244*14b24e2bSVaishali Kulkarni  *
245*14b24e2bSVaishali Kulkarni  * Based on global and per-TC rate requirements
246*14b24e2bSVaishali Kulkarni  *
247*14b24e2bSVaishali Kulkarni  * @param p_hwfn -	HW device data
248*14b24e2bSVaishali Kulkarni  * @param p_ptt - ptt window used for writing the registers.
249*14b24e2bSVaishali Kulkarni  * @param req -	the NIG LB RLs initialization requirements.
250*14b24e2bSVaishali Kulkarni  */
251*14b24e2bSVaishali Kulkarni void ecore_init_nig_lb_rl(struct ecore_hwfn *p_hwfn,
252*14b24e2bSVaishali Kulkarni 						  struct ecore_ptt *p_ptt,
253*14b24e2bSVaishali Kulkarni 						  struct init_nig_lb_rl_req* req);
254*14b24e2bSVaishali Kulkarni 
255*14b24e2bSVaishali Kulkarni #endif /* UNUSED_HSI_FUNC */
256*14b24e2bSVaishali Kulkarni 
257*14b24e2bSVaishali Kulkarni /**
258*14b24e2bSVaishali Kulkarni  * @brief ecore_init_nig_pri_tc_map - Initializes the NIG priority to TC map.
259*14b24e2bSVaishali Kulkarni  *
260*14b24e2bSVaishali Kulkarni  * Assumes valid arguments.
261*14b24e2bSVaishali Kulkarni  *
262*14b24e2bSVaishali Kulkarni  * @param p_hwfn -	HW device data
263*14b24e2bSVaishali Kulkarni  * @param p_ptt - ptt window used for writing the registers.
264*14b24e2bSVaishali Kulkarni  * @param req - required mapping from prioirties to TCs.
265*14b24e2bSVaishali Kulkarni  */
266*14b24e2bSVaishali Kulkarni void ecore_init_nig_pri_tc_map(struct ecore_hwfn *p_hwfn,
267*14b24e2bSVaishali Kulkarni 							   struct ecore_ptt *p_ptt,
268*14b24e2bSVaishali Kulkarni 							   struct init_nig_pri_tc_map_req* req);
269*14b24e2bSVaishali Kulkarni 
270*14b24e2bSVaishali Kulkarni #ifndef UNUSED_HSI_FUNC
271*14b24e2bSVaishali Kulkarni 
272*14b24e2bSVaishali Kulkarni /**
273*14b24e2bSVaishali Kulkarni  * @brief ecore_init_prs_ets - Initializes the PRS Rx ETS arbiter
274*14b24e2bSVaishali Kulkarni  *
275*14b24e2bSVaishali Kulkarni  * Based on weight/priority requirements per-TC.
276*14b24e2bSVaishali Kulkarni  *
277*14b24e2bSVaishali Kulkarni  * @param p_hwfn -	HW device data
278*14b24e2bSVaishali Kulkarni  * @param p_ptt - ptt window used for writing the registers.
279*14b24e2bSVaishali Kulkarni  * @param req -	the PRS ETS initialization requirements.
280*14b24e2bSVaishali Kulkarni  */
281*14b24e2bSVaishali Kulkarni void ecore_init_prs_ets(struct ecore_hwfn *p_hwfn,
282*14b24e2bSVaishali Kulkarni 						struct ecore_ptt *p_ptt,
283*14b24e2bSVaishali Kulkarni 						struct init_ets_req* req);
284*14b24e2bSVaishali Kulkarni 
285*14b24e2bSVaishali Kulkarni #endif /* UNUSED_HSI_FUNC */
286*14b24e2bSVaishali Kulkarni #ifndef UNUSED_HSI_FUNC
287*14b24e2bSVaishali Kulkarni 
288*14b24e2bSVaishali Kulkarni /**
289*14b24e2bSVaishali Kulkarni  * @brief ecore_init_brb_ram - Initializes BRB RAM sizes per TC.
290*14b24e2bSVaishali Kulkarni  *
291*14b24e2bSVaishali Kulkarni  * Based on weight/priority requirements per-TC.
292*14b24e2bSVaishali Kulkarni  *
293*14b24e2bSVaishali Kulkarni  * @param p_hwfn -   HW device data
294*14b24e2bSVaishali Kulkarni  * @param p_ptt	- ptt window used for writing the registers.
295*14b24e2bSVaishali Kulkarni  * @param req -   the BRB RAM initialization requirements.
296*14b24e2bSVaishali Kulkarni  */
297*14b24e2bSVaishali Kulkarni void ecore_init_brb_ram(struct ecore_hwfn *p_hwfn,
298*14b24e2bSVaishali Kulkarni 						struct ecore_ptt *p_ptt,
299*14b24e2bSVaishali Kulkarni 						struct init_brb_ram_req* req);
300*14b24e2bSVaishali Kulkarni 
301*14b24e2bSVaishali Kulkarni #endif /* UNUSED_HSI_FUNC */
302*14b24e2bSVaishali Kulkarni #ifndef UNUSED_HSI_FUNC
303*14b24e2bSVaishali Kulkarni 
304*14b24e2bSVaishali Kulkarni /**
305*14b24e2bSVaishali Kulkarni  * @brief ecore_set_engine_mf_ovlan_eth_type - Initializes Nig,Prs,Pbf and llh
306*14b24e2bSVaishali Kulkarni  * ethType Regs to  input ethType. Should Be called once per engine if engine
307*14b24e2bSVaishali Kulkarni  * is in BD mode.
308*14b24e2bSVaishali Kulkarni  *
309*14b24e2bSVaishali Kulkarni  * @param p_hwfn -	    HW device data
310*14b24e2bSVaishali Kulkarni  * @param p_ptt -     ptt window used for writing the registers.
311*14b24e2bSVaishali Kulkarni  * @param ethType - etherType to configure
312*14b24e2bSVaishali Kulkarni  */
313*14b24e2bSVaishali Kulkarni void ecore_set_engine_mf_ovlan_eth_type(struct ecore_hwfn *p_hwfn,
314*14b24e2bSVaishali Kulkarni 										struct ecore_ptt *p_ptt,
315*14b24e2bSVaishali Kulkarni 										u32 ethType);
316*14b24e2bSVaishali Kulkarni 
317*14b24e2bSVaishali Kulkarni /**
318*14b24e2bSVaishali Kulkarni  * @brief ecore_set_port_mf_ovlan_eth_type - initializes DORQ ethType Regs to
319*14b24e2bSVaishali Kulkarni  * input ethType. should Be called once per port.
320*14b24e2bSVaishali Kulkarni  *
321*14b24e2bSVaishali Kulkarni  * @param p_hwfn -     HW device data
322*14b24e2bSVaishali Kulkarni  * @param p_ptt -     ptt window used for writing the registers.
323*14b24e2bSVaishali Kulkarni  * @param ethType - etherType to configure
324*14b24e2bSVaishali Kulkarni  */
325*14b24e2bSVaishali Kulkarni void ecore_set_port_mf_ovlan_eth_type(struct ecore_hwfn *p_hwfn,
326*14b24e2bSVaishali Kulkarni 									  struct ecore_ptt *p_ptt,
327*14b24e2bSVaishali Kulkarni 									  u32 ethType);
328*14b24e2bSVaishali Kulkarni 
329*14b24e2bSVaishali Kulkarni #endif /* UNUSED_HSI_FUNC */
330*14b24e2bSVaishali Kulkarni 
331*14b24e2bSVaishali Kulkarni /**
332*14b24e2bSVaishali Kulkarni  * @brief ecore_set_vxlan_dest_port - Initializes vxlan tunnel destination udp
333*14b24e2bSVaishali Kulkarni  * port.
334*14b24e2bSVaishali Kulkarni  *
335*14b24e2bSVaishali Kulkarni  * @param p_hwfn -	      HW device data
336*14b24e2bSVaishali Kulkarni  * @param p_ptt -       ptt window used for writing the registers.
337*14b24e2bSVaishali Kulkarni  * @param dest_port - vxlan destination udp port.
338*14b24e2bSVaishali Kulkarni  */
339*14b24e2bSVaishali Kulkarni void ecore_set_vxlan_dest_port(struct ecore_hwfn *p_hwfn,
340*14b24e2bSVaishali Kulkarni                                struct ecore_ptt *p_ptt,
341*14b24e2bSVaishali Kulkarni                                u16 dest_port);
342*14b24e2bSVaishali Kulkarni 
343*14b24e2bSVaishali Kulkarni /**
344*14b24e2bSVaishali Kulkarni  * @brief ecore_set_vxlan_enable - Enable or disable VXLAN tunnel in HW
345*14b24e2bSVaishali Kulkarni  *
346*14b24e2bSVaishali Kulkarni  * @param p_hwfn -		 HW device data
347*14b24e2bSVaishali Kulkarni  * @param p_ptt -		 ptt window used for writing the registers.
348*14b24e2bSVaishali Kulkarni  * @param vxlan_enable - vxlan enable flag.
349*14b24e2bSVaishali Kulkarni  */
350*14b24e2bSVaishali Kulkarni void ecore_set_vxlan_enable(struct ecore_hwfn *p_hwfn,
351*14b24e2bSVaishali Kulkarni                             struct ecore_ptt *p_ptt,
352*14b24e2bSVaishali Kulkarni                             bool vxlan_enable);
353*14b24e2bSVaishali Kulkarni 
354*14b24e2bSVaishali Kulkarni /**
355*14b24e2bSVaishali Kulkarni  * @brief ecore_set_gre_enable - Enable or disable GRE tunnel in HW
356*14b24e2bSVaishali Kulkarni  *
357*14b24e2bSVaishali Kulkarni  * @param p_hwfn -		   HW device data
358*14b24e2bSVaishali Kulkarni  * @param p_ptt -		   ptt window used for writing the registers.
359*14b24e2bSVaishali Kulkarni  * @param eth_gre_enable - eth GRE enable enable flag.
360*14b24e2bSVaishali Kulkarni  * @param ip_gre_enable -  IP GRE enable enable flag.
361*14b24e2bSVaishali Kulkarni  */
362*14b24e2bSVaishali Kulkarni void ecore_set_gre_enable(struct ecore_hwfn *p_hwfn,
363*14b24e2bSVaishali Kulkarni                           struct ecore_ptt *p_ptt,
364*14b24e2bSVaishali Kulkarni                           bool eth_gre_enable,
365*14b24e2bSVaishali Kulkarni                           bool ip_gre_enable);
366*14b24e2bSVaishali Kulkarni 
367*14b24e2bSVaishali Kulkarni /**
368*14b24e2bSVaishali Kulkarni  * @brief ecore_set_geneve_dest_port - Initializes geneve tunnel destination
369*14b24e2bSVaishali Kulkarni  * udp port.
370*14b24e2bSVaishali Kulkarni  *
371*14b24e2bSVaishali Kulkarni  * @param p_hwfn -	      HW device data
372*14b24e2bSVaishali Kulkarni  * @param p_ptt -       ptt window used for writing the registers.
373*14b24e2bSVaishali Kulkarni  * @param dest_port - geneve destination udp port.
374*14b24e2bSVaishali Kulkarni  */
375*14b24e2bSVaishali Kulkarni void ecore_set_geneve_dest_port(struct ecore_hwfn *p_hwfn,
376*14b24e2bSVaishali Kulkarni                                 struct ecore_ptt *p_ptt,
377*14b24e2bSVaishali Kulkarni                                 u16 dest_port);
378*14b24e2bSVaishali Kulkarni 
379*14b24e2bSVaishali Kulkarni /**
380*14b24e2bSVaishali Kulkarni  * @brief ecore_set_geneve_enable - Enable or disable GRE tunnel in HW
381*14b24e2bSVaishali Kulkarni  *
382*14b24e2bSVaishali Kulkarni  * @param p_hwfn -			HW device data
383*14b24e2bSVaishali Kulkarni  * @param p_ptt -			ptt window used for writing the registers.
384*14b24e2bSVaishali Kulkarni  * @param eth_geneve_enable -	eth GENEVE enable enable flag.
385*14b24e2bSVaishali Kulkarni  * @param ip_geneve_enable -	IP GENEVE enable enable flag.
386*14b24e2bSVaishali Kulkarni   */
387*14b24e2bSVaishali Kulkarni void ecore_set_geneve_enable(struct ecore_hwfn *p_hwfn,
388*14b24e2bSVaishali Kulkarni                              struct ecore_ptt *p_ptt,
389*14b24e2bSVaishali Kulkarni                              bool eth_geneve_enable,
390*14b24e2bSVaishali Kulkarni                              bool ip_geneve_enable);
391*14b24e2bSVaishali Kulkarni 
392*14b24e2bSVaishali Kulkarni #ifndef UNUSED_HSI_FUNC
393*14b24e2bSVaishali Kulkarni 
394*14b24e2bSVaishali Kulkarni /**
395*14b24e2bSVaishali Kulkarni  * @brief ecore_set_gft_event_id_cm_hdr - Configure GFT event id and cm header
396*14b24e2bSVaishali Kulkarni  *
397*14b24e2bSVaishali Kulkarni  * @param p_hwfn - HW device data
398*14b24e2bSVaishali Kulkarni  * @param p_ptt - ptt window used for writing the registers.
399*14b24e2bSVaishali Kulkarni  */
400*14b24e2bSVaishali Kulkarni void ecore_set_gft_event_id_cm_hdr(struct ecore_hwfn *p_hwfn,
401*14b24e2bSVaishali Kulkarni 								   struct ecore_ptt *p_ptt);
402*14b24e2bSVaishali Kulkarni 
403*14b24e2bSVaishali Kulkarni /**
404*14b24e2bSVaishali Kulkarni  * @brief ecore_set_rfs_mode_disable - Disable and configure HW for RFS
405*14b24e2bSVaishali Kulkarni  *
406*14b24e2bSVaishali Kulkarni  * @param p_hwfn -   HW device data
407*14b24e2bSVaishali Kulkarni  * @param p_ptt -   ptt window used for writing the registers.
408*14b24e2bSVaishali Kulkarni  * @param pf_id - pf on which to disable RFS.
409*14b24e2bSVaishali Kulkarni  */
410*14b24e2bSVaishali Kulkarni void ecore_set_rfs_mode_disable(struct ecore_hwfn *p_hwfn,
411*14b24e2bSVaishali Kulkarni 								struct ecore_ptt *p_ptt,
412*14b24e2bSVaishali Kulkarni 								u16 pf_id);
413*14b24e2bSVaishali Kulkarni 
414*14b24e2bSVaishali Kulkarni /**
415*14b24e2bSVaishali Kulkarni  * @brief ecore_set_rfs_mode_enable - Enable and configure HW for RFS
416*14b24e2bSVaishali Kulkarni  *
417*14b24e2bSVaishali Kulkarni  * @param p_hwfn -	  HW device data
418*14b24e2bSVaishali Kulkarni  * @param p_ptt -   ptt window used for writing the registers.
419*14b24e2bSVaishali Kulkarni  * @param pf_id - pf on which to enable RFS.
420*14b24e2bSVaishali Kulkarni  * @param tcp -   set profile tcp packets.
421*14b24e2bSVaishali Kulkarni  * @param udp -   set profile udp  packet.
422*14b24e2bSVaishali Kulkarni  * @param ipv4 -  set profile ipv4 packet.
423*14b24e2bSVaishali Kulkarni  * @param ipv6 -  set profile ipv6 packet.
424*14b24e2bSVaishali Kulkarni  */
425*14b24e2bSVaishali Kulkarni void ecore_set_rfs_mode_enable(struct ecore_hwfn *p_hwfn,
426*14b24e2bSVaishali Kulkarni 	struct ecore_ptt *p_ptt,
427*14b24e2bSVaishali Kulkarni 	u16 pf_id,
428*14b24e2bSVaishali Kulkarni 	bool tcp,
429*14b24e2bSVaishali Kulkarni 	bool udp,
430*14b24e2bSVaishali Kulkarni 	bool ipv4,
431*14b24e2bSVaishali Kulkarni 	bool ipv6);
432*14b24e2bSVaishali Kulkarni 
433*14b24e2bSVaishali Kulkarni #endif /* UNUSED_HSI_FUNC */
434*14b24e2bSVaishali Kulkarni 
435*14b24e2bSVaishali Kulkarni /**
436*14b24e2bSVaishali Kulkarni  * @brief ecore_config_vf_zone_size_mode - Configure VF zone size mode. Must be
437*14b24e2bSVaishali Kulkarni  * used before first ETH queue started.
438*14b24e2bSVaishali Kulkarni  *
439*14b24e2bSVaishali Kulkarni  * @param p_hwfn -		 HW device data
440*14b24e2bSVaishali Kulkarni  * @param p_ptt -		 ptt window used for writing the registers. Don't care
441*14b24e2bSVaishali Kulkarni  *			 if runtime_init used.
442*14b24e2bSVaishali Kulkarni  * @param mode -	 VF zone size mode. Use enum vf_zone_size_mode.
443*14b24e2bSVaishali Kulkarni  * @param runtime_init - Set 1 to init runtime registers in engine phase.
444*14b24e2bSVaishali Kulkarni  *			 Set 0 if VF zone size mode configured after engine
445*14b24e2bSVaishali Kulkarni  *			 phase.
446*14b24e2bSVaishali Kulkarni  */
447*14b24e2bSVaishali Kulkarni void ecore_config_vf_zone_size_mode(struct ecore_hwfn *p_hwfn,
448*14b24e2bSVaishali Kulkarni 									struct ecore_ptt *p_ptt,
449*14b24e2bSVaishali Kulkarni 									u16 mode,
450*14b24e2bSVaishali Kulkarni 									bool runtime_init);
451*14b24e2bSVaishali Kulkarni 
452*14b24e2bSVaishali Kulkarni /**
453*14b24e2bSVaishali Kulkarni  * @brief ecore_get_mstorm_queue_stat_offset - Get mstorm statistics offset by
454*14b24e2bSVaishali Kulkarni  * VF zone size mode.
455*14b24e2bSVaishali Kulkarni  *
456*14b24e2bSVaishali Kulkarni  * @param p_hwfn -			HW device data
457*14b24e2bSVaishali Kulkarni  * @param stat_cnt_id -		statistic counter id
458*14b24e2bSVaishali Kulkarni  * @param vf_zone_size_mode -	VF zone size mode. Use enum vf_zone_size_mode.
459*14b24e2bSVaishali Kulkarni  */
460*14b24e2bSVaishali Kulkarni u32 ecore_get_mstorm_queue_stat_offset(struct ecore_hwfn *p_hwfn,
461*14b24e2bSVaishali Kulkarni 									   u16 stat_cnt_id,
462*14b24e2bSVaishali Kulkarni 									   u16 vf_zone_size_mode);
463*14b24e2bSVaishali Kulkarni 
464*14b24e2bSVaishali Kulkarni /**
465*14b24e2bSVaishali Kulkarni  * @brief ecore_get_mstorm_eth_vf_prods_offset - VF producer offset by VF zone
466*14b24e2bSVaishali Kulkarni  * size mode.
467*14b24e2bSVaishali Kulkarni  *
468*14b24e2bSVaishali Kulkarni  * @param p_hwfn -		      HW device data
469*14b24e2bSVaishali Kulkarni  * @param vf_id -	      vf id.
470*14b24e2bSVaishali Kulkarni  * @param vf_queue_id -	      per VF rx queue id.
471*14b24e2bSVaishali Kulkarni  * @param vf_zone_size_mode - vf zone size mode. Use enum vf_zone_size_mode.
472*14b24e2bSVaishali Kulkarni  */
473*14b24e2bSVaishali Kulkarni u32 ecore_get_mstorm_eth_vf_prods_offset(struct ecore_hwfn *p_hwfn,
474*14b24e2bSVaishali Kulkarni 										 u8 vf_id,
475*14b24e2bSVaishali Kulkarni 										 u8 vf_queue_id,
476*14b24e2bSVaishali Kulkarni 										 u16 vf_zone_size_mode);
477*14b24e2bSVaishali Kulkarni 
478*14b24e2bSVaishali Kulkarni /**
479*14b24e2bSVaishali Kulkarni  * @brief ecore_enable_context_validation - Enable and configure context
480*14b24e2bSVaishali Kulkarni  * validation.
481*14b24e2bSVaishali Kulkarni  *
482*14b24e2bSVaishali Kulkarni  * @param p_hwfn -   HW device data
483*14b24e2bSVaishali Kulkarni  * @param p_ptt - ptt window used for writing the registers.
484*14b24e2bSVaishali Kulkarni  */
485*14b24e2bSVaishali Kulkarni void ecore_enable_context_validation(struct ecore_hwfn *p_hwfn,
486*14b24e2bSVaishali Kulkarni 									 struct ecore_ptt *p_ptt);
487*14b24e2bSVaishali Kulkarni 
488*14b24e2bSVaishali Kulkarni /**
489*14b24e2bSVaishali Kulkarni * @brief ecore_calc_session_ctx_validation - Calcualte validation byte for
490*14b24e2bSVaishali Kulkarni * session context.
491*14b24e2bSVaishali Kulkarni *
492*14b24e2bSVaishali Kulkarni * @param p_ctx_mem -	pointer to context memory.
493*14b24e2bSVaishali Kulkarni * @param ctx_size -	context size.
494*14b24e2bSVaishali Kulkarni * @param ctx_type -	context type.
495*14b24e2bSVaishali Kulkarni * @param cid -		context cid.
496*14b24e2bSVaishali Kulkarni */
497*14b24e2bSVaishali Kulkarni void ecore_calc_session_ctx_validation(struct ecore_hwfn * p_hwfn,
498*14b24e2bSVaishali Kulkarni 				       void *p_ctx_mem,
499*14b24e2bSVaishali Kulkarni 				       u16 ctx_size,
500*14b24e2bSVaishali Kulkarni 				       u8 ctx_type,
501*14b24e2bSVaishali Kulkarni 				       u32 cid);
502*14b24e2bSVaishali Kulkarni 
503*14b24e2bSVaishali Kulkarni /**
504*14b24e2bSVaishali Kulkarni * @brief ecore_calc_task_ctx_validation - Calcualte validation byte for task
505*14b24e2bSVaishali Kulkarni * context.
506*14b24e2bSVaishali Kulkarni *
507*14b24e2bSVaishali Kulkarni * @param p_hwfn -		    HW device data
508*14b24e2bSVaishali Kulkarni * @param p_ctx_mem -	pointer to context memory.
509*14b24e2bSVaishali Kulkarni * @param ctx_size -	context size.
510*14b24e2bSVaishali Kulkarni * @param ctx_type -	context type.
511*14b24e2bSVaishali Kulkarni * @param tid -		    context tid.
512*14b24e2bSVaishali Kulkarni */
513*14b24e2bSVaishali Kulkarni void ecore_calc_task_ctx_validation(struct ecore_hwfn * p_hwfn,
514*14b24e2bSVaishali Kulkarni 				    void *p_ctx_mem,
515*14b24e2bSVaishali Kulkarni 				    u16 ctx_size,
516*14b24e2bSVaishali Kulkarni 				    u8 ctx_type,
517*14b24e2bSVaishali Kulkarni 				    u32 tid);
518*14b24e2bSVaishali Kulkarni 
519*14b24e2bSVaishali Kulkarni /**
520*14b24e2bSVaishali Kulkarni * @brief ecore_memset_session_ctx - Memset session context to 0 while
521*14b24e2bSVaishali Kulkarni * preserving validation bytes.
522*14b24e2bSVaishali Kulkarni *
523*14b24e2bSVaishali Kulkarni * @param p_hwfn -		  HW device data
524*14b24e2bSVaishali Kulkarni * @param p_ctx_mem - pointer to context memory.
525*14b24e2bSVaishali Kulkarni * @param ctx_size -  size to initialzie.
526*14b24e2bSVaishali Kulkarni * @param ctx_type -  context type.
527*14b24e2bSVaishali Kulkarni */
528*14b24e2bSVaishali Kulkarni void ecore_memset_session_ctx(void *p_ctx_mem,
529*14b24e2bSVaishali Kulkarni 			      u32 ctx_size,
530*14b24e2bSVaishali Kulkarni 			      u8 ctx_type);
531*14b24e2bSVaishali Kulkarni 
532*14b24e2bSVaishali Kulkarni /**
533*14b24e2bSVaishali Kulkarni * @brief ecore_memset_task_ctx - Memset task context to 0 while preserving
534*14b24e2bSVaishali Kulkarni * validation bytes.
535*14b24e2bSVaishali Kulkarni *
536*14b24e2bSVaishali Kulkarni * @param p_ctx_mem - pointer to context memory.
537*14b24e2bSVaishali Kulkarni * @param ctx_size -  size to initialzie.
538*14b24e2bSVaishali Kulkarni * @param ctx_type -  context type.
539*14b24e2bSVaishali Kulkarni */
540*14b24e2bSVaishali Kulkarni void ecore_memset_task_ctx(void *p_ctx_mem,
541*14b24e2bSVaishali Kulkarni 			   u32 ctx_size,
542*14b24e2bSVaishali Kulkarni 			   u8 ctx_type);
543*14b24e2bSVaishali Kulkarni 
544*14b24e2bSVaishali Kulkarni #endif
545