1*14b24e2bSVaishali Kulkarni /* 2*14b24e2bSVaishali Kulkarni * CDDL HEADER START 3*14b24e2bSVaishali Kulkarni * 4*14b24e2bSVaishali Kulkarni * The contents of this file are subject to the terms of the 5*14b24e2bSVaishali Kulkarni * Common Development and Distribution License, v.1, (the "License"). 6*14b24e2bSVaishali Kulkarni * You may not use this file except in compliance with the License. 7*14b24e2bSVaishali Kulkarni * 8*14b24e2bSVaishali Kulkarni * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 9*14b24e2bSVaishali Kulkarni * or http://opensource.org/licenses/CDDL-1.0. 10*14b24e2bSVaishali Kulkarni * See the License for the specific language governing permissions 11*14b24e2bSVaishali Kulkarni * and limitations under the License. 12*14b24e2bSVaishali Kulkarni * 13*14b24e2bSVaishali Kulkarni * When distributing Covered Code, include this CDDL HEADER in each 14*14b24e2bSVaishali Kulkarni * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 15*14b24e2bSVaishali Kulkarni * If applicable, add the following below this CDDL HEADER, with the 16*14b24e2bSVaishali Kulkarni * fields enclosed by brackets "[]" replaced with your own identifying 17*14b24e2bSVaishali Kulkarni * information: Portions Copyright [yyyy] [name of copyright owner] 18*14b24e2bSVaishali Kulkarni * 19*14b24e2bSVaishali Kulkarni * CDDL HEADER END 20*14b24e2bSVaishali Kulkarni */ 21*14b24e2bSVaishali Kulkarni 22*14b24e2bSVaishali Kulkarni /* 23*14b24e2bSVaishali Kulkarni * Copyright 2014-2017 Cavium, Inc. 24*14b24e2bSVaishali Kulkarni * The contents of this file are subject to the terms of the Common Development 25*14b24e2bSVaishali Kulkarni * and Distribution License, v.1, (the "License"). 26*14b24e2bSVaishali Kulkarni 27*14b24e2bSVaishali Kulkarni * You may not use this file except in compliance with the License. 28*14b24e2bSVaishali Kulkarni 29*14b24e2bSVaishali Kulkarni * You can obtain a copy of the License at available 30*14b24e2bSVaishali Kulkarni * at http://opensource.org/licenses/CDDL-1.0 31*14b24e2bSVaishali Kulkarni 32*14b24e2bSVaishali Kulkarni * See the License for the specific language governing permissions and 33*14b24e2bSVaishali Kulkarni * limitations under the License. 34*14b24e2bSVaishali Kulkarni */ 35*14b24e2bSVaishali Kulkarni 36*14b24e2bSVaishali Kulkarni #ifndef _ECORE_IGU_DEF_H_ 37*14b24e2bSVaishali Kulkarni #define _ECORE_IGU_DEF_H_ 38*14b24e2bSVaishali Kulkarni 39*14b24e2bSVaishali Kulkarni /* Fields of IGU PF CONFIGRATION REGISTER */ 40*14b24e2bSVaishali Kulkarni #define IGU_PF_CONF_FUNC_EN (0x1<<0) /* function enable */ 41*14b24e2bSVaishali Kulkarni #define IGU_PF_CONF_MSI_MSIX_EN (0x1<<1) /* MSI/MSIX enable */ 42*14b24e2bSVaishali Kulkarni #define IGU_PF_CONF_INT_LINE_EN (0x1<<2) /* INT enable */ 43*14b24e2bSVaishali Kulkarni #define IGU_PF_CONF_ATTN_BIT_EN (0x1<<3) /* attention enable */ 44*14b24e2bSVaishali Kulkarni #define IGU_PF_CONF_SINGLE_ISR_EN (0x1<<4) /* single ISR mode enable */ 45*14b24e2bSVaishali Kulkarni #define IGU_PF_CONF_SIMD_MODE (0x1<<5) /* simd all ones mode */ 46*14b24e2bSVaishali Kulkarni 47*14b24e2bSVaishali Kulkarni /* Fields of IGU VF CONFIGRATION REGISTER */ 48*14b24e2bSVaishali Kulkarni #define IGU_VF_CONF_FUNC_EN (0x1<<0) /* function enable */ 49*14b24e2bSVaishali Kulkarni #define IGU_VF_CONF_MSI_MSIX_EN (0x1<<1) /* MSI/MSIX enable */ 50*14b24e2bSVaishali Kulkarni #define IGU_VF_CONF_SINGLE_ISR_EN (0x1<<4) /* single ISR mode enable */ 51*14b24e2bSVaishali Kulkarni #define IGU_VF_CONF_PARENT_MASK (0xF) /* Parent PF */ 52*14b24e2bSVaishali Kulkarni #define IGU_VF_CONF_PARENT_SHIFT 5 /* Parent PF */ 53*14b24e2bSVaishali Kulkarni 54*14b24e2bSVaishali Kulkarni /* Igu control commands 55*14b24e2bSVaishali Kulkarni */ 56*14b24e2bSVaishali Kulkarni enum igu_ctrl_cmd 57*14b24e2bSVaishali Kulkarni { 58*14b24e2bSVaishali Kulkarni IGU_CTRL_CMD_TYPE_RD, 59*14b24e2bSVaishali Kulkarni IGU_CTRL_CMD_TYPE_WR, 60*14b24e2bSVaishali Kulkarni MAX_IGU_CTRL_CMD 61*14b24e2bSVaishali Kulkarni }; 62*14b24e2bSVaishali Kulkarni 63*14b24e2bSVaishali Kulkarni /* Control register for the IGU command register 64*14b24e2bSVaishali Kulkarni */ 65*14b24e2bSVaishali Kulkarni struct igu_ctrl_reg 66*14b24e2bSVaishali Kulkarni { 67*14b24e2bSVaishali Kulkarni u32 ctrl_data; 68*14b24e2bSVaishali Kulkarni #define IGU_CTRL_REG_FID_MASK 0xFFFF /* Opaque_FID */ 69*14b24e2bSVaishali Kulkarni #define IGU_CTRL_REG_FID_SHIFT 0 70*14b24e2bSVaishali Kulkarni #define IGU_CTRL_REG_PXP_ADDR_MASK 0xFFF /* Command address */ 71*14b24e2bSVaishali Kulkarni #define IGU_CTRL_REG_PXP_ADDR_SHIFT 16 72*14b24e2bSVaishali Kulkarni #define IGU_CTRL_REG_RESERVED_MASK 0x1 73*14b24e2bSVaishali Kulkarni #define IGU_CTRL_REG_RESERVED_SHIFT 28 74*14b24e2bSVaishali Kulkarni #define IGU_CTRL_REG_TYPE_MASK 0x1 /* use enum igu_ctrl_cmd */ 75*14b24e2bSVaishali Kulkarni #define IGU_CTRL_REG_TYPE_SHIFT 31 76*14b24e2bSVaishali Kulkarni }; 77*14b24e2bSVaishali Kulkarni 78*14b24e2bSVaishali Kulkarni #endif 79