114b24e2bSVaishali Kulkarni /*
214b24e2bSVaishali Kulkarni * CDDL HEADER START
314b24e2bSVaishali Kulkarni *
414b24e2bSVaishali Kulkarni * The contents of this file are subject to the terms of the
514b24e2bSVaishali Kulkarni * Common Development and Distribution License, v.1,  (the "License").
614b24e2bSVaishali Kulkarni * You may not use this file except in compliance with the License.
714b24e2bSVaishali Kulkarni *
814b24e2bSVaishali Kulkarni * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
914b24e2bSVaishali Kulkarni * or http://opensource.org/licenses/CDDL-1.0.
1014b24e2bSVaishali Kulkarni * See the License for the specific language governing permissions
1114b24e2bSVaishali Kulkarni * and limitations under the License.
1214b24e2bSVaishali Kulkarni *
1314b24e2bSVaishali Kulkarni * When distributing Covered Code, include this CDDL HEADER in each
1414b24e2bSVaishali Kulkarni * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
1514b24e2bSVaishali Kulkarni * If applicable, add the following below this CDDL HEADER, with the
1614b24e2bSVaishali Kulkarni * fields enclosed by brackets "[]" replaced with your own identifying
1714b24e2bSVaishali Kulkarni * information: Portions Copyright [yyyy] [name of copyright owner]
1814b24e2bSVaishali Kulkarni *
1914b24e2bSVaishali Kulkarni * CDDL HEADER END
2014b24e2bSVaishali Kulkarni */
2114b24e2bSVaishali Kulkarni 
2214b24e2bSVaishali Kulkarni /*
2314b24e2bSVaishali Kulkarni * Copyright 2014-2017 Cavium, Inc.
2414b24e2bSVaishali Kulkarni * The contents of this file are subject to the terms of the Common Development
2514b24e2bSVaishali Kulkarni * and Distribution License, v.1,  (the "License").
2614b24e2bSVaishali Kulkarni 
2714b24e2bSVaishali Kulkarni * You may not use this file except in compliance with the License.
2814b24e2bSVaishali Kulkarni 
2914b24e2bSVaishali Kulkarni * You can obtain a copy of the License at available
3014b24e2bSVaishali Kulkarni * at http://opensource.org/licenses/CDDL-1.0
3114b24e2bSVaishali Kulkarni 
3214b24e2bSVaishali Kulkarni * See the License for the specific language governing permissions and
3314b24e2bSVaishali Kulkarni * limitations under the License.
3414b24e2bSVaishali Kulkarni */
3514b24e2bSVaishali Kulkarni 
3614b24e2bSVaishali Kulkarni #ifndef __ECORE_H
3714b24e2bSVaishali Kulkarni #define __ECORE_H
3814b24e2bSVaishali Kulkarni 
3914b24e2bSVaishali Kulkarni #include "ecore_hsi_common.h"
4014b24e2bSVaishali Kulkarni #include "ecore_hsi_debug_tools.h"
4114b24e2bSVaishali Kulkarni #include "ecore_hsi_init_func.h"
4214b24e2bSVaishali Kulkarni #include "ecore_hsi_init_tool.h"
4314b24e2bSVaishali Kulkarni #include "ecore_proto_if.h"
4414b24e2bSVaishali Kulkarni #include "mcp_public.h"
4514b24e2bSVaishali Kulkarni 
4614b24e2bSVaishali Kulkarni #define ECORE_MAJOR_VERSION		8
4714b24e2bSVaishali Kulkarni #define ECORE_MINOR_VERSION		18
4814b24e2bSVaishali Kulkarni #define ECORE_REVISION_VERSION		18
4914b24e2bSVaishali Kulkarni #define ECORE_ENGINEERING_VERSION	0
5014b24e2bSVaishali Kulkarni 
5114b24e2bSVaishali Kulkarni #define ECORE_VERSION							\
5214b24e2bSVaishali Kulkarni 	((ECORE_MAJOR_VERSION << 24) | (ECORE_MINOR_VERSION << 16) |	\
5314b24e2bSVaishali Kulkarni 	 (ECORE_REVISION_VERSION << 8) | ECORE_ENGINEERING_VERSION)
5414b24e2bSVaishali Kulkarni 
5514b24e2bSVaishali Kulkarni #define STORM_FW_VERSION						\
5614b24e2bSVaishali Kulkarni 	((FW_MAJOR_VERSION << 24) | (FW_MINOR_VERSION << 16) |	\
5714b24e2bSVaishali Kulkarni 	 (FW_REVISION_VERSION << 8) | FW_ENGINEERING_VERSION)
5814b24e2bSVaishali Kulkarni 
5914b24e2bSVaishali Kulkarni #define MAX_HWFNS_PER_DEVICE	2
6014b24e2bSVaishali Kulkarni #define NAME_SIZE 16
6114b24e2bSVaishali Kulkarni #define ARRAY_DECL static const
6214b24e2bSVaishali Kulkarni #define ECORE_WFQ_UNIT	100
6314b24e2bSVaishali Kulkarni 
6414b24e2bSVaishali Kulkarni /* Constants */
6514b24e2bSVaishali Kulkarni #define ECORE_WID_SIZE		(1024)
6614b24e2bSVaishali Kulkarni 
6714b24e2bSVaishali Kulkarni /* Configurable */
6814b24e2bSVaishali Kulkarni #define ECORE_PF_DEMS_SIZE	(4)
6914b24e2bSVaishali Kulkarni 
7014b24e2bSVaishali Kulkarni /* cau states */
7114b24e2bSVaishali Kulkarni enum ecore_coalescing_mode {
7214b24e2bSVaishali Kulkarni 	ECORE_COAL_MODE_DISABLE,
7314b24e2bSVaishali Kulkarni 	ECORE_COAL_MODE_ENABLE
7414b24e2bSVaishali Kulkarni };
7514b24e2bSVaishali Kulkarni 
7614b24e2bSVaishali Kulkarni enum ecore_nvm_cmd {
7714b24e2bSVaishali Kulkarni 	ECORE_PUT_FILE_BEGIN = DRV_MSG_CODE_NVM_PUT_FILE_BEGIN,
7814b24e2bSVaishali Kulkarni 	ECORE_PUT_FILE_DATA = DRV_MSG_CODE_NVM_PUT_FILE_DATA,
7914b24e2bSVaishali Kulkarni 	ECORE_NVM_READ_NVRAM = DRV_MSG_CODE_NVM_READ_NVRAM,
8014b24e2bSVaishali Kulkarni 	ECORE_NVM_WRITE_NVRAM = DRV_MSG_CODE_NVM_WRITE_NVRAM,
8114b24e2bSVaishali Kulkarni 	ECORE_NVM_DEL_FILE = DRV_MSG_CODE_NVM_DEL_FILE,
8214b24e2bSVaishali Kulkarni 	ECORE_EXT_PHY_FW_UPGRADE = DRV_MSG_CODE_EXT_PHY_FW_UPGRADE,
8314b24e2bSVaishali Kulkarni 	ECORE_NVM_SET_SECURE_MODE = DRV_MSG_CODE_SET_SECURE_MODE,
8414b24e2bSVaishali Kulkarni 	ECORE_PHY_RAW_READ = DRV_MSG_CODE_PHY_RAW_READ,
8514b24e2bSVaishali Kulkarni 	ECORE_PHY_RAW_WRITE = DRV_MSG_CODE_PHY_RAW_WRITE,
8614b24e2bSVaishali Kulkarni 	ECORE_PHY_CORE_READ = DRV_MSG_CODE_PHY_CORE_READ,
8714b24e2bSVaishali Kulkarni 	ECORE_PHY_CORE_WRITE = DRV_MSG_CODE_PHY_CORE_WRITE,
8814b24e2bSVaishali Kulkarni 	ECORE_GET_MCP_NVM_RESP = 0xFFFFFF00
8914b24e2bSVaishali Kulkarni };
9014b24e2bSVaishali Kulkarni 
9114b24e2bSVaishali Kulkarni #ifndef LINUX_REMOVE
9214b24e2bSVaishali Kulkarni #if !defined(CONFIG_ECORE_L2) && !defined(CONFIG_ECORE_ROCE) && \
9314b24e2bSVaishali Kulkarni     !defined(CONFIG_ECORE_FCOE) && !defined(CONFIG_ECORE_ISCSI)
9414b24e2bSVaishali Kulkarni #define CONFIG_ECORE_L2
9514b24e2bSVaishali Kulkarni #define CONFIG_ECORE_SRIOV
9614b24e2bSVaishali Kulkarni #define CONFIG_ECORE_ROCE
9714b24e2bSVaishali Kulkarni #define CONFIG_ECORE_IWARP
9814b24e2bSVaishali Kulkarni #define CONFIG_ECORE_FCOE
9914b24e2bSVaishali Kulkarni #define CONFIG_ECORE_ISCSI
10014b24e2bSVaishali Kulkarni #define CONFIG_ECORE_LL2
10114b24e2bSVaishali Kulkarni #endif
10214b24e2bSVaishali Kulkarni #endif
10314b24e2bSVaishali Kulkarni 
10414b24e2bSVaishali Kulkarni /* helpers */
10514b24e2bSVaishali Kulkarni #ifndef __EXTRACT__LINUX__
10614b24e2bSVaishali Kulkarni #define MASK_FIELD(_name, _value)					\
10714b24e2bSVaishali Kulkarni 		((_value) &= (_name##_MASK))
10814b24e2bSVaishali Kulkarni 
10914b24e2bSVaishali Kulkarni #define FIELD_VALUE(_name, _value)					\
11014b24e2bSVaishali Kulkarni 		((_value & _name##_MASK) << _name##_SHIFT)
11114b24e2bSVaishali Kulkarni 
11214b24e2bSVaishali Kulkarni #define SET_FIELD(value, name, flag)					\
11314b24e2bSVaishali Kulkarni do {									\
114*7e3488dcSToomas Soome 	(value) &= ~((u64)name##_MASK << (u64)name##_SHIFT);		\
11514b24e2bSVaishali Kulkarni 	(value) |= ((((u64)flag) & (u64)name##_MASK) << (name##_SHIFT));\
11614b24e2bSVaishali Kulkarni } while (0)
11714b24e2bSVaishali Kulkarni 
11814b24e2bSVaishali Kulkarni #define GET_FIELD(value, name)						\
11914b24e2bSVaishali Kulkarni 	(((value) >> (name##_SHIFT)) & name##_MASK)
12014b24e2bSVaishali Kulkarni #endif
12114b24e2bSVaishali Kulkarni 
12214b24e2bSVaishali Kulkarni #define ECORE_MFW_GET_FIELD(name, field)				\
12314b24e2bSVaishali Kulkarni 	(((name) & (field ## _MASK)) >> (field ## _SHIFT))
12414b24e2bSVaishali Kulkarni 
12514b24e2bSVaishali Kulkarni #define ECORE_MFW_SET_FIELD(name, field, value)				\
12614b24e2bSVaishali Kulkarni do {									\
127d9724514SToomas Soome 	(name) &= ~(((u64)field ## _MASK) << ((u64)field ## _SHIFT));	\
12814b24e2bSVaishali Kulkarni 	(name) |= (((value) << (field ## _SHIFT)) & (field ## _MASK));	\
12914b24e2bSVaishali Kulkarni } while (0)
13014b24e2bSVaishali Kulkarni 
131d9724514SToomas Soome 
DB_ADDR(u32 cid,u32 DEMS)13214b24e2bSVaishali Kulkarni static OSAL_INLINE u32 DB_ADDR(u32 cid, u32 DEMS)
13314b24e2bSVaishali Kulkarni {
13414b24e2bSVaishali Kulkarni 	u32 db_addr = FIELD_VALUE(DB_LEGACY_ADDR_DEMS, DEMS) |
13514b24e2bSVaishali Kulkarni 		      (cid * ECORE_PF_DEMS_SIZE);
13614b24e2bSVaishali Kulkarni 
13714b24e2bSVaishali Kulkarni 	return db_addr;
13814b24e2bSVaishali Kulkarni }
13914b24e2bSVaishali Kulkarni 
DB_ADDR_VF(u32 cid,u32 DEMS)14014b24e2bSVaishali Kulkarni static OSAL_INLINE u32 DB_ADDR_VF(u32 cid, u32 DEMS)
14114b24e2bSVaishali Kulkarni {
14214b24e2bSVaishali Kulkarni 	u32 db_addr = FIELD_VALUE(DB_LEGACY_ADDR_DEMS, DEMS) |
14314b24e2bSVaishali Kulkarni 		      FIELD_VALUE(DB_LEGACY_ADDR_ICID, cid);
14414b24e2bSVaishali Kulkarni 
14514b24e2bSVaishali Kulkarni 	return db_addr;
14614b24e2bSVaishali Kulkarni }
14714b24e2bSVaishali Kulkarni 
14814b24e2bSVaishali Kulkarni #define ALIGNED_TYPE_SIZE(type_name, p_hwfn)				  \
14914b24e2bSVaishali Kulkarni 	((sizeof(type_name) + (u32)(1<<(p_hwfn->p_dev->cache_shift))-1) & \
15014b24e2bSVaishali Kulkarni 	 ~((1<<(p_hwfn->p_dev->cache_shift))-1))
15114b24e2bSVaishali Kulkarni 
15214b24e2bSVaishali Kulkarni #ifndef LINUX_REMOVE
15314b24e2bSVaishali Kulkarni #ifndef U64_HI
15414b24e2bSVaishali Kulkarni #define U64_HI(val) ((u32)(((u64)(val))  >> 32))
15514b24e2bSVaishali Kulkarni #endif
15614b24e2bSVaishali Kulkarni 
15714b24e2bSVaishali Kulkarni #ifndef U64_LO
15814b24e2bSVaishali Kulkarni #define U64_LO(val) ((u32)(((u64)(val)) & 0xffffffff))
15914b24e2bSVaishali Kulkarni #endif
16014b24e2bSVaishali Kulkarni #endif
16114b24e2bSVaishali Kulkarni 
16214b24e2bSVaishali Kulkarni #ifndef __EXTRACT__LINUX__
16314b24e2bSVaishali Kulkarni #ifndef UEFI
16414b24e2bSVaishali Kulkarni /* Debug print definitions */
16514b24e2bSVaishali Kulkarni #define DP_ERR(p_dev, fmt, ...)				\
16614b24e2bSVaishali Kulkarni do {							\
16714b24e2bSVaishali Kulkarni 	PRINT_ERR((p_dev)->dp_ctx, "[%s:%d(%s)]" fmt,	\
16814b24e2bSVaishali Kulkarni 		  __func__, __LINE__,			\
16914b24e2bSVaishali Kulkarni 		  (p_dev)->name ? (p_dev)->name : "",	\
17014b24e2bSVaishali Kulkarni 		  ##__VA_ARGS__);			\
17114b24e2bSVaishali Kulkarni } while (0)
17214b24e2bSVaishali Kulkarni 
17314b24e2bSVaishali Kulkarni #define DP_NOTICE(p_dev, is_assert, fmt, ...)				\
17414b24e2bSVaishali Kulkarni do {									\
17514b24e2bSVaishali Kulkarni 	if (OSAL_UNLIKELY((p_dev)->dp_level <= ECORE_LEVEL_NOTICE)) {	\
17614b24e2bSVaishali Kulkarni 		PRINT((p_dev)->dp_ctx, "[%s:%d(%s)]" fmt,		\
17714b24e2bSVaishali Kulkarni 		      __func__, __LINE__,				\
17814b24e2bSVaishali Kulkarni 		      (p_dev)->name ? (p_dev)->name : "",		\
17914b24e2bSVaishali Kulkarni 		      ##__VA_ARGS__);					\
18014b24e2bSVaishali Kulkarni 		OSAL_ASSERT(!is_assert);				\
18114b24e2bSVaishali Kulkarni 	}								\
18214b24e2bSVaishali Kulkarni } while (0)
18314b24e2bSVaishali Kulkarni 
18414b24e2bSVaishali Kulkarni #define DP_INFO(p_dev, fmt, ...)				      \
18514b24e2bSVaishali Kulkarni do {								      \
18614b24e2bSVaishali Kulkarni 	if (OSAL_UNLIKELY((p_dev)->dp_level <= ECORE_LEVEL_INFO)) {   \
18714b24e2bSVaishali Kulkarni 		PRINT((p_dev)->dp_ctx, "[%s:%d(%s)]" fmt,	      \
18814b24e2bSVaishali Kulkarni 		      __func__, __LINE__,			      \
18914b24e2bSVaishali Kulkarni 		      (p_dev)->name ? (p_dev)->name : "",	      \
19014b24e2bSVaishali Kulkarni 		      ##__VA_ARGS__);				      \
19114b24e2bSVaishali Kulkarni 	}							      \
19214b24e2bSVaishali Kulkarni } while (0)
19314b24e2bSVaishali Kulkarni 
19414b24e2bSVaishali Kulkarni #define DP_VERBOSE(p_dev, module, fmt, ...)				\
19514b24e2bSVaishali Kulkarni do {									\
19614b24e2bSVaishali Kulkarni 	if (OSAL_UNLIKELY(((p_dev)->dp_level <= ECORE_LEVEL_VERBOSE) &&	\
19714b24e2bSVaishali Kulkarni 	    ((p_dev)->dp_module & module))) {				\
19814b24e2bSVaishali Kulkarni 		PRINT((p_dev)->dp_ctx, "[%s:%d(%s)]" fmt,		\
19914b24e2bSVaishali Kulkarni 		      __func__, __LINE__,				\
20014b24e2bSVaishali Kulkarni 		      (p_dev)->name ? (p_dev)->name : "",		\
20114b24e2bSVaishali Kulkarni 		      ##__VA_ARGS__);					\
20214b24e2bSVaishali Kulkarni 	}								\
20314b24e2bSVaishali Kulkarni } while (0)
20414b24e2bSVaishali Kulkarni #endif
20514b24e2bSVaishali Kulkarni 
20614b24e2bSVaishali Kulkarni enum DP_LEVEL {
20714b24e2bSVaishali Kulkarni 	ECORE_LEVEL_VERBOSE	= 0x0,
20814b24e2bSVaishali Kulkarni 	ECORE_LEVEL_INFO	= 0x1,
20914b24e2bSVaishali Kulkarni 	ECORE_LEVEL_NOTICE	= 0x2,
21014b24e2bSVaishali Kulkarni 	ECORE_LEVEL_ERR		= 0x3,
21114b24e2bSVaishali Kulkarni };
21214b24e2bSVaishali Kulkarni 
21314b24e2bSVaishali Kulkarni #define ECORE_LOG_LEVEL_SHIFT	(30)
21414b24e2bSVaishali Kulkarni #define ECORE_LOG_VERBOSE_MASK	(0x3fffffff)
21514b24e2bSVaishali Kulkarni #define ECORE_LOG_INFO_MASK	(0x40000000)
21614b24e2bSVaishali Kulkarni #define ECORE_LOG_NOTICE_MASK	(0x80000000)
21714b24e2bSVaishali Kulkarni 
21814b24e2bSVaishali Kulkarni enum DP_MODULE {
21914b24e2bSVaishali Kulkarni #ifndef LINUX_REMOVE
22014b24e2bSVaishali Kulkarni 	ECORE_MSG_DRV		= 0x0001,
22114b24e2bSVaishali Kulkarni 	ECORE_MSG_PROBE		= 0x0002,
22214b24e2bSVaishali Kulkarni 	ECORE_MSG_LINK		= 0x0004,
22314b24e2bSVaishali Kulkarni 	ECORE_MSG_TIMER		= 0x0008,
22414b24e2bSVaishali Kulkarni 	ECORE_MSG_IFDOWN	= 0x0010,
22514b24e2bSVaishali Kulkarni 	ECORE_MSG_IFUP		= 0x0020,
22614b24e2bSVaishali Kulkarni 	ECORE_MSG_RX_ERR	= 0x0040,
22714b24e2bSVaishali Kulkarni 	ECORE_MSG_TX_ERR	= 0x0080,
22814b24e2bSVaishali Kulkarni 	ECORE_MSG_TX_QUEUED	= 0x0100,
22914b24e2bSVaishali Kulkarni 	ECORE_MSG_INTR		= 0x0200,
23014b24e2bSVaishali Kulkarni 	ECORE_MSG_TX_DONE	= 0x0400,
23114b24e2bSVaishali Kulkarni 	ECORE_MSG_RX_STATUS	= 0x0800,
23214b24e2bSVaishali Kulkarni 	ECORE_MSG_PKTDATA	= 0x1000,
23314b24e2bSVaishali Kulkarni 	ECORE_MSG_HW		= 0x2000,
23414b24e2bSVaishali Kulkarni 	ECORE_MSG_WOL		= 0x4000,
23514b24e2bSVaishali Kulkarni #endif
23614b24e2bSVaishali Kulkarni 	ECORE_MSG_SPQ		= 0x10000,
23714b24e2bSVaishali Kulkarni 	ECORE_MSG_STATS		= 0x20000,
23814b24e2bSVaishali Kulkarni 	ECORE_MSG_DCB		= 0x40000,
23914b24e2bSVaishali Kulkarni 	ECORE_MSG_IOV		= 0x80000,
24014b24e2bSVaishali Kulkarni 	ECORE_MSG_SP		= 0x100000,
24114b24e2bSVaishali Kulkarni 	ECORE_MSG_STORAGE	= 0x200000,
24214b24e2bSVaishali Kulkarni 	ECORE_MSG_OOO		= 0x200000,
24314b24e2bSVaishali Kulkarni 	ECORE_MSG_CXT		= 0x800000,
24414b24e2bSVaishali Kulkarni 	ECORE_MSG_LL2		= 0x1000000,
24514b24e2bSVaishali Kulkarni 	ECORE_MSG_ILT		= 0x2000000,
24614b24e2bSVaishali Kulkarni 	ECORE_MSG_RDMA		= 0x4000000,
24714b24e2bSVaishali Kulkarni 	ECORE_MSG_DEBUG		= 0x8000000,
24814b24e2bSVaishali Kulkarni 	/* to be added...up to 0x8000000 */
24914b24e2bSVaishali Kulkarni };
25014b24e2bSVaishali Kulkarni #endif
25114b24e2bSVaishali Kulkarni 
25214b24e2bSVaishali Kulkarni #define for_each_hwfn(p_dev, i)	for (i = 0; i < p_dev->num_hwfns; i++)
25314b24e2bSVaishali Kulkarni 
25414b24e2bSVaishali Kulkarni #define D_TRINE(val, cond1, cond2, true1, true2, def) \
25514b24e2bSVaishali Kulkarni 	(val == (cond1) ? true1 : \
25614b24e2bSVaishali Kulkarni 	 (val == (cond2) ? true2 : def))
25714b24e2bSVaishali Kulkarni 
25814b24e2bSVaishali Kulkarni /* forward */
25914b24e2bSVaishali Kulkarni struct ecore_ptt_pool;
26014b24e2bSVaishali Kulkarni struct ecore_spq;
26114b24e2bSVaishali Kulkarni struct ecore_sb_info;
26214b24e2bSVaishali Kulkarni struct ecore_sb_attn_info;
26314b24e2bSVaishali Kulkarni struct ecore_cxt_mngr;
26414b24e2bSVaishali Kulkarni struct ecore_dma_mem;
26514b24e2bSVaishali Kulkarni struct ecore_sb_sp_info;
26614b24e2bSVaishali Kulkarni struct ecore_ll2_info;
26714b24e2bSVaishali Kulkarni struct ecore_l2_info;
26814b24e2bSVaishali Kulkarni struct ecore_igu_info;
26914b24e2bSVaishali Kulkarni struct ecore_mcp_info;
27014b24e2bSVaishali Kulkarni struct ecore_dcbx_info;
27114b24e2bSVaishali Kulkarni 
27214b24e2bSVaishali Kulkarni struct ecore_rt_data {
27314b24e2bSVaishali Kulkarni 	u32	*init_val;
27414b24e2bSVaishali Kulkarni 	bool	*b_valid;
27514b24e2bSVaishali Kulkarni };
27614b24e2bSVaishali Kulkarni 
27714b24e2bSVaishali Kulkarni enum ecore_tunn_mode {
27814b24e2bSVaishali Kulkarni 	ECORE_MODE_L2GENEVE_TUNN,
27914b24e2bSVaishali Kulkarni 	ECORE_MODE_IPGENEVE_TUNN,
28014b24e2bSVaishali Kulkarni 	ECORE_MODE_L2GRE_TUNN,
28114b24e2bSVaishali Kulkarni 	ECORE_MODE_IPGRE_TUNN,
28214b24e2bSVaishali Kulkarni 	ECORE_MODE_VXLAN_TUNN,
28314b24e2bSVaishali Kulkarni };
28414b24e2bSVaishali Kulkarni 
28514b24e2bSVaishali Kulkarni enum ecore_tunn_clss {
28614b24e2bSVaishali Kulkarni 	ECORE_TUNN_CLSS_MAC_VLAN,
28714b24e2bSVaishali Kulkarni 	ECORE_TUNN_CLSS_MAC_VNI,
28814b24e2bSVaishali Kulkarni 	ECORE_TUNN_CLSS_INNER_MAC_VLAN,
28914b24e2bSVaishali Kulkarni 	ECORE_TUNN_CLSS_INNER_MAC_VNI,
29014b24e2bSVaishali Kulkarni 	ECORE_TUNN_CLSS_MAC_VLAN_DUAL_STAGE,
29114b24e2bSVaishali Kulkarni 	MAX_ECORE_TUNN_CLSS,
29214b24e2bSVaishali Kulkarni };
29314b24e2bSVaishali Kulkarni 
29414b24e2bSVaishali Kulkarni struct ecore_tunn_update_type {
29514b24e2bSVaishali Kulkarni 	bool b_update_mode;
29614b24e2bSVaishali Kulkarni 	bool b_mode_enabled;
29714b24e2bSVaishali Kulkarni 	enum ecore_tunn_clss tun_cls;
29814b24e2bSVaishali Kulkarni };
29914b24e2bSVaishali Kulkarni 
30014b24e2bSVaishali Kulkarni struct ecore_tunn_update_udp_port {
30114b24e2bSVaishali Kulkarni 	bool b_update_port;
30214b24e2bSVaishali Kulkarni 	u16 port;
30314b24e2bSVaishali Kulkarni };
30414b24e2bSVaishali Kulkarni 
30514b24e2bSVaishali Kulkarni struct ecore_tunnel_info {
30614b24e2bSVaishali Kulkarni 	struct ecore_tunn_update_type vxlan;
30714b24e2bSVaishali Kulkarni 	struct ecore_tunn_update_type l2_geneve;
30814b24e2bSVaishali Kulkarni 	struct ecore_tunn_update_type ip_geneve;
30914b24e2bSVaishali Kulkarni 	struct ecore_tunn_update_type l2_gre;
31014b24e2bSVaishali Kulkarni 	struct ecore_tunn_update_type ip_gre;
31114b24e2bSVaishali Kulkarni 
31214b24e2bSVaishali Kulkarni 	struct ecore_tunn_update_udp_port vxlan_port;
31314b24e2bSVaishali Kulkarni 	struct ecore_tunn_update_udp_port geneve_port;
31414b24e2bSVaishali Kulkarni 
31514b24e2bSVaishali Kulkarni 	bool b_update_rx_cls;
31614b24e2bSVaishali Kulkarni 	bool b_update_tx_cls;
31714b24e2bSVaishali Kulkarni };
31814b24e2bSVaishali Kulkarni 
31914b24e2bSVaishali Kulkarni /* The PCI personality is not quite synonymous to protocol ID:
32014b24e2bSVaishali Kulkarni  * 1. All personalities need CORE connections
32114b24e2bSVaishali Kulkarni  * 2. The Ethernet personality may support also the RoCE/iWARP protocol
32214b24e2bSVaishali Kulkarni  */
32314b24e2bSVaishali Kulkarni enum ecore_pci_personality {
32414b24e2bSVaishali Kulkarni 	ECORE_PCI_ETH,
32514b24e2bSVaishali Kulkarni 	ECORE_PCI_FCOE,
32614b24e2bSVaishali Kulkarni 	ECORE_PCI_ISCSI,
32714b24e2bSVaishali Kulkarni 	ECORE_PCI_ETH_ROCE,
32814b24e2bSVaishali Kulkarni 	ECORE_PCI_ETH_IWARP,
32914b24e2bSVaishali Kulkarni 	ECORE_PCI_ETH_RDMA,
33014b24e2bSVaishali Kulkarni 	ECORE_PCI_DEFAULT /* default in shmem */
33114b24e2bSVaishali Kulkarni };
33214b24e2bSVaishali Kulkarni 
33314b24e2bSVaishali Kulkarni /* All VFs are symetric, all counters are PF + all VFs */
33414b24e2bSVaishali Kulkarni struct ecore_qm_iids {
33514b24e2bSVaishali Kulkarni 	u32 cids;
33614b24e2bSVaishali Kulkarni 	u32 vf_cids;
33714b24e2bSVaishali Kulkarni 	u32 tids;
33814b24e2bSVaishali Kulkarni };
33914b24e2bSVaishali Kulkarni 
34014b24e2bSVaishali Kulkarni #define MAX_PF_PER_PORT 8
34114b24e2bSVaishali Kulkarni 
34214b24e2bSVaishali Kulkarni /* HW / FW resources, output of features supported below, most information
34314b24e2bSVaishali Kulkarni  * is received from MFW.
34414b24e2bSVaishali Kulkarni  */
34514b24e2bSVaishali Kulkarni enum ecore_resources {
34614b24e2bSVaishali Kulkarni 	ECORE_L2_QUEUE,
34714b24e2bSVaishali Kulkarni 	ECORE_VPORT,
34814b24e2bSVaishali Kulkarni 	ECORE_RSS_ENG,
34914b24e2bSVaishali Kulkarni 	ECORE_PQ,
35014b24e2bSVaishali Kulkarni 	ECORE_RL,
35114b24e2bSVaishali Kulkarni 	ECORE_MAC,
35214b24e2bSVaishali Kulkarni 	ECORE_VLAN,
35314b24e2bSVaishali Kulkarni 	ECORE_RDMA_CNQ_RAM,
35414b24e2bSVaishali Kulkarni 	ECORE_ILT,
35514b24e2bSVaishali Kulkarni 	ECORE_LL2_QUEUE,
35614b24e2bSVaishali Kulkarni 	ECORE_CMDQS_CQS,
35714b24e2bSVaishali Kulkarni 	ECORE_RDMA_STATS_QUEUE,
35814b24e2bSVaishali Kulkarni 	ECORE_BDQ,
35914b24e2bSVaishali Kulkarni 
36014b24e2bSVaishali Kulkarni 	/* This is needed only internally for matching against the IGU.
36114b24e2bSVaishali Kulkarni 	 * In case of legacy MFW, would be set to `0'.
36214b24e2bSVaishali Kulkarni 	 */
36314b24e2bSVaishali Kulkarni 	ECORE_SB,
36414b24e2bSVaishali Kulkarni 
36514b24e2bSVaishali Kulkarni 	ECORE_MAX_RESC,
36614b24e2bSVaishali Kulkarni };
36714b24e2bSVaishali Kulkarni 
36814b24e2bSVaishali Kulkarni /* Features that require resources, given as input to the resource management
36914b24e2bSVaishali Kulkarni  * algorithm, the output are the resources above
37014b24e2bSVaishali Kulkarni  */
37114b24e2bSVaishali Kulkarni enum ecore_feature {
37214b24e2bSVaishali Kulkarni 	ECORE_PF_L2_QUE,
37314b24e2bSVaishali Kulkarni 	ECORE_PF_TC,
37414b24e2bSVaishali Kulkarni 	ECORE_VF,
37514b24e2bSVaishali Kulkarni 	ECORE_EXTRA_VF_QUE,
37614b24e2bSVaishali Kulkarni 	ECORE_VMQ,
37714b24e2bSVaishali Kulkarni 	ECORE_RDMA_CNQ,
37814b24e2bSVaishali Kulkarni 	ECORE_ISCSI_CQ,
37914b24e2bSVaishali Kulkarni 	ECORE_FCOE_CQ,
38014b24e2bSVaishali Kulkarni 	ECORE_VF_L2_QUE,
38114b24e2bSVaishali Kulkarni 	ECORE_MAX_FEATURES,
38214b24e2bSVaishali Kulkarni };
38314b24e2bSVaishali Kulkarni 
38414b24e2bSVaishali Kulkarni enum ecore_port_mode {
38514b24e2bSVaishali Kulkarni 	ECORE_PORT_MODE_DE_2X40G,
38614b24e2bSVaishali Kulkarni 	ECORE_PORT_MODE_DE_2X50G,
38714b24e2bSVaishali Kulkarni 	ECORE_PORT_MODE_DE_1X100G,
38814b24e2bSVaishali Kulkarni 	ECORE_PORT_MODE_DE_4X10G_F,
38914b24e2bSVaishali Kulkarni 	ECORE_PORT_MODE_DE_4X10G_E,
39014b24e2bSVaishali Kulkarni 	ECORE_PORT_MODE_DE_4X20G,
39114b24e2bSVaishali Kulkarni 	ECORE_PORT_MODE_DE_1X40G,
39214b24e2bSVaishali Kulkarni 	ECORE_PORT_MODE_DE_2X25G,
39314b24e2bSVaishali Kulkarni 	ECORE_PORT_MODE_DE_1X25G,
39414b24e2bSVaishali Kulkarni 	ECORE_PORT_MODE_DE_4X25G,
39514b24e2bSVaishali Kulkarni 	ECORE_PORT_MODE_DE_2X10G,
39614b24e2bSVaishali Kulkarni };
39714b24e2bSVaishali Kulkarni 
39814b24e2bSVaishali Kulkarni enum ecore_dev_cap {
39914b24e2bSVaishali Kulkarni 	ECORE_DEV_CAP_ETH,
40014b24e2bSVaishali Kulkarni 	ECORE_DEV_CAP_FCOE,
40114b24e2bSVaishali Kulkarni 	ECORE_DEV_CAP_ISCSI,
40214b24e2bSVaishali Kulkarni 	ECORE_DEV_CAP_ROCE,
40314b24e2bSVaishali Kulkarni 	ECORE_DEV_CAP_IWARP
40414b24e2bSVaishali Kulkarni };
40514b24e2bSVaishali Kulkarni 
40614b24e2bSVaishali Kulkarni #ifndef __EXTRACT__LINUX__
40714b24e2bSVaishali Kulkarni enum ecore_hw_err_type {
40814b24e2bSVaishali Kulkarni 	ECORE_HW_ERR_FAN_FAIL,
40914b24e2bSVaishali Kulkarni 	ECORE_HW_ERR_MFW_RESP_FAIL,
41014b24e2bSVaishali Kulkarni 	ECORE_HW_ERR_HW_ATTN,
41114b24e2bSVaishali Kulkarni 	ECORE_HW_ERR_DMAE_FAIL,
41214b24e2bSVaishali Kulkarni 	ECORE_HW_ERR_RAMROD_FAIL,
41314b24e2bSVaishali Kulkarni 	ECORE_HW_ERR_FW_ASSERT,
41414b24e2bSVaishali Kulkarni };
41514b24e2bSVaishali Kulkarni #endif
41614b24e2bSVaishali Kulkarni 
41714b24e2bSVaishali Kulkarni enum ecore_wol_support {
41814b24e2bSVaishali Kulkarni 	ECORE_WOL_SUPPORT_NONE,
41914b24e2bSVaishali Kulkarni 	ECORE_WOL_SUPPORT_PME,
42014b24e2bSVaishali Kulkarni };
42114b24e2bSVaishali Kulkarni 
42214b24e2bSVaishali Kulkarni struct ecore_hw_info {
42314b24e2bSVaishali Kulkarni 	/* PCI personality */
42414b24e2bSVaishali Kulkarni 	enum ecore_pci_personality personality;
42514b24e2bSVaishali Kulkarni #define ECORE_IS_RDMA_PERSONALITY(dev) \
42614b24e2bSVaishali Kulkarni 	((dev)->hw_info.personality == ECORE_PCI_ETH_ROCE || \
42714b24e2bSVaishali Kulkarni 	 (dev)->hw_info.personality == ECORE_PCI_ETH_IWARP || \
42814b24e2bSVaishali Kulkarni 	 (dev)->hw_info.personality == ECORE_PCI_ETH_RDMA)
42914b24e2bSVaishali Kulkarni #define ECORE_IS_ROCE_PERSONALITY(dev) \
43014b24e2bSVaishali Kulkarni 	((dev)->hw_info.personality == ECORE_PCI_ETH_ROCE || \
43114b24e2bSVaishali Kulkarni 	 (dev)->hw_info.personality == ECORE_PCI_ETH_RDMA)
43214b24e2bSVaishali Kulkarni #define ECORE_IS_IWARP_PERSONALITY(dev) \
43314b24e2bSVaishali Kulkarni 	((dev)->hw_info.personality == ECORE_PCI_ETH_IWARP || \
43414b24e2bSVaishali Kulkarni 	 (dev)->hw_info.personality == ECORE_PCI_ETH_RDMA)
43514b24e2bSVaishali Kulkarni #define ECORE_IS_L2_PERSONALITY(dev) \
43614b24e2bSVaishali Kulkarni 	((dev)->hw_info.personality == ECORE_PCI_ETH || \
43714b24e2bSVaishali Kulkarni 	 ECORE_IS_RDMA_PERSONALITY(dev))
43814b24e2bSVaishali Kulkarni #define ECORE_IS_FCOE_PERSONALITY(dev) \
43914b24e2bSVaishali Kulkarni 	((dev)->hw_info.personality == ECORE_PCI_FCOE)
44014b24e2bSVaishali Kulkarni #define ECORE_IS_ISCSI_PERSONALITY(dev) \
44114b24e2bSVaishali Kulkarni 	((dev)->hw_info.personality == ECORE_PCI_ISCSI)
44214b24e2bSVaishali Kulkarni 
44314b24e2bSVaishali Kulkarni 	/* Resource Allocation scheme results */
44414b24e2bSVaishali Kulkarni 	u32 resc_start[ECORE_MAX_RESC];
44514b24e2bSVaishali Kulkarni 	u32 resc_num[ECORE_MAX_RESC];
44614b24e2bSVaishali Kulkarni 	u32 feat_num[ECORE_MAX_FEATURES];
44714b24e2bSVaishali Kulkarni 
44814b24e2bSVaishali Kulkarni 	#define RESC_START(_p_hwfn, resc) ((_p_hwfn)->hw_info.resc_start[resc])
44914b24e2bSVaishali Kulkarni 	#define RESC_NUM(_p_hwfn, resc) ((_p_hwfn)->hw_info.resc_num[resc])
45014b24e2bSVaishali Kulkarni 	#define RESC_END(_p_hwfn, resc) (RESC_START(_p_hwfn, resc) + \
45114b24e2bSVaishali Kulkarni 					 RESC_NUM(_p_hwfn, resc))
45214b24e2bSVaishali Kulkarni 	#define FEAT_NUM(_p_hwfn, resc) ((_p_hwfn)->hw_info.feat_num[resc])
45314b24e2bSVaishali Kulkarni 
45414b24e2bSVaishali Kulkarni 	/* Amount of traffic classes HW supports */
45514b24e2bSVaishali Kulkarni 	u8 num_hw_tc;
45614b24e2bSVaishali Kulkarni 
45714b24e2bSVaishali Kulkarni 	/* Amount of TCs which should be active according to DCBx or upper layer driver configuration */
45814b24e2bSVaishali Kulkarni 	u8 num_active_tc;
45914b24e2bSVaishali Kulkarni 
46014b24e2bSVaishali Kulkarni 	/* The traffic class used by PF for it's offloaded protocol */
46114b24e2bSVaishali Kulkarni 	u8 offload_tc;
46214b24e2bSVaishali Kulkarni 
46314b24e2bSVaishali Kulkarni 	u32 concrete_fid;
46414b24e2bSVaishali Kulkarni 	u16 opaque_fid;
46514b24e2bSVaishali Kulkarni 	u16 ovlan;
46614b24e2bSVaishali Kulkarni 	u32 part_num[4];
46714b24e2bSVaishali Kulkarni 
46814b24e2bSVaishali Kulkarni #define ETH_ALEN 6 /* @@@ TBD - define somewhere else for Windows */
46914b24e2bSVaishali Kulkarni 	unsigned char hw_mac_addr[ETH_ALEN];
47014b24e2bSVaishali Kulkarni 
47114b24e2bSVaishali Kulkarni 	u16 num_iscsi_conns;
47214b24e2bSVaishali Kulkarni 	u16 num_fcoe_conns;
47314b24e2bSVaishali Kulkarni 
47414b24e2bSVaishali Kulkarni 	struct ecore_igu_info *p_igu_info;
47514b24e2bSVaishali Kulkarni 	/* Sriov */
47614b24e2bSVaishali Kulkarni 	u8 max_chains_per_vf;
47714b24e2bSVaishali Kulkarni 
47814b24e2bSVaishali Kulkarni 	u32 port_mode;
47914b24e2bSVaishali Kulkarni 	u32	hw_mode;
48014b24e2bSVaishali Kulkarni 	unsigned long device_capabilities;
48114b24e2bSVaishali Kulkarni 
48214b24e2bSVaishali Kulkarni 	/* Default DCBX mode */
48314b24e2bSVaishali Kulkarni 	u8 dcbx_mode;
48414b24e2bSVaishali Kulkarni 
48514b24e2bSVaishali Kulkarni 	u16 mtu;
48614b24e2bSVaishali Kulkarni 
48714b24e2bSVaishali Kulkarni 	enum ecore_wol_support		b_wol_support;
48814b24e2bSVaishali Kulkarni };
48914b24e2bSVaishali Kulkarni 
49014b24e2bSVaishali Kulkarni /* maximun size of read/write commands (HW limit) */
49114b24e2bSVaishali Kulkarni #define DMAE_MAX_RW_SIZE	0x2000
49214b24e2bSVaishali Kulkarni 
49314b24e2bSVaishali Kulkarni struct ecore_dmae_info {
49414b24e2bSVaishali Kulkarni 	/* Mutex for synchronizing access to functions */
49514b24e2bSVaishali Kulkarni 	osal_mutex_t	mutex;
49614b24e2bSVaishali Kulkarni 
49714b24e2bSVaishali Kulkarni 	u8 channel;
49814b24e2bSVaishali Kulkarni 
49914b24e2bSVaishali Kulkarni 	dma_addr_t completion_word_phys_addr;
50014b24e2bSVaishali Kulkarni 
50114b24e2bSVaishali Kulkarni 	/* The memory location where the DMAE writes the completion
50214b24e2bSVaishali Kulkarni 	 * value when an operation is finished on this context.
50314b24e2bSVaishali Kulkarni 	 */
50414b24e2bSVaishali Kulkarni 	u32 *p_completion_word;
50514b24e2bSVaishali Kulkarni 
50614b24e2bSVaishali Kulkarni 	dma_addr_t intermediate_buffer_phys_addr;
50714b24e2bSVaishali Kulkarni 
50814b24e2bSVaishali Kulkarni 	/* An intermediate buffer for DMAE operations that use virtual
50914b24e2bSVaishali Kulkarni 	 * addresses - data is DMA'd to/from this buffer and then
51014b24e2bSVaishali Kulkarni 	 * memcpy'd to/from the virtual address
51114b24e2bSVaishali Kulkarni 	 */
51214b24e2bSVaishali Kulkarni 	u32 *p_intermediate_buffer;
51314b24e2bSVaishali Kulkarni 
51414b24e2bSVaishali Kulkarni 	dma_addr_t dmae_cmd_phys_addr;
51514b24e2bSVaishali Kulkarni 	struct dmae_cmd *p_dmae_cmd;
51614b24e2bSVaishali Kulkarni };
51714b24e2bSVaishali Kulkarni 
51814b24e2bSVaishali Kulkarni struct ecore_wfq_data {
51914b24e2bSVaishali Kulkarni 	u32 default_min_speed; /* When wfq feature is not configured */
52014b24e2bSVaishali Kulkarni 	u32 min_speed; /* when feature is configured for any 1 vport */
52114b24e2bSVaishali Kulkarni 	bool configured;
52214b24e2bSVaishali Kulkarni };
52314b24e2bSVaishali Kulkarni 
52414b24e2bSVaishali Kulkarni struct ecore_qm_info {
52514b24e2bSVaishali Kulkarni 	struct init_qm_pq_params    *qm_pq_params;
52614b24e2bSVaishali Kulkarni 	struct init_qm_vport_params *qm_vport_params;
52714b24e2bSVaishali Kulkarni 	struct init_qm_port_params  *qm_port_params;
52814b24e2bSVaishali Kulkarni 	u16			start_pq;
52914b24e2bSVaishali Kulkarni 	u8			start_vport;
53014b24e2bSVaishali Kulkarni 	u16			pure_lb_pq;
53114b24e2bSVaishali Kulkarni 	u16			offload_pq;
53214b24e2bSVaishali Kulkarni 	u16			low_latency_pq;
53314b24e2bSVaishali Kulkarni 	u16			pure_ack_pq;
53414b24e2bSVaishali Kulkarni 	u16			ooo_pq;
53514b24e2bSVaishali Kulkarni 	u16			first_vf_pq;
53614b24e2bSVaishali Kulkarni 	u16			first_mcos_pq;
53714b24e2bSVaishali Kulkarni 	u16			first_rl_pq;
53814b24e2bSVaishali Kulkarni 	u16			num_pqs;
53914b24e2bSVaishali Kulkarni 	u16			num_vf_pqs;
54014b24e2bSVaishali Kulkarni 	u8			num_vports;
54114b24e2bSVaishali Kulkarni 	u8			max_phys_tcs_per_port;
54214b24e2bSVaishali Kulkarni 	u8			ooo_tc;
54314b24e2bSVaishali Kulkarni 	bool			pf_rl_en;
54414b24e2bSVaishali Kulkarni 	bool			pf_wfq_en;
54514b24e2bSVaishali Kulkarni 	bool			vport_rl_en;
54614b24e2bSVaishali Kulkarni 	bool			vport_wfq_en;
54714b24e2bSVaishali Kulkarni 	u8			pf_wfq;
54814b24e2bSVaishali Kulkarni 	u32			pf_rl;
54914b24e2bSVaishali Kulkarni 	struct ecore_wfq_data	*wfq_data;
55014b24e2bSVaishali Kulkarni 	u8			num_pf_rls;
55114b24e2bSVaishali Kulkarni };
55214b24e2bSVaishali Kulkarni 
55314b24e2bSVaishali Kulkarni struct storm_stats {
55414b24e2bSVaishali Kulkarni 	u32 address;
55514b24e2bSVaishali Kulkarni 	u32 len;
55614b24e2bSVaishali Kulkarni };
55714b24e2bSVaishali Kulkarni 
55814b24e2bSVaishali Kulkarni struct ecore_fw_data {
55914b24e2bSVaishali Kulkarni #ifdef CONFIG_ECORE_BINARY_FW
56014b24e2bSVaishali Kulkarni 	struct fw_ver_info *fw_ver_info;
56114b24e2bSVaishali Kulkarni #endif
56214b24e2bSVaishali Kulkarni 	const u8 *modes_tree_buf;
56314b24e2bSVaishali Kulkarni 	union init_op *init_ops;
56414b24e2bSVaishali Kulkarni 	const u32 *arr_data;
56514b24e2bSVaishali Kulkarni 	u32 init_ops_size;
56614b24e2bSVaishali Kulkarni };
56714b24e2bSVaishali Kulkarni 
56814b24e2bSVaishali Kulkarni struct ecore_hwfn {
56914b24e2bSVaishali Kulkarni 	struct ecore_dev		*p_dev;
57014b24e2bSVaishali Kulkarni 	u8				my_id;		/* ID inside the PF */
57114b24e2bSVaishali Kulkarni #define IS_LEAD_HWFN(edev)		(!((edev)->my_id))
57214b24e2bSVaishali Kulkarni 	u8				rel_pf_id;	/* Relative to engine*/
57314b24e2bSVaishali Kulkarni 	u8				abs_pf_id;
57414b24e2bSVaishali Kulkarni 	#define ECORE_PATH_ID(_p_hwfn) \
57514b24e2bSVaishali Kulkarni 		(ECORE_IS_K2((_p_hwfn)->p_dev) ? 0 : ((_p_hwfn)->abs_pf_id & 1))
57614b24e2bSVaishali Kulkarni 	u8				port_id;
57714b24e2bSVaishali Kulkarni 	bool				b_active;
57814b24e2bSVaishali Kulkarni 
57914b24e2bSVaishali Kulkarni 	u32				dp_module;
58014b24e2bSVaishali Kulkarni 	u8				dp_level;
58114b24e2bSVaishali Kulkarni 	char				name[NAME_SIZE];
58214b24e2bSVaishali Kulkarni 	void				*dp_ctx;
58314b24e2bSVaishali Kulkarni 
58414b24e2bSVaishali Kulkarni 	bool				first_on_engine;
58514b24e2bSVaishali Kulkarni 	bool				hw_init_done;
58614b24e2bSVaishali Kulkarni 
58714b24e2bSVaishali Kulkarni 	u8				num_funcs_on_engine;
58814b24e2bSVaishali Kulkarni 	u8				enabled_func_idx;
58914b24e2bSVaishali Kulkarni 
59014b24e2bSVaishali Kulkarni 	/* BAR access */
59114b24e2bSVaishali Kulkarni 	void OSAL_IOMEM			*regview;
59214b24e2bSVaishali Kulkarni 	void OSAL_IOMEM			*doorbells;
59314b24e2bSVaishali Kulkarni 	u64				db_phys_addr;
59414b24e2bSVaishali Kulkarni 	unsigned long			db_size;
59514b24e2bSVaishali Kulkarni 
59614b24e2bSVaishali Kulkarni 	/* PTT pool */
59714b24e2bSVaishali Kulkarni 	struct ecore_ptt_pool		*p_ptt_pool;
59814b24e2bSVaishali Kulkarni 
59914b24e2bSVaishali Kulkarni 	/* HW info */
60014b24e2bSVaishali Kulkarni 	struct ecore_hw_info		hw_info;
60114b24e2bSVaishali Kulkarni 
60214b24e2bSVaishali Kulkarni 	/* rt_array (for init-tool) */
60314b24e2bSVaishali Kulkarni 	struct ecore_rt_data		rt_data;
60414b24e2bSVaishali Kulkarni 
60514b24e2bSVaishali Kulkarni 	/* SPQ */
60614b24e2bSVaishali Kulkarni 	struct ecore_spq		*p_spq;
60714b24e2bSVaishali Kulkarni 
60814b24e2bSVaishali Kulkarni 	/* EQ */
60914b24e2bSVaishali Kulkarni 	struct ecore_eq			*p_eq;
61014b24e2bSVaishali Kulkarni 
61114b24e2bSVaishali Kulkarni 	/* Consolidate Q*/
61214b24e2bSVaishali Kulkarni 	struct ecore_consq		*p_consq;
61314b24e2bSVaishali Kulkarni 
61414b24e2bSVaishali Kulkarni 	/* Slow-Path definitions */
61514b24e2bSVaishali Kulkarni 	osal_dpc_t			sp_dpc;
61614b24e2bSVaishali Kulkarni 	bool				b_sp_dpc_enabled;
61714b24e2bSVaishali Kulkarni 
61814b24e2bSVaishali Kulkarni 	struct ecore_ptt		*p_main_ptt;
61914b24e2bSVaishali Kulkarni 	struct ecore_ptt		*p_dpc_ptt;
62014b24e2bSVaishali Kulkarni 
62114b24e2bSVaishali Kulkarni 	struct ecore_sb_sp_info		*p_sp_sb;
62214b24e2bSVaishali Kulkarni 	struct ecore_sb_attn_info	*p_sb_attn;
62314b24e2bSVaishali Kulkarni 
62414b24e2bSVaishali Kulkarni 	/* Protocol related */
62514b24e2bSVaishali Kulkarni 	bool				using_ll2;
62614b24e2bSVaishali Kulkarni 	struct ecore_ll2_info		*p_ll2_info;
62714b24e2bSVaishali Kulkarni 	struct ecore_ooo_info		*p_ooo_info;
62814b24e2bSVaishali Kulkarni 	struct ecore_iscsi_info		*p_iscsi_info;
62914b24e2bSVaishali Kulkarni 	struct ecore_fcoe_info		*p_fcoe_info;
63014b24e2bSVaishali Kulkarni 	struct ecore_rdma_info		*p_rdma_info;
63114b24e2bSVaishali Kulkarni 	struct ecore_pf_params		pf_params;
63214b24e2bSVaishali Kulkarni 
63314b24e2bSVaishali Kulkarni 	bool				b_rdma_enabled_in_prs;
63414b24e2bSVaishali Kulkarni 	u32				rdma_prs_search_reg;
63514b24e2bSVaishali Kulkarni 
63614b24e2bSVaishali Kulkarni 	struct ecore_cxt_mngr		*p_cxt_mngr;
63714b24e2bSVaishali Kulkarni 
63814b24e2bSVaishali Kulkarni 	/* Flag indicating whether interrupts are enabled or not*/
63914b24e2bSVaishali Kulkarni 	bool				b_int_enabled;
64014b24e2bSVaishali Kulkarni 	bool				b_int_requested;
64114b24e2bSVaishali Kulkarni 
64214b24e2bSVaishali Kulkarni 	/* True if the driver requests for the link */
64314b24e2bSVaishali Kulkarni 	bool				b_drv_link_init;
64414b24e2bSVaishali Kulkarni 
64514b24e2bSVaishali Kulkarni 	struct ecore_vf_iov		*vf_iov_info;
64614b24e2bSVaishali Kulkarni 	struct ecore_pf_iov		*pf_iov_info;
64714b24e2bSVaishali Kulkarni 	struct ecore_mcp_info		*mcp_info;
64814b24e2bSVaishali Kulkarni 	struct ecore_dcbx_info		*p_dcbx_info;
64914b24e2bSVaishali Kulkarni 
65014b24e2bSVaishali Kulkarni 	struct ecore_dmae_info		dmae_info;
65114b24e2bSVaishali Kulkarni 
65214b24e2bSVaishali Kulkarni 	/* QM init */
65314b24e2bSVaishali Kulkarni 	struct ecore_qm_info		qm_info;
65414b24e2bSVaishali Kulkarni 
65514b24e2bSVaishali Kulkarni 	/* Buffer for unzipping firmware data */
65614b24e2bSVaishali Kulkarni #ifdef CONFIG_ECORE_ZIPPED_FW
65714b24e2bSVaishali Kulkarni 	void *unzip_buf;
65814b24e2bSVaishali Kulkarni #endif
65914b24e2bSVaishali Kulkarni 
66014b24e2bSVaishali Kulkarni 	struct dbg_tools_data		dbg_info;
66114b24e2bSVaishali Kulkarni 
66214b24e2bSVaishali Kulkarni 	/* PWM region specific data */
66314b24e2bSVaishali Kulkarni 	u16				wid_count;
66414b24e2bSVaishali Kulkarni 	u32				dpi_size;
66514b24e2bSVaishali Kulkarni 	u32				dpi_count;
66614b24e2bSVaishali Kulkarni 	u32				dpi_start_offset; /* this is used to
66714b24e2bSVaishali Kulkarni 							   * calculate th
66814b24e2bSVaishali Kulkarni 							   * doorbell address
66914b24e2bSVaishali Kulkarni 							   */
67014b24e2bSVaishali Kulkarni 
67114b24e2bSVaishali Kulkarni 	/* If one of the following is set then EDPM shouldn't be used */
67214b24e2bSVaishali Kulkarni 	u8				dcbx_no_edpm;
67314b24e2bSVaishali Kulkarni 	u8				db_bar_no_edpm;
67414b24e2bSVaishali Kulkarni 
67514b24e2bSVaishali Kulkarni 	/* L2-related */
67614b24e2bSVaishali Kulkarni 	struct ecore_l2_info		*p_l2_info;
67714b24e2bSVaishali Kulkarni };
67814b24e2bSVaishali Kulkarni 
67914b24e2bSVaishali Kulkarni #ifndef __EXTRACT__LINUX__
68014b24e2bSVaishali Kulkarni enum ecore_mf_mode {
68114b24e2bSVaishali Kulkarni 	ECORE_MF_DEFAULT,
68214b24e2bSVaishali Kulkarni 	ECORE_MF_OVLAN,
68314b24e2bSVaishali Kulkarni 	ECORE_MF_NPAR,
68414b24e2bSVaishali Kulkarni };
68514b24e2bSVaishali Kulkarni #endif
68614b24e2bSVaishali Kulkarni 
68714b24e2bSVaishali Kulkarni #ifndef __EXTRACT__LINUX__
68814b24e2bSVaishali Kulkarni enum ecore_dev_type {
68914b24e2bSVaishali Kulkarni 	ECORE_DEV_TYPE_BB,
69014b24e2bSVaishali Kulkarni 	ECORE_DEV_TYPE_AH,
69114b24e2bSVaishali Kulkarni 	ECORE_DEV_TYPE_E5,
69214b24e2bSVaishali Kulkarni };
69314b24e2bSVaishali Kulkarni #endif
69414b24e2bSVaishali Kulkarni 
69514b24e2bSVaishali Kulkarni struct ecore_dev {
69614b24e2bSVaishali Kulkarni 	u32				dp_module;
69714b24e2bSVaishali Kulkarni 	u8				dp_level;
69814b24e2bSVaishali Kulkarni 	char				name[NAME_SIZE];
69914b24e2bSVaishali Kulkarni 	void				*dp_ctx;
70014b24e2bSVaishali Kulkarni 
70114b24e2bSVaishali Kulkarni 	enum ecore_dev_type		type;
70214b24e2bSVaishali Kulkarni /* Translate type/revision combo into the proper conditions */
70314b24e2bSVaishali Kulkarni #define ECORE_IS_BB(dev)	((dev)->type == ECORE_DEV_TYPE_BB)
70414b24e2bSVaishali Kulkarni #define ECORE_IS_BB_A0(dev)	(ECORE_IS_BB(dev) && CHIP_REV_IS_A0(dev))
70514b24e2bSVaishali Kulkarni #ifndef ASIC_ONLY
70614b24e2bSVaishali Kulkarni #define ECORE_IS_BB_B0(dev)	((ECORE_IS_BB(dev) && CHIP_REV_IS_B0(dev)) || \
70714b24e2bSVaishali Kulkarni 				 (CHIP_REV_IS_TEDIBEAR(dev)))
70814b24e2bSVaishali Kulkarni #else
70914b24e2bSVaishali Kulkarni #define ECORE_IS_BB_B0(dev)	(ECORE_IS_BB(dev) && CHIP_REV_IS_B0(dev))
71014b24e2bSVaishali Kulkarni #endif
71114b24e2bSVaishali Kulkarni #define ECORE_IS_AH(dev)	((dev)->type == ECORE_DEV_TYPE_AH)
71214b24e2bSVaishali Kulkarni #define ECORE_IS_K2(dev)	ECORE_IS_AH(dev)
71314b24e2bSVaishali Kulkarni 
71414b24e2bSVaishali Kulkarni #define ECORE_IS_E5(dev)	false
71514b24e2bSVaishali Kulkarni 
71614b24e2bSVaishali Kulkarni #define ECORE_E5_MISSING_CODE	OSAL_BUILD_BUG_ON(false)
71714b24e2bSVaishali Kulkarni 
71814b24e2bSVaishali Kulkarni 	u16 vendor_id;
71914b24e2bSVaishali Kulkarni 	u16 device_id;
72014b24e2bSVaishali Kulkarni #define ECORE_DEV_ID_MASK	0xff00
72114b24e2bSVaishali Kulkarni #define ECORE_DEV_ID_MASK_BB	0x1600
72214b24e2bSVaishali Kulkarni #define ECORE_DEV_ID_MASK_AH	0x8000
72314b24e2bSVaishali Kulkarni 
72414b24e2bSVaishali Kulkarni 	u16				chip_num;
72514b24e2bSVaishali Kulkarni 	#define CHIP_NUM_MASK			0xffff
72614b24e2bSVaishali Kulkarni 	#define CHIP_NUM_SHIFT			16
72714b24e2bSVaishali Kulkarni 
72814b24e2bSVaishali Kulkarni 	u16				chip_rev;
72914b24e2bSVaishali Kulkarni 	#define CHIP_REV_MASK			0xf
73014b24e2bSVaishali Kulkarni 	#define CHIP_REV_SHIFT			12
73114b24e2bSVaishali Kulkarni #ifndef ASIC_ONLY
73214b24e2bSVaishali Kulkarni 	#define CHIP_REV_IS_TEDIBEAR(_p_dev) ((_p_dev)->chip_rev == 0x5)
73314b24e2bSVaishali Kulkarni 	#define CHIP_REV_IS_EMUL_A0(_p_dev) ((_p_dev)->chip_rev == 0xe)
73414b24e2bSVaishali Kulkarni 	#define CHIP_REV_IS_EMUL_B0(_p_dev) ((_p_dev)->chip_rev == 0xc)
73514b24e2bSVaishali Kulkarni 	#define CHIP_REV_IS_EMUL(_p_dev) (CHIP_REV_IS_EMUL_A0(_p_dev) || \
73614b24e2bSVaishali Kulkarni 					  CHIP_REV_IS_EMUL_B0(_p_dev))
73714b24e2bSVaishali Kulkarni 	#define CHIP_REV_IS_FPGA_A0(_p_dev) ((_p_dev)->chip_rev == 0xf)
73814b24e2bSVaishali Kulkarni 	#define CHIP_REV_IS_FPGA_B0(_p_dev) ((_p_dev)->chip_rev == 0xd)
73914b24e2bSVaishali Kulkarni 	#define CHIP_REV_IS_FPGA(_p_dev) (CHIP_REV_IS_FPGA_A0(_p_dev) || \
74014b24e2bSVaishali Kulkarni 					  CHIP_REV_IS_FPGA_B0(_p_dev))
74114b24e2bSVaishali Kulkarni 	#define CHIP_REV_IS_SLOW(_p_dev) \
74214b24e2bSVaishali Kulkarni 		(CHIP_REV_IS_EMUL(_p_dev) || CHIP_REV_IS_FPGA(_p_dev))
74314b24e2bSVaishali Kulkarni 	#define CHIP_REV_IS_A0(_p_dev) \
74414b24e2bSVaishali Kulkarni 		(CHIP_REV_IS_EMUL_A0(_p_dev) || \
74514b24e2bSVaishali Kulkarni 		 CHIP_REV_IS_FPGA_A0(_p_dev) || \
74614b24e2bSVaishali Kulkarni 		 !(_p_dev)->chip_rev)
74714b24e2bSVaishali Kulkarni 	#define CHIP_REV_IS_B0(_p_dev) \
74814b24e2bSVaishali Kulkarni 		(CHIP_REV_IS_EMUL_B0(_p_dev) || \
74914b24e2bSVaishali Kulkarni 		 CHIP_REV_IS_FPGA_B0(_p_dev) || \
75014b24e2bSVaishali Kulkarni 		 (_p_dev)->chip_rev == 1)
75114b24e2bSVaishali Kulkarni 	#define CHIP_REV_IS_ASIC(_p_dev) !CHIP_REV_IS_SLOW(_p_dev)
75214b24e2bSVaishali Kulkarni #else
75314b24e2bSVaishali Kulkarni 	#define CHIP_REV_IS_A0(_p_dev)	(!(_p_dev)->chip_rev)
75414b24e2bSVaishali Kulkarni 	#define CHIP_REV_IS_B0(_p_dev)	((_p_dev)->chip_rev == 1)
75514b24e2bSVaishali Kulkarni #endif
75614b24e2bSVaishali Kulkarni 
75714b24e2bSVaishali Kulkarni 	u16				chip_metal;
75814b24e2bSVaishali Kulkarni 	#define CHIP_METAL_MASK			0xff
75914b24e2bSVaishali Kulkarni 	#define CHIP_METAL_SHIFT		4
76014b24e2bSVaishali Kulkarni 
76114b24e2bSVaishali Kulkarni 	u16				chip_bond_id;
76214b24e2bSVaishali Kulkarni 	#define CHIP_BOND_ID_MASK		0xf
76314b24e2bSVaishali Kulkarni 	#define CHIP_BOND_ID_SHIFT		0
76414b24e2bSVaishali Kulkarni 
76514b24e2bSVaishali Kulkarni 	u8				num_engines;
76614b24e2bSVaishali Kulkarni 	u8				num_ports_in_engine;
76714b24e2bSVaishali Kulkarni 	u8				num_funcs_in_port;
76814b24e2bSVaishali Kulkarni 
76914b24e2bSVaishali Kulkarni 	u8				path_id;
77014b24e2bSVaishali Kulkarni 	enum ecore_mf_mode		mf_mode;
77114b24e2bSVaishali Kulkarni 	#define IS_MF_DEFAULT(_p_hwfn)	(((_p_hwfn)->p_dev)->mf_mode == ECORE_MF_DEFAULT)
77214b24e2bSVaishali Kulkarni 	#define IS_MF_SI(_p_hwfn)	(((_p_hwfn)->p_dev)->mf_mode == ECORE_MF_NPAR)
77314b24e2bSVaishali Kulkarni 	#define IS_MF_SD(_p_hwfn)	(((_p_hwfn)->p_dev)->mf_mode == ECORE_MF_OVLAN)
77414b24e2bSVaishali Kulkarni 
77514b24e2bSVaishali Kulkarni 	int				pcie_width;
77614b24e2bSVaishali Kulkarni 	int				pcie_speed;
77714b24e2bSVaishali Kulkarni 
77814b24e2bSVaishali Kulkarni 	/* Add MF related configuration */
77914b24e2bSVaishali Kulkarni 	u8				mcp_rev;
78014b24e2bSVaishali Kulkarni 	u8				boot_mode;
78114b24e2bSVaishali Kulkarni 
78214b24e2bSVaishali Kulkarni 	/* WoL related configurations */
78314b24e2bSVaishali Kulkarni 	u8				wol_config;
78414b24e2bSVaishali Kulkarni 	u8				wol_mac[ETH_ALEN];
78514b24e2bSVaishali Kulkarni 
78614b24e2bSVaishali Kulkarni 	u32				int_mode;
78714b24e2bSVaishali Kulkarni 	enum ecore_coalescing_mode	int_coalescing_mode;
78814b24e2bSVaishali Kulkarni 	u16				rx_coalesce_usecs;
78914b24e2bSVaishali Kulkarni 	u16				tx_coalesce_usecs;
79014b24e2bSVaishali Kulkarni 
79114b24e2bSVaishali Kulkarni 	/* Start Bar offset of first hwfn */
79214b24e2bSVaishali Kulkarni 	void OSAL_IOMEM			*regview;
793