1 /* 2 * This file and its contents are supplied under the terms of the 3 * Common Development and Distribution License ("CDDL"), version 1.0. 4 * You may only use this file in accordance with the terms of version 5 * 1.0 of the CDDL. 6 * 7 * A full copy of the text of the CDDL should have accompanied this 8 * source. A copy of the CDDL is also available via the Internet at 9 * http://www.illumos.org/license/CDDL. 10 */ 11 12 /* 13 * Copyright (c) 2020, the University of Queensland 14 * Copyright 2020 RackTop Systems, Inc. 15 */ 16 17 /* 18 * Mellanox Connect-X 4/5/6 driver. 19 */ 20 21 #include <sys/modctl.h> 22 #include <sys/conf.h> 23 #include <sys/devops.h> 24 #include <sys/sysmacros.h> 25 #include <sys/vlan.h> 26 27 #include <sys/pattr.h> 28 #include <sys/dlpi.h> 29 30 #include <sys/mac_provider.h> 31 32 /* Need these for mac_vlan_header_info() */ 33 #include <sys/mac_client.h> 34 #include <sys/mac_client_priv.h> 35 36 #include <mlxcx.h> 37 38 static char *mlxcx_priv_props[] = { 39 NULL 40 }; 41 42 #define MBITS 1000000ULL 43 #define GBITS (1000ULL * MBITS) 44 45 static uint64_t 46 mlxcx_speed_to_bits(mlxcx_eth_proto_t v) 47 { 48 switch (v) { 49 case MLXCX_PROTO_SGMII_100BASE: 50 return (100ULL * MBITS); 51 case MLXCX_PROTO_SGMII: 52 case MLXCX_PROTO_1000BASE_KX: 53 return (1000ULL * MBITS); 54 case MLXCX_PROTO_10GBASE_CX4: 55 case MLXCX_PROTO_10GBASE_KX4: 56 case MLXCX_PROTO_10GBASE_KR: 57 case MLXCX_PROTO_10GBASE_CR: 58 case MLXCX_PROTO_10GBASE_SR: 59 case MLXCX_PROTO_10GBASE_ER_LR: 60 return (10ULL * GBITS); 61 case MLXCX_PROTO_40GBASE_CR4: 62 case MLXCX_PROTO_40GBASE_KR4: 63 case MLXCX_PROTO_40GBASE_SR4: 64 case MLXCX_PROTO_40GBASE_LR4_ER4: 65 return (40ULL * GBITS); 66 case MLXCX_PROTO_25GBASE_CR: 67 case MLXCX_PROTO_25GBASE_KR: 68 case MLXCX_PROTO_25GBASE_SR: 69 return (25ULL * GBITS); 70 case MLXCX_PROTO_50GBASE_SR2: 71 case MLXCX_PROTO_50GBASE_CR2: 72 case MLXCX_PROTO_50GBASE_KR2: 73 return (50ULL * GBITS); 74 case MLXCX_PROTO_100GBASE_CR4: 75 case MLXCX_PROTO_100GBASE_SR4: 76 case MLXCX_PROTO_100GBASE_KR4: 77 return (100ULL * GBITS); 78 default: 79 return (0); 80 } 81 } 82 83 static int 84 mlxcx_mac_stat_rfc_2863(mlxcx_t *mlxp, mlxcx_port_t *port, uint_t stat, 85 uint64_t *val) 86 { 87 int ret = 0; 88 boolean_t ok; 89 mlxcx_register_data_t data; 90 mlxcx_ppcnt_rfc_2863_t *st; 91 92 ASSERT(mutex_owned(&port->mlp_mtx)); 93 94 bzero(&data, sizeof (data)); 95 data.mlrd_ppcnt.mlrd_ppcnt_local_port = port->mlp_num + 1; 96 data.mlrd_ppcnt.mlrd_ppcnt_grp = MLXCX_PPCNT_GRP_RFC_2863; 97 data.mlrd_ppcnt.mlrd_ppcnt_clear = MLXCX_PPCNT_NO_CLEAR; 98 99 ok = mlxcx_cmd_access_register(mlxp, MLXCX_CMD_ACCESS_REGISTER_READ, 100 MLXCX_REG_PPCNT, &data); 101 if (!ok) 102 return (EIO); 103 st = &data.mlrd_ppcnt.mlrd_ppcnt_rfc_2863; 104 105 switch (stat) { 106 case MAC_STAT_RBYTES: 107 *val = from_be64(st->mlppc_rfc_2863_in_octets); 108 break; 109 case MAC_STAT_MULTIRCV: 110 *val = from_be64(st->mlppc_rfc_2863_in_mcast_pkts); 111 break; 112 case MAC_STAT_BRDCSTRCV: 113 *val = from_be64(st->mlppc_rfc_2863_in_bcast_pkts); 114 break; 115 case MAC_STAT_MULTIXMT: 116 *val = from_be64(st->mlppc_rfc_2863_out_mcast_pkts); 117 break; 118 case MAC_STAT_BRDCSTXMT: 119 *val = from_be64(st->mlppc_rfc_2863_out_bcast_pkts); 120 break; 121 case MAC_STAT_IERRORS: 122 *val = from_be64(st->mlppc_rfc_2863_in_errors); 123 break; 124 case MAC_STAT_UNKNOWNS: 125 *val = from_be64(st->mlppc_rfc_2863_in_unknown_protos); 126 break; 127 case MAC_STAT_OERRORS: 128 *val = from_be64(st->mlppc_rfc_2863_out_errors); 129 break; 130 case MAC_STAT_OBYTES: 131 *val = from_be64(st->mlppc_rfc_2863_out_octets); 132 break; 133 default: 134 ret = ENOTSUP; 135 } 136 137 return (ret); 138 } 139 140 static int 141 mlxcx_mac_stat_ieee_802_3(mlxcx_t *mlxp, mlxcx_port_t *port, uint_t stat, 142 uint64_t *val) 143 { 144 int ret = 0; 145 boolean_t ok; 146 mlxcx_register_data_t data; 147 mlxcx_ppcnt_ieee_802_3_t *st; 148 149 ASSERT(mutex_owned(&port->mlp_mtx)); 150 151 bzero(&data, sizeof (data)); 152 data.mlrd_ppcnt.mlrd_ppcnt_local_port = port->mlp_num + 1; 153 data.mlrd_ppcnt.mlrd_ppcnt_grp = MLXCX_PPCNT_GRP_IEEE_802_3; 154 data.mlrd_ppcnt.mlrd_ppcnt_clear = MLXCX_PPCNT_NO_CLEAR; 155 156 ok = mlxcx_cmd_access_register(mlxp, MLXCX_CMD_ACCESS_REGISTER_READ, 157 MLXCX_REG_PPCNT, &data); 158 if (!ok) 159 return (EIO); 160 st = &data.mlrd_ppcnt.mlrd_ppcnt_ieee_802_3; 161 162 switch (stat) { 163 case MAC_STAT_IPACKETS: 164 *val = from_be64(st->mlppc_ieee_802_3_frames_rx); 165 break; 166 case MAC_STAT_OPACKETS: 167 *val = from_be64(st->mlppc_ieee_802_3_frames_tx); 168 break; 169 case ETHER_STAT_ALIGN_ERRORS: 170 *val = from_be64(st->mlppc_ieee_802_3_align_err); 171 break; 172 case ETHER_STAT_FCS_ERRORS: 173 *val = from_be64(st->mlppc_ieee_802_3_fcs_err); 174 break; 175 case ETHER_STAT_TOOLONG_ERRORS: 176 *val = from_be64(st->mlppc_ieee_802_3_frame_too_long_err); 177 break; 178 default: 179 ret = ENOTSUP; 180 } 181 182 return (ret); 183 } 184 185 static int 186 mlxcx_mac_stat(void *arg, uint_t stat, uint64_t *val) 187 { 188 mlxcx_t *mlxp = (mlxcx_t *)arg; 189 mlxcx_port_t *port = &mlxp->mlx_ports[0]; 190 int ret = 0; 191 192 mutex_enter(&port->mlp_mtx); 193 194 switch (stat) { 195 case MAC_STAT_IFSPEED: 196 *val = mlxcx_speed_to_bits(port->mlp_oper_proto); 197 break; 198 case ETHER_STAT_LINK_DUPLEX: 199 *val = LINK_DUPLEX_FULL; 200 break; 201 case MAC_STAT_RBYTES: 202 case MAC_STAT_MULTIRCV: 203 case MAC_STAT_BRDCSTRCV: 204 case MAC_STAT_MULTIXMT: 205 case MAC_STAT_BRDCSTXMT: 206 case MAC_STAT_IERRORS: 207 case MAC_STAT_UNKNOWNS: 208 case MAC_STAT_OERRORS: 209 case MAC_STAT_OBYTES: 210 ret = mlxcx_mac_stat_rfc_2863(mlxp, port, stat, val); 211 break; 212 case MAC_STAT_IPACKETS: 213 case MAC_STAT_OPACKETS: 214 case ETHER_STAT_ALIGN_ERRORS: 215 case ETHER_STAT_FCS_ERRORS: 216 case ETHER_STAT_TOOLONG_ERRORS: 217 ret = mlxcx_mac_stat_ieee_802_3(mlxp, port, stat, val); 218 break; 219 case MAC_STAT_NORCVBUF: 220 *val = port->mlp_stats.mlps_rx_drops; 221 break; 222 default: 223 ret = ENOTSUP; 224 } 225 226 mutex_exit(&port->mlp_mtx); 227 228 return (ret); 229 } 230 231 static int 232 mlxcx_mac_led_set(void *arg, mac_led_mode_t mode, uint_t flags) 233 { 234 mlxcx_t *mlxp = arg; 235 mlxcx_port_t *port = &mlxp->mlx_ports[0]; 236 int ret = 0; 237 238 if (flags != 0) { 239 return (EINVAL); 240 } 241 242 mutex_enter(&port->mlp_mtx); 243 244 switch (mode) { 245 case MAC_LED_DEFAULT: 246 case MAC_LED_OFF: 247 if (!mlxcx_cmd_set_port_led(mlxp, port, 0)) { 248 ret = EIO; 249 break; 250 } 251 break; 252 case MAC_LED_IDENT: 253 if (!mlxcx_cmd_set_port_led(mlxp, port, UINT16_MAX)) { 254 ret = EIO; 255 break; 256 } 257 break; 258 default: 259 ret = ENOTSUP; 260 } 261 262 mutex_exit(&port->mlp_mtx); 263 264 return (ret); 265 } 266 267 static int 268 mlxcx_mac_txr_info(void *arg, uint_t id, mac_transceiver_info_t *infop) 269 { 270 mlxcx_t *mlxp = arg; 271 mlxcx_module_status_t st; 272 273 if (!mlxcx_cmd_query_module_status(mlxp, id, &st, NULL)) 274 return (EIO); 275 276 if (st != MLXCX_MODULE_UNPLUGGED) 277 mac_transceiver_info_set_present(infop, B_TRUE); 278 279 if (st == MLXCX_MODULE_PLUGGED) 280 mac_transceiver_info_set_usable(infop, B_TRUE); 281 282 return (0); 283 } 284 285 static int 286 mlxcx_mac_txr_read(void *arg, uint_t id, uint_t page, void *vbuf, 287 size_t nbytes, off_t offset, size_t *nread) 288 { 289 mlxcx_t *mlxp = arg; 290 mlxcx_register_data_t data; 291 uint8_t *buf = vbuf; 292 boolean_t ok; 293 size_t take, done = 0; 294 uint8_t i2c_addr; 295 296 if (id != 0 || vbuf == NULL || nbytes == 0 || nread == NULL) 297 return (EINVAL); 298 299 if (nbytes > 256 || offset >= 256 || (offset + nbytes > 256)) 300 return (EINVAL); 301 302 /* 303 * The PRM is really not very clear about any of this, but it seems 304 * that the i2c_device_addr field in MCIA is the SFP+ spec "page" 305 * number shifted right by 1 bit. They're written in the SFF spec 306 * like "1010000X" so Mellanox just dropped the X. 307 * 308 * This means that if we want page 0xA0, we put 0x50 in the 309 * i2c_device_addr field. 310 * 311 * The "page_number" field in MCIA means something else. Don't ask me 312 * what. FreeBSD leaves it as zero, so we will too! 313 */ 314 i2c_addr = page >> 1; 315 316 while (done < nbytes) { 317 take = nbytes - done; 318 if (take > sizeof (data.mlrd_mcia.mlrd_mcia_data)) 319 take = sizeof (data.mlrd_mcia.mlrd_mcia_data); 320 321 bzero(&data, sizeof (data)); 322 ASSERT3U(id, <=, 0xff); 323 data.mlrd_mcia.mlrd_mcia_module = (uint8_t)id; 324 data.mlrd_mcia.mlrd_mcia_i2c_device_addr = i2c_addr; 325 data.mlrd_mcia.mlrd_mcia_device_addr = to_be16(offset); 326 data.mlrd_mcia.mlrd_mcia_size = to_be16(take); 327 328 ok = mlxcx_cmd_access_register(mlxp, 329 MLXCX_CMD_ACCESS_REGISTER_READ, MLXCX_REG_MCIA, &data); 330 if (!ok) { 331 *nread = 0; 332 return (EIO); 333 } 334 335 if (data.mlrd_mcia.mlrd_mcia_status != MLXCX_MCIA_STATUS_OK) { 336 *nread = 0; 337 return (EIO); 338 } 339 340 bcopy(data.mlrd_mcia.mlrd_mcia_data, &buf[done], take); 341 342 done += take; 343 offset += take; 344 } 345 *nread = done; 346 return (0); 347 } 348 349 static int 350 mlxcx_mac_ring_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val) 351 { 352 mlxcx_work_queue_t *wq = (mlxcx_work_queue_t *)rh; 353 (void) wq; 354 355 /* 356 * We should add support for using hw flow counters and such to 357 * get per-ring statistics. Not done yet though! 358 */ 359 360 switch (stat) { 361 default: 362 *val = 0; 363 return (ENOTSUP); 364 } 365 366 return (0); 367 } 368 369 static int 370 mlxcx_mac_start(void *arg) 371 { 372 mlxcx_t *mlxp = (mlxcx_t *)arg; 373 (void) mlxp; 374 return (0); 375 } 376 377 static void 378 mlxcx_mac_stop(void *arg) 379 { 380 mlxcx_t *mlxp = (mlxcx_t *)arg; 381 (void) mlxp; 382 } 383 384 static mblk_t * 385 mlxcx_mac_ring_tx(void *arg, mblk_t *mp) 386 { 387 mlxcx_work_queue_t *sq = (mlxcx_work_queue_t *)arg; 388 mlxcx_t *mlxp = sq->mlwq_mlx; 389 mlxcx_completion_queue_t *cq; 390 mlxcx_buffer_t *b; 391 mac_header_info_t mhi; 392 mblk_t *kmp, *nmp; 393 uint8_t inline_hdrs[MLXCX_MAX_INLINE_HEADERLEN]; 394 size_t inline_hdrlen, rem, off; 395 uint32_t chkflags = 0; 396 boolean_t ok; 397 size_t take = 0; 398 uint_t bcount; 399 400 VERIFY(mp->b_next == NULL); 401 402 mac_hcksum_get(mp, NULL, NULL, NULL, NULL, &chkflags); 403 404 if (mac_vlan_header_info(mlxp->mlx_mac_hdl, mp, &mhi) != 0) { 405 /* 406 * We got given a frame without a valid L2 header on it. We 407 * can't really transmit that (mlx parts don't like it), so 408 * we will just drop it on the floor. 409 */ 410 freemsg(mp); 411 return (NULL); 412 } 413 414 inline_hdrlen = rem = mhi.mhi_hdrsize; 415 416 kmp = mp; 417 off = 0; 418 while (rem > 0) { 419 const ptrdiff_t sz = MBLKL(kmp); 420 ASSERT3S(sz, >=, 0); 421 ASSERT3U(sz, <=, SIZE_MAX); 422 take = sz; 423 if (take > rem) 424 take = rem; 425 bcopy(kmp->b_rptr, inline_hdrs + off, take); 426 rem -= take; 427 off += take; 428 if (take == sz) { 429 take = 0; 430 kmp = kmp->b_cont; 431 } 432 } 433 434 bcount = mlxcx_buf_bind_or_copy(mlxp, sq, kmp, take, &b); 435 if (bcount == 0) { 436 atomic_or_uint(&sq->mlwq_state, MLXCX_WQ_BLOCKED_MAC); 437 return (mp); 438 } 439 440 mutex_enter(&sq->mlwq_mtx); 441 VERIFY3U(sq->mlwq_inline_mode, <=, MLXCX_ETH_INLINE_L2); 442 cq = sq->mlwq_cq; 443 444 /* 445 * state is a single int, so read-only access without the CQ lock 446 * should be fine. 447 */ 448 if (cq->mlcq_state & MLXCX_CQ_TEARDOWN) { 449 mutex_exit(&sq->mlwq_mtx); 450 mlxcx_buf_return_chain(mlxp, b, B_FALSE); 451 return (NULL); 452 } 453 454 if (sq->mlwq_state & MLXCX_WQ_TEARDOWN) { 455 mutex_exit(&sq->mlwq_mtx); 456 mlxcx_buf_return_chain(mlxp, b, B_FALSE); 457 return (NULL); 458 } 459 460 /* 461 * If the completion queue buffer count is already at or above 462 * the high water mark, or the addition of this new chain will 463 * exceed the CQ ring size, then indicate we are blocked. 464 */ 465 if (cq->mlcq_bufcnt >= cq->mlcq_bufhwm || 466 (cq->mlcq_bufcnt + bcount) > cq->mlcq_nents) { 467 atomic_or_uint(&cq->mlcq_state, MLXCX_CQ_BLOCKED_MAC); 468 goto blocked; 469 } 470 471 if (sq->mlwq_wqebb_used >= sq->mlwq_bufhwm) { 472 atomic_or_uint(&sq->mlwq_state, MLXCX_WQ_BLOCKED_MAC); 473 goto blocked; 474 } 475 476 ok = mlxcx_sq_add_buffer(mlxp, sq, inline_hdrs, inline_hdrlen, 477 chkflags, b); 478 if (!ok) { 479 atomic_or_uint(&cq->mlcq_state, MLXCX_CQ_BLOCKED_MAC); 480 atomic_or_uint(&sq->mlwq_state, MLXCX_WQ_BLOCKED_MAC); 481 goto blocked; 482 } 483 484 /* 485 * Now that we've successfully enqueued the rest of the packet, 486 * free any mblks that we cut off while inlining headers. 487 */ 488 for (; mp != kmp; mp = nmp) { 489 nmp = mp->b_cont; 490 freeb(mp); 491 } 492 493 mutex_exit(&sq->mlwq_mtx); 494 495 return (NULL); 496 497 blocked: 498 mutex_exit(&sq->mlwq_mtx); 499 mlxcx_buf_return_chain(mlxp, b, B_TRUE); 500 return (mp); 501 } 502 503 static int 504 mlxcx_mac_setpromisc(void *arg, boolean_t on) 505 { 506 mlxcx_t *mlxp = (mlxcx_t *)arg; 507 mlxcx_port_t *port = &mlxp->mlx_ports[0]; 508 mlxcx_flow_group_t *fg; 509 mlxcx_flow_entry_t *fe; 510 mlxcx_flow_table_t *ft; 511 mlxcx_ring_group_t *g; 512 int ret = 0; 513 uint_t idx; 514 515 mutex_enter(&port->mlp_mtx); 516 517 /* 518 * First, do the top-level flow entry on the root flow table for 519 * the port. This catches all traffic that doesn't match any MAC 520 * MAC filters. 521 */ 522 ft = port->mlp_rx_flow; 523 mutex_enter(&ft->mlft_mtx); 524 fg = port->mlp_promisc; 525 fe = list_head(&fg->mlfg_entries); 526 if (on && !(fe->mlfe_state & MLXCX_FLOW_ENTRY_CREATED)) { 527 if (!mlxcx_cmd_set_flow_table_entry(mlxp, fe)) { 528 ret = EIO; 529 } 530 } else if (!on && (fe->mlfe_state & MLXCX_FLOW_ENTRY_CREATED)) { 531 if (!mlxcx_cmd_delete_flow_table_entry(mlxp, fe)) { 532 ret = EIO; 533 } 534 } 535 mutex_exit(&ft->mlft_mtx); 536 537 /* 538 * If we failed to change the top-level entry, don't bother with 539 * trying the per-group ones. 540 */ 541 if (ret != 0) { 542 mutex_exit(&port->mlp_mtx); 543 return (ret); 544 } 545 546 /* 547 * Then, do the per-rx-group flow entries which catch traffic that 548 * matched a MAC filter but failed to match a VLAN filter. 549 */ 550 for (idx = 0; idx < mlxp->mlx_rx_ngroups; ++idx) { 551 g = &mlxp->mlx_rx_groups[idx]; 552 553 mutex_enter(&g->mlg_mtx); 554 555 ft = g->mlg_rx_vlan_ft; 556 mutex_enter(&ft->mlft_mtx); 557 558 fg = g->mlg_rx_vlan_promisc_fg; 559 fe = list_head(&fg->mlfg_entries); 560 if (on && !(fe->mlfe_state & MLXCX_FLOW_ENTRY_CREATED)) { 561 if (!mlxcx_cmd_set_flow_table_entry(mlxp, fe)) { 562 ret = EIO; 563 } 564 } else if (!on && (fe->mlfe_state & MLXCX_FLOW_ENTRY_CREATED)) { 565 if (!mlxcx_cmd_delete_flow_table_entry(mlxp, fe)) { 566 ret = EIO; 567 } 568 } 569 570 mutex_exit(&ft->mlft_mtx); 571 mutex_exit(&g->mlg_mtx); 572 } 573 574 mutex_exit(&port->mlp_mtx); 575 return (ret); 576 } 577 578 static int 579 mlxcx_mac_multicast(void *arg, boolean_t add, const uint8_t *addr) 580 { 581 mlxcx_t *mlxp = (mlxcx_t *)arg; 582 mlxcx_port_t *port = &mlxp->mlx_ports[0]; 583 mlxcx_ring_group_t *g = &mlxp->mlx_rx_groups[0]; 584 int ret = 0; 585 586 mutex_enter(&port->mlp_mtx); 587 mutex_enter(&g->mlg_mtx); 588 if (add) { 589 if (!mlxcx_add_umcast_entry(mlxp, port, g, addr)) { 590 ret = EIO; 591 } 592 } else { 593 if (!mlxcx_remove_umcast_entry(mlxp, port, g, addr)) { 594 ret = EIO; 595 } 596 } 597 mutex_exit(&g->mlg_mtx); 598 mutex_exit(&port->mlp_mtx); 599 return (ret); 600 } 601 602 static int 603 mlxcx_group_add_mac(void *arg, const uint8_t *mac_addr) 604 { 605 mlxcx_ring_group_t *g = arg; 606 mlxcx_t *mlxp = g->mlg_mlx; 607 mlxcx_port_t *port = g->mlg_port; 608 int ret = 0; 609 610 mutex_enter(&port->mlp_mtx); 611 mutex_enter(&g->mlg_mtx); 612 if (!mlxcx_add_umcast_entry(mlxp, port, g, mac_addr)) { 613 ret = EIO; 614 } 615 mutex_exit(&g->mlg_mtx); 616 mutex_exit(&port->mlp_mtx); 617 618 return (ret); 619 } 620 621 /* 622 * Support for VLAN steering into groups is not yet available in upstream 623 * illumos. 624 */ 625 #if defined(MAC_VLAN_UNTAGGED) 626 627 static int 628 mlxcx_group_add_vlan(mac_group_driver_t gh, uint16_t vid) 629 { 630 mlxcx_ring_group_t *g = (mlxcx_ring_group_t *)gh; 631 mlxcx_t *mlxp = g->mlg_mlx; 632 int ret = 0; 633 boolean_t tagged = B_TRUE; 634 635 if (vid == MAC_VLAN_UNTAGGED) { 636 vid = 0; 637 tagged = B_FALSE; 638 } 639 640 mutex_enter(&g->mlg_mtx); 641 if (!mlxcx_add_vlan_entry(mlxp, g, tagged, vid)) { 642 ret = EIO; 643 } 644 mutex_exit(&g->mlg_mtx); 645 646 return (ret); 647 } 648 649 static int 650 mlxcx_group_remove_vlan(mac_group_driver_t gh, uint16_t vid) 651 { 652 mlxcx_ring_group_t *g = (mlxcx_ring_group_t *)gh; 653 mlxcx_t *mlxp = g->mlg_mlx; 654 int ret = 0; 655 boolean_t tagged = B_TRUE; 656 657 if (vid == MAC_VLAN_UNTAGGED) { 658 vid = 0; 659 tagged = B_FALSE; 660 } 661 662 mutex_enter(&g->mlg_mtx); 663 if (!mlxcx_remove_vlan_entry(mlxp, g, tagged, vid)) { 664 ret = EIO; 665 } 666 mutex_exit(&g->mlg_mtx); 667 668 return (ret); 669 } 670 671 #endif /* MAC_VLAN_UNTAGGED */ 672 673 static int 674 mlxcx_group_remove_mac(void *arg, const uint8_t *mac_addr) 675 { 676 mlxcx_ring_group_t *g = arg; 677 mlxcx_t *mlxp = g->mlg_mlx; 678 mlxcx_port_t *port = g->mlg_port; 679 int ret = 0; 680 681 mutex_enter(&port->mlp_mtx); 682 mutex_enter(&g->mlg_mtx); 683 if (!mlxcx_remove_umcast_entry(mlxp, port, g, mac_addr)) { 684 ret = EIO; 685 } 686 mutex_exit(&g->mlg_mtx); 687 mutex_exit(&port->mlp_mtx); 688 689 return (ret); 690 } 691 692 static int 693 mlxcx_mac_ring_start(mac_ring_driver_t rh, uint64_t gen_num) 694 { 695 mlxcx_work_queue_t *wq = (mlxcx_work_queue_t *)rh; 696 mlxcx_completion_queue_t *cq = wq->mlwq_cq; 697 mlxcx_ring_group_t *g = wq->mlwq_group; 698 mlxcx_t *mlxp = wq->mlwq_mlx; 699 700 ASSERT(cq != NULL); 701 ASSERT(g != NULL); 702 703 ASSERT(wq->mlwq_type == MLXCX_WQ_TYPE_SENDQ || 704 wq->mlwq_type == MLXCX_WQ_TYPE_RECVQ); 705 if (wq->mlwq_type == MLXCX_WQ_TYPE_SENDQ && 706 !mlxcx_tx_ring_start(mlxp, g, wq)) 707 return (EIO); 708 if (wq->mlwq_type == MLXCX_WQ_TYPE_RECVQ && 709 !mlxcx_rx_ring_start(mlxp, g, wq)) 710 return (EIO); 711 712 mutex_enter(&cq->mlcq_mtx); 713 cq->mlcq_mac_gen = gen_num; 714 mutex_exit(&cq->mlcq_mtx); 715 716 return (0); 717 } 718 719 static void 720 mlxcx_mac_ring_stop(mac_ring_driver_t rh) 721 { 722 mlxcx_work_queue_t *wq = (mlxcx_work_queue_t *)rh; 723 mlxcx_completion_queue_t *cq = wq->mlwq_cq; 724 mlxcx_t *mlxp = wq->mlwq_mlx; 725 mlxcx_buf_shard_t *s; 726 mlxcx_buffer_t *buf; 727 728 mutex_enter(&cq->mlcq_mtx); 729 mutex_enter(&wq->mlwq_mtx); 730 if (wq->mlwq_state & MLXCX_WQ_STARTED) { 731 if (wq->mlwq_type == MLXCX_WQ_TYPE_RECVQ && 732 !mlxcx_cmd_stop_rq(mlxp, wq)) { 733 mutex_exit(&wq->mlwq_mtx); 734 mutex_exit(&cq->mlcq_mtx); 735 return; 736 } 737 if (wq->mlwq_type == MLXCX_WQ_TYPE_SENDQ && 738 !mlxcx_cmd_stop_sq(mlxp, wq)) { 739 mutex_exit(&wq->mlwq_mtx); 740 mutex_exit(&cq->mlcq_mtx); 741 return; 742 } 743 } 744 ASSERT0(wq->mlwq_state & MLXCX_WQ_STARTED); 745 746 if (wq->mlwq_state & MLXCX_WQ_BUFFERS) { 747 /* Return any outstanding buffers to the free pool. */ 748 while ((buf = list_remove_head(&cq->mlcq_buffers)) != NULL) { 749 mlxcx_buf_return_chain(mlxp, buf, B_FALSE); 750 } 751 mutex_enter(&cq->mlcq_bufbmtx); 752 while ((buf = list_remove_head(&cq->mlcq_buffers_b)) != NULL) { 753 mlxcx_buf_return_chain(mlxp, buf, B_FALSE); 754 } 755 mutex_exit(&cq->mlcq_bufbmtx); 756 cq->mlcq_bufcnt = 0; 757 758 s = wq->mlwq_bufs; 759 mutex_enter(&s->mlbs_mtx); 760 while (!list_is_empty(&s->mlbs_busy)) 761 cv_wait(&s->mlbs_free_nonempty, &s->mlbs_mtx); 762 while ((buf = list_head(&s->mlbs_free)) != NULL) { 763 mlxcx_buf_destroy(mlxp, buf); 764 } 765 mutex_exit(&s->mlbs_mtx); 766 767 s = wq->mlwq_foreign_bufs; 768 if (s != NULL) { 769 mutex_enter(&s->mlbs_mtx); 770 while (!list_is_empty(&s->mlbs_busy)) 771 cv_wait(&s->mlbs_free_nonempty, &s->mlbs_mtx); 772 while ((buf = list_head(&s->mlbs_free)) != NULL) { 773 mlxcx_buf_destroy(mlxp, buf); 774 } 775 mutex_exit(&s->mlbs_mtx); 776 } 777 778 wq->mlwq_state &= ~MLXCX_WQ_BUFFERS; 779 } 780 ASSERT0(wq->mlwq_state & MLXCX_WQ_BUFFERS); 781 782 mutex_exit(&wq->mlwq_mtx); 783 mutex_exit(&cq->mlcq_mtx); 784 } 785 786 static int 787 mlxcx_mac_group_start(mac_group_driver_t gh) 788 { 789 mlxcx_ring_group_t *g = (mlxcx_ring_group_t *)gh; 790 mlxcx_t *mlxp = g->mlg_mlx; 791 792 VERIFY3S(g->mlg_type, ==, MLXCX_GROUP_RX); 793 ASSERT(mlxp != NULL); 794 795 if (g->mlg_state & MLXCX_GROUP_RUNNING) 796 return (0); 797 798 if (!mlxcx_rx_group_start(mlxp, g)) 799 return (EIO); 800 801 return (0); 802 } 803 804 static void 805 mlxcx_mac_fill_tx_ring(void *arg, mac_ring_type_t rtype, const int group_index, 806 const int ring_index, mac_ring_info_t *infop, mac_ring_handle_t rh) 807 { 808 mlxcx_t *mlxp = (mlxcx_t *)arg; 809 mlxcx_ring_group_t *g; 810 mlxcx_work_queue_t *wq; 811 mac_intr_t *mintr = &infop->mri_intr; 812 813 if (rtype != MAC_RING_TYPE_TX) 814 return; 815 ASSERT3S(group_index, ==, -1); 816 817 g = &mlxp->mlx_tx_groups[0]; 818 ASSERT(g->mlg_state & MLXCX_GROUP_INIT); 819 mutex_enter(&g->mlg_mtx); 820 821 ASSERT3S(ring_index, >=, 0); 822 ASSERT3S(ring_index, <, g->mlg_nwqs); 823 824 wq = &g->mlg_wqs[ring_index]; 825 826 wq->mlwq_cq->mlcq_mac_hdl = rh; 827 828 infop->mri_driver = (mac_ring_driver_t)wq; 829 infop->mri_start = mlxcx_mac_ring_start; 830 infop->mri_stop = mlxcx_mac_ring_stop; 831 infop->mri_tx = mlxcx_mac_ring_tx; 832 infop->mri_stat = mlxcx_mac_ring_stat; 833 834 mintr->mi_ddi_handle = mlxp->mlx_intr_handles[ 835 wq->mlwq_cq->mlcq_eq->mleq_intr_index]; 836 837 mutex_exit(&g->mlg_mtx); 838 } 839 840 static int 841 mlxcx_mac_ring_intr_enable(mac_intr_handle_t intrh) 842 { 843 mlxcx_completion_queue_t *cq = (mlxcx_completion_queue_t *)intrh; 844 mlxcx_event_queue_t *eq = cq->mlcq_eq; 845 mlxcx_t *mlxp = cq->mlcq_mlx; 846 847 /* 848 * We are going to call mlxcx_arm_cq() here, so we take the EQ lock 849 * as well as the CQ one to make sure we don't race against 850 * mlxcx_intr_n(). 851 */ 852 mutex_enter(&eq->mleq_mtx); 853 mutex_enter(&cq->mlcq_mtx); 854 if (cq->mlcq_state & MLXCX_CQ_POLLING) { 855 cq->mlcq_state &= ~MLXCX_CQ_POLLING; 856 if (!(cq->mlcq_state & MLXCX_CQ_ARMED)) 857 mlxcx_arm_cq(mlxp, cq); 858 } 859 mutex_exit(&cq->mlcq_mtx); 860 mutex_exit(&eq->mleq_mtx); 861 862 return (0); 863 } 864 865 static int 866 mlxcx_mac_ring_intr_disable(mac_intr_handle_t intrh) 867 { 868 mlxcx_completion_queue_t *cq = (mlxcx_completion_queue_t *)intrh; 869 870 mutex_enter(&cq->mlcq_mtx); 871 atomic_or_uint(&cq->mlcq_state, MLXCX_CQ_POLLING); 872 mutex_exit(&cq->mlcq_mtx); 873 874 return (0); 875 } 876 877 static mblk_t * 878 mlxcx_mac_ring_rx_poll(void *arg, int poll_bytes) 879 { 880 mlxcx_work_queue_t *wq = (mlxcx_work_queue_t *)arg; 881 mlxcx_completion_queue_t *cq = wq->mlwq_cq; 882 mlxcx_t *mlxp = wq->mlwq_mlx; 883 mblk_t *mp; 884 885 ASSERT(cq != NULL); 886 ASSERT3S(poll_bytes, >, 0); 887 if (poll_bytes == 0) 888 return (NULL); 889 890 mutex_enter(&cq->mlcq_mtx); 891 mp = mlxcx_rx_poll(mlxp, cq, poll_bytes); 892 mutex_exit(&cq->mlcq_mtx); 893 894 return (mp); 895 } 896 897 static void 898 mlxcx_mac_fill_rx_ring(void *arg, mac_ring_type_t rtype, const int group_index, 899 const int ring_index, mac_ring_info_t *infop, mac_ring_handle_t rh) 900 { 901 mlxcx_t *mlxp = (mlxcx_t *)arg; 902 mlxcx_ring_group_t *g; 903 mlxcx_work_queue_t *wq; 904 mac_intr_t *mintr = &infop->mri_intr; 905 906 if (rtype != MAC_RING_TYPE_RX) 907 return; 908 ASSERT3S(group_index, >=, 0); 909 ASSERT3S(group_index, <, mlxp->mlx_rx_ngroups); 910 911 g = &mlxp->mlx_rx_groups[group_index]; 912 ASSERT(g->mlg_state & MLXCX_GROUP_INIT); 913 mutex_enter(&g->mlg_mtx); 914 915 ASSERT3S(ring_index, >=, 0); 916 ASSERT3S(ring_index, <, g->mlg_nwqs); 917 918 ASSERT(g->mlg_state & MLXCX_GROUP_WQS); 919 wq = &g->mlg_wqs[ring_index]; 920 921 wq->mlwq_cq->mlcq_mac_hdl = rh; 922 923 infop->mri_driver = (mac_ring_driver_t)wq; 924 infop->mri_start = mlxcx_mac_ring_start; 925 infop->mri_stop = mlxcx_mac_ring_stop; 926 infop->mri_poll = mlxcx_mac_ring_rx_poll; 927 infop->mri_stat = mlxcx_mac_ring_stat; 928 929 mintr->mi_handle = (mac_intr_handle_t)wq->mlwq_cq; 930 mintr->mi_enable = mlxcx_mac_ring_intr_enable; 931 mintr->mi_disable = mlxcx_mac_ring_intr_disable; 932 933 mintr->mi_ddi_handle = mlxp->mlx_intr_handles[ 934 wq->mlwq_cq->mlcq_eq->mleq_intr_index]; 935 936 mutex_exit(&g->mlg_mtx); 937 } 938 939 static void 940 mlxcx_mac_fill_rx_group(void *arg, mac_ring_type_t rtype, const int index, 941 mac_group_info_t *infop, mac_group_handle_t gh) 942 { 943 mlxcx_t *mlxp = (mlxcx_t *)arg; 944 mlxcx_ring_group_t *g; 945 946 if (rtype != MAC_RING_TYPE_RX) 947 return; 948 949 ASSERT3S(index, >=, 0); 950 ASSERT3S(index, <, mlxp->mlx_rx_ngroups); 951 g = &mlxp->mlx_rx_groups[index]; 952 ASSERT(g->mlg_state & MLXCX_GROUP_INIT); 953 954 g->mlg_mac_hdl = gh; 955 956 infop->mgi_driver = (mac_group_driver_t)g; 957 infop->mgi_start = mlxcx_mac_group_start; 958 infop->mgi_stop = NULL; 959 infop->mgi_addmac = mlxcx_group_add_mac; 960 infop->mgi_remmac = mlxcx_group_remove_mac; 961 #if defined(MAC_VLAN_UNTAGGED) 962 infop->mgi_addvlan = mlxcx_group_add_vlan; 963 infop->mgi_remvlan = mlxcx_group_remove_vlan; 964 #endif /* MAC_VLAN_UNTAGGED */ 965 966 infop->mgi_count = g->mlg_nwqs; 967 } 968 969 static boolean_t 970 mlxcx_mac_getcapab(void *arg, mac_capab_t cap, void *cap_data) 971 { 972 mlxcx_t *mlxp = (mlxcx_t *)arg; 973 mac_capab_rings_t *cap_rings; 974 mac_capab_led_t *cap_leds; 975 mac_capab_transceiver_t *cap_txr; 976 uint_t i, n = 0; 977 978 switch (cap) { 979 980 case MAC_CAPAB_RINGS: 981 cap_rings = cap_data; 982 cap_rings->mr_group_type = MAC_GROUP_TYPE_STATIC; 983 switch (cap_rings->mr_type) { 984 case MAC_RING_TYPE_TX: 985 cap_rings->mr_gnum = 0; 986 cap_rings->mr_rnum = mlxp->mlx_tx_groups[0].mlg_nwqs; 987 cap_rings->mr_rget = mlxcx_mac_fill_tx_ring; 988 cap_rings->mr_gget = NULL; 989 cap_rings->mr_gaddring = NULL; 990 cap_rings->mr_gremring = NULL; 991 break; 992 case MAC_RING_TYPE_RX: 993 cap_rings->mr_gnum = mlxp->mlx_rx_ngroups; 994 for (i = 0; i < mlxp->mlx_rx_ngroups; ++i) 995 n += mlxp->mlx_rx_groups[i].mlg_nwqs; 996 cap_rings->mr_rnum = n; 997 cap_rings->mr_rget = mlxcx_mac_fill_rx_ring; 998 cap_rings->mr_gget = mlxcx_mac_fill_rx_group; 999 cap_rings->mr_gaddring = NULL; 1000 cap_rings->mr_gremring = NULL; 1001 break; 1002 default: 1003 return (B_FALSE); 1004 } 1005 break; 1006 1007 case MAC_CAPAB_HCKSUM: 1008 if (mlxp->mlx_caps->mlc_checksum) { 1009 *(uint32_t *)cap_data = HCKSUM_INET_FULL_V4 | 1010 HCKSUM_INET_FULL_V6 | HCKSUM_IPHDRCKSUM; 1011 } 1012 break; 1013 1014 case MAC_CAPAB_LED: 1015 cap_leds = cap_data; 1016 1017 cap_leds->mcl_flags = 0; 1018 cap_leds->mcl_modes = MAC_LED_DEFAULT | MAC_LED_OFF | 1019 MAC_LED_IDENT; 1020 cap_leds->mcl_set = mlxcx_mac_led_set; 1021 break; 1022 1023 case MAC_CAPAB_TRANSCEIVER: 1024 cap_txr = cap_data; 1025 1026 cap_txr->mct_flags = 0; 1027 cap_txr->mct_ntransceivers = 1; 1028 cap_txr->mct_info = mlxcx_mac_txr_info; 1029 cap_txr->mct_read = mlxcx_mac_txr_read; 1030 break; 1031 1032 default: 1033 return (B_FALSE); 1034 } 1035 1036 return (B_TRUE); 1037 } 1038 1039 static void 1040 mlxcx_mac_propinfo(void *arg, const char *pr_name, mac_prop_id_t pr_num, 1041 mac_prop_info_handle_t prh) 1042 { 1043 mlxcx_t *mlxp = (mlxcx_t *)arg; 1044 mlxcx_port_t *port = &mlxp->mlx_ports[0]; 1045 1046 mutex_enter(&port->mlp_mtx); 1047 1048 switch (pr_num) { 1049 case MAC_PROP_DUPLEX: 1050 case MAC_PROP_SPEED: 1051 mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ); 1052 break; 1053 case MAC_PROP_MTU: 1054 mac_prop_info_set_perm(prh, MAC_PROP_PERM_RW); 1055 mac_prop_info_set_range_uint32(prh, MLXCX_MTU_OFFSET, 1056 port->mlp_max_mtu); 1057 mac_prop_info_set_default_uint32(prh, 1058 port->mlp_mtu - MLXCX_MTU_OFFSET); 1059 break; 1060 case MAC_PROP_AUTONEG: 1061 mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ); 1062 mac_prop_info_set_default_uint8(prh, 1); 1063 break; 1064 case MAC_PROP_ADV_100GFDX_CAP: 1065 case MAC_PROP_EN_100GFDX_CAP: 1066 mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ); 1067 mac_prop_info_set_default_uint8(prh, 1068 (port->mlp_oper_proto & MLXCX_PROTO_100G) != 0); 1069 break; 1070 case MAC_PROP_ADV_50GFDX_CAP: 1071 case MAC_PROP_EN_50GFDX_CAP: 1072 mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ); 1073 mac_prop_info_set_default_uint8(prh, 1074 (port->mlp_oper_proto & MLXCX_PROTO_50G) != 0); 1075 break; 1076 case MAC_PROP_ADV_40GFDX_CAP: 1077 case MAC_PROP_EN_40GFDX_CAP: 1078 mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ); 1079 mac_prop_info_set_default_uint8(prh, 1080 (port->mlp_oper_proto & MLXCX_PROTO_40G) != 0); 1081 break; 1082 case MAC_PROP_ADV_25GFDX_CAP: 1083 case MAC_PROP_EN_25GFDX_CAP: 1084 mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ); 1085 mac_prop_info_set_default_uint8(prh, 1086 (port->mlp_oper_proto & MLXCX_PROTO_25G) != 0); 1087 break; 1088 case MAC_PROP_ADV_10GFDX_CAP: 1089 case MAC_PROP_EN_10GFDX_CAP: 1090 mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ); 1091 mac_prop_info_set_default_uint8(prh, 1092 (port->mlp_oper_proto & MLXCX_PROTO_10G) != 0); 1093 break; 1094 case MAC_PROP_ADV_1000FDX_CAP: 1095 case MAC_PROP_EN_1000FDX_CAP: 1096 mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ); 1097 mac_prop_info_set_default_uint8(prh, 1098 (port->mlp_oper_proto & MLXCX_PROTO_1G) != 0); 1099 break; 1100 case MAC_PROP_ADV_100FDX_CAP: 1101 case MAC_PROP_EN_100FDX_CAP: 1102 mac_prop_info_set_perm(prh, MAC_PROP_PERM_READ); 1103 mac_prop_info_set_default_uint8(prh, 1104 (port->mlp_oper_proto & MLXCX_PROTO_100M) != 0); 1105 break; 1106 default: 1107 break; 1108 } 1109 1110 mutex_exit(&port->mlp_mtx); 1111 } 1112 1113 static int 1114 mlxcx_mac_setprop(void *arg, const char *pr_name, mac_prop_id_t pr_num, 1115 uint_t pr_valsize, const void *pr_val) 1116 { 1117 mlxcx_t *mlxp = (mlxcx_t *)arg; 1118 mlxcx_port_t *port = &mlxp->mlx_ports[0]; 1119 int ret = 0; 1120 uint32_t new_mtu, new_hw_mtu, old_mtu; 1121 mlxcx_buf_shard_t *sh; 1122 boolean_t allocd = B_FALSE; 1123 1124 mutex_enter(&port->mlp_mtx); 1125 1126 switch (pr_num) { 1127 case MAC_PROP_MTU: 1128 bcopy(pr_val, &new_mtu, sizeof (new_mtu)); 1129 new_hw_mtu = new_mtu + MLXCX_MTU_OFFSET; 1130 if (new_hw_mtu == port->mlp_mtu) 1131 break; 1132 if (new_hw_mtu > port->mlp_max_mtu) { 1133 ret = EINVAL; 1134 break; 1135 } 1136 sh = list_head(&mlxp->mlx_buf_shards); 1137 for (; sh != NULL; sh = list_next(&mlxp->mlx_buf_shards, sh)) { 1138 mutex_enter(&sh->mlbs_mtx); 1139 if (!list_is_empty(&sh->mlbs_free) || 1140 !list_is_empty(&sh->mlbs_busy)) { 1141 allocd = B_TRUE; 1142 mutex_exit(&sh->mlbs_mtx); 1143 break; 1144 } 1145 mutex_exit(&sh->mlbs_mtx); 1146 } 1147 if (allocd) { 1148 ret = EBUSY; 1149 break; 1150 } 1151 old_mtu = port->mlp_mtu; 1152 ret = mac_maxsdu_update(mlxp->mlx_mac_hdl, new_mtu); 1153 if (ret != 0) 1154 break; 1155 port->mlp_mtu = new_hw_mtu; 1156 if (!mlxcx_cmd_modify_nic_vport_ctx(mlxp, port, 1157 MLXCX_MODIFY_NIC_VPORT_CTX_MTU)) { 1158 port->mlp_mtu = old_mtu; 1159 (void) mac_maxsdu_update(mlxp->mlx_mac_hdl, old_mtu); 1160 ret = EIO; 1161 break; 1162 } 1163 if (!mlxcx_cmd_set_port_mtu(mlxp, port)) { 1164 port->mlp_mtu = old_mtu; 1165 (void) mac_maxsdu_update(mlxp->mlx_mac_hdl, old_mtu); 1166 ret = EIO; 1167 break; 1168 } 1169 break; 1170 default: 1171 ret = ENOTSUP; 1172 break; 1173 } 1174 1175 mutex_exit(&port->mlp_mtx); 1176 1177 return (ret); 1178 } 1179 1180 static int 1181 mlxcx_mac_getprop(void *arg, const char *pr_name, mac_prop_id_t pr_num, 1182 uint_t pr_valsize, void *pr_val) 1183 { 1184 mlxcx_t *mlxp = (mlxcx_t *)arg; 1185 mlxcx_port_t *port = &mlxp->mlx_ports[0]; 1186 uint64_t speed; 1187 int ret = 0; 1188 1189 mutex_enter(&port->mlp_mtx); 1190 1191 switch (pr_num) { 1192 case MAC_PROP_DUPLEX: 1193 if (pr_valsize < sizeof (link_duplex_t)) { 1194 ret = EOVERFLOW; 1195 break; 1196 } 1197 /* connectx parts only support full duplex */ 1198 *(link_duplex_t *)pr_val = LINK_DUPLEX_FULL; 1199 break; 1200 case MAC_PROP_SPEED: 1201 if (pr_valsize < sizeof (uint64_t)) { 1202 ret = EOVERFLOW; 1203 break; 1204 } 1205 speed = mlxcx_speed_to_bits(port->mlp_oper_proto); 1206 bcopy(&speed, pr_val, sizeof (speed)); 1207 break; 1208 case MAC_PROP_STATUS: 1209 if (pr_valsize < sizeof (link_state_t)) { 1210 ret = EOVERFLOW; 1211 break; 1212 } 1213 switch (port->mlp_oper_status) { 1214 case MLXCX_PORT_STATUS_UP: 1215 case MLXCX_PORT_STATUS_UP_ONCE: 1216 *(link_state_t *)pr_val = LINK_STATE_UP; 1217 break; 1218 case MLXCX_PORT_STATUS_DOWN: 1219 *(link_state_t *)pr_val = LINK_STATE_DOWN; 1220 break; 1221 default: 1222 *(link_state_t *)pr_val = LINK_STATE_UNKNOWN; 1223 } 1224 break; 1225 case MAC_PROP_AUTONEG: 1226 if (pr_valsize < sizeof (uint8_t)) { 1227 ret = EOVERFLOW; 1228 break; 1229 } 1230 *(uint8_t *)pr_val = port->mlp_autoneg; 1231 break; 1232 case MAC_PROP_MTU: 1233 if (pr_valsize < sizeof (uint32_t)) { 1234 ret = EOVERFLOW; 1235 break; 1236 } 1237 *(uint32_t *)pr_val = port->mlp_mtu - MLXCX_MTU_OFFSET; 1238 break; 1239 case MAC_PROP_ADV_100GFDX_CAP: 1240 case MAC_PROP_EN_100GFDX_CAP: 1241 if (pr_valsize < sizeof (uint8_t)) { 1242 ret = EOVERFLOW; 1243 break; 1244 } 1245 *(uint8_t *)pr_val = (port->mlp_max_proto & 1246 MLXCX_PROTO_100G) != 0; 1247 break; 1248 case MAC_PROP_ADV_50GFDX_CAP: 1249 case MAC_PROP_EN_50GFDX_CAP: 1250 if (pr_valsize < sizeof (uint8_t)) { 1251 ret = EOVERFLOW; 1252 break; 1253 } 1254 *(uint8_t *)pr_val = (port->mlp_max_proto & 1255 MLXCX_PROTO_50G) != 0; 1256 break; 1257 case MAC_PROP_ADV_40GFDX_CAP: 1258 case MAC_PROP_EN_40GFDX_CAP: 1259 if (pr_valsize < sizeof (uint8_t)) { 1260 ret = EOVERFLOW; 1261 break; 1262 } 1263 *(uint8_t *)pr_val = (port->mlp_max_proto & 1264 MLXCX_PROTO_40G) != 0; 1265 break; 1266 case MAC_PROP_ADV_25GFDX_CAP: 1267 case MAC_PROP_EN_25GFDX_CAP: 1268 if (pr_valsize < sizeof (uint8_t)) { 1269 ret = EOVERFLOW; 1270 break; 1271 } 1272 *(uint8_t *)pr_val = (port->mlp_max_proto & 1273 MLXCX_PROTO_25G) != 0; 1274 break; 1275 case MAC_PROP_ADV_10GFDX_CAP: 1276 case MAC_PROP_EN_10GFDX_CAP: 1277 if (pr_valsize < sizeof (uint8_t)) { 1278 ret = EOVERFLOW; 1279 break; 1280 } 1281 *(uint8_t *)pr_val = (port->mlp_max_proto & 1282 MLXCX_PROTO_10G) != 0; 1283 break; 1284 case MAC_PROP_ADV_1000FDX_CAP: 1285 case MAC_PROP_EN_1000FDX_CAP: 1286 if (pr_valsize < sizeof (uint8_t)) { 1287 ret = EOVERFLOW; 1288 break; 1289 } 1290 *(uint8_t *)pr_val = (port->mlp_max_proto & 1291 MLXCX_PROTO_1G) != 0; 1292 break; 1293 case MAC_PROP_ADV_100FDX_CAP: 1294 case MAC_PROP_EN_100FDX_CAP: 1295 if (pr_valsize < sizeof (uint8_t)) { 1296 ret = EOVERFLOW; 1297 break; 1298 } 1299 *(uint8_t *)pr_val = (port->mlp_max_proto & 1300 MLXCX_PROTO_100M) != 0; 1301 break; 1302 default: 1303 ret = ENOTSUP; 1304 break; 1305 } 1306 1307 mutex_exit(&port->mlp_mtx); 1308 1309 return (ret); 1310 } 1311 1312 #define MLXCX_MAC_CALLBACK_FLAGS \ 1313 (MC_GETCAPAB | MC_GETPROP | MC_PROPINFO | MC_SETPROP) 1314 1315 static mac_callbacks_t mlxcx_mac_callbacks = { 1316 .mc_callbacks = MLXCX_MAC_CALLBACK_FLAGS, 1317 .mc_getstat = mlxcx_mac_stat, 1318 .mc_start = mlxcx_mac_start, 1319 .mc_stop = mlxcx_mac_stop, 1320 .mc_setpromisc = mlxcx_mac_setpromisc, 1321 .mc_multicst = mlxcx_mac_multicast, 1322 .mc_ioctl = NULL, 1323 .mc_getcapab = mlxcx_mac_getcapab, 1324 .mc_setprop = mlxcx_mac_setprop, 1325 .mc_getprop = mlxcx_mac_getprop, 1326 .mc_propinfo = mlxcx_mac_propinfo, 1327 .mc_tx = NULL, 1328 .mc_unicst = NULL, 1329 }; 1330 1331 boolean_t 1332 mlxcx_register_mac(mlxcx_t *mlxp) 1333 { 1334 mac_register_t *mac = mac_alloc(MAC_VERSION); 1335 mlxcx_port_t *port; 1336 int ret; 1337 1338 if (mac == NULL) 1339 return (B_FALSE); 1340 1341 VERIFY3U(mlxp->mlx_nports, ==, 1); 1342 port = &mlxp->mlx_ports[0]; 1343 1344 mac->m_type_ident = MAC_PLUGIN_IDENT_ETHER; 1345 mac->m_driver = mlxp; 1346 mac->m_dip = mlxp->mlx_dip; 1347 mac->m_src_addr = port->mlp_mac_address; 1348 mac->m_callbacks = &mlxcx_mac_callbacks; 1349 mac->m_min_sdu = MLXCX_MTU_OFFSET; 1350 mac->m_max_sdu = port->mlp_mtu - MLXCX_MTU_OFFSET; 1351 mac->m_margin = VLAN_TAGSZ; 1352 mac->m_priv_props = mlxcx_priv_props; 1353 mac->m_v12n = MAC_VIRT_LEVEL1; 1354 1355 ret = mac_register(mac, &mlxp->mlx_mac_hdl); 1356 if (ret != 0) { 1357 mlxcx_warn(mlxp, "mac_register() returned %d", ret); 1358 } 1359 mac_free(mac); 1360 1361 mlxcx_update_link_state(mlxp, port); 1362 1363 return (ret == 0); 1364 } 1365