1dc0cb1cdSDale Ghent /****************************************************************************** 2*48ed61a7SRobert Mustacchi SPDX-License-Identifier: BSD-3-Clause 3dc0cb1cdSDale Ghent 4*48ed61a7SRobert Mustacchi Copyright (c) 2001-2017, Intel Corporation 5dc0cb1cdSDale Ghent All rights reserved. 6*48ed61a7SRobert Mustacchi 7*48ed61a7SRobert Mustacchi Redistribution and use in source and binary forms, with or without 8dc0cb1cdSDale Ghent modification, are permitted provided that the following conditions are met: 9*48ed61a7SRobert Mustacchi 10*48ed61a7SRobert Mustacchi 1. Redistributions of source code must retain the above copyright notice, 11dc0cb1cdSDale Ghent this list of conditions and the following disclaimer. 12*48ed61a7SRobert Mustacchi 13*48ed61a7SRobert Mustacchi 2. Redistributions in binary form must reproduce the above copyright 14*48ed61a7SRobert Mustacchi notice, this list of conditions and the following disclaimer in the 15dc0cb1cdSDale Ghent documentation and/or other materials provided with the distribution. 16*48ed61a7SRobert Mustacchi 17*48ed61a7SRobert Mustacchi 3. Neither the name of the Intel Corporation nor the names of its 18*48ed61a7SRobert Mustacchi contributors may be used to endorse or promote products derived from 19dc0cb1cdSDale Ghent this software without specific prior written permission. 20*48ed61a7SRobert Mustacchi 21dc0cb1cdSDale Ghent THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 22*48ed61a7SRobert Mustacchi AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23*48ed61a7SRobert Mustacchi IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24*48ed61a7SRobert Mustacchi ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 25*48ed61a7SRobert Mustacchi LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26*48ed61a7SRobert Mustacchi CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27*48ed61a7SRobert Mustacchi SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28*48ed61a7SRobert Mustacchi INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29*48ed61a7SRobert Mustacchi CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30dc0cb1cdSDale Ghent ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31dc0cb1cdSDale Ghent POSSIBILITY OF SUCH DAMAGE. 32dc0cb1cdSDale Ghent 33dc0cb1cdSDale Ghent ******************************************************************************/ 34dc0cb1cdSDale Ghent /*$FreeBSD$*/ 35dc0cb1cdSDale Ghent 36*48ed61a7SRobert Mustacchi #ifndef _IXGBE_VF_H_ 37*48ed61a7SRobert Mustacchi #define _IXGBE_VF_H_ 38dc0cb1cdSDale Ghent 39dc0cb1cdSDale Ghent #define IXGBE_VF_IRQ_CLEAR_MASK 7 40dc0cb1cdSDale Ghent #define IXGBE_VF_MAX_TX_QUEUES 8 41dc0cb1cdSDale Ghent #define IXGBE_VF_MAX_RX_QUEUES 8 42dc0cb1cdSDale Ghent 43dc0cb1cdSDale Ghent /* DCB define */ 44dc0cb1cdSDale Ghent #define IXGBE_VF_MAX_TRAFFIC_CLASS 8 45dc0cb1cdSDale Ghent 46dc0cb1cdSDale Ghent #define IXGBE_VFCTRL 0x00000 47dc0cb1cdSDale Ghent #define IXGBE_VFSTATUS 0x00008 48dc0cb1cdSDale Ghent #define IXGBE_VFLINKS 0x00010 49dc0cb1cdSDale Ghent #define IXGBE_VFFRTIMER 0x00048 50dc0cb1cdSDale Ghent #define IXGBE_VFRXMEMWRAP 0x03190 51dc0cb1cdSDale Ghent #define IXGBE_VTEICR 0x00100 52dc0cb1cdSDale Ghent #define IXGBE_VTEICS 0x00104 53dc0cb1cdSDale Ghent #define IXGBE_VTEIMS 0x00108 54dc0cb1cdSDale Ghent #define IXGBE_VTEIMC 0x0010C 55dc0cb1cdSDale Ghent #define IXGBE_VTEIAC 0x00110 56dc0cb1cdSDale Ghent #define IXGBE_VTEIAM 0x00114 57dc0cb1cdSDale Ghent #define IXGBE_VTEITR(x) (0x00820 + (4 * (x))) 58dc0cb1cdSDale Ghent #define IXGBE_VTIVAR(x) (0x00120 + (4 * (x))) 59dc0cb1cdSDale Ghent #define IXGBE_VTIVAR_MISC 0x00140 60dc0cb1cdSDale Ghent #define IXGBE_VTRSCINT(x) (0x00180 + (4 * (x))) 61dc0cb1cdSDale Ghent /* define IXGBE_VFPBACL still says TBD in EAS */ 62dc0cb1cdSDale Ghent #define IXGBE_VFRDBAL(x) (0x01000 + (0x40 * (x))) 63dc0cb1cdSDale Ghent #define IXGBE_VFRDBAH(x) (0x01004 + (0x40 * (x))) 64dc0cb1cdSDale Ghent #define IXGBE_VFRDLEN(x) (0x01008 + (0x40 * (x))) 65dc0cb1cdSDale Ghent #define IXGBE_VFRDH(x) (0x01010 + (0x40 * (x))) 66dc0cb1cdSDale Ghent #define IXGBE_VFRDT(x) (0x01018 + (0x40 * (x))) 67dc0cb1cdSDale Ghent #define IXGBE_VFRXDCTL(x) (0x01028 + (0x40 * (x))) 68dc0cb1cdSDale Ghent #define IXGBE_VFSRRCTL(x) (0x01014 + (0x40 * (x))) 69dc0cb1cdSDale Ghent #define IXGBE_VFRSCCTL(x) (0x0102C + (0x40 * (x))) 70dc0cb1cdSDale Ghent #define IXGBE_VFPSRTYPE 0x00300 71dc0cb1cdSDale Ghent #define IXGBE_VFTDBAL(x) (0x02000 + (0x40 * (x))) 72dc0cb1cdSDale Ghent #define IXGBE_VFTDBAH(x) (0x02004 + (0x40 * (x))) 73dc0cb1cdSDale Ghent #define IXGBE_VFTDLEN(x) (0x02008 + (0x40 * (x))) 74dc0cb1cdSDale Ghent #define IXGBE_VFTDH(x) (0x02010 + (0x40 * (x))) 75dc0cb1cdSDale Ghent #define IXGBE_VFTDT(x) (0x02018 + (0x40 * (x))) 76dc0cb1cdSDale Ghent #define IXGBE_VFTXDCTL(x) (0x02028 + (0x40 * (x))) 77dc0cb1cdSDale Ghent #define IXGBE_VFTDWBAL(x) (0x02038 + (0x40 * (x))) 78dc0cb1cdSDale Ghent #define IXGBE_VFTDWBAH(x) (0x0203C + (0x40 * (x))) 79dc0cb1cdSDale Ghent #define IXGBE_VFDCA_RXCTRL(x) (0x0100C + (0x40 * (x))) 80dc0cb1cdSDale Ghent #define IXGBE_VFDCA_TXCTRL(x) (0x0200c + (0x40 * (x))) 81dc0cb1cdSDale Ghent #define IXGBE_VFGPRC 0x0101C 82dc0cb1cdSDale Ghent #define IXGBE_VFGPTC 0x0201C 83dc0cb1cdSDale Ghent #define IXGBE_VFGORC_LSB 0x01020 84dc0cb1cdSDale Ghent #define IXGBE_VFGORC_MSB 0x01024 85dc0cb1cdSDale Ghent #define IXGBE_VFGOTC_LSB 0x02020 86dc0cb1cdSDale Ghent #define IXGBE_VFGOTC_MSB 0x02024 87dc0cb1cdSDale Ghent #define IXGBE_VFMPRC 0x01034 88dc0cb1cdSDale Ghent #define IXGBE_VFMRQC 0x3000 89dc0cb1cdSDale Ghent #define IXGBE_VFRSSRK(x) (0x3100 + ((x) * 4)) 90dc0cb1cdSDale Ghent #define IXGBE_VFRETA(x) (0x3200 + ((x) * 4)) 91dc0cb1cdSDale Ghent 92dc0cb1cdSDale Ghent 93dc0cb1cdSDale Ghent struct ixgbevf_hw_stats { 94dc0cb1cdSDale Ghent u64 base_vfgprc; 95dc0cb1cdSDale Ghent u64 base_vfgptc; 96dc0cb1cdSDale Ghent u64 base_vfgorc; 97dc0cb1cdSDale Ghent u64 base_vfgotc; 98dc0cb1cdSDale Ghent u64 base_vfmprc; 99dc0cb1cdSDale Ghent 100dc0cb1cdSDale Ghent u64 last_vfgprc; 101dc0cb1cdSDale Ghent u64 last_vfgptc; 102dc0cb1cdSDale Ghent u64 last_vfgorc; 103dc0cb1cdSDale Ghent u64 last_vfgotc; 104dc0cb1cdSDale Ghent u64 last_vfmprc; 105dc0cb1cdSDale Ghent 106dc0cb1cdSDale Ghent u64 vfgprc; 107dc0cb1cdSDale Ghent u64 vfgptc; 108dc0cb1cdSDale Ghent u64 vfgorc; 109dc0cb1cdSDale Ghent u64 vfgotc; 110dc0cb1cdSDale Ghent u64 vfmprc; 111dc0cb1cdSDale Ghent 112dc0cb1cdSDale Ghent u64 saved_reset_vfgprc; 113dc0cb1cdSDale Ghent u64 saved_reset_vfgptc; 114dc0cb1cdSDale Ghent u64 saved_reset_vfgorc; 115dc0cb1cdSDale Ghent u64 saved_reset_vfgotc; 116dc0cb1cdSDale Ghent u64 saved_reset_vfmprc; 117dc0cb1cdSDale Ghent }; 118dc0cb1cdSDale Ghent 119*48ed61a7SRobert Mustacchi s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw); 120dc0cb1cdSDale Ghent s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw); 121dc0cb1cdSDale Ghent s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw); 122dc0cb1cdSDale Ghent s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw); 123dc0cb1cdSDale Ghent s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw); 124dc0cb1cdSDale Ghent u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw); 125dc0cb1cdSDale Ghent u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw); 126dc0cb1cdSDale Ghent s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr); 127dc0cb1cdSDale Ghent s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed, 128dc0cb1cdSDale Ghent bool autoneg_wait_to_complete); 129dc0cb1cdSDale Ghent s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed, 130dc0cb1cdSDale Ghent bool *link_up, bool autoneg_wait_to_complete); 131dc0cb1cdSDale Ghent s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq, 132dc0cb1cdSDale Ghent u32 enable_addr); 133dc0cb1cdSDale Ghent s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr); 134dc0cb1cdSDale Ghent s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list, 135dc0cb1cdSDale Ghent u32 mc_addr_count, ixgbe_mc_addr_itr, 136dc0cb1cdSDale Ghent bool clear); 137*48ed61a7SRobert Mustacchi s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode); 138*48ed61a7SRobert Mustacchi s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, 139*48ed61a7SRobert Mustacchi bool vlan_on, bool vlvf_bypass); 140*48ed61a7SRobert Mustacchi s32 ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size); 141dc0cb1cdSDale Ghent int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api); 142dc0cb1cdSDale Ghent int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs, 143dc0cb1cdSDale Ghent unsigned int *default_tc); 144dc0cb1cdSDale Ghent 145dc0cb1cdSDale Ghent #endif /* __IXGBE_VF_H__ */ 146