1 /******************************************************************************
2 
3   Copyright (c) 2001-2015, Intel Corporation
4   All rights reserved.
5 
6   Redistribution and use in source and binary forms, with or without
7   modification, are permitted provided that the following conditions are met:
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10       this list of conditions and the following disclaimer.
11 
12    2. Redistributions in binary form must reproduce the above copyright
13       notice, this list of conditions and the following disclaimer in the
14       documentation and/or other materials provided with the distribution.
15 
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18       this software without specific prior written permission.
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20   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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31 
32 ******************************************************************************/
33 /*$FreeBSD$*/
34 
35 #ifndef _IXGBE_COMMON_H_
36 #define _IXGBE_COMMON_H_
37 
38 #include "ixgbe_type.h"
39 #define IXGBE_WRITE_REG64(hw, reg, value) \
40 	do { \
41 		IXGBE_WRITE_REG(hw, reg, (u32) value); \
42 		IXGBE_WRITE_REG(hw, reg + 4, (u32) (value >> 32)); \
43 	} while (0)
44 #if !defined(NO_READ_PBA_RAW) || !defined(NO_WRITE_PBA_RAW)
45 struct ixgbe_pba {
46 	u16 word[2];
47 	u16 *pba_block;
48 };
49 #endif
50 
51 void ixgbe_dcb_get_rtrup2tc_generic(struct ixgbe_hw *hw, u8 *map);
52 
53 u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw);
54 s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw);
55 s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw);
56 s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw);
57 s32 ixgbe_start_hw_gen2(struct ixgbe_hw *hw);
58 s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw);
59 s32 ixgbe_read_pba_num_generic(struct ixgbe_hw *hw, u32 *pba_num);
60 s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num,
61 				  u32 pba_num_size);
62 s32 ixgbe_read_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf,
63 		       u32 eeprom_buf_size, u16 max_pba_block_size,
64 		       struct ixgbe_pba *pba);
65 s32 ixgbe_write_pba_raw(struct ixgbe_hw *hw, u16 *eeprom_buf,
66 			u32 eeprom_buf_size, struct ixgbe_pba *pba);
67 s32 ixgbe_get_pba_block_size(struct ixgbe_hw *hw, u16 *eeprom_buf,
68 			     u32 eeprom_buf_size, u16 *pba_block_size);
69 s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr);
70 s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw);
71 void ixgbe_set_pci_config_data_generic(struct ixgbe_hw *hw, u16 link_status);
72 void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw);
73 s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw);
74 
75 s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index);
76 s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index);
77 
78 s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw);
79 s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
80 s32 ixgbe_write_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
81 					       u16 words, u16 *data);
82 s32 ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data);
83 s32 ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset,
84 				   u16 words, u16 *data);
85 s32 ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
86 s32 ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset,
87 				    u16 words, u16 *data);
88 s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
89 				       u16 *data);
90 s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
91 					      u16 words, u16 *data);
92 s32 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw);
93 s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw,
94 					   u16 *checksum_val);
95 s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw);
96 s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg);
97 
98 s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
99 			  u32 enable_addr);
100 s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index);
101 s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw);
102 s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw, u8 *mc_addr_list,
103 				      u32 mc_addr_count,
104 				      ixgbe_mc_addr_itr func, bool clear);
105 s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw, u8 *addr_list,
106 				      u32 addr_count, ixgbe_mc_addr_itr func);
107 s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw);
108 s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw);
109 s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval);
110 s32 ixgbe_disable_sec_rx_path_generic(struct ixgbe_hw *hw);
111 s32 ixgbe_enable_sec_rx_path_generic(struct ixgbe_hw *hw);
112 
113 s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw);
114 bool ixgbe_device_supports_autoneg_fc(struct ixgbe_hw *hw);
115 void ixgbe_fc_autoneg(struct ixgbe_hw *hw);
116 s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw);
117 
118 s32 ixgbe_validate_mac_addr(u8 *mac_addr);
119 s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u32 mask);
120 void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u32 mask);
121 s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw);
122 
123 s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *, u32 *reg_val);
124 s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked);
125 
126 s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index);
127 s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index);
128 
129 s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr);
130 s32 ixgbe_set_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr);
131 
132 s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
133 s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq);
134 s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
135 s32 ixgbe_insert_mac_addr_generic(struct ixgbe_hw *hw, u8 *addr, u32 vmdq);
136 s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw);
137 s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan,
138 			 u32 vind, bool vlan_on);
139 s32 ixgbe_set_vlvf_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind,
140 			   bool vlan_on, bool *vfta_changed);
141 s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw);
142 s32 ixgbe_find_vlvf_slot(struct ixgbe_hw *hw, u32 vlan);
143 
144 s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw,
145 			       ixgbe_link_speed *speed,
146 			       bool *link_up, bool link_up_wait_to_complete);
147 
148 s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix,
149 				 u16 *wwpn_prefix);
150 
151 s32 ixgbe_get_fcoe_boot_status_generic(struct ixgbe_hw *hw, u16 *bs);
152 void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int pf);
153 void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf);
154 s32 ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, u16 *device_caps);
155 void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb, u32 headroom,
156 			     int strategy);
157 void ixgbe_enable_relaxed_ordering_gen2(struct ixgbe_hw *hw);
158 s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min,
159 				 u8 build, u8 ver);
160 u8 ixgbe_calculate_checksum(u8 *buffer, u32 length);
161 s32 ixgbe_host_interface_command(struct ixgbe_hw *hw, u32 *buffer,
162 				 u32 length, u32 timeout, bool return_data);
163 
164 void ixgbe_clear_tx_pending(struct ixgbe_hw *hw);
165 
166 extern s32 ixgbe_reset_pipeline_82599(struct ixgbe_hw *hw);
167 extern void ixgbe_stop_mac_link_on_d3_82599(struct ixgbe_hw *hw);
168 bool ixgbe_mng_present(struct ixgbe_hw *hw);
169 bool ixgbe_mng_enabled(struct ixgbe_hw *hw);
170 
171 void ixgbe_disable_rx_generic(struct ixgbe_hw *hw);
172 void ixgbe_enable_rx_generic(struct ixgbe_hw *hw);
173 s32 ixgbe_setup_mac_link_multispeed_fiber(struct ixgbe_hw *hw,
174 					  ixgbe_link_speed speed,
175 					  bool autoneg_wait_to_complete);
176 void ixgbe_set_soft_rate_select_speed(struct ixgbe_hw *hw,
177 				      ixgbe_link_speed speed);
178 #endif /* IXGBE_COMMON */
179