1 /******************************************************************************
2 
3   Copyright (c) 2001-2010, Intel Corporation
4   All rights reserved.
5 
6   Redistribution and use in source and binary forms, with or without
7   modification, are permitted provided that the following conditions are met:
8 
9    1. Redistributions of source code must retain the above copyright notice,
10       this list of conditions and the following disclaimer.
11 
12    2. Redistributions in binary form must reproduce the above copyright
13       notice, this list of conditions and the following disclaimer in the
14       documentation and/or other materials provided with the distribution.
15 
16    3. Neither the name of the Intel Corporation nor the names of its
17       contributors may be used to endorse or promote products derived from
18       this software without specific prior written permission.
19 
20   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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31 
32 ******************************************************************************/
33 
34 #ifndef _IXGBE_API_H_
35 #define _IXGBE_API_H_
36 
37 #include "ixgbe_type.h"
38 
39 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw);
40 
41 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw);
42 s32 ixgbe_init_hw(struct ixgbe_hw *hw);
43 s32 ixgbe_reset_hw(struct ixgbe_hw *hw);
44 s32 ixgbe_start_hw(struct ixgbe_hw *hw);
45 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw);
46 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw);
47 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw);
48 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr);
49 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw);
50 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw);
51 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw);
52 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw);
53 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num);
54 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size);
55 s32 ixgbe_read_pba_length(struct ixgbe_hw *hw, u32 *pba_num_size);
56 
57 s32 ixgbe_identify_phy(struct ixgbe_hw *hw);
58 s32 ixgbe_reset_phy(struct ixgbe_hw *hw);
59 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
60                        u16 *phy_data);
61 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
62                         u16 phy_data);
63 
64 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw);
65 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw,
66                          ixgbe_link_speed *speed,
67                          bool *link_up);
68 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw,
69                                ixgbe_link_speed speed,
70                                bool autoneg,
71                                bool autoneg_wait_to_complete);
72 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw);
73 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw);
74 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw);
75 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
76                            bool autoneg, bool autoneg_wait_to_complete);
77 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
78                      bool *link_up, bool link_up_wait_to_complete);
79 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
80                             bool *autoneg);
81 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index);
82 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index);
83 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index);
84 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index);
85 
86 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw);
87 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data);
88 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data);
89 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val);
90 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw);
91 
92 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq);
93 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
94                   u32 enable_addr);
95 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index);
96 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
97 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
98 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw);
99 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw);
100 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
101                               u32 addr_count, ixgbe_mc_addr_itr func);
102 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
103                               u32 mc_addr_count, ixgbe_mc_addr_itr func);
104 void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr_list, u32 vmdq);
105 s32 ixgbe_enable_mc(struct ixgbe_hw *hw);
106 s32 ixgbe_disable_mc(struct ixgbe_hw *hw);
107 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw);
108 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan,
109                    u32 vind, bool vlan_on);
110 
111 s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packetbuf_num);
112 
113 void ixgbe_set_mta(struct ixgbe_hw *hw, u8 *mc_addr);
114 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw,
115                                    u16 *firmware_version);
116 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val);
117 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val);
118 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw);
119 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data);
120 u32 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw);
121 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval);
122 s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw);
123 s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 pballoc);
124 s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 pballoc);
125 s32 ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw,
126                                           union ixgbe_atr_hash_dword input,
127 					  union ixgbe_atr_hash_dword common,
128                                           u8 queue);
129 s32 ixgbe_fdir_add_perfect_filter_82599(struct ixgbe_hw *hw,
130                                         union ixgbe_atr_input *input,
131                                         struct ixgbe_atr_input_masks *masks,
132                                         u16 soft_id,
133                                         u8 queue);
134 u32 ixgbe_atr_compute_hash_82599(union ixgbe_atr_input *input, u32 key);
135 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
136                         u8 *data);
137 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
138                          u8 data);
139 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 eeprom_data);
140 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);
141 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);
142 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps);
143 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u16 mask);
144 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u16 mask);
145 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
146                          u16 *wwpn_prefix);
147 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs);
148 
149 
150 #endif /* _IXGBE_API_H_ */
151