193f1cac5SPaul Winder /******************************************************************************
293f1cac5SPaul Winder 
3*df36e06dSRobert Mustacchi   Copyright (c) 2013-2018, Intel Corporation
493f1cac5SPaul Winder   All rights reserved.
593f1cac5SPaul Winder 
693f1cac5SPaul Winder   Redistribution and use in source and binary forms, with or without
793f1cac5SPaul Winder   modification, are permitted provided that the following conditions are met:
893f1cac5SPaul Winder 
993f1cac5SPaul Winder    1. Redistributions of source code must retain the above copyright notice,
1093f1cac5SPaul Winder       this list of conditions and the following disclaimer.
1193f1cac5SPaul Winder 
1293f1cac5SPaul Winder    2. Redistributions in binary form must reproduce the above copyright
1393f1cac5SPaul Winder       notice, this list of conditions and the following disclaimer in the
1493f1cac5SPaul Winder       documentation and/or other materials provided with the distribution.
1593f1cac5SPaul Winder 
1693f1cac5SPaul Winder    3. Neither the name of the Intel Corporation nor the names of its
1793f1cac5SPaul Winder       contributors may be used to endorse or promote products derived from
1893f1cac5SPaul Winder       this software without specific prior written permission.
1993f1cac5SPaul Winder 
2093f1cac5SPaul Winder   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
2193f1cac5SPaul Winder   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
2293f1cac5SPaul Winder   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2393f1cac5SPaul Winder   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
2493f1cac5SPaul Winder   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2593f1cac5SPaul Winder   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2693f1cac5SPaul Winder   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2793f1cac5SPaul Winder   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2893f1cac5SPaul Winder   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2993f1cac5SPaul Winder   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
3093f1cac5SPaul Winder   POSSIBILITY OF SUCH DAMAGE.
3193f1cac5SPaul Winder 
3293f1cac5SPaul Winder ******************************************************************************/
3393f1cac5SPaul Winder /*$FreeBSD$*/
3493f1cac5SPaul Winder 
3593f1cac5SPaul Winder #ifndef _I40E_DCB_H_
3693f1cac5SPaul Winder #define _I40E_DCB_H_
3793f1cac5SPaul Winder 
3893f1cac5SPaul Winder #include "i40e_type.h"
3993f1cac5SPaul Winder 
4093f1cac5SPaul Winder #define I40E_DCBX_OFFLOAD_DISABLED	0
4193f1cac5SPaul Winder #define I40E_DCBX_OFFLOAD_ENABLED	1
4293f1cac5SPaul Winder 
4393f1cac5SPaul Winder #define I40E_DCBX_STATUS_NOT_STARTED	0
4493f1cac5SPaul Winder #define I40E_DCBX_STATUS_IN_PROGRESS	1
4593f1cac5SPaul Winder #define I40E_DCBX_STATUS_DONE		2
4693f1cac5SPaul Winder #define I40E_DCBX_STATUS_MULTIPLE_PEERS	3
4793f1cac5SPaul Winder #define I40E_DCBX_STATUS_DISABLED	7
4893f1cac5SPaul Winder 
4993f1cac5SPaul Winder #define I40E_TLV_TYPE_END		0
5093f1cac5SPaul Winder #define I40E_TLV_TYPE_ORG		127
5193f1cac5SPaul Winder 
5293f1cac5SPaul Winder #define I40E_IEEE_8021QAZ_OUI		0x0080C2
5393f1cac5SPaul Winder #define I40E_IEEE_SUBTYPE_ETS_CFG	9
5493f1cac5SPaul Winder #define I40E_IEEE_SUBTYPE_ETS_REC	10
5593f1cac5SPaul Winder #define I40E_IEEE_SUBTYPE_PFC_CFG	11
5693f1cac5SPaul Winder #define I40E_IEEE_SUBTYPE_APP_PRI	12
5793f1cac5SPaul Winder 
5893f1cac5SPaul Winder #define I40E_CEE_DCBX_OUI		0x001b21
5993f1cac5SPaul Winder #define I40E_CEE_DCBX_TYPE		2
6093f1cac5SPaul Winder 
6193f1cac5SPaul Winder #define I40E_CEE_SUBTYPE_CTRL		1
6293f1cac5SPaul Winder #define I40E_CEE_SUBTYPE_PG_CFG		2
6393f1cac5SPaul Winder #define I40E_CEE_SUBTYPE_PFC_CFG	3
6493f1cac5SPaul Winder #define I40E_CEE_SUBTYPE_APP_PRI	4
6593f1cac5SPaul Winder 
6693f1cac5SPaul Winder #define I40E_CEE_MAX_FEAT_TYPE		3
6793f1cac5SPaul Winder #define I40E_LLDP_ADMINSTATUS_DISABLED		0
6893f1cac5SPaul Winder #define I40E_LLDP_ADMINSTATUS_ENABLED_RX	1
6993f1cac5SPaul Winder #define I40E_LLDP_ADMINSTATUS_ENABLED_TX	2
7093f1cac5SPaul Winder #define I40E_LLDP_ADMINSTATUS_ENABLED_RXTX	3
7193f1cac5SPaul Winder 
72*df36e06dSRobert Mustacchi #define I40E_LLDP_CURRENT_STATUS_XL710_OFFSET	0x2B
73*df36e06dSRobert Mustacchi #define I40E_LLDP_CURRENT_STATUS_X722_OFFSET	0x31
74*df36e06dSRobert Mustacchi #define I40E_LLDP_CURRENT_STATUS_OFFSET		1
75*df36e06dSRobert Mustacchi #define I40E_LLDP_CURRENT_STATUS_SIZE		1
76*df36e06dSRobert Mustacchi 
7793f1cac5SPaul Winder /* Defines for LLDP TLV header */
7893f1cac5SPaul Winder #define I40E_LLDP_MIB_HLEN		14
7993f1cac5SPaul Winder #define I40E_LLDP_TLV_LEN_SHIFT		0
8093f1cac5SPaul Winder #define I40E_LLDP_TLV_LEN_MASK		(0x01FF << I40E_LLDP_TLV_LEN_SHIFT)
8193f1cac5SPaul Winder #define I40E_LLDP_TLV_TYPE_SHIFT	9
8293f1cac5SPaul Winder #define I40E_LLDP_TLV_TYPE_MASK		(0x7F << I40E_LLDP_TLV_TYPE_SHIFT)
8393f1cac5SPaul Winder #define I40E_LLDP_TLV_SUBTYPE_SHIFT	0
8493f1cac5SPaul Winder #define I40E_LLDP_TLV_SUBTYPE_MASK	(0xFF << I40E_LLDP_TLV_SUBTYPE_SHIFT)
8593f1cac5SPaul Winder #define I40E_LLDP_TLV_OUI_SHIFT		8
8693f1cac5SPaul Winder #define I40E_LLDP_TLV_OUI_MASK		(0xFFFFFF << I40E_LLDP_TLV_OUI_SHIFT)
8793f1cac5SPaul Winder 
8893f1cac5SPaul Winder /* Defines for IEEE ETS TLV */
8993f1cac5SPaul Winder #define I40E_IEEE_ETS_MAXTC_SHIFT	0
9093f1cac5SPaul Winder #define I40E_IEEE_ETS_MAXTC_MASK	(0x7 << I40E_IEEE_ETS_MAXTC_SHIFT)
9193f1cac5SPaul Winder #define I40E_IEEE_ETS_CBS_SHIFT		6
9293f1cac5SPaul Winder #define I40E_IEEE_ETS_CBS_MASK		BIT(I40E_IEEE_ETS_CBS_SHIFT)
9393f1cac5SPaul Winder #define I40E_IEEE_ETS_WILLING_SHIFT	7
9493f1cac5SPaul Winder #define I40E_IEEE_ETS_WILLING_MASK	BIT(I40E_IEEE_ETS_WILLING_SHIFT)
9593f1cac5SPaul Winder #define I40E_IEEE_ETS_PRIO_0_SHIFT	0
9693f1cac5SPaul Winder #define I40E_IEEE_ETS_PRIO_0_MASK	(0x7 << I40E_IEEE_ETS_PRIO_0_SHIFT)
9793f1cac5SPaul Winder #define I40E_IEEE_ETS_PRIO_1_SHIFT	4
9893f1cac5SPaul Winder #define I40E_IEEE_ETS_PRIO_1_MASK	(0x7 << I40E_IEEE_ETS_PRIO_1_SHIFT)
9993f1cac5SPaul Winder #define I40E_CEE_PGID_PRIO_0_SHIFT	0
10093f1cac5SPaul Winder #define I40E_CEE_PGID_PRIO_0_MASK	(0xF << I40E_CEE_PGID_PRIO_0_SHIFT)
10193f1cac5SPaul Winder #define I40E_CEE_PGID_PRIO_1_SHIFT	4
10293f1cac5SPaul Winder #define I40E_CEE_PGID_PRIO_1_MASK	(0xF << I40E_CEE_PGID_PRIO_1_SHIFT)
10393f1cac5SPaul Winder #define I40E_CEE_PGID_STRICT		15
10493f1cac5SPaul Winder 
10593f1cac5SPaul Winder /* Defines for IEEE TSA types */
10693f1cac5SPaul Winder #define I40E_IEEE_TSA_STRICT		0
10793f1cac5SPaul Winder #define I40E_IEEE_TSA_CBS		1
10893f1cac5SPaul Winder #define I40E_IEEE_TSA_ETS		2
10993f1cac5SPaul Winder #define I40E_IEEE_TSA_VENDOR		255
11093f1cac5SPaul Winder 
11193f1cac5SPaul Winder /* Defines for IEEE PFC TLV */
11293f1cac5SPaul Winder #define I40E_IEEE_PFC_CAP_SHIFT		0
11393f1cac5SPaul Winder #define I40E_IEEE_PFC_CAP_MASK		(0xF << I40E_IEEE_PFC_CAP_SHIFT)
11493f1cac5SPaul Winder #define I40E_IEEE_PFC_MBC_SHIFT		6
11593f1cac5SPaul Winder #define I40E_IEEE_PFC_MBC_MASK		BIT(I40E_IEEE_PFC_MBC_SHIFT)
11693f1cac5SPaul Winder #define I40E_IEEE_PFC_WILLING_SHIFT	7
11793f1cac5SPaul Winder #define I40E_IEEE_PFC_WILLING_MASK	BIT(I40E_IEEE_PFC_WILLING_SHIFT)
11893f1cac5SPaul Winder 
11993f1cac5SPaul Winder /* Defines for IEEE APP TLV */
12093f1cac5SPaul Winder #define I40E_IEEE_APP_SEL_SHIFT		0
12193f1cac5SPaul Winder #define I40E_IEEE_APP_SEL_MASK		(0x7 << I40E_IEEE_APP_SEL_SHIFT)
12293f1cac5SPaul Winder #define I40E_IEEE_APP_PRIO_SHIFT	5
12393f1cac5SPaul Winder #define I40E_IEEE_APP_PRIO_MASK		(0x7 << I40E_IEEE_APP_PRIO_SHIFT)
12493f1cac5SPaul Winder 
12593f1cac5SPaul Winder /* TLV definitions for preparing MIB */
12693f1cac5SPaul Winder #define I40E_TLV_ID_CHASSIS_ID		0
12793f1cac5SPaul Winder #define I40E_TLV_ID_PORT_ID		1
12893f1cac5SPaul Winder #define I40E_TLV_ID_TIME_TO_LIVE	2
12993f1cac5SPaul Winder #define I40E_IEEE_TLV_ID_ETS_CFG	3
13093f1cac5SPaul Winder #define I40E_IEEE_TLV_ID_ETS_REC	4
13193f1cac5SPaul Winder #define I40E_IEEE_TLV_ID_PFC_CFG	5
13293f1cac5SPaul Winder #define I40E_IEEE_TLV_ID_APP_PRI	6
13393f1cac5SPaul Winder #define I40E_TLV_ID_END_OF_LLDPPDU	7
13493f1cac5SPaul Winder #define I40E_TLV_ID_START		I40E_IEEE_TLV_ID_ETS_CFG
13593f1cac5SPaul Winder 
13693f1cac5SPaul Winder #define I40E_IEEE_ETS_TLV_LENGTH	25
13793f1cac5SPaul Winder #define I40E_IEEE_PFC_TLV_LENGTH	6
13893f1cac5SPaul Winder #define I40E_IEEE_APP_TLV_LENGTH	11
13993f1cac5SPaul Winder 
14093f1cac5SPaul Winder #pragma pack(1)
14193f1cac5SPaul Winder 
14293f1cac5SPaul Winder /* IEEE 802.1AB LLDP TLV structure */
14393f1cac5SPaul Winder struct i40e_lldp_generic_tlv {
14493f1cac5SPaul Winder 	__be16 typelength;
14593f1cac5SPaul Winder 	u8 tlvinfo[1];
14693f1cac5SPaul Winder };
14793f1cac5SPaul Winder 
14893f1cac5SPaul Winder /* IEEE 802.1AB LLDP Organization specific TLV */
14993f1cac5SPaul Winder struct i40e_lldp_org_tlv {
15093f1cac5SPaul Winder 	__be16 typelength;
15193f1cac5SPaul Winder 	__be32 ouisubtype;
15293f1cac5SPaul Winder 	u8 tlvinfo[1];
15393f1cac5SPaul Winder };
15493f1cac5SPaul Winder 
15593f1cac5SPaul Winder struct i40e_cee_tlv_hdr {
15693f1cac5SPaul Winder 	__be16 typelen;
15793f1cac5SPaul Winder 	u8 operver;
15893f1cac5SPaul Winder 	u8 maxver;
15993f1cac5SPaul Winder };
16093f1cac5SPaul Winder 
16193f1cac5SPaul Winder struct i40e_cee_ctrl_tlv {
16293f1cac5SPaul Winder 	struct i40e_cee_tlv_hdr hdr;
16393f1cac5SPaul Winder 	__be32 seqno;
16493f1cac5SPaul Winder 	__be32 ackno;
16593f1cac5SPaul Winder };
16693f1cac5SPaul Winder 
16793f1cac5SPaul Winder struct i40e_cee_feat_tlv {
16893f1cac5SPaul Winder 	struct i40e_cee_tlv_hdr hdr;
16993f1cac5SPaul Winder 	u8 en_will_err; /* Bits: |En|Will|Err|Reserved(5)| */
17093f1cac5SPaul Winder #define I40E_CEE_FEAT_TLV_ENABLE_MASK	0x80
17193f1cac5SPaul Winder #define I40E_CEE_FEAT_TLV_WILLING_MASK	0x40
17293f1cac5SPaul Winder #define I40E_CEE_FEAT_TLV_ERR_MASK	0x20
17393f1cac5SPaul Winder 	u8 subtype;
17493f1cac5SPaul Winder 	u8 tlvinfo[1];
17593f1cac5SPaul Winder };
17693f1cac5SPaul Winder 
17793f1cac5SPaul Winder struct i40e_cee_app_prio {
17893f1cac5SPaul Winder 	__be16 protocol;
17993f1cac5SPaul Winder 	u8 upper_oui_sel; /* Bits: |Upper OUI(6)|Selector(2)| */
18093f1cac5SPaul Winder #define I40E_CEE_APP_SELECTOR_MASK	0x03
18193f1cac5SPaul Winder 	__be16 lower_oui;
18293f1cac5SPaul Winder 	u8 prio_map;
18393f1cac5SPaul Winder };
18493f1cac5SPaul Winder #pragma pack()
18593f1cac5SPaul Winder 
18693f1cac5SPaul Winder /*
18793f1cac5SPaul Winder  * TODO: The below structures related LLDP/DCBX variables
18893f1cac5SPaul Winder  * and statistics are defined but need to find how to get
18993f1cac5SPaul Winder  * the required information from the Firmware to use them
19093f1cac5SPaul Winder  */
19193f1cac5SPaul Winder 
19293f1cac5SPaul Winder /* IEEE 802.1AB LLDP Agent Statistics */
19393f1cac5SPaul Winder struct i40e_lldp_stats {
19493f1cac5SPaul Winder 	u64 remtablelastchangetime;
19593f1cac5SPaul Winder 	u64 remtableinserts;
19693f1cac5SPaul Winder 	u64 remtabledeletes;
19793f1cac5SPaul Winder 	u64 remtabledrops;
19893f1cac5SPaul Winder 	u64 remtableageouts;
19993f1cac5SPaul Winder 	u64 txframestotal;
20093f1cac5SPaul Winder 	u64 rxframesdiscarded;
20193f1cac5SPaul Winder 	u64 rxportframeerrors;
20293f1cac5SPaul Winder 	u64 rxportframestotal;
20393f1cac5SPaul Winder 	u64 rxporttlvsdiscardedtotal;
20493f1cac5SPaul Winder 	u64 rxporttlvsunrecognizedtotal;
20593f1cac5SPaul Winder 	u64 remtoomanyneighbors;
20693f1cac5SPaul Winder };
20793f1cac5SPaul Winder 
20893f1cac5SPaul Winder /* IEEE 802.1Qaz DCBX variables */
20993f1cac5SPaul Winder struct i40e_dcbx_variables {
21093f1cac5SPaul Winder 	u32 defmaxtrafficclasses;
21193f1cac5SPaul Winder 	u32 defprioritytcmapping;
21293f1cac5SPaul Winder 	u32 deftcbandwidth;
21393f1cac5SPaul Winder 	u32 deftsaassignment;
21493f1cac5SPaul Winder };
21593f1cac5SPaul Winder 
216*df36e06dSRobert Mustacchi 
217*df36e06dSRobert Mustacchi enum i40e_get_fw_lldp_status_resp {
218*df36e06dSRobert Mustacchi 	I40E_GET_FW_LLDP_STATUS_DISABLED = 0,
219*df36e06dSRobert Mustacchi 	I40E_GET_FW_LLDP_STATUS_ENABLED = 1
220*df36e06dSRobert Mustacchi };
221*df36e06dSRobert Mustacchi 
22293f1cac5SPaul Winder enum i40e_status_code i40e_get_dcbx_status(struct i40e_hw *hw,
22393f1cac5SPaul Winder 					   u16 *status);
22493f1cac5SPaul Winder enum i40e_status_code i40e_lldp_to_dcb_config(u8 *lldpmib,
22593f1cac5SPaul Winder 					      struct i40e_dcbx_config *dcbcfg);
22693f1cac5SPaul Winder enum i40e_status_code i40e_aq_get_dcb_config(struct i40e_hw *hw, u8 mib_type,
22793f1cac5SPaul Winder 					     u8 bridgetype,
22893f1cac5SPaul Winder 					     struct i40e_dcbx_config *dcbcfg);
22993f1cac5SPaul Winder enum i40e_status_code i40e_get_dcb_config(struct i40e_hw *hw);
230*df36e06dSRobert Mustacchi enum i40e_status_code i40e_init_dcb(struct i40e_hw *hw,
231*df36e06dSRobert Mustacchi 				    bool enable_mib_change);
232*df36e06dSRobert Mustacchi enum i40e_status_code
233*df36e06dSRobert Mustacchi i40e_get_fw_lldp_status(struct i40e_hw *hw,
234*df36e06dSRobert Mustacchi 			enum i40e_get_fw_lldp_status_resp *lldp_status);
23593f1cac5SPaul Winder enum i40e_status_code i40e_set_dcb_config(struct i40e_hw *hw);
23693f1cac5SPaul Winder enum i40e_status_code i40e_dcb_config_to_lldp(u8 *lldpmib, u16 *miblen,
23793f1cac5SPaul Winder 					      struct i40e_dcbx_config *dcbcfg);
23893f1cac5SPaul Winder #endif /* _I40E_DCB_H_ */
239