19d26e4fcSRobert Mustacchi /******************************************************************************
29d26e4fcSRobert Mustacchi 
3*df36e06dSRobert Mustacchi   Copyright (c) 2013-2018, Intel Corporation
49d26e4fcSRobert Mustacchi   All rights reserved.
59d26e4fcSRobert Mustacchi 
69d26e4fcSRobert Mustacchi   Redistribution and use in source and binary forms, with or without
79d26e4fcSRobert Mustacchi   modification, are permitted provided that the following conditions are met:
89d26e4fcSRobert Mustacchi 
99d26e4fcSRobert Mustacchi    1. Redistributions of source code must retain the above copyright notice,
109d26e4fcSRobert Mustacchi       this list of conditions and the following disclaimer.
119d26e4fcSRobert Mustacchi 
129d26e4fcSRobert Mustacchi    2. Redistributions in binary form must reproduce the above copyright
139d26e4fcSRobert Mustacchi       notice, this list of conditions and the following disclaimer in the
149d26e4fcSRobert Mustacchi       documentation and/or other materials provided with the distribution.
159d26e4fcSRobert Mustacchi 
169d26e4fcSRobert Mustacchi    3. Neither the name of the Intel Corporation nor the names of its
179d26e4fcSRobert Mustacchi       contributors may be used to endorse or promote products derived from
189d26e4fcSRobert Mustacchi       this software without specific prior written permission.
199d26e4fcSRobert Mustacchi 
209d26e4fcSRobert Mustacchi   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
219d26e4fcSRobert Mustacchi   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
229d26e4fcSRobert Mustacchi   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
239d26e4fcSRobert Mustacchi   ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
249d26e4fcSRobert Mustacchi   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
259d26e4fcSRobert Mustacchi   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
269d26e4fcSRobert Mustacchi   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
279d26e4fcSRobert Mustacchi   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
289d26e4fcSRobert Mustacchi   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
299d26e4fcSRobert Mustacchi   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
309d26e4fcSRobert Mustacchi   POSSIBILITY OF SUCH DAMAGE.
319d26e4fcSRobert Mustacchi 
329d26e4fcSRobert Mustacchi ******************************************************************************/
333d75a287SRobert Mustacchi /*$FreeBSD$*/
349d26e4fcSRobert Mustacchi 
359d26e4fcSRobert Mustacchi #ifndef _I40E_ADMINQ_CMD_H_
369d26e4fcSRobert Mustacchi #define _I40E_ADMINQ_CMD_H_
379d26e4fcSRobert Mustacchi 
389d26e4fcSRobert Mustacchi /* This header file defines the i40e Admin Queue commands and is shared between
399d26e4fcSRobert Mustacchi  * i40e Firmware and Software.
409d26e4fcSRobert Mustacchi  *
419d26e4fcSRobert Mustacchi  * This file needs to comply with the Linux Kernel coding style.
429d26e4fcSRobert Mustacchi  */
439d26e4fcSRobert Mustacchi 
4493f1cac5SPaul Winder 
459d26e4fcSRobert Mustacchi #define I40E_FW_API_VERSION_MAJOR	0x0001
46*df36e06dSRobert Mustacchi #define I40E_FW_API_VERSION_MINOR_X722	0x000A
47*df36e06dSRobert Mustacchi #define I40E_FW_API_VERSION_MINOR_X710	0x000A
4893f1cac5SPaul Winder 
4993f1cac5SPaul Winder #define I40E_FW_MINOR_VERSION(_h) ((_h)->mac.type == I40E_MAC_XL710 ? \
5093f1cac5SPaul Winder 					I40E_FW_API_VERSION_MINOR_X710 : \
5193f1cac5SPaul Winder 					I40E_FW_API_VERSION_MINOR_X722)
5293f1cac5SPaul Winder 
5393f1cac5SPaul Winder /* API version 1.7 implements additional link and PHY-specific APIs  */
5493f1cac5SPaul Winder #define I40E_MINOR_VER_GET_LINK_INFO_XL710 0x0007
55*df36e06dSRobert Mustacchi /* API version 1.9 for X722 implements additional link and PHY-specific APIs */
56*df36e06dSRobert Mustacchi #define I40E_MINOR_VER_GET_LINK_INFO_X722 0x0009
57*df36e06dSRobert Mustacchi /* API version 1.6 for X722 devices adds ability to stop FW LLDP agent */
58*df36e06dSRobert Mustacchi #define I40E_MINOR_VER_FW_LLDP_STOPPABLE_X722 0x0006
59*df36e06dSRobert Mustacchi /* API version 1.10 for X722 devices adds ability to request FEC encoding */
60*df36e06dSRobert Mustacchi #define I40E_MINOR_VER_FW_REQUEST_FEC_X722 0x000A
619d26e4fcSRobert Mustacchi 
629d26e4fcSRobert Mustacchi struct i40e_aq_desc {
639d26e4fcSRobert Mustacchi 	__le16 flags;
649d26e4fcSRobert Mustacchi 	__le16 opcode;
659d26e4fcSRobert Mustacchi 	__le16 datalen;
669d26e4fcSRobert Mustacchi 	__le16 retval;
679d26e4fcSRobert Mustacchi 	__le32 cookie_high;
689d26e4fcSRobert Mustacchi 	__le32 cookie_low;
699d26e4fcSRobert Mustacchi 	union {
709d26e4fcSRobert Mustacchi 		struct {
719d26e4fcSRobert Mustacchi 			__le32 param0;
729d26e4fcSRobert Mustacchi 			__le32 param1;
739d26e4fcSRobert Mustacchi 			__le32 param2;
749d26e4fcSRobert Mustacchi 			__le32 param3;
759d26e4fcSRobert Mustacchi 		} internal;
769d26e4fcSRobert Mustacchi 		struct {
779d26e4fcSRobert Mustacchi 			__le32 param0;
789d26e4fcSRobert Mustacchi 			__le32 param1;
799d26e4fcSRobert Mustacchi 			__le32 addr_high;
809d26e4fcSRobert Mustacchi 			__le32 addr_low;
819d26e4fcSRobert Mustacchi 		} external;
829d26e4fcSRobert Mustacchi 		u8 raw[16];
839d26e4fcSRobert Mustacchi 	} params;
849d26e4fcSRobert Mustacchi };
859d26e4fcSRobert Mustacchi 
869d26e4fcSRobert Mustacchi /* Flags sub-structure
879d26e4fcSRobert Mustacchi  * |0  |1  |2  |3  |4  |5  |6  |7  |8  |9  |10 |11 |12 |13 |14 |15 |
889d26e4fcSRobert Mustacchi  * |DD |CMP|ERR|VFE| * *  RESERVED * * |LB |RD |VFC|BUF|SI |EI |FE |
899d26e4fcSRobert Mustacchi  */
909d26e4fcSRobert Mustacchi 
919d26e4fcSRobert Mustacchi /* command flags and offsets*/
929d26e4fcSRobert Mustacchi #define I40E_AQ_FLAG_DD_SHIFT	0
939d26e4fcSRobert Mustacchi #define I40E_AQ_FLAG_CMP_SHIFT	1
949d26e4fcSRobert Mustacchi #define I40E_AQ_FLAG_ERR_SHIFT	2
959d26e4fcSRobert Mustacchi #define I40E_AQ_FLAG_VFE_SHIFT	3
969d26e4fcSRobert Mustacchi #define I40E_AQ_FLAG_LB_SHIFT	9
979d26e4fcSRobert Mustacchi #define I40E_AQ_FLAG_RD_SHIFT	10
989d26e4fcSRobert Mustacchi #define I40E_AQ_FLAG_VFC_SHIFT	11
999d26e4fcSRobert Mustacchi #define I40E_AQ_FLAG_BUF_SHIFT	12
1009d26e4fcSRobert Mustacchi #define I40E_AQ_FLAG_SI_SHIFT	13
1019d26e4fcSRobert Mustacchi #define I40E_AQ_FLAG_EI_SHIFT	14
1029d26e4fcSRobert Mustacchi #define I40E_AQ_FLAG_FE_SHIFT	15
1039d26e4fcSRobert Mustacchi 
1049d26e4fcSRobert Mustacchi #define I40E_AQ_FLAG_DD		(1 << I40E_AQ_FLAG_DD_SHIFT)  /* 0x1    */
1059d26e4fcSRobert Mustacchi #define I40E_AQ_FLAG_CMP	(1 << I40E_AQ_FLAG_CMP_SHIFT) /* 0x2    */
1069d26e4fcSRobert Mustacchi #define I40E_AQ_FLAG_ERR	(1 << I40E_AQ_FLAG_ERR_SHIFT) /* 0x4    */
1079d26e4fcSRobert Mustacchi #define I40E_AQ_FLAG_VFE	(1 << I40E_AQ_FLAG_VFE_SHIFT) /* 0x8    */
1089d26e4fcSRobert Mustacchi #define I40E_AQ_FLAG_LB		(1 << I40E_AQ_FLAG_LB_SHIFT)  /* 0x200  */
1099d26e4fcSRobert Mustacchi #define I40E_AQ_FLAG_RD		(1 << I40E_AQ_FLAG_RD_SHIFT)  /* 0x400  */
1109d26e4fcSRobert Mustacchi #define I40E_AQ_FLAG_VFC	(1 << I40E_AQ_FLAG_VFC_SHIFT) /* 0x800  */
1119d26e4fcSRobert Mustacchi #define I40E_AQ_FLAG_BUF	(1 << I40E_AQ_FLAG_BUF_SHIFT) /* 0x1000 */
1129d26e4fcSRobert Mustacchi #define I40E_AQ_FLAG_SI		(1 << I40E_AQ_FLAG_SI_SHIFT)  /* 0x2000 */
1139d26e4fcSRobert Mustacchi #define I40E_AQ_FLAG_EI		(1 << I40E_AQ_FLAG_EI_SHIFT)  /* 0x4000 */
1149d26e4fcSRobert Mustacchi #define I40E_AQ_FLAG_FE		(1 << I40E_AQ_FLAG_FE_SHIFT)  /* 0x8000 */
1159d26e4fcSRobert Mustacchi 
1169d26e4fcSRobert Mustacchi /* error codes */
1179d26e4fcSRobert Mustacchi enum i40e_admin_queue_err {
1189d26e4fcSRobert Mustacchi 	I40E_AQ_RC_OK		= 0,  /* success */
1199d26e4fcSRobert Mustacchi 	I40E_AQ_RC_EPERM	= 1,  /* Operation not permitted */
1209d26e4fcSRobert Mustacchi 	I40E_AQ_RC_ENOENT	= 2,  /* No such element */
1219d26e4fcSRobert Mustacchi 	I40E_AQ_RC_ESRCH	= 3,  /* Bad opcode */
1229d26e4fcSRobert Mustacchi 	I40E_AQ_RC_EINTR	= 4,  /* operation interrupted */
1239d26e4fcSRobert Mustacchi 	I40E_AQ_RC_EIO		= 5,  /* I/O error */
1249d26e4fcSRobert Mustacchi 	I40E_AQ_RC_ENXIO	= 6,  /* No such resource */
1259d26e4fcSRobert Mustacchi 	I40E_AQ_RC_E2BIG	= 7,  /* Arg too long */
1269d26e4fcSRobert Mustacchi 	I40E_AQ_RC_EAGAIN	= 8,  /* Try again */
1279d26e4fcSRobert Mustacchi 	I40E_AQ_RC_ENOMEM	= 9,  /* Out of memory */
1289d26e4fcSRobert Mustacchi 	I40E_AQ_RC_EACCES	= 10, /* Permission denied */
1299d26e4fcSRobert Mustacchi 	I40E_AQ_RC_EFAULT	= 11, /* Bad address */
1309d26e4fcSRobert Mustacchi 	I40E_AQ_RC_EBUSY	= 12, /* Device or resource busy */
1319d26e4fcSRobert Mustacchi 	I40E_AQ_RC_EEXIST	= 13, /* object already exists */
1329d26e4fcSRobert Mustacchi 	I40E_AQ_RC_EINVAL	= 14, /* Invalid argument */
1339d26e4fcSRobert Mustacchi 	I40E_AQ_RC_ENOTTY	= 15, /* Not a typewriter */
1349d26e4fcSRobert Mustacchi 	I40E_AQ_RC_ENOSPC	= 16, /* No space left or alloc failure */
1359d26e4fcSRobert Mustacchi 	I40E_AQ_RC_ENOSYS	= 17, /* Function not implemented */
1369d26e4fcSRobert Mustacchi 	I40E_AQ_RC_ERANGE	= 18, /* Parameter out of range */
1379d26e4fcSRobert Mustacchi 	I40E_AQ_RC_EFLUSHED	= 19, /* Cmd flushed due to prev cmd error */
1389d26e4fcSRobert Mustacchi 	I40E_AQ_RC_BAD_ADDR	= 20, /* Descriptor contains a bad pointer */
1399d26e4fcSRobert Mustacchi 	I40E_AQ_RC_EMODE	= 21, /* Op not allowed in current dev mode */
1409d26e4fcSRobert Mustacchi 	I40E_AQ_RC_EFBIG	= 22, /* File too large */
1419d26e4fcSRobert Mustacchi };
1429d26e4fcSRobert Mustacchi 
1439d26e4fcSRobert Mustacchi /* Admin Queue command opcodes */
1449d26e4fcSRobert Mustacchi enum i40e_admin_queue_opc {
1459d26e4fcSRobert Mustacchi 	/* aq commands */
1469d26e4fcSRobert Mustacchi 	i40e_aqc_opc_get_version	= 0x0001,
1479d26e4fcSRobert Mustacchi 	i40e_aqc_opc_driver_version	= 0x0002,
1489d26e4fcSRobert Mustacchi 	i40e_aqc_opc_queue_shutdown	= 0x0003,
1499d26e4fcSRobert Mustacchi 	i40e_aqc_opc_set_pf_context	= 0x0004,
1509d26e4fcSRobert Mustacchi 
1519d26e4fcSRobert Mustacchi 	/* resource ownership */
1529d26e4fcSRobert Mustacchi 	i40e_aqc_opc_request_resource	= 0x0008,
1539d26e4fcSRobert Mustacchi 	i40e_aqc_opc_release_resource	= 0x0009,
1549d26e4fcSRobert Mustacchi 
1559d26e4fcSRobert Mustacchi 	i40e_aqc_opc_list_func_capabilities	= 0x000A,
1569d26e4fcSRobert Mustacchi 	i40e_aqc_opc_list_dev_capabilities	= 0x000B,
1579d26e4fcSRobert Mustacchi 
1583d75a287SRobert Mustacchi 	/* Proxy commands */
1593d75a287SRobert Mustacchi 	i40e_aqc_opc_set_proxy_config		= 0x0104,
1603d75a287SRobert Mustacchi 	i40e_aqc_opc_set_ns_proxy_table_entry	= 0x0105,
1613d75a287SRobert Mustacchi 
1629d26e4fcSRobert Mustacchi 	/* LAA */
1639d26e4fcSRobert Mustacchi 	i40e_aqc_opc_mac_address_read	= 0x0107,
1649d26e4fcSRobert Mustacchi 	i40e_aqc_opc_mac_address_write	= 0x0108,
1659d26e4fcSRobert Mustacchi 
1669d26e4fcSRobert Mustacchi 	/* PXE */
1679d26e4fcSRobert Mustacchi 	i40e_aqc_opc_clear_pxe_mode	= 0x0110,
1689d26e4fcSRobert Mustacchi 
1693d75a287SRobert Mustacchi 	/* WoL commands */
1703d75a287SRobert Mustacchi 	i40e_aqc_opc_set_wol_filter	= 0x0120,
1713d75a287SRobert Mustacchi 	i40e_aqc_opc_get_wake_reason	= 0x0121,
172*df36e06dSRobert Mustacchi 	i40e_aqc_opc_clear_all_wol_filters = 0x025E,
1733d75a287SRobert Mustacchi 
1749d26e4fcSRobert Mustacchi 	/* internal switch commands */
1759d26e4fcSRobert Mustacchi 	i40e_aqc_opc_get_switch_config		= 0x0200,
1769d26e4fcSRobert Mustacchi 	i40e_aqc_opc_add_statistics		= 0x0201,
1779d26e4fcSRobert Mustacchi 	i40e_aqc_opc_remove_statistics		= 0x0202,
1789d26e4fcSRobert Mustacchi 	i40e_aqc_opc_set_port_parameters	= 0x0203,
1799d26e4fcSRobert Mustacchi 	i40e_aqc_opc_get_switch_resource_alloc	= 0x0204,
1803d75a287SRobert Mustacchi 	i40e_aqc_opc_set_switch_config		= 0x0205,
181396505afSPaul Winder 	i40e_aqc_opc_rx_ctl_reg_read		= 0x0206,
182396505afSPaul Winder 	i40e_aqc_opc_rx_ctl_reg_write		= 0x0207,
183396505afSPaul Winder 
1849d26e4fcSRobert Mustacchi 	i40e_aqc_opc_add_vsi			= 0x0210,
1859d26e4fcSRobert Mustacchi 	i40e_aqc_opc_update_vsi_parameters	= 0x0211,
1869d26e4fcSRobert Mustacchi 	i40e_aqc_opc_get_vsi_parameters		= 0x0212,
1879d26e4fcSRobert Mustacchi 
1889d26e4fcSRobert Mustacchi 	i40e_aqc_opc_add_pv			= 0x0220,
1899d26e4fcSRobert Mustacchi 	i40e_aqc_opc_update_pv_parameters	= 0x0221,
1909d26e4fcSRobert Mustacchi 	i40e_aqc_opc_get_pv_parameters		= 0x0222,
1919d26e4fcSRobert Mustacchi 
1929d26e4fcSRobert Mustacchi 	i40e_aqc_opc_add_veb			= 0x0230,
1939d26e4fcSRobert Mustacchi 	i40e_aqc_opc_update_veb_parameters	= 0x0231,
1949d26e4fcSRobert Mustacchi 	i40e_aqc_opc_get_veb_parameters		= 0x0232,
1959d26e4fcSRobert Mustacchi 
1969d26e4fcSRobert Mustacchi 	i40e_aqc_opc_delete_element		= 0x0243,
1979d26e4fcSRobert Mustacchi 
1989d26e4fcSRobert Mustacchi 	i40e_aqc_opc_add_macvlan		= 0x0250,
1999d26e4fcSRobert Mustacchi 	i40e_aqc_opc_remove_macvlan		= 0x0251,
2009d26e4fcSRobert Mustacchi 	i40e_aqc_opc_add_vlan			= 0x0252,
2019d26e4fcSRobert Mustacchi 	i40e_aqc_opc_remove_vlan		= 0x0253,
2029d26e4fcSRobert Mustacchi 	i40e_aqc_opc_set_vsi_promiscuous_modes	= 0x0254,
2039d26e4fcSRobert Mustacchi 	i40e_aqc_opc_add_tag			= 0x0255,
2049d26e4fcSRobert Mustacchi 	i40e_aqc_opc_remove_tag			= 0x0256,
2059d26e4fcSRobert Mustacchi 	i40e_aqc_opc_add_multicast_etag		= 0x0257,
2069d26e4fcSRobert Mustacchi 	i40e_aqc_opc_remove_multicast_etag	= 0x0258,
2079d26e4fcSRobert Mustacchi 	i40e_aqc_opc_update_tag			= 0x0259,
2089d26e4fcSRobert Mustacchi 	i40e_aqc_opc_add_control_packet_filter	= 0x025A,
2099d26e4fcSRobert Mustacchi 	i40e_aqc_opc_remove_control_packet_filter	= 0x025B,
2109d26e4fcSRobert Mustacchi 	i40e_aqc_opc_add_cloud_filters		= 0x025C,
2119d26e4fcSRobert Mustacchi 	i40e_aqc_opc_remove_cloud_filters	= 0x025D,
2123d75a287SRobert Mustacchi 	i40e_aqc_opc_clear_wol_switch_filters	= 0x025E,
213*df36e06dSRobert Mustacchi 	i40e_aqc_opc_replace_cloud_filters	= 0x025F,
2149d26e4fcSRobert Mustacchi 
2159d26e4fcSRobert Mustacchi 	i40e_aqc_opc_add_mirror_rule	= 0x0260,
2169d26e4fcSRobert Mustacchi 	i40e_aqc_opc_delete_mirror_rule	= 0x0261,
2179d26e4fcSRobert Mustacchi 
2189d26e4fcSRobert Mustacchi 	/* DCB commands */
2199d26e4fcSRobert Mustacchi 	i40e_aqc_opc_dcb_ignore_pfc	= 0x0301,
2209d26e4fcSRobert Mustacchi 	i40e_aqc_opc_dcb_updated	= 0x0302,
22193f1cac5SPaul Winder 	i40e_aqc_opc_set_dcb_parameters = 0x0303,
2229d26e4fcSRobert Mustacchi 
2239d26e4fcSRobert Mustacchi 	/* TX scheduler */
2249d26e4fcSRobert Mustacchi 	i40e_aqc_opc_configure_vsi_bw_limit		= 0x0400,
2259d26e4fcSRobert Mustacchi 	i40e_aqc_opc_configure_vsi_ets_sla_bw_limit	= 0x0406,
2269d26e4fcSRobert Mustacchi 	i40e_aqc_opc_configure_vsi_tc_bw		= 0x0407,
2279d26e4fcSRobert Mustacchi 	i40e_aqc_opc_query_vsi_bw_config		= 0x0408,
2289d26e4fcSRobert Mustacchi 	i40e_aqc_opc_query_vsi_ets_sla_config		= 0x040A,
2299d26e4fcSRobert Mustacchi 	i40e_aqc_opc_configure_switching_comp_bw_limit	= 0x0410,
2309d26e4fcSRobert Mustacchi 
2319d26e4fcSRobert Mustacchi 	i40e_aqc_opc_enable_switching_comp_ets			= 0x0413,
2329d26e4fcSRobert Mustacchi 	i40e_aqc_opc_modify_switching_comp_ets			= 0x0414,
2339d26e4fcSRobert Mustacchi 	i40e_aqc_opc_disable_switching_comp_ets			= 0x0415,
2349d26e4fcSRobert Mustacchi 	i40e_aqc_opc_configure_switching_comp_ets_bw_limit	= 0x0416,
2359d26e4fcSRobert Mustacchi 	i40e_aqc_opc_configure_switching_comp_bw_config		= 0x0417,
2369d26e4fcSRobert Mustacchi 	i40e_aqc_opc_query_switching_comp_ets_config		= 0x0418,
2379d26e4fcSRobert Mustacchi 	i40e_aqc_opc_query_port_ets_config			= 0x0419,
2389d26e4fcSRobert Mustacchi 	i40e_aqc_opc_query_switching_comp_bw_config		= 0x041A,
2399d26e4fcSRobert Mustacchi 	i40e_aqc_opc_suspend_port_tx				= 0x041B,
2409d26e4fcSRobert Mustacchi 	i40e_aqc_opc_resume_port_tx				= 0x041C,
2419d26e4fcSRobert Mustacchi 	i40e_aqc_opc_configure_partition_bw			= 0x041D,
2429d26e4fcSRobert Mustacchi 	/* hmc */
2439d26e4fcSRobert Mustacchi 	i40e_aqc_opc_query_hmc_resource_profile	= 0x0500,
2449d26e4fcSRobert Mustacchi 	i40e_aqc_opc_set_hmc_resource_profile	= 0x0501,
2459d26e4fcSRobert Mustacchi 
2469d26e4fcSRobert Mustacchi 	/* phy commands*/
2479d26e4fcSRobert Mustacchi 	i40e_aqc_opc_get_phy_abilities		= 0x0600,
2489d26e4fcSRobert Mustacchi 	i40e_aqc_opc_set_phy_config		= 0x0601,
2499d26e4fcSRobert Mustacchi 	i40e_aqc_opc_set_mac_config		= 0x0603,
2509d26e4fcSRobert Mustacchi 	i40e_aqc_opc_set_link_restart_an	= 0x0605,
2519d26e4fcSRobert Mustacchi 	i40e_aqc_opc_get_link_status		= 0x0607,
2529d26e4fcSRobert Mustacchi 	i40e_aqc_opc_set_phy_int_mask		= 0x0613,
2539d26e4fcSRobert Mustacchi 	i40e_aqc_opc_get_local_advt_reg		= 0x0614,
2549d26e4fcSRobert Mustacchi 	i40e_aqc_opc_set_local_advt_reg		= 0x0615,
2559d26e4fcSRobert Mustacchi 	i40e_aqc_opc_get_partner_advt		= 0x0616,
2569d26e4fcSRobert Mustacchi 	i40e_aqc_opc_set_lb_modes		= 0x0618,
2579d26e4fcSRobert Mustacchi 	i40e_aqc_opc_get_phy_wol_caps		= 0x0621,
2589d26e4fcSRobert Mustacchi 	i40e_aqc_opc_set_phy_debug		= 0x0622,
2599d26e4fcSRobert Mustacchi 	i40e_aqc_opc_upload_ext_phy_fm		= 0x0625,
2603d75a287SRobert Mustacchi 	i40e_aqc_opc_run_phy_activity		= 0x0626,
261286d309cSRobert Mustacchi 	i40e_aqc_opc_set_phy_register		= 0x0628,
262286d309cSRobert Mustacchi 	i40e_aqc_opc_get_phy_register		= 0x0629,
2639d26e4fcSRobert Mustacchi 
2649d26e4fcSRobert Mustacchi 	/* NVM commands */
2659d26e4fcSRobert Mustacchi 	i40e_aqc_opc_nvm_read			= 0x0701,
2669d26e4fcSRobert Mustacchi 	i40e_aqc_opc_nvm_erase			= 0x0702,
2679d26e4fcSRobert Mustacchi 	i40e_aqc_opc_nvm_update			= 0x0703,
2689d26e4fcSRobert Mustacchi 	i40e_aqc_opc_nvm_config_read		= 0x0704,
2699d26e4fcSRobert Mustacchi 	i40e_aqc_opc_nvm_config_write		= 0x0705,
27093f1cac5SPaul Winder 	i40e_aqc_opc_nvm_progress		= 0x0706,
2719d26e4fcSRobert Mustacchi 	i40e_aqc_opc_oem_post_update		= 0x0720,
2723d75a287SRobert Mustacchi 	i40e_aqc_opc_thermal_sensor		= 0x0721,
2739d26e4fcSRobert Mustacchi 
2749d26e4fcSRobert Mustacchi 	/* virtualization commands */
2759d26e4fcSRobert Mustacchi 	i40e_aqc_opc_send_msg_to_pf		= 0x0801,
2769d26e4fcSRobert Mustacchi 	i40e_aqc_opc_send_msg_to_vf		= 0x0802,
2779d26e4fcSRobert Mustacchi 	i40e_aqc_opc_send_msg_to_peer		= 0x0803,
2789d26e4fcSRobert Mustacchi 
2799d26e4fcSRobert Mustacchi 	/* alternate structure */
2809d26e4fcSRobert Mustacchi 	i40e_aqc_opc_alternate_write		= 0x0900,
2819d26e4fcSRobert Mustacchi 	i40e_aqc_opc_alternate_write_indirect	= 0x0901,
2829d26e4fcSRobert Mustacchi 	i40e_aqc_opc_alternate_read		= 0x0902,
2839d26e4fcSRobert Mustacchi 	i40e_aqc_opc_alternate_read_indirect	= 0x0903,
2849d26e4fcSRobert Mustacchi 	i40e_aqc_opc_alternate_write_done	= 0x0904,
2859d26e4fcSRobert Mustacchi 	i40e_aqc_opc_alternate_set_mode		= 0x0905,
2869d26e4fcSRobert Mustacchi 	i40e_aqc_opc_alternate_clear_port	= 0x0906,
2879d26e4fcSRobert Mustacchi 
2889d26e4fcSRobert Mustacchi 	/* LLDP commands */
2899d26e4fcSRobert Mustacchi 	i40e_aqc_opc_lldp_get_mib	= 0x0A00,
2909d26e4fcSRobert Mustacchi 	i40e_aqc_opc_lldp_update_mib	= 0x0A01,
2919d26e4fcSRobert Mustacchi 	i40e_aqc_opc_lldp_add_tlv	= 0x0A02,
2929d26e4fcSRobert Mustacchi 	i40e_aqc_opc_lldp_update_tlv	= 0x0A03,
2939d26e4fcSRobert Mustacchi 	i40e_aqc_opc_lldp_delete_tlv	= 0x0A04,
2949d26e4fcSRobert Mustacchi 	i40e_aqc_opc_lldp_stop		= 0x0A05,
2959d26e4fcSRobert Mustacchi 	i40e_aqc_opc_lldp_start		= 0x0A06,
2969d26e4fcSRobert Mustacchi 	i40e_aqc_opc_get_cee_dcb_cfg	= 0x0A07,
2979d26e4fcSRobert Mustacchi 	i40e_aqc_opc_lldp_set_local_mib	= 0x0A08,
2989d26e4fcSRobert Mustacchi 	i40e_aqc_opc_lldp_stop_start_spec_agent	= 0x0A09,
299*df36e06dSRobert Mustacchi 	i40e_aqc_opc_lldp_restore		= 0x0A0A,
3009d26e4fcSRobert Mustacchi 
3019d26e4fcSRobert Mustacchi 	/* Tunnel commands */
3029d26e4fcSRobert Mustacchi 	i40e_aqc_opc_add_udp_tunnel	= 0x0B00,
3039d26e4fcSRobert Mustacchi 	i40e_aqc_opc_del_udp_tunnel	= 0x0B01,
3049d26e4fcSRobert Mustacchi 	i40e_aqc_opc_set_rss_key	= 0x0B02,
3059d26e4fcSRobert Mustacchi 	i40e_aqc_opc_set_rss_lut	= 0x0B03,
3069d26e4fcSRobert Mustacchi 	i40e_aqc_opc_get_rss_key	= 0x0B04,
3079d26e4fcSRobert Mustacchi 	i40e_aqc_opc_get_rss_lut	= 0x0B05,
3089d26e4fcSRobert Mustacchi 
3099d26e4fcSRobert Mustacchi 	/* Async Events */
3109d26e4fcSRobert Mustacchi 	i40e_aqc_opc_event_lan_overflow		= 0x1001,
3119d26e4fcSRobert Mustacchi 
3129d26e4fcSRobert Mustacchi 	/* OEM commands */
3139d26e4fcSRobert Mustacchi 	i40e_aqc_opc_oem_parameter_change	= 0xFE00,
3149d26e4fcSRobert Mustacchi 	i40e_aqc_opc_oem_device_status_change	= 0xFE01,
3159d26e4fcSRobert Mustacchi 	i40e_aqc_opc_oem_ocsd_initialize	= 0xFE02,
3169d26e4fcSRobert Mustacchi 	i40e_aqc_opc_oem_ocbb_initialize	= 0xFE03,
3179d26e4fcSRobert Mustacchi 
3189d26e4fcSRobert Mustacchi 	/* debug commands */
3199d26e4fcSRobert Mustacchi 	i40e_aqc_opc_debug_read_reg		= 0xFF03,
3209d26e4fcSRobert Mustacchi 	i40e_aqc_opc_debug_write_reg		= 0xFF04,
3219d26e4fcSRobert Mustacchi 	i40e_aqc_opc_debug_modify_reg		= 0xFF07,
3229d26e4fcSRobert Mustacchi 	i40e_aqc_opc_debug_dump_internals	= 0xFF08,
3239d26e4fcSRobert Mustacchi };
3249d26e4fcSRobert Mustacchi 
3259d26e4fcSRobert Mustacchi /* command structures and indirect data structures */
3269d26e4fcSRobert Mustacchi 
3279d26e4fcSRobert Mustacchi /* Structure naming conventions:
3289d26e4fcSRobert Mustacchi  * - no suffix for direct command descriptor structures
3299d26e4fcSRobert Mustacchi  * - _data for indirect sent data
3309d26e4fcSRobert Mustacchi  * - _resp for indirect return data (data which is both will use _data)
3319d26e4fcSRobert Mustacchi  * - _completion for direct return data
3329d26e4fcSRobert Mustacchi  * - _element_ for repeated elements (may also be _data or _resp)
3339d26e4fcSRobert Mustacchi  *
3349d26e4fcSRobert Mustacchi  * Command structures are expected to overlay the params.raw member of the basic
3359d26e4fcSRobert Mustacchi  * descriptor, and as such cannot exceed 16 bytes in length.
3369d26e4fcSRobert Mustacchi  */
3379d26e4fcSRobert Mustacchi 
3389d26e4fcSRobert Mustacchi /* This macro is used to generate a compilation error if a structure
3399d26e4fcSRobert Mustacchi  * is not exactly the correct length. It gives a divide by zero error if the
3409d26e4fcSRobert Mustacchi  * structure is not of the correct size, otherwise it creates an enum that is
3419d26e4fcSRobert Mustacchi  * never used.
3429d26e4fcSRobert Mustacchi  */
3439d26e4fcSRobert Mustacchi #define I40E_CHECK_STRUCT_LEN(n, X) enum i40e_static_assert_enum_##X \
3449d26e4fcSRobert Mustacchi 	{ i40e_static_assert_##X = (n)/((sizeof(struct X) == (n)) ? 1 : 0) }
3459d26e4fcSRobert Mustacchi 
3469d26e4fcSRobert Mustacchi /* This macro is used extensively to ensure that command structures are 16
3479d26e4fcSRobert Mustacchi  * bytes in length as they have to map to the raw array of that size.
3489d26e4fcSRobert Mustacchi  */
3499d26e4fcSRobert Mustacchi #define I40E_CHECK_CMD_LENGTH(X)	I40E_CHECK_STRUCT_LEN(16, X)
3509d26e4fcSRobert Mustacchi 
3519d26e4fcSRobert Mustacchi /* internal (0x00XX) commands */
3529d26e4fcSRobert Mustacchi 
3539d26e4fcSRobert Mustacchi /* Get version (direct 0x0001) */
3549d26e4fcSRobert Mustacchi struct i40e_aqc_get_version {
3559d26e4fcSRobert Mustacchi 	__le32 rom_ver;
3569d26e4fcSRobert Mustacchi 	__le32 fw_build;
3579d26e4fcSRobert Mustacchi 	__le16 fw_major;
3589d26e4fcSRobert Mustacchi 	__le16 fw_minor;
3599d26e4fcSRobert Mustacchi 	__le16 api_major;
3609d26e4fcSRobert Mustacchi 	__le16 api_minor;
3619d26e4fcSRobert Mustacchi };
3629d26e4fcSRobert Mustacchi 
3639d26e4fcSRobert Mustacchi I40E_CHECK_CMD_LENGTH(i40e_aqc_get_version);
3649d26e4fcSRobert Mustacchi 
3659d26e4fcSRobert Mustacchi /* Send driver version (indirect 0x0002) */
3669d26e4fcSRobert Mustacchi struct i40e_aqc_driver_version {
3679d26e4fcSRobert Mustacchi 	u8	driver_major_ver;
3689d26e4fcSRobert Mustacchi 	u8	driver_minor_ver;
3699d26e4fcSRobert Mustacchi 	u8	driver_build_ver;
3709d26e4fcSRobert Mustacchi 	u8	driver_subbuild_ver;
3719d26e4fcSRobert Mustacchi 	u8	reserved[4];
3729d26e4fcSRobert Mustacchi 	__le32	address_high;
3739d26e4fcSRobert Mustacchi 	__le32	address_low;
3749d26e4fcSRobert Mustacchi };
3759d26e4fcSRobert Mustacchi 
3769d26e4fcSRobert Mustacchi I40E_CHECK_CMD_LENGTH(i40e_aqc_driver_version);
3779d26e4fcSRobert Mustacchi 
3789d26e4fcSRobert Mustacchi /* Queue Shutdown (direct 0x0003) */
3799d26e4fcSRobert Mustacchi struct i40e_aqc_queue_shutdown {
3809d26e4fcSRobert Mustacchi 	__le32	driver_unloading;
3819d26e4fcSRobert Mustacchi #define I40E_AQ_DRIVER_UNLOADING	0x1
3829d26e4fcSRobert Mustacchi 	u8	reserved[12];
3839d26e4fcSRobert Mustacchi };
3849d26e4fcSRobert Mustacchi 
3859d26e4fcSRobert Mustacchi I40E_CHECK_CMD_LENGTH(i40e_aqc_queue_shutdown);
3869d26e4fcSRobert Mustacchi 
3879d26e4fcSRobert Mustacchi /* Set PF context (0x0004, direct) */
3889d26e4fcSRobert Mustacchi struct i40e_aqc_set_pf_context {
3899d26e4fcSRobert Mustacchi 	u8	pf_id;
3909d26e4fcSRobert Mustacchi 	u8	reserved[15];
3919d26e4fcSRobert Mustacchi };
3929d26e4fcSRobert Mustacchi 
3939d26e4fcSRobert Mustacchi I40E_CHECK_CMD_LENGTH(i40e_aqc_set_pf_context);
3949d26e4fcSRobert Mustacchi 
3959d26e4fcSRobert Mustacchi /* Request resource ownership (direct 0x0008)
3969d26e4fcSRobert Mustacchi  * Release resource ownership (direct 0x0009)
3979d26e4fcSRobert Mustacchi  */
3989d26e4fcSRobert Mustacchi #define I40E_AQ_RESOURCE_NVM			1
3999d26e4fcSRobert Mustacchi #define I40E_AQ_RESOURCE_SDP			2
4009d26e4fcSRobert Mustacchi #define I40E_AQ_RESOURCE_ACCESS_READ		1
4019d26e4fcSRobert Mustacchi #define I40E_AQ_RESOURCE_ACCESS_WRITE		2
4029d26e4fcSRobert Mustacchi #define I40E_AQ_RESOURCE_NVM_READ_TIMEOUT	3000
4039d26e4fcSRobert Mustacchi #define I40E_AQ_RESOURCE_NVM_WRITE_TIMEOUT	180000
4049d26e4fcSRobert Mustacchi 
4059d26e4fcSRobert Mustacchi struct i40e_aqc_request_resource {
4069d26e4fcSRobert Mustacchi 	__le16	resource_id;
4079d26e4fcSRobert Mustacchi 	__le16	access_type;
4089d26e4fcSRobert Mustacchi 	__le32	timeout;
4099d26e4fcSRobert Mustacchi 	__le32	resource_number;
4109d26e4fcSRobert Mustacchi 	u8	reserved[4];
4119d26e4fcSRobert Mustacchi };
4129d26e4fcSRobert Mustacchi 
4139d26e4fcSRobert Mustacchi I40E_CHECK_CMD_LENGTH(i40e_aqc_request_resource);
4149d26e4fcSRobert Mustacchi 
4159d26e4fcSRobert Mustacchi /* Get function capabilities (indirect 0x000A)
4169d26e4fcSRobert Mustacchi  * Get device capabilities (indirect 0x000B)
4179d26e4fcSRobert Mustacchi  */
4189d26e4fcSRobert Mustacchi struct i40e_aqc_list_capabilites {
4199d26e4fcSRobert Mustacchi 	u8 command_flags;
4209d26e4fcSRobert Mustacchi #define I40E_AQ_LIST_CAP_PF_INDEX_EN	1
4219d26e4fcSRobert Mustacchi 	u8 pf_index;
4229d26e4fcSRobert Mustacchi 	u8 reserved[2];
4239d26e4fcSRobert Mustacchi 	__le32 count;
4249d26e4fcSRobert Mustacchi 	__le32 addr_high;
4259d26e4fcSRobert Mustacchi 	__le32 addr_low;
4269d26e4fcSRobert Mustacchi };
4279d26e4fcSRobert Mustacchi 
4289d26e4fcSRobert Mustacchi I40E_CHECK_CMD_LENGTH(i40e_aqc_list_capabilites);
4299d26e4fcSRobert Mustacchi 
4309d26e4fcSRobert Mustacchi struct i40e_aqc_list_capabilities_element_resp {
4319d26e4fcSRobert Mustacchi 	__le16	id;
4329d26e4fcSRobert Mustacchi 	u8	major_rev;
4339d26e4fcSRobert Mustacchi 	u8	minor_rev;
4349d26e4fcSRobert Mustacchi 	__le32	number;
4359d26e4fcSRobert Mustacchi 	__le32	logical_id;
4369d26e4fcSRobert Mustacchi 	__le32	phys_id;
4379d26e4fcSRobert Mustacchi 	u8	reserved[16];
4389d26e4fcSRobert Mustacchi };
4399d26e4fcSRobert Mustacchi 
4409d26e4fcSRobert Mustacchi /* list of caps */
4419d26e4fcSRobert Mustacchi 
4429d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_SWITCH_MODE	0x0001
4439d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_MNG_MODE		0x0002
4449d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_NPAR_ACTIVE	0x0003
4459d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_OS2BMC_CAP	0x0004
4469d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_FUNCTIONS_VALID	0x0005
4479d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_ALTERNATE_RAM	0x0006
4483d75a287SRobert Mustacchi #define I40E_AQ_CAP_ID_WOL_AND_PROXY	0x0008
4499d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_SRIOV		0x0012
4509d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_VF		0x0013
4519d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_VMDQ		0x0014
4529d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_8021QBG		0x0015
4539d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_8021QBR		0x0016
4549d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_VSI		0x0017
4559d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_DCB		0x0018
4569d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_FCOE		0x0021
4579d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_ISCSI		0x0022
4589d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_RSS		0x0040
4599d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_RXQ		0x0041
4609d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_TXQ		0x0042
4619d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_MSIX		0x0043
4629d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_VF_MSIX		0x0044
4639d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_FLOW_DIRECTOR	0x0045
4649d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_1588		0x0046
4659d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_IWARP		0x0051
4669d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_LED		0x0061
4679d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_SDP		0x0062
4689d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_MDIO		0x0063
4693d75a287SRobert Mustacchi #define I40E_AQ_CAP_ID_WSR_PROT		0x0064
4703d75a287SRobert Mustacchi #define I40E_AQ_CAP_ID_NVM_MGMT		0x0080
4719d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_FLEX10		0x00F1
4729d26e4fcSRobert Mustacchi #define I40E_AQ_CAP_ID_CEM		0x00F2
4739d26e4fcSRobert Mustacchi 
4749d26e4fcSRobert Mustacchi /* Set CPPM Configuration (direct 0x0103) */
4759d26e4fcSRobert Mustacchi struct i40e_aqc_cppm_configuration {
4769d26e4fcSRobert Mustacchi 	__le16	command_flags;
4779d26e4fcSRobert Mustacchi #define I40E_AQ_CPPM_EN_LTRC	0x0800
4789d26e4fcSRobert Mustacchi #define I40E_AQ_CPPM_EN_DMCTH	0x1000
4799d26e4fcSRobert Mustacchi #define I40E_AQ_CPPM_EN_DMCTLX	0x2000
4809d26e4fcSRobert Mustacchi #define I40E_AQ_CPPM_EN_HPTC	0x4000
4819d26e4fcSRobert Mustacchi #define I40E_AQ_CPPM_EN_DMARC	0x8000
4829d26e4fcSRobert Mustacchi 	__le16	ttlx;
4839d26e4fcSRobert Mustacchi 	__le32	dmacr;
4849d26e4fcSRobert Mustacchi 	__le16	dmcth;
4859d26e4fcSRobert Mustacchi 	u8	hptc;
4869d26e4fcSRobert Mustacchi 	u8	reserved;
4879d26e4fcSRobert Mustacchi 	__le32	pfltrc;
4889d26e4fcSRobert Mustacchi };
4899d26e4fcSRobert Mustacchi 
4909d26e4fcSRobert Mustacchi I40E_CHECK_CMD_LENGTH(i40e_aqc_cppm_configuration);
4919d26e4fcSRobert Mustacchi 
4929d26e4fcSRobert Mustacchi /* Set ARP Proxy command / response (indirect 0x0104) */
4939d26e4fcSRobert Mustacchi struct i40e_aqc_arp_proxy_data {
4949d26e4fcSRobert Mustacchi 	__le16	command_flags;
4953d75a287SRobert Mustacchi #define I40E_AQ_ARP_INIT_IPV4	0x0800
4963d75a287SRobert Mustacchi #define I40E_AQ_ARP_UNSUP_CTL	0x1000
4973d75a287SRobert Mustacchi #define I40E_AQ_ARP_ENA		0x2000
4983d75a287SRobert Mustacchi #define I40E_AQ_ARP_ADD_IPV4	0x4000
4993d75a287SRobert Mustacchi #define I40E_AQ_ARP_DEL_IPV4	0x8000
5009d26e4fcSRobert Mustacchi 	__le16	table_id;
5013d75a287SRobert Mustacchi 	__le32	enabled_offloads;
5023d75a287SRobert Mustacchi #define I40E_AQ_ARP_DIRECTED_OFFLOAD_ENABLE	0x00000020
5033d75a287SRobert Mustacchi #define I40E_AQ_ARP_OFFLOAD_ENABLE		0x00000800
5049d26e4fcSRobert Mustacchi 	__le32	ip_addr;
5059d26e4fcSRobert Mustacchi 	u8	mac_addr[6];
5069d26e4fcSRobert Mustacchi 	u8	reserved[2];
5079d26e4fcSRobert Mustacchi };
5089d26e4fcSRobert Mustacchi 
5099d26e4fcSRobert Mustacchi I40E_CHECK_STRUCT_LEN(0x14, i40e_aqc_arp_proxy_data);
5109d26e4fcSRobert Mustacchi 
5119d26e4fcSRobert Mustacchi /* Set NS Proxy Table Entry Command (indirect 0x0105) */
5129d26e4fcSRobert Mustacchi struct i40e_aqc_ns_proxy_data {
5139d26e4fcSRobert Mustacchi 	__le16	table_idx_mac_addr_0;
5149d26e4fcSRobert Mustacchi 	__le16	table_idx_mac_addr_1;
5159d26e4fcSRobert Mustacchi 	__le16	table_idx_ipv6_0;
5169d26e4fcSRobert Mustacchi 	__le16	table_idx_ipv6_1;
5179d26e4fcSRobert Mustacchi 	__le16	control;
5183d75a287SRobert Mustacchi #define I40E_AQ_NS_PROXY_ADD_0		0x0001
5193d75a287SRobert Mustacchi #define I40E_AQ_NS_PROXY_DEL_0		0x0002
5203d75a287SRobert Mustacchi #define I40E_AQ_NS_PROXY_ADD_1		0x0004
5213d75a287SRobert Mustacchi #define I40E_AQ_NS_PROXY_DEL_1		0x0008
5223d75a287SRobert Mustacchi #define I40E_AQ_NS_PROXY_ADD_IPV6_0	0x0010
5233d75a287SRobert Mustacchi #define I40E_AQ_NS_PROXY_DEL_IPV6_0	0x0020
5243d75a287SRobert Mustacchi #define I40E_AQ_NS_PROXY_ADD_IPV6_1	0x0040
5253d75a287SRobert Mustacchi #define I40E_AQ_NS_PROXY_DEL_IPV6_1	0x0080
5263d75a287SRobert Mustacchi #define I40E_AQ_NS_PROXY_COMMAND_SEQ	0x0100
5273d75a287SRobert Mustacchi #define I40E_AQ_NS_PROXY_INIT_IPV6_TBL	0x0200
5283d75a287SRobert Mustacchi #define I40E_AQ_NS_PROXY_INIT_MAC_TBL	0x0400
5293d75a287SRobert Mustacchi #define I40E_AQ_NS_PROXY_OFFLOAD_ENABLE	0x0800
5303d75a287SRobert Mustacchi #define I40E_AQ_NS_PROXY_DIRECTED_OFFLOAD_ENABLE	0x1000
5319d26e4fcSRobert Mustacchi 	u8	mac_addr_0[6];
5329d26e4fcSRobert Mustacchi 	u8	mac_addr_1[6];
5339d26e4fcSRobert Mustacchi 	u8	local_mac_addr[6];
5349d26e4fcSRobert Mustacchi 	u8	ipv6_addr_0[16]; /* Warning! spec specifies BE byte order */
5359d26e4fcSRobert Mustacchi 	u8	ipv6_addr_1[16];
5369d26e4fcSRobert Mustacchi };
5379d26e4fcSRobert Mustacchi 
5389d26e4fcSRobert Mustacchi I40E_CHECK_STRUCT_LEN(0x3c, i40e_aqc_ns_proxy_data);
5399d26e4fcSRobert Mustacchi 
5409d26e4fcSRobert Mustacchi /* Manage LAA Command (0x0106) - obsolete */
5419d26e4fcSRobert Mustacchi struct i40e_aqc_mng_laa {
5429d26e4fcSRobert Mustacchi 	__le16	command_flags;
5439d26e4fcSRobert Mustacchi #define I40E_AQ_LAA_FLAG_WR	0x8000
5449d26e4fcSRobert Mustacchi 	u8	reserved[2];
5459d26e4fcSRobert Mustacchi 	__le32	sal;
5469d26e4fcSRobert Mustacchi 	__le16	sah;
5479d26e4fcSRobert Mustacchi 	u8	reserved2[6];
5489d26e4fcSRobert Mustacchi };
5499d26e4fcSRobert Mustacchi 
5509d26e4fcSRobert Mustacchi I40E_CHECK_CMD_LENGTH(i40e_aqc_mng_laa);
5519d26e4fcSRobert Mustacchi 
5529d26e4fcSRobert Mustacchi /* Manage MAC Address Read Command (indirect 0x0107) */
5539d26e4fcSRobert Mustacchi struct i40e_aqc_mac_address_read {
5549d26e4fcSRobert Mustacchi 	__le16	command_flags;
5559d26e4fcSRobert Mustacchi #define I40E_AQC_LAN_ADDR_VALID		0x10
5569d26e4fcSRobert Mustacchi #define I40E_AQC_SAN_ADDR_VALID		0x20
5579d26e4fcSRobert Mustacchi #define I40E_AQC_PORT_ADDR_VALID	0x40
5589d26e4fcSRobert Mustacchi #define I40E_AQC_WOL_ADDR_VALID		0x80
5599d26e4fcSRobert Mustacchi #define I40E_AQC_MC_MAG_EN_VALID	0x100
5603d75a287SRobert Mustacchi #define I40E_AQC_WOL_PRESERVE_STATUS	0x200
5613d75a287SRobert Mustacchi #define I40E_AQC_ADDR_VALID_MASK	0x3F0
5629d26e4fcSRobert Mustacchi 	u8	reserved[6];
5639d26e4fcSRobert Mustacchi 	__le32	addr_high;
5649d26e4fcSRobert Mustacchi 	__le32	addr_low;
5659d26e4fcSRobert Mustacchi };
5669d26e4fcSRobert Mustacchi 
5679d26e4fcSRobert Mustacchi I40E_CHECK_CMD_LENGTH(i40e_aqc_mac_address_read);
5689d26e4fcSRobert Mustacchi 
5699d26e4fcSRobert Mustacchi struct i40e_aqc_mac_address_read_data {
5709d26e4fcSRobert Mustacchi 	u8 pf_lan_mac[6];
5719d26e4fcSRobert Mustacchi 	u8 pf_san_mac[6];
5729d26e4fcSRobert Mustacchi 	u8 port_mac[6];
5739d26e4fcSRobert Mustacchi 	u8 pf_wol_mac[6];
5749d26e4fcSRobert Mustacchi };
5759d26e4fcSRobert Mustacchi 
5769d26e4fcSRobert Mustacchi I40E_CHECK_STRUCT_LEN(24, i40e_aqc_mac_address_read_data);
5779d26e4fcSRobert Mustacchi 
5789d26e4fcSRobert Mustacchi /* Manage MAC Address Write Command (0x0108) */
5799d26e4fcSRobert Mustacchi struct i40e_aqc_mac_address_write {
5809d26e4fcSRobert Mustacchi 	__le16	command_flags;
5813d75a287SRobert Mustacchi #define I40E_AQC_MC_MAG_EN		0x0100
5823d75a287SRobert Mustacchi #define I40E_AQC_WOL_PRESERVE_ON_PFR	0x0200
5839d26e4fcSRobert Mustacchi #define I40E_AQC_WRITE_TYPE_LAA_ONLY	0x0000
5849d26e4fcSRobert Mustacchi #define I40E_AQC_WRITE_TYPE_LAA_WOL	0x4000
5859d26e4fcSRobert Mustacchi #define I40E_AQC_WRITE_TYPE_PORT	0x8000
5869d26e4fcSRobert Mustacchi #define I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG	0xC000
5879d26e4fcSRobert Mustacchi #define I40E_AQC_WRITE_TYPE_MASK	0xC000
5889d26e4fcSRobert Mustacchi 
5899d26e4fcSRobert Mustacchi 	__le16	mac_sah;
5909d26e4fcSRobert Mustacchi 	__le32	mac_sal;
5919d26e4fcSRobert Mustacchi 	u8	reserved[8];
5929d26e4fcSRobert Mustacchi };
5939d26e4fcSRobert Mustacchi 
5949d26e4fcSRobert Mustacchi I40E_CHECK_CMD_LENGTH(i40e_aqc_mac_address_write);
5959d26e4fcSRobert Mustacchi 
5969d26e4fcSRobert Mustacchi /* PXE commands (0x011x) */
5979d26e4fcSRobert Mustacchi 
5989d26e4fcSRobert Mustacchi /* Clear PXE Command and response  (direct 0x0110) */
5999d26e4fcSRobert Mustacchi struct i40e_aqc_clear_pxe {
6009d26e4fcSRobert Mustacchi 	u8	rx_cnt;
6019d26e4fcSRobert Mustacchi 	u8	reserved[15];
6029d26e4fcSRobert Mustacchi };
6039d26e4fcSRobert Mustacchi 
6049d26e4fcSRobert Mustacchi I40E_CHECK_CMD_LENGTH(i40e_aqc_clear_pxe);
6059d26e4fcSRobert Mustacchi 
6063d75a287SRobert Mustacchi /* Set WoL Filter (0x0120) */
6073d75a287SRobert Mustacchi 
6083d75a287SRobert Mustacchi struct i40e_aqc_set_wol_filter {
6093d75a287SRobert Mustacchi 	__le16 filter_index;
6103d75a287SRobert Mustacchi #define I40E_AQC_MAX_NUM_WOL_FILTERS	8
6113d75a287SRobert Mustacchi #define I40E_AQC_SET_WOL_FILTER_TYPE_MAGIC_SHIFT	15
6123d75a287SRobert Mustacchi #define I40E_AQC_SET_WOL_FILTER_TYPE_MAGIC_MASK	(0x1 << \
6133d75a287SRobert Mustacchi 		I40E_AQC_SET_WOL_FILTER_TYPE_MAGIC_SHIFT)
6143d75a287SRobert Mustacchi 
6153d75a287SRobert Mustacchi #define I40E_AQC_SET_WOL_FILTER_INDEX_SHIFT		0
6163d75a287SRobert Mustacchi #define I40E_AQC_SET_WOL_FILTER_INDEX_MASK	(0x7 << \
6173d75a287SRobert Mustacchi 		I40E_AQC_SET_WOL_FILTER_INDEX_SHIFT)
6183d75a287SRobert Mustacchi 	__le16 cmd_flags;
6193d75a287SRobert Mustacchi #define I40E_AQC_SET_WOL_FILTER				0x8000
6203d75a287SRobert Mustacchi #define I40E_AQC_SET_WOL_FILTER_NO_TCO_WOL		0x4000
6213d75a287SRobert Mustacchi #define I40E_AQC_SET_WOL_FILTER_WOL_PRESERVE_ON_PFR	0x2000
6223d75a287SRobert Mustacchi #define I40E_AQC_SET_WOL_FILTER_ACTION_CLEAR		0
6233d75a287SRobert Mustacchi #define I40E_AQC_SET_WOL_FILTER_ACTION_SET		1
6243d75a287SRobert Mustacchi 	__le16 valid_flags;
6253d75a287SRobert Mustacchi #define I40E_AQC_SET_WOL_FILTER_ACTION_VALID		0x8000
6263d75a287SRobert Mustacchi #define I40E_AQC_SET_WOL_FILTER_NO_TCO_ACTION_VALID	0x4000
6273d75a287SRobert Mustacchi 	u8 reserved[2];
6283d75a287SRobert Mustacchi 	__le32	address_high;
6293d75a287SRobert Mustacchi 	__le32	address_low;
6303d75a287SRobert Mustacchi };
6313d75a287SRobert Mustacchi 
6323d75a287SRobert Mustacchi I40E_CHECK_CMD_LENGTH(i40e_aqc_set_wol_filter);
6333d75a287SRobert Mustacchi 
6343d75a287SRobert Mustacchi struct i40e_aqc_set_wol_filter_data {
6353d75a287SRobert Mustacchi 	u8 filter[128];
6363d75a287SRobert Mustacchi 	u8 mask[16];
6373d75a287SRobert Mustacchi };
6383d75a287SRobert Mustacchi 
6393d75a287SRobert Mustacchi I40E_CHECK_STRUCT_LEN(0x90, i40e_aqc_set_wol_filter_data);
6403d75a287SRobert Mustacchi 
6413d75a287SRobert Mustacchi /* Get Wake Reason (0x0121) */
6423d75a287SRobert Mustacchi 
6433d75a287SRobert Mustacchi struct i40e_aqc_get_wake_reason_completion {
6443d75a287SRobert Mustacchi 	u8 reserved_1[2];
6453d75a287SRobert Mustacchi 	__le16 wake_reason;
6463d75a287SRobert Mustacchi #define I40E_AQC_GET_WAKE_UP_REASON_WOL_REASON_MATCHED_INDEX_SHIFT	0
6473d75a287SRobert Mustacchi #define I40E_AQC_GET_WAKE_UP_REASON_WOL_REASON_MATCHED_INDEX_MASK (0xFF << \
6483d75a287SRobert Mustacchi 		I40E_AQC_GET_WAKE_UP_REASON_WOL_REASON_MATCHED_INDEX_SHIFT)
6493d75a287SRobert Mustacchi #define I40E_AQC_GET_WAKE_UP_REASON_WOL_REASON_RESERVED_SHIFT	8
6503d75a287SRobert Mustacchi #define I40E_AQC_GET_WAKE_UP_REASON_WOL_REASON_RESERVED_MASK	(0xFF << \
6513d75a287SRobert Mustacchi 		I40E_AQC_GET_WAKE_UP_REASON_WOL_REASON_RESERVED_SHIFT)
6523d75a287SRobert Mustacchi 	u8 reserved_2[12];
6533d75a287SRobert Mustacchi };
6543d75a287SRobert Mustacchi 
6553d75a287SRobert Mustacchi I40E_CHECK_CMD_LENGTH(i40e_aqc_get_wake_reason_completion);
6563d75a287SRobert Mustacchi 
6579d26e4fcSRobert Mustacchi /* Switch configuration commands (0x02xx) */
6589d26e4fcSRobert Mustacchi 
6599d26e4fcSRobert Mustacchi /* Used by many indirect commands that only pass an seid and a buffer in the
6609d26e4fcSRobert Mustacchi  * command
6619d26e4fcSRobert Mustacchi  */
6629d26e4fcSRobert Mustacchi struct i40e_aqc_switch_seid {
6639d26e4fcSRobert Mustacchi 	__le16	seid;
6649d26e4fcSRobert Mustacchi 	u8	reserved[6];
6659d26e4fcSRobert Mustacchi 	__le32	addr_high;
6669d26e4fcSRobert Mustacchi 	__le32	addr_low;
6679d26e4fcSRobert Mustacchi };
6689d26e4fcSRobert Mustacchi 
6699d26e4fcSRobert Mustacchi I40E_CHECK_CMD_LENGTH(i40e_aqc_switch_seid);
6709d26e4fcSRobert Mustacchi 
6719d26e4fcSRobert Mustacchi /* Get Switch Configuration command (indirect 0x0200)
6729d26e4fcSRobert Mustacchi  * uses i40e_aqc_switch_seid for the descriptor
6739d26e4fcSRobert Mustacchi  */
6749d26e4fcSRobert Mustacchi struct i40e_aqc_get_switch_config_header_resp {
6759d26e4fcSRobert Mustacchi 	__le16	num_reported;
6769d26e4fcSRobert Mustacchi 	__le16	num_total;
6779d26e4fcSRobert Mustacchi 	u8	reserved[12];
6789d26e4fcSRobert Mustacchi };
6799d26e4fcSRobert Mustacchi 
6809d26e4fcSRobert Mustacchi I40E_CHECK_CMD_LENGTH(i40e_aqc_get_switch_config_header_resp);
6819d26e4fcSRobert Mustacchi 
6829d26e4fcSRobert Mustacchi struct i40e_aqc_switch_config_element_resp {
6839d26e4fcSRobert Mustacchi 	u8	element_type;
6849d26e4fcSRobert Mustacchi #define I40E_AQ_SW_ELEM_TYPE_MAC	1
6859d26e4fcSRobert Mustacchi #define I40E_AQ_SW_ELEM_TYPE_PF		2
6869d26e4fcSRobert Mustacchi #define I40E_AQ_SW_ELEM_TYPE_VF		3
6879d26e4fcSRobert Mustacchi #define I40E_AQ_SW_ELEM_TYPE_EMP	4
6889d26e4fcSRobert Mustacchi #define I40E_AQ_SW_ELEM_TYPE_BMC	5
6899d26e4fcSRobert Mustacchi #define I40E_AQ_SW_ELEM_TYPE_PV		16
6909d26e4fcSRobert Mustacchi #define I40E_AQ_SW_ELEM_TYPE_VEB	17
6919d26e4fcSRobert Mustacchi #define I40E_AQ_SW_ELEM_TYPE_PA		18
6929d26e4fcSRobert Mustacchi #define I40E_AQ_SW_ELEM_TYPE_VSI	19
6939d26e4fcSRobert Mustacchi 	u8	revision;
6949d26e4fcSRobert Mustacchi #define I40E_AQ_SW_ELEM_REV_1		1
6959d26e4fcSRobert Mustacchi 	__le16	seid;
6969d26e4fcSRobert Mustacchi 	__le16	uplink_seid;
6979d26e4fcSRobert Mustacchi 	__le16	downlink_seid;
6989d26e4fcSRobert Mustacchi 	u8	reserved[3];
6999d26e4fcSRobert Mustacchi 	u8	connection_type;
7009d26e4fcSRobert Mustacchi #define I40E_AQ_CONN_TYPE_REGULAR	0x1
7019d26e4fcSRobert Mustacchi #define I40E_AQ_CONN_TYPE_DEFAULT	0x2
7029d26e4fcSRobert Mustacchi #define I40E_AQ_CONN_TYPE_CASCADED	0x3
7039d26e4fcSRobert Mustacchi 	__le16	scheduler_id;
7049d26e4fcSRobert Mustacchi 	__le16	element_info;
7059d26e4fcSRobert Mustacchi };
7069d26e4fcSRobert Mustacchi 
7079d26e4fcSRobert Mustacchi I40E_CHECK_STRUCT_LEN(0x10, i40e_aqc_switch_config_element_resp);
7089d26e4fcSRobert Mustacchi 
7099d26e4fcSRobert Mustacchi /* Get Switch Configuration (indirect 0x0200)
7109d26e4fcSRobert Mustacchi  *    an array of elements are returned in the response buffer
7119d26e4fcSRobert Mustacchi  *    the first in the array is the header, remainder are elements
7129d26e4fcSRobert Mustacchi  */
7139d26e4fcSRobert Mustacchi struct i40e_aqc_get_switch_config_resp {
7149d26e4fcSRobert Mustacchi 	struct i40e_aqc_get_switch_config_header_resp	header;
7159d26e4fcSRobert Mustacchi 	struct i40e_aqc_switch_config_element_resp	element[1];
7169d26e4fcSRobert Mustacchi };
7179d26e4fcSRobert Mustacchi 
7189d26e4fcSRobert Mustacchi I40E_CHECK_STRUCT_LEN(0x20, i40e_aqc_get_switch_config_resp);
7199d26e4fcSRobert Mustacchi 
7209d26e4fcSRobert Mustacchi /* Add Statistics (direct 0x0201)
7219d26e4fcSRobert Mustacchi  * Remove Statistics (direct 0x0202)
7229d26e4fcSRobert Mustacchi  */
7239d26e4fcSRobert Mustacchi struct i40e_aqc_add_remove_statistics {
7249d26e4fcSRobert Mustacchi 	__le16	seid;
7259d26e4fcSRobert Mustacchi 	__le16	vlan;
7269d26e4fcSRobert Mustacchi 	__le16	stat_index;
7279d26e4fcSRobert Mustacchi 	u8	reserved[10];
7289d26e4fcSRobert Mustacchi };
7299d26e4fcSRobert Mustacchi 
7309d26e4fcSRobert Mustacchi I40E_CHECK_CMD_LENGTH(i40e_aqc_add_remove_statistics);
7319d26e4fcSRobert Mustacchi 
7329d26e4fcSRobert Mustacchi /* Set Port Parameters command (direct 0x0203) */
7339d26e4fcSRobert Mustacchi struct i40e_aqc_set_port_parameters {
7349d26e4fcSRobert Mustacchi 	__le16	command_flags;
7359d26e4fcSRobert Mustacchi #define I40E_AQ_SET_P_PARAMS_SAVE_BAD_PACKETS	1
7369d26e4fcSRobert Mustacchi #define I40E_AQ_SET_P_PARAMS_PAD_SHORT_PACKETS	2 /* must set! */
7379d26e4fcSRobert Mustacchi #define I40E_AQ_SET_P_PARAMS_DOUBLE_VLAN_ENA	4
7389d26e4fcSRobert Mustacchi 	__le16	bad_frame_vsi;
7393d75a287SRobert Mustacchi #define I40E_AQ_SET_P_PARAMS_BFRAME_SEID_SHIFT	0x0
7403d75a287SRobert Mustacchi #define I40E_AQ_SET_P_PARAMS_BFRAME_SEID_MASK	0x3FF
7419d26e4fcSRobert Mustacchi 	__le16	default_seid;        /* reserved for command */
7429d26e4fcSRobert Mustacchi 	u8	reserved[10];
7439d26e4fcSRobert Mustacchi };
7449d26e4fcSRobert Mustacchi 
7459d26e4fcSRobert Mustacchi I40E_CHECK_CMD_LENGTH(i40e_aqc_set_port_parameters);
7469d26e4fcSRobert Mustacchi 
7479d26e4fcSRobert Mustacchi /* Get Switch Resource Allocation (indirect 0x0204) */
7489d26e4fcSRobert Mustacchi struct i40e_aqc_get_switch_resource_alloc {
7499d26e4fcSRobert Mustacchi 	u8	num_entries;         /* reserved for command */
7509d26e4fcSRobert Mustacchi 	u8	reserved[7];
7519d26e4fcSRobert Mustacchi 	__le32	addr_high;
7529d26e4fcSRobert Mustacchi 	__le32	addr_low;
7539d26e4fcSRobert Mustacchi };
7549d26e4fcSRobert Mustacchi 
7559d26e4fcSRobert Mustacchi I40E_CHECK_CMD_LENGTH(i40e_aqc_get_switch_resource_alloc);
7569d26e4fcSRobert Mustacchi 
7579d26e4fcSRobert Mustacchi /* expect an array of these structs in the response buffer */
7589d26e4fcSRobert Mustacchi struct i40e_aqc_switch_resource_alloc_element_resp {
7599d26e4fcSRobert Mustacchi 	u8	resource_type;
7609d26e4fcSRobert Mustacchi #define I40E_AQ_RESOURCE_TYPE_VEB		0x0
7619d26e4fcSRobert Mustacchi