13dec9fcdSqs /* 23dec9fcdSqs * CDDL HEADER START 33dec9fcdSqs * 43dec9fcdSqs * The contents of this file are subject to the terms of the 53dec9fcdSqs * Common Development and Distribution License (the "License"). 63dec9fcdSqs * You may not use this file except in compliance with the License. 73dec9fcdSqs * 83dec9fcdSqs * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 93dec9fcdSqs * or http://www.opensolaris.org/os/licensing. 103dec9fcdSqs * See the License for the specific language governing permissions 113dec9fcdSqs * and limitations under the License. 123dec9fcdSqs * 133dec9fcdSqs * When distributing Covered Code, include this CDDL HEADER in each 143dec9fcdSqs * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 153dec9fcdSqs * If applicable, add the following below this CDDL HEADER, with the 163dec9fcdSqs * fields enclosed by brackets "[]" replaced with your own identifying 173dec9fcdSqs * information: Portions Copyright [yyyy] [name of copyright owner] 183dec9fcdSqs * 193dec9fcdSqs * CDDL HEADER END 203dec9fcdSqs */ 213dec9fcdSqs /* 223dec9fcdSqs * Copyright 2008 Sun Microsystems, Inc. All rights reserved. 233dec9fcdSqs * Use is subject to license terms. 243dec9fcdSqs */ 253dec9fcdSqs 263dec9fcdSqs #ifndef _SYS_HXGE_HXGE_COMMON_IMPL_H 273dec9fcdSqs #define _SYS_HXGE_HXGE_COMMON_IMPL_H 283dec9fcdSqs 293dec9fcdSqs #ifdef __cplusplus 303dec9fcdSqs extern "C" { 313dec9fcdSqs #endif 323dec9fcdSqs 333dec9fcdSqs #define HPI_REGH(hpi_handle) (hpi_handle.regh) 343dec9fcdSqs #define HPI_REGP(hpi_handle) (hpi_handle.regp) 353dec9fcdSqs 363dec9fcdSqs #define NO_DEBUG 0x0000000000000000ULL 373dec9fcdSqs #define RX_CTL 0x0000000000000001ULL 383dec9fcdSqs #define TX_CTL 0x0000000000000002ULL 393dec9fcdSqs #define OBP_CTL 0x0000000000000004ULL 403dec9fcdSqs #define VPD_CTL 0x0000000000000008ULL 413dec9fcdSqs #define DDI_CTL 0x0000000000000010ULL 423dec9fcdSqs #define MEM_CTL 0x0000000000000020ULL 433dec9fcdSqs #define IOC_CTL 0x0000000000000040ULL 443dec9fcdSqs #define MOD_CTL 0x0000000000000080ULL 453dec9fcdSqs #define DMA_CTL 0x0000000000000100ULL 463dec9fcdSqs #define STR_CTL 0x0000000000000200ULL 473dec9fcdSqs #define INT_CTL 0x0000000000000400ULL 483dec9fcdSqs #define SYSERR_CTL 0x0000000000000800ULL 493dec9fcdSqs #define KST_CTL 0x0000000000001000ULL 503dec9fcdSqs #define FCRAM_CTL 0x0000000000002000ULL 513dec9fcdSqs #define MAC_CTL 0x0000000000004000ULL 523dec9fcdSqs #define DMA2_CTL 0x0000000000008000ULL 533dec9fcdSqs #define RX2_CTL 0x0000000000010000ULL 543dec9fcdSqs #define TX2_CTL 0x0000000000020000ULL 553dec9fcdSqs #define MEM2_CTL 0x0000000000040000ULL 563dec9fcdSqs #define MEM3_CTL 0x0000000000080000ULL 573dec9fcdSqs #define NEMO_CTL 0x0000000000100000ULL 583dec9fcdSqs #define NDD_CTL 0x0000000000200000ULL 593dec9fcdSqs #define NDD2_CTL 0x0000000000400000ULL 603dec9fcdSqs #define PFC_CTL 0x0000000000800000ULL 613dec9fcdSqs #define CFG_CTL 0x0000000001000000ULL 623dec9fcdSqs #define CFG2_CTL 0x0000000002000000ULL 633dec9fcdSqs #define VIR_CTL 0x0000000004000000ULL 643dec9fcdSqs #define VIR2_CTL 0x0000000008000000ULL 653dec9fcdSqs #define HXGE_NOTE 0x0000000010000000ULL 663dec9fcdSqs #define HXGE_ERR_CTL 0x0000000020000000ULL 673dec9fcdSqs #define MAC_INT_CTL 0x0000000040000000ULL 683dec9fcdSqs #define RX_INT_CTL 0x0000000080000000ULL 693dec9fcdSqs #define TX_ERR_CTL 0x0000000100000000ULL 703dec9fcdSqs #define DDI_INT_CTL 0x0000000200000000ULL 71*a512c5d1SQiyan Sun - Sun Microsystems - San Diego United States #define DLADM_CTL 0x0000000400000000ULL 723dec9fcdSqs #define DUMP_ALWAYS 0x2000000000000000ULL 733dec9fcdSqs 743dec9fcdSqs /* HPI Debug and Error defines */ 753dec9fcdSqs #define HPI_RDC_CTL 0x0000000000000001ULL 763dec9fcdSqs #define HPI_TDC_CTL 0x0000000000000002ULL 773dec9fcdSqs #define HPI_VMAC_CTL 0x0000000000000004ULL 783dec9fcdSqs #define HPI_PFC_CTL 0x0000000000000008ULL 793dec9fcdSqs #define HPI_VIR_CTL 0x0000000000000010ULL 803dec9fcdSqs #define HPI_PIO_CTL 0x0000000000000020ULL 813dec9fcdSqs #define HPI_VIO_CTL 0x0000000000000040ULL 823dec9fcdSqs #define HPI_REG_CTL 0x0000000000000080ULL 833dec9fcdSqs #define HPI_ERR_CTL 0x0000000000000100ULL 843dec9fcdSqs 853dec9fcdSqs #include <sys/types.h> 863dec9fcdSqs #include <sys/ddi.h> 873dec9fcdSqs #include <sys/sunddi.h> 883dec9fcdSqs #include <sys/dditypes.h> 893dec9fcdSqs #include <sys/ethernet.h> 903dec9fcdSqs 913dec9fcdSqs #ifdef HXGE_DEBUG 923dec9fcdSqs #define HXGE_DEBUG_MSG(params) hxge_debug_msg params 933dec9fcdSqs #else 943dec9fcdSqs #define HXGE_DEBUG_MSG(params) 953dec9fcdSqs #endif 963dec9fcdSqs 973dec9fcdSqs #define HXGE_ERROR_MSG(params) hxge_debug_msg params 983dec9fcdSqs 993dec9fcdSqs typedef kmutex_t hxge_os_mutex_t; 1003dec9fcdSqs typedef krwlock_t hxge_os_rwlock_t; 1013dec9fcdSqs 1023dec9fcdSqs typedef dev_info_t hxge_dev_info_t; 1033dec9fcdSqs typedef ddi_iblock_cookie_t hxge_intr_cookie_t; 1043dec9fcdSqs 1053dec9fcdSqs typedef ddi_acc_handle_t hxge_os_acc_handle_t; 1063dec9fcdSqs typedef hxge_os_acc_handle_t hpi_reg_handle_t; 107fe930412Sqs #if defined(__i386) 108fe930412Sqs typedef uint32_t hpi_reg_ptr_t; 109fe930412Sqs #else 1103dec9fcdSqs typedef uint64_t hpi_reg_ptr_t; 111fe930412Sqs #endif 1123dec9fcdSqs 1133dec9fcdSqs typedef ddi_dma_handle_t hxge_os_dma_handle_t; 1143dec9fcdSqs typedef struct _hxge_dma_common_t hxge_os_dma_common_t; 1153dec9fcdSqs typedef struct _hxge_block_mv_t hxge_os_block_mv_t; 1163dec9fcdSqs typedef frtn_t hxge_os_frtn_t; 1173dec9fcdSqs 1183dec9fcdSqs #define HXGE_MUTEX_DRIVER MUTEX_DRIVER 1193dec9fcdSqs #define MUTEX_INIT(lock, name, type, arg) \ 1203dec9fcdSqs mutex_init(lock, name, type, arg) 1213dec9fcdSqs #define MUTEX_ENTER(lock) mutex_enter(lock) 1223dec9fcdSqs #define MUTEX_TRY_ENTER(lock) mutex_tryenter(lock) 1233dec9fcdSqs #define MUTEX_EXIT(lock) mutex_exit(lock) 1243dec9fcdSqs #define MUTEX_DESTROY(lock) mutex_destroy(lock) 1253dec9fcdSqs 1263dec9fcdSqs #define RW_INIT(lock, name, type, arg) rw_init(lock, name, type, arg) 1273dec9fcdSqs #define RW_ENTER_WRITER(lock) rw_enter(lock, RW_WRITER) 1283dec9fcdSqs #define RW_ENTER_READER(lock) rw_enter(lock, RW_READER) 1293dec9fcdSqs #define RW_TRY_ENTER(lock, type) rw_tryenter(lock, type) 1303dec9fcdSqs #define RW_EXIT(lock) rw_exit(lock) 1313dec9fcdSqs #define RW_DESTROY(lock) rw_destroy(lock) 1323dec9fcdSqs #define KMEM_ALLOC(size, flag) kmem_alloc(size, flag) 1333dec9fcdSqs #define KMEM_ZALLOC(size, flag) kmem_zalloc(size, flag) 1343dec9fcdSqs #define KMEM_FREE(buf, size) kmem_free(buf, size) 1353dec9fcdSqs 1363dec9fcdSqs #define HXGE_DELAY(microseconds) (drv_usecwait(microseconds)) 1373dec9fcdSqs 138fe930412Sqs /* 139fe930412Sqs * HXGE_HPI_PIO_READ32 and HXGE_HPI_PIO_READ64 should not be called directly 140fe930412Sqs * on 32 bit platforms 141fe930412Sqs */ 1423dec9fcdSqs #define HXGE_HPI_PIO_READ32(hpi_handle, offset) \ 1433dec9fcdSqs (ddi_get32(HPI_REGH(hpi_handle), \ 1443dec9fcdSqs (uint32_t *)(HPI_REGP(hpi_handle) + offset))) 1453dec9fcdSqs 146fe930412Sqs #if defined(__i386) 147fe930412Sqs #define HXGE_HPI_PIO_READ64(hpi_handle, offset) \ 148fe930412Sqs (ddi_get64(HPI_REGH(hpi_handle), \ 149fe930412Sqs (uint64_t *)(HPI_REGP(hpi_handle) + (uint32_t)offset))) 150fe930412Sqs #else 1513dec9fcdSqs #define HXGE_HPI_PIO_READ64(hpi_handle, offset) \ 1523dec9fcdSqs (ddi_get64(HPI_REGH(hpi_handle), \ 1533dec9fcdSqs (uint64_t *)(HPI_REGP(hpi_handle) + offset))) 154fe930412Sqs #endif 1553dec9fcdSqs 156fe930412Sqs #if defined(__i386) 1573dec9fcdSqs 158fe930412Sqs #define HXGE_HPI_PIO_WRITE32(hpi_handle, offset, data) { \ 159fe930412Sqs MUTEX_ENTER(&((hxge_t *)hpi_handle.hxgep)->pio_lock); \ 160fe930412Sqs ddi_put32(HPI_REGH(hpi_handle), \ 161fe930412Sqs (uint32_t *)(HPI_REGP(hpi_handle) + \ 162fe930412Sqs (uint32_t)offset), data); \ 163fe930412Sqs MUTEX_EXIT(&((hxge_t *)hpi_handle.hxgep)->pio_lock); \ 1643dec9fcdSqs } 165fe930412Sqs #define HXGE_HPI_PIO_WRITE64(hpi_handle, offset, data) { \ 166fe930412Sqs MUTEX_ENTER(&((hxge_t *)hpi_handle.hxgep)->pio_lock); \ 167fe930412Sqs ddi_put64(HPI_REGH(hpi_handle), \ 168fe930412Sqs (uint64_t *)(HPI_REGP(hpi_handle) + \ 169fe930412Sqs (uint32_t)offset), data); \ 170fe930412Sqs MUTEX_EXIT(&((hxge_t *)hpi_handle.hxgep)->pio_lock); \ 1713dec9fcdSqs } 172fe930412Sqs #define HXGE_MEM_PIO_READ64(hpi_handle, val_p) { \ 173fe930412Sqs MUTEX_ENTER(&((hxge_t *)hpi_handle.hxgep)->pio_lock); \ 174fe930412Sqs *(val_p) = ddi_get64(HPI_REGH(hpi_handle), \ 175fe930412Sqs (uint64_t *)HPI_REGP(hpi_handle)); \ 176fe930412Sqs MUTEX_EXIT(&((hxge_t *)hpi_handle.hxgep)->pio_lock); \ 1773dec9fcdSqs } 178fe930412Sqs #define HXGE_MEM_PIO_WRITE64(hpi_handle, data) { \ 179fe930412Sqs MUTEX_ENTER(&((hxge_t *)hpi_handle.hxgep)->pio_lock); \ 180fe930412Sqs ddi_put64(HPI_REGH(hpi_handle), \ 181fe930412Sqs (uint64_t *)HPI_REGP(hpi_handle), data); \ 182fe930412Sqs MUTEX_EXIT(&((hxge_t *)hpi_handle.hxgep)->pio_lock); \ 1833dec9fcdSqs } 184fe930412Sqs #define HXGE_REG_RD64(handle, offset, val_p) { \ 185fe930412Sqs MUTEX_ENTER(&((hxge_t *)handle.hxgep)->pio_lock); \ 186fe930412Sqs *(val_p) = HXGE_HPI_PIO_READ64(handle, offset); \ 187fe930412Sqs MUTEX_EXIT(&((hxge_t *)handle.hxgep)->pio_lock); \ 188fe930412Sqs } 189fe930412Sqs #define HXGE_REG_RD32(handle, offset, val_p) { \ 190fe930412Sqs MUTEX_ENTER(&((hxge_t *)handle.hxgep)->pio_lock); \ 191fe930412Sqs *(val_p) = HXGE_HPI_PIO_READ32(handle, offset); \ 192fe930412Sqs MUTEX_EXIT(&((hxge_t *)handle.hxgep)->pio_lock); \ 193fe930412Sqs } 194fe930412Sqs 1953dec9fcdSqs #else 1963dec9fcdSqs 197fe930412Sqs #define HXGE_HPI_PIO_WRITE32(hpi_handle, offset, data) \ 198fe930412Sqs (ddi_put32(HPI_REGH(hpi_handle), \ 199fe930412Sqs (uint32_t *)(HPI_REGP(hpi_handle) + offset), data)) 200fe930412Sqs #define HXGE_HPI_PIO_WRITE64(hpi_handle, offset, data) \ 201fe930412Sqs (ddi_put64(HPI_REGH(hpi_handle), \ 202fe930412Sqs (uint64_t *)(HPI_REGP(hpi_handle) + offset), data)) 203fe930412Sqs #define HXGE_MEM_PIO_READ64(hpi_handle, val_p) { \ 204fe930412Sqs *(val_p) = ddi_get64(HPI_REGH(hpi_handle), \ 205fe930412Sqs (uint64_t *)HPI_REGP(hpi_handle)); \ 2063dec9fcdSqs } 207fe930412Sqs #define HXGE_MEM_PIO_WRITE64(hpi_handle, data) \ 208fe930412Sqs (ddi_put64(HPI_REGH(hpi_handle), \ 209fe930412Sqs (uint64_t *)HPI_REGP(hpi_handle), data)) 210fe930412Sqs #define HXGE_REG_RD64(handle, offset, val_p) { \ 211fe930412Sqs *(val_p) = HXGE_HPI_PIO_READ64(handle, offset); \ 2123dec9fcdSqs } 213fe930412Sqs #define HXGE_REG_RD32(handle, offset, val_p) { \ 214fe930412Sqs *(val_p) = HXGE_HPI_PIO_READ32(handle, offset); \ 2153dec9fcdSqs } 216fe930412Sqs 2173dec9fcdSqs #endif 2183dec9fcdSqs 219fe930412Sqs #define HXGE_REG_WR64(handle, offset, val) { \ 220fe930412Sqs HXGE_HPI_PIO_WRITE64(handle, (offset), (val)); \ 221fe930412Sqs } 222fe930412Sqs #define HXGE_REG_WR32(handle, offset, val) { \ 223fe930412Sqs HXGE_HPI_PIO_WRITE32(handle, (offset), (val)); \ 224fe930412Sqs } 225fe930412Sqs 226fe930412Sqs #define FM_SERVICE_RESTORED(hxgep) \ 227fe930412Sqs if (DDI_FM_EREPORT_CAP(hxgep->fm_capabilities)) \ 228fe930412Sqs ddi_fm_service_impact(hxgep->dip, DDI_SERVICE_RESTORED) 229fe930412Sqs #define HXGE_FM_REPORT_ERROR(hxgep, chan, ereport_id) \ 230fe930412Sqs if (DDI_FM_EREPORT_CAP(hxgep->fm_capabilities)) \ 231fe930412Sqs hxge_fm_report_error(hxgep, chan, ereport_id) 232fe930412Sqs 2333dec9fcdSqs #ifdef __cplusplus 2343dec9fcdSqs } 2353dec9fcdSqs #endif 2363dec9fcdSqs 2373dec9fcdSqs #endif /* _SYS_HXGE_HXGE_COMMON_IMPL_H */ 238