108057504Sxy /*
208057504Sxy * This file is provided under a CDDLv1 license. When using or
308057504Sxy * redistributing this file, you may do so under this license.
408057504Sxy * In redistributing this file this license must be included
508057504Sxy * and no other modification of this header file is permitted.
608057504Sxy *
708057504Sxy * CDDL LICENSE SUMMARY
808057504Sxy *
9d5c3073dSchenlu chen - Sun Microsystems - Beijing China * Copyright(c) 1999 - 2009 Intel Corporation. All rights reserved.
1008057504Sxy *
1108057504Sxy * The contents of this file are subject to the terms of Version
1208057504Sxy * 1.0 of the Common Development and Distribution License (the "License").
1308057504Sxy *
1408057504Sxy * You should have received a copy of the License with this software.
1508057504Sxy * You can obtain a copy of the License at
1608057504Sxy * http://www.opensolaris.org/os/licensing.
1708057504Sxy * See the License for the specific language governing permissions
1808057504Sxy * and limitations under the License.
1908057504Sxy */
2008057504Sxy
2108057504Sxy /*
220dc2366fSVenugopal Iyer * Copyright 2010 Sun Microsystems, Inc. All rights reserved.
2329fd2c16SDavid Höppner * Copyright 2012 David Höppner. All rights reserved.
24da14cebeSEric Cheng * Use is subject to license terms.
2508057504Sxy */
2608057504Sxy
2708057504Sxy /*
2808057504Sxy * **********************************************************************
2908057504Sxy * *
3008057504Sxy * Module Name: e1000g_stat.c *
3108057504Sxy * *
3225f2d433Sxy * Abstract: Functions for processing statistics *
3308057504Sxy * *
3408057504Sxy * **********************************************************************
3508057504Sxy */
3608057504Sxy #include "e1000g_sw.h"
3708057504Sxy #include "e1000g_debug.h"
3808057504Sxy
3925f2d433Sxy static int e1000g_update_stats(kstat_t *ksp, int rw);
40caf05df5SMiles Xu, Sun Microsystems static uint32_t e1000g_read_phy_stat(struct e1000_hw *hw, int reg);
4108057504Sxy
4208057504Sxy /*
4325f2d433Sxy * e1000_tbi_adjust_stats
4425f2d433Sxy *
4525f2d433Sxy * Adjusts statistic counters when a frame is accepted
4625f2d433Sxy * under the TBI workaround. This function has been
4725f2d433Sxy * adapted for Solaris from shared code.
4808057504Sxy */
4908057504Sxy void
e1000_tbi_adjust_stats(struct e1000g * Adapter,uint32_t frame_len,uint8_t * mac_addr)5025f2d433Sxy e1000_tbi_adjust_stats(struct e1000g *Adapter,
5125f2d433Sxy uint32_t frame_len, uint8_t *mac_addr)
5208057504Sxy {
5325f2d433Sxy uint32_t carry_bit;
5425f2d433Sxy p_e1000g_stat_t e1000g_ksp;
5508057504Sxy
5625f2d433Sxy e1000g_ksp = (p_e1000g_stat_t)Adapter->e1000g_ksp->ks_data;
5725f2d433Sxy
5825f2d433Sxy /* First adjust the frame length */
5925f2d433Sxy frame_len--;
6008057504Sxy
6108057504Sxy /*
6208057504Sxy * We need to adjust the statistics counters, since the hardware
6308057504Sxy * counters overcount this packet as a CRC error and undercount
6408057504Sxy * the packet as a good packet
6508057504Sxy */
6625f2d433Sxy /* This packet should not be counted as a CRC error */
6729fd2c16SDavid Höppner Adapter->fcs_errors--;
6825f2d433Sxy /* This packet does count as a Good Packet Received */
6908057504Sxy e1000g_ksp->Gprc.value.ul++;
7008057504Sxy
7108057504Sxy /*
7208057504Sxy * Adjust the Good Octets received counters
7308057504Sxy */
7425f2d433Sxy carry_bit = 0x80000000 & e1000g_ksp->Gorl.value.ul;
7525f2d433Sxy e1000g_ksp->Gorl.value.ul += frame_len;
7608057504Sxy /*
7708057504Sxy * If the high bit of Gorcl (the low 32 bits of the Good Octets
7808057504Sxy * Received Count) was one before the addition,
7908057504Sxy * AND it is zero after, then we lost the carry out,
8008057504Sxy * need to add one to Gorch (Good Octets Received Count High).
8108057504Sxy * This could be simplified if all environments supported
8208057504Sxy * 64-bit integers.
8308057504Sxy */
8425f2d433Sxy if (carry_bit && ((e1000g_ksp->Gorl.value.ul & 0x80000000) == 0)) {
8508057504Sxy e1000g_ksp->Gorh.value.ul++;
8608057504Sxy }
8708057504Sxy /*
8808057504Sxy * Is this a broadcast or multicast? Check broadcast first,
8908057504Sxy * since the test for a multicast frame will test positive on
9008057504Sxy * a broadcast frame.
9108057504Sxy */
9225f2d433Sxy if ((mac_addr[0] == (uint8_t)0xff) &&
9325f2d433Sxy (mac_addr[1] == (uint8_t)0xff)) {
9408057504Sxy /*
9508057504Sxy * Broadcast packet
9608057504Sxy */
9729fd2c16SDavid Höppner Adapter->brdcstrcv++;
9825f2d433Sxy } else if (*mac_addr & 0x01) {
9908057504Sxy /*
10008057504Sxy * Multicast packet
10108057504Sxy */
10229fd2c16SDavid Höppner Adapter->multircv++;
10308057504Sxy }
10425f2d433Sxy
105592a4d85Scc if (frame_len == Adapter->max_frame_size) {
10608057504Sxy /*
10708057504Sxy * In this case, the hardware has overcounted the number of
10808057504Sxy * oversize frames.
10908057504Sxy */
11029fd2c16SDavid Höppner if (Adapter->toolong_errors > 0)
11129fd2c16SDavid Höppner Adapter->toolong_errors--;
11208057504Sxy }
11308057504Sxy
11447b7744cSyy #ifdef E1000G_DEBUG
11508057504Sxy /*
11608057504Sxy * Adjust the bin counters when the extra byte put the frame in the
11725f2d433Sxy * wrong bin. Remember that the frame_len was adjusted above.
11808057504Sxy */
11925f2d433Sxy if (frame_len == 64) {
12008057504Sxy e1000g_ksp->Prc64.value.ul++;
12108057504Sxy e1000g_ksp->Prc127.value.ul--;
12225f2d433Sxy } else if (frame_len == 127) {
12308057504Sxy e1000g_ksp->Prc127.value.ul++;
12408057504Sxy e1000g_ksp->Prc255.value.ul--;
12525f2d433Sxy } else if (frame_len == 255) {
12608057504Sxy e1000g_ksp->Prc255.value.ul++;
12708057504Sxy e1000g_ksp->Prc511.value.ul--;
12825f2d433Sxy } else if (frame_len == 511) {
12908057504Sxy e1000g_ksp->Prc511.value.ul++;
13008057504Sxy e1000g_ksp->Prc1023.value.ul--;
13125f2d433Sxy } else if (frame_len == 1023) {
13208057504Sxy e1000g_ksp->Prc1023.value.ul++;
13308057504Sxy e1000g_ksp->Prc1522.value.ul--;
13425f2d433Sxy } else if (frame_len == 1522) {
13508057504Sxy e1000g_ksp->Prc1522.value.ul++;
13608057504Sxy }
13747b7744cSyy #endif
13808057504Sxy }
13908057504Sxy
14008057504Sxy
14108057504Sxy /*
14225f2d433Sxy * e1000g_update_stats - update driver private kstat counters
14325f2d433Sxy *
14425f2d433Sxy * This routine will dump and reset the e1000's internal
14525f2d433Sxy * statistics counters. The current stats dump values will
14625f2d433Sxy * be sent to the kernel status area.
14708057504Sxy */
14808057504Sxy static int
e1000g_update_stats(kstat_t * ksp,int rw)14925f2d433Sxy e1000g_update_stats(kstat_t *ksp, int rw)
15008057504Sxy {
15108057504Sxy struct e1000g *Adapter;
15225f2d433Sxy struct e1000_hw *hw;
15325f2d433Sxy p_e1000g_stat_t e1000g_ksp;
15425f2d433Sxy e1000g_tx_ring_t *tx_ring;
15525f2d433Sxy e1000g_rx_ring_t *rx_ring;
15657ef6f69Sguoqing zhu - Sun Microsystems - Beijing China #ifdef E1000G_DEBUG
15754e0d7a5SMiles Xu, Sun Microsystems e1000g_rx_data_t *rx_data;
15857ef6f69Sguoqing zhu - Sun Microsystems - Beijing China #endif
15908057504Sxy uint64_t val;
16008057504Sxy uint32_t low_val, high_val;
16108057504Sxy
16208057504Sxy if (rw == KSTAT_WRITE)
16308057504Sxy return (EACCES);
16408057504Sxy
16508057504Sxy Adapter = (struct e1000g *)ksp->ks_private;
16608057504Sxy ASSERT(Adapter != NULL);
16725f2d433Sxy e1000g_ksp = (p_e1000g_stat_t)ksp->ks_data;
16808057504Sxy ASSERT(e1000g_ksp != NULL);
16925f2d433Sxy hw = &Adapter->shared;
17025f2d433Sxy
17125f2d433Sxy tx_ring = Adapter->tx_ring;
17225f2d433Sxy rx_ring = Adapter->rx_ring;
17357ef6f69Sguoqing zhu - Sun Microsystems - Beijing China #ifdef E1000G_DEBUG
17454e0d7a5SMiles Xu, Sun Microsystems rx_data = rx_ring->rx_data;
17557ef6f69Sguoqing zhu - Sun Microsystems - Beijing China #endif
17625f2d433Sxy
17725f2d433Sxy rw_enter(&Adapter->chip_lock, RW_WRITER);
17808057504Sxy
17908057504Sxy e1000g_ksp->reset_count.value.ul = Adapter->reset_count;
18008057504Sxy
18125f2d433Sxy e1000g_ksp->rx_error.value.ul = rx_ring->stat_error;
18225f2d433Sxy e1000g_ksp->rx_allocb_fail.value.ul = rx_ring->stat_allocb_fail;
18346ebaa55SMiles Xu, Sun Microsystems e1000g_ksp->rx_size_error.value.ul = rx_ring->stat_size_error;
18425f2d433Sxy
18525f2d433Sxy e1000g_ksp->tx_no_swpkt.value.ul = tx_ring->stat_no_swpkt;
18625f2d433Sxy e1000g_ksp->tx_no_desc.value.ul = tx_ring->stat_no_desc;
18725f2d433Sxy e1000g_ksp->tx_send_fail.value.ul = tx_ring->stat_send_fail;
18825f2d433Sxy e1000g_ksp->tx_reschedule.value.ul = tx_ring->stat_reschedule;
18925f2d433Sxy e1000g_ksp->tx_over_size.value.ul = tx_ring->stat_over_size;
19025f2d433Sxy
19125f2d433Sxy #ifdef E1000G_DEBUG
19225f2d433Sxy e1000g_ksp->rx_none.value.ul = rx_ring->stat_none;
19325f2d433Sxy e1000g_ksp->rx_multi_desc.value.ul = rx_ring->stat_multi_desc;
19425f2d433Sxy e1000g_ksp->rx_no_freepkt.value.ul = rx_ring->stat_no_freepkt;
19554e0d7a5SMiles Xu, Sun Microsystems if (rx_data != NULL)
19654e0d7a5SMiles Xu, Sun Microsystems e1000g_ksp->rx_avail_freepkt.value.ul = rx_data->avail_freepkt;
19725f2d433Sxy
19825f2d433Sxy e1000g_ksp->tx_under_size.value.ul = tx_ring->stat_under_size;
19925f2d433Sxy e1000g_ksp->tx_exceed_frags.value.ul = tx_ring->stat_exceed_frags;
20025f2d433Sxy e1000g_ksp->tx_empty_frags.value.ul = tx_ring->stat_empty_frags;
20125f2d433Sxy e1000g_ksp->tx_recycle.value.ul = tx_ring->stat_recycle;
20225f2d433Sxy e1000g_ksp->tx_recycle_intr.value.ul = tx_ring->stat_recycle_intr;
20325f2d433Sxy e1000g_ksp->tx_recycle_retry.value.ul = tx_ring->stat_recycle_retry;
20425f2d433Sxy e1000g_ksp->tx_recycle_none.value.ul = tx_ring->stat_recycle_none;
20525f2d433Sxy e1000g_ksp->tx_copy.value.ul = tx_ring->stat_copy;
20625f2d433Sxy e1000g_ksp->tx_bind.value.ul = tx_ring->stat_bind;
20725f2d433Sxy e1000g_ksp->tx_multi_copy.value.ul = tx_ring->stat_multi_copy;
20825f2d433Sxy e1000g_ksp->tx_multi_cookie.value.ul = tx_ring->stat_multi_cookie;
20925f2d433Sxy e1000g_ksp->tx_lack_desc.value.ul = tx_ring->stat_lack_desc;
21025f2d433Sxy #endif
21108057504Sxy
21208057504Sxy /*
21308057504Sxy * Standard Stats
21408057504Sxy */
21525f2d433Sxy e1000g_ksp->Mpc.value.ul += E1000_READ_REG(hw, E1000_MPC);
21625f2d433Sxy e1000g_ksp->Rlec.value.ul += E1000_READ_REG(hw, E1000_RLEC);
21725f2d433Sxy e1000g_ksp->Xonrxc.value.ul += E1000_READ_REG(hw, E1000_XONRXC);
21825f2d433Sxy e1000g_ksp->Xontxc.value.ul += E1000_READ_REG(hw, E1000_XONTXC);
21925f2d433Sxy e1000g_ksp->Xoffrxc.value.ul += E1000_READ_REG(hw, E1000_XOFFRXC);
22025f2d433Sxy e1000g_ksp->Xofftxc.value.ul += E1000_READ_REG(hw, E1000_XOFFTXC);
22125f2d433Sxy e1000g_ksp->Fcruc.value.ul += E1000_READ_REG(hw, E1000_FCRUC);
22225f2d433Sxy
22325f2d433Sxy if ((hw->mac.type != e1000_ich8lan) &&
2244d737963Sxiangtao you - Sun Microsystems - Beijing China (hw->mac.type != e1000_ich9lan) &&
225caf05df5SMiles Xu, Sun Microsystems (hw->mac.type != e1000_ich10lan) &&
226caf05df5SMiles Xu, Sun Microsystems (hw->mac.type != e1000_pchlan)) {
22725f2d433Sxy e1000g_ksp->Symerrs.value.ul +=
22825f2d433Sxy E1000_READ_REG(hw, E1000_SYMERRS);
22947b7744cSyy #ifdef E1000G_DEBUG
23025f2d433Sxy e1000g_ksp->Prc64.value.ul +=
23125f2d433Sxy E1000_READ_REG(hw, E1000_PRC64);
23225f2d433Sxy e1000g_ksp->Prc127.value.ul +=
23325f2d433Sxy E1000_READ_REG(hw, E1000_PRC127);
23425f2d433Sxy e1000g_ksp->Prc255.value.ul +=
23525f2d433Sxy E1000_READ_REG(hw, E1000_PRC255);
23625f2d433Sxy e1000g_ksp->Prc511.value.ul +=
23725f2d433Sxy E1000_READ_REG(hw, E1000_PRC511);
23825f2d433Sxy e1000g_ksp->Prc1023.value.ul +=
23925f2d433Sxy E1000_READ_REG(hw, E1000_PRC1023);
24025f2d433Sxy e1000g_ksp->Prc1522.value.ul +=
24125f2d433Sxy E1000_READ_REG(hw, E1000_PRC1522);
24225f2d433Sxy
24325f2d433Sxy e1000g_ksp->Ptc64.value.ul +=
24425f2d433Sxy E1000_READ_REG(hw, E1000_PTC64);
24525f2d433Sxy e1000g_ksp->Ptc127.value.ul +=
24625f2d433Sxy E1000_READ_REG(hw, E1000_PTC127);
24725f2d433Sxy e1000g_ksp->Ptc255.value.ul +=
24825f2d433Sxy E1000_READ_REG(hw, E1000_PTC255);
24925f2d433Sxy e1000g_ksp->Ptc511.value.ul +=
25025f2d433Sxy E1000_READ_REG(hw, E1000_PTC511);
25125f2d433Sxy e1000g_ksp->Ptc1023.value.ul +=
25225f2d433Sxy E1000_READ_REG(hw, E1000_PTC1023);
25325f2d433Sxy e1000g_ksp->Ptc1522.value.ul +=
25425f2d433Sxy E1000_READ_REG(hw, E1000_PTC1522);
25547b7744cSyy #endif
25625f2d433Sxy }
25708057504Sxy
25825f2d433Sxy e1000g_ksp->Gprc.value.ul += E1000_READ_REG(hw, E1000_GPRC);
25925f2d433Sxy e1000g_ksp->Gptc.value.ul += E1000_READ_REG(hw, E1000_GPTC);
26025f2d433Sxy e1000g_ksp->Rfc.value.ul += E1000_READ_REG(hw, E1000_RFC);
261caf05df5SMiles Xu, Sun Microsystems e1000g_ksp->Tncrs.value.ul += e1000g_read_phy_stat(hw, E1000_TNCRS);
26225f2d433Sxy e1000g_ksp->Tsctc.value.ul += E1000_READ_REG(hw, E1000_TSCTC);
26325f2d433Sxy e1000g_ksp->Tsctfc.value.ul += E1000_READ_REG(hw, E1000_TSCTFC);
26408057504Sxy
26525f2d433Sxy /*
26625f2d433Sxy * Adaptive Calculations
26725f2d433Sxy */
26825f2d433Sxy hw->mac.tx_packet_delta = E1000_READ_REG(hw, E1000_TPT);
26929fd2c16SDavid Höppner Adapter->opackets += hw->mac.tx_packet_delta;
27008057504Sxy
27108057504Sxy /*
27208057504Sxy * The 64-bit register will reset whenever the upper
27308057504Sxy * 32 bits are read. So we need to read the lower
27408057504Sxy * 32 bits first, then read the upper 32 bits.
27508057504Sxy */
27625f2d433Sxy low_val = E1000_READ_REG(hw, E1000_GORCL);
27725f2d433Sxy high_val = E1000_READ_REG(hw, E1000_GORCH);
27808057504Sxy val = (uint64_t)e1000g_ksp->Gorh.value.ul << 32 |
27908057504Sxy (uint64_t)e1000g_ksp->Gorl.value.ul;
28008057504Sxy val += (uint64_t)high_val << 32 | (uint64_t)low_val;
28108057504Sxy e1000g_ksp->Gorl.value.ul = (uint32_t)val;
28208057504Sxy e1000g_ksp->Gorh.value.ul = (uint32_t)(val >> 32);
28308057504Sxy
28425f2d433Sxy low_val = E1000_READ_REG(hw, E1000_GOTCL);
28525f2d433Sxy high_val = E1000_READ_REG(hw, E1000_GOTCH);
28608057504Sxy val = (uint64_t)e1000g_ksp->Goth.value.ul << 32 |
28708057504Sxy (uint64_t)e1000g_ksp->Gotl.value.ul;
28808057504Sxy val += (uint64_t)high_val << 32 | (uint64_t)low_val;
28908057504Sxy e1000g_ksp->Gotl.value.ul = (uint32_t)val;
29008057504Sxy e1000g_ksp->Goth.value.ul = (uint32_t)(val >> 32);
29108057504Sxy
29225f2d433Sxy low_val = E1000_READ_REG(hw, E1000_TORL);
29325f2d433Sxy high_val = E1000_READ_REG(hw, E1000_TORH);
29429fd2c16SDavid Höppner Adapter->rbytes +=
29529fd2c16SDavid Höppner (uint64_t)high_val << 32 | (uint64_t)low_val;
29608057504Sxy
29725f2d433Sxy low_val = E1000_READ_REG(hw, E1000_TOTL);
29825f2d433Sxy high_val = E1000_READ_REG(hw, E1000_TOTH);
29929fd2c16SDavid Höppner Adapter->obytes +=
30029fd2c16SDavid Höppner (uint64_t)high_val << 32 | (uint64_t)low_val;
30108057504Sxy
30225f2d433Sxy rw_exit(&Adapter->chip_lock);
30308057504Sxy
304ec39b9cfSchangqing li - Sun Microsystems - Beijing China if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) {
3059b6541b3Sgl ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_UNAFFECTED);
306ec39b9cfSchangqing li - Sun Microsystems - Beijing China return (EIO);
307ec39b9cfSchangqing li - Sun Microsystems - Beijing China }
3089b6541b3Sgl
30908057504Sxy return (0);
31008057504Sxy }
31108057504Sxy
31208057504Sxy int
e1000g_m_stat(void * arg,uint_t stat,uint64_t * val)31308057504Sxy e1000g_m_stat(void *arg, uint_t stat, uint64_t *val)
31408057504Sxy {
31508057504Sxy struct e1000g *Adapter = (struct e1000g *)arg;
31625f2d433Sxy struct e1000_hw *hw = &Adapter->shared;
31725f2d433Sxy p_e1000g_stat_t e1000g_ksp;
31808057504Sxy uint32_t low_val, high_val;
31908057504Sxy
32025f2d433Sxy e1000g_ksp = (p_e1000g_stat_t)Adapter->e1000g_ksp->ks_data;
32125f2d433Sxy
3224914a7d0Syy rw_enter(&Adapter->chip_lock, RW_READER);
32308057504Sxy
324d5c3073dSchenlu chen - Sun Microsystems - Beijing China if (Adapter->e1000g_state & E1000G_SUSPENDED) {
325d5c3073dSchenlu chen - Sun Microsystems - Beijing China rw_exit(&Adapter->chip_lock);
326d5c3073dSchenlu chen - Sun Microsystems - Beijing China return (ECANCELED);
327d5c3073dSchenlu chen - Sun Microsystems - Beijing China }
328d5c3073dSchenlu chen - Sun Microsystems - Beijing China
32908057504Sxy switch (stat) {
33008057504Sxy case MAC_STAT_IFSPEED:
33108057504Sxy *val = Adapter->link_speed * 1000000ull;
33208057504Sxy break;
33308057504Sxy
33408057504Sxy case MAC_STAT_MULTIRCV:
33529fd2c16SDavid Höppner Adapter->multircv +=
33625f2d433Sxy E1000_READ_REG(hw, E1000_MPRC);
33729fd2c16SDavid Höppner *val = Adapter->multircv;
33808057504Sxy break;
33908057504Sxy
34008057504Sxy case MAC_STAT_BRDCSTRCV:
34129fd2c16SDavid Höppner Adapter->brdcstrcv +=
34225f2d433Sxy E1000_READ_REG(hw, E1000_BPRC);
34329fd2c16SDavid Höppner *val = Adapter->brdcstrcv;
34408057504Sxy break;
34508057504Sxy
34608057504Sxy case MAC_STAT_MULTIXMT:
34729fd2c16SDavid Höppner Adapter->multixmt +=
34825f2d433Sxy E1000_READ_REG(hw, E1000_MPTC);
34929fd2c16SDavid Höppner *val = Adapter->multixmt;
35008057504Sxy break;
35108057504Sxy
35208057504Sxy case MAC_STAT_BRDCSTXMT:
35329fd2c16SDavid Höppner Adapter->brdcstxmt +=
35425f2d433Sxy E1000_READ_REG(hw, E1000_BPTC);
35529fd2c16SDavid Höppner *val = Adapter->brdcstxmt;
35608057504Sxy break;
35708057504Sxy
35808057504Sxy case MAC_STAT_NORCVBUF:
35929fd2c16SDavid Höppner Adapter->norcvbuf +=
36025f2d433Sxy E1000_READ_REG(hw, E1000_RNBC);
36129fd2c16SDavid Höppner *val = Adapter->norcvbuf;
36208057504Sxy break;
36308057504Sxy
36408057504Sxy case MAC_STAT_IERRORS:
36529fd2c16SDavid Höppner Adapter->macrcv_errors +=
36625f2d433Sxy E1000_READ_REG(hw, E1000_RXERRC);
36729fd2c16SDavid Höppner Adapter->align_errors +=
36825f2d433Sxy E1000_READ_REG(hw, E1000_ALGNERRC);
36908057504Sxy e1000g_ksp->Rlec.value.ul +=
37025f2d433Sxy E1000_READ_REG(hw, E1000_RLEC);
37129fd2c16SDavid Höppner Adapter->fcs_errors +=
37225f2d433Sxy E1000_READ_REG(hw, E1000_CRCERRS);
37329fd2c16SDavid Höppner Adapter->carrier_errors +=
37425f2d433Sxy E1000_READ_REG(hw, E1000_CEXTERR);
37529fd2c16SDavid Höppner *val = Adapter->macrcv_errors +
37629fd2c16SDavid Höppner Adapter->align_errors +
37708057504Sxy e1000g_ksp->Rlec.value.ul +
37829fd2c16SDavid Höppner Adapter->fcs_errors +
37929fd2c16SDavid Höppner Adapter->carrier_errors;
38008057504Sxy break;
38108057504Sxy
38208057504Sxy case MAC_STAT_NOXMTBUF:
38325f2d433Sxy *val = Adapter->tx_ring->stat_no_desc;
38408057504Sxy break;
38508057504Sxy
38608057504Sxy case MAC_STAT_OERRORS:
38729fd2c16SDavid Höppner Adapter->oerrors +=
388caf05df5SMiles Xu, Sun Microsystems e1000g_read_phy_stat(hw, E1000_ECOL);
38929fd2c16SDavid Höppner *val = Adapter->oerrors;
39008057504Sxy break;
39108057504Sxy
39208057504Sxy case MAC_STAT_COLLISIONS:
39329fd2c16SDavid Höppner Adapter->collisions +=
394caf05df5SMiles Xu, Sun Microsystems e1000g_read_phy_stat(hw, E1000_COLC);
39529fd2c16SDavid Höppner *val = Adapter->collisions;
39608057504Sxy break;
39708057504Sxy
39808057504Sxy case MAC_STAT_RBYTES:
39908057504Sxy /*
40008057504Sxy * The 64-bit register will reset whenever the upper
40108057504Sxy * 32 bits are read. So we need to read the lower
40208057504Sxy * 32 bits first, then read the upper 32 bits.
40308057504Sxy */
40425f2d433Sxy low_val = E1000_READ_REG(hw, E1000_TORL);
40525f2d433Sxy high_val = E1000_READ_REG(hw, E1000_TORH);
40629fd2c16SDavid Höppner Adapter->rbytes +=
40729fd2c16SDavid Höppner (uint64_t)high_val << 32 | (uint64_t)low_val;
40829fd2c16SDavid Höppner *val = Adapter->rbytes;
40908057504Sxy break;
41008057504Sxy
41108057504Sxy case MAC_STAT_IPACKETS:
41229fd2c16SDavid Höppner Adapter->ipackets +=
41325f2d433Sxy E1000_READ_REG(hw, E1000_TPR);
41429fd2c16SDavid Höppner *val = Adapter->ipackets;
41508057504Sxy break;
41608057504Sxy
41708057504Sxy case MAC_STAT_OBYTES:
41808057504Sxy /*
41908057504Sxy * The 64-bit register will reset whenever the upper
42008057504Sxy * 32 bits are read. So we need to read the lower
42108057504Sxy * 32 bits first, then read the upper 32 bits.
42208057504Sxy */
42325f2d433Sxy low_val = E1000_READ_REG(hw, E1000_TOTL);
42425f2d433Sxy high_val = E1000_READ_REG(hw, E1000_TOTH);
42529fd2c16SDavid Höppner Adapter->obytes +=
42629fd2c16SDavid Höppner (uint64_t)high_val << 32 | (uint64_t)low_val;
42729fd2c16SDavid Höppner *val = Adapter->obytes;
42808057504Sxy break;
42908057504Sxy
43008057504Sxy case MAC_STAT_OPACKETS:
43129fd2c16SDavid Höppner Adapter->opackets +=
43225f2d433Sxy E1000_READ_REG(hw, E1000_TPT);
43329fd2c16SDavid Höppner *val = Adapter->opackets;
43408057504Sxy break;
43508057504Sxy
43608057504Sxy case ETHER_STAT_ALIGN_ERRORS:
43729fd2c16SDavid Höppner Adapter->align_errors +=
43825f2d433Sxy E1000_READ_REG(hw, E1000_ALGNERRC);
43929fd2c16SDavid Höppner *val = Adapter->align_errors;
44008057504Sxy break;
44108057504Sxy
44208057504Sxy case ETHER_STAT_FCS_ERRORS:
44329fd2c16SDavid Höppner Adapter->fcs_errors +=
44425f2d433Sxy E1000_READ_REG(hw, E1000_CRCERRS);
44529fd2c16SDavid Höppner *val = Adapter->fcs_errors;
44608057504Sxy break;
44708057504Sxy
44808057504Sxy case ETHER_STAT_SQE_ERRORS:
44929fd2c16SDavid Höppner Adapter->sqe_errors +=
45025f2d433Sxy E1000_READ_REG(hw, E1000_SEC);
45129fd2c16SDavid Höppner *val = Adapter->sqe_errors;
45208057504Sxy break;
45308057504Sxy
45408057504Sxy case ETHER_STAT_CARRIER_ERRORS:
45529fd2c16SDavid Höppner Adapter->carrier_errors +=
45625f2d433Sxy E1000_READ_REG(hw, E1000_CEXTERR);
45729fd2c16SDavid Höppner *val = Adapter->carrier_errors;
45808057504Sxy break;
45908057504Sxy
46008057504Sxy case ETHER_STAT_EX_COLLISIONS:
46129fd2c16SDavid Höppner Adapter->ex_collisions +=
462caf05df5SMiles Xu, Sun Microsystems e1000g_read_phy_stat(hw, E1000_ECOL);
46329fd2c16SDavid Höppner *val = Adapter->ex_collisions;
46408057504Sxy break;
46508057504Sxy
46608057504Sxy case ETHER_STAT_TX_LATE_COLLISIONS:
46729fd2c16SDavid Höppner Adapter->tx_late_collisions +=
468caf05df5SMiles Xu, Sun Microsystems e1000g_read_phy_stat(hw, E1000_LATECOL);
46929fd2c16SDavid Höppner *val = Adapter->tx_late_collisions;
47008057504Sxy break;
47108057504Sxy
47208057504Sxy case ETHER_STAT_DEFER_XMTS:
47329fd2c16SDavid Höppner Adapter->defer_xmts +=
474caf05df5SMiles Xu, Sun Microsystems e1000g_read_phy_stat(hw, E1000_DC);
47529fd2c16SDavid Höppner *val = Adapter->defer_xmts;
47608057504Sxy break;
47708057504Sxy
47808057504Sxy case ETHER_STAT_FIRST_COLLISIONS:
47929fd2c16SDavid Höppner Adapter->first_collisions +=
480caf05df5SMiles Xu, Sun Microsystems e1000g_read_phy_stat(hw, E1000_SCC);
48129fd2c16SDavid Höppner *val = Adapter->first_collisions;
48208057504Sxy break;
48308057504Sxy
48408057504Sxy case ETHER_STAT_MULTI_COLLISIONS:
48529fd2c16SDavid Höppner Adapter->multi_collisions +=
486caf05df5SMiles Xu, Sun Microsystems e1000g_read_phy_stat(hw, E1000_MCC);
48729fd2c16SDavid Höppner *val = Adapter->multi_collisions;
48808057504Sxy break;
48908057504Sxy
49008057504Sxy case ETHER_STAT_MACRCV_ERRORS:
49129fd2c16SDavid Höppner Adapter->macrcv_errors +=
49225f2d433Sxy E1000_READ_REG(hw, E1000_RXERRC);
49329fd2c16SDavid Höppner *val = Adapter->macrcv_errors;
49408057504Sxy break;
49508057504Sxy
49608057504Sxy case ETHER_STAT_MACXMT_ERRORS:
49729fd2c16SDavid Höppner Adapter->macxmt_errors +=
498caf05df5SMiles Xu, Sun Microsystems e1000g_read_phy_stat(hw, E1000_ECOL);
49929fd2c16SDavid Höppner *val = Adapter->macxmt_errors;
50008057504Sxy break;
50108057504Sxy
50208057504Sxy case ETHER_STAT_TOOLONG_ERRORS:
50329fd2c16SDavid Höppner Adapter->toolong_errors +=
50425f2d433Sxy E1000_READ_REG(hw, E1000_ROC);
50529fd2c16SDavid Höppner *val = Adapter->toolong_errors;
50629fd2c16SDavid Höppner break;
50729fd2c16SDavid Höppner
50829fd2c16SDavid Höppner case ETHER_STAT_TOOSHORT_ERRORS:
50929fd2c16SDavid Höppner Adapter->tooshort_errors +=
51029fd2c16SDavid Höppner E1000_READ_REG(hw, E1000_RUC);
51129fd2c16SDavid Höppner *val = Adapter->tooshort_errors;
51229fd2c16SDavid Höppner break;
51329fd2c16SDavid Höppner
51429fd2c16SDavid Höppner case ETHER_STAT_JABBER_ERRORS:
51529fd2c16SDavid Höppner Adapter->jabber_errors +=
51629fd2c16SDavid Höppner E1000_READ_REG(hw, E1000_RJC);
51729fd2c16SDavid Höppner *val = Adapter->jabber_errors;
51808057504Sxy break;
51908057504Sxy
52008057504Sxy case ETHER_STAT_XCVR_ADDR:
521*42b53e0fSRobert Mustacchi *val = hw->phy.addr;
52208057504Sxy break;
52308057504Sxy
52408057504Sxy case ETHER_STAT_XCVR_ID:
5254914a7d0Syy *val = hw->phy.id | hw->phy.revision;
52608057504Sxy break;
52708057504Sxy
52808057504Sxy case ETHER_STAT_XCVR_INUSE:
529*42b53e0fSRobert Mustacchi *val = (uint64_t)e1000_link_to_media(hw, Adapter->link_speed);
53008057504Sxy break;
53108057504Sxy
53208057504Sxy case ETHER_STAT_CAP_1000FDX:
5339ce7e93cScc *val = Adapter->param_1000fdx_cap;
53408057504Sxy break;
53508057504Sxy
53608057504Sxy case ETHER_STAT_CAP_1000HDX:
5379ce7e93cScc *val = Adapter->param_1000hdx_cap;
53808057504Sxy break;
53908057504Sxy
54008057504Sxy case ETHER_STAT_CAP_100FDX:
5419ce7e93cScc *val = Adapter->param_100fdx_cap;
54208057504Sxy break;
54308057504Sxy
54408057504Sxy case ETHER_STAT_CAP_100HDX:
5459ce7e93cScc *val = Adapter->param_100hdx_cap;
54608057504Sxy break;
54708057504Sxy
54808057504Sxy case ETHER_STAT_CAP_10FDX:
5499ce7e93cScc *val = Adapter->param_10fdx_cap;
55008057504Sxy break;
55108057504Sxy
55208057504Sxy case ETHER_STAT_CAP_10HDX:
5539ce7e93cScc *val = Adapter->param_10hdx_cap;
55408057504Sxy break;
55508057504Sxy
55608057504Sxy case ETHER_STAT_CAP_ASMPAUSE:
5579ce7e93cScc *val = Adapter->param_asym_pause_cap;
55808057504Sxy break;
55908057504Sxy
56008057504Sxy case ETHER_STAT_CAP_PAUSE:
5619ce7e93cScc *val = Adapter->param_pause_cap;
56208057504Sxy break;
56308057504Sxy
56408057504Sxy case ETHER_STAT_CAP_AUTONEG:
5659ce7e93cScc *val = Adapter->param_autoneg_cap;
56608057504Sxy break;
56708057504Sxy
56808057504Sxy case ETHER_STAT_ADV_CAP_1000FDX:
5699ce7e93cScc *val = Adapter->param_adv_1000fdx;
57008057504Sxy break;
57108057504Sxy
57208057504Sxy case ETHER_STAT_ADV_CAP_1000HDX:
5739ce7e93cScc *val = Adapter->param_adv_1000hdx;
57408057504Sxy break;
57508057504Sxy
57608057504Sxy case ETHER_STAT_ADV_CAP_100FDX:
5779ce7e93cScc *val = Adapter->param_adv_100fdx;
57808057504Sxy break;
57908057504Sxy
58008057504Sxy case ETHER_STAT_ADV_CAP_100HDX:
5819ce7e93cScc *val = Adapter->param_adv_100hdx;
58208057504Sxy break;
58308057504Sxy
58408057504Sxy case ETHER_STAT_ADV_CAP_10FDX:
5859ce7e93cScc *val = Adapter->param_adv_10fdx;
58608057504Sxy break;
58708057504Sxy
58808057504Sxy case ETHER_STAT_ADV_CAP_10HDX:
5899ce7e93cScc *val = Adapter->param_adv_10hdx;
59008057504Sxy break;
59108057504Sxy
59208057504Sxy case ETHER_STAT_ADV_CAP_ASMPAUSE:
5939ce7e93cScc *val = Adapter->param_adv_asym_pause;
59408057504Sxy break;
59508057504Sxy
59608057504Sxy case ETHER_STAT_ADV_CAP_PAUSE:
5979ce7e93cScc *val = Adapter->param_adv_pause;
59808057504Sxy break;
59908057504Sxy
60008057504Sxy case ETHER_STAT_ADV_CAP_AUTONEG:
60125f2d433Sxy *val = hw->mac.autoneg;
60208057504Sxy break;
60308057504Sxy
60408057504Sxy case ETHER_STAT_LP_CAP_1000FDX:
6059ce7e93cScc *val = Adapter->param_lp_1000fdx;
60608057504Sxy break;
60708057504Sxy
60808057504Sxy case ETHER_STAT_LP_CAP_1000HDX:
6099ce7e93cScc *val = Adapter->param_lp_1000hdx;
61008057504Sxy break;
61108057504Sxy
61208057504Sxy case ETHER_STAT_LP_CAP_100FDX:
6139ce7e93cScc *val = Adapter->param_lp_100fdx;
61408057504Sxy break;
61508057504Sxy
61608057504Sxy case ETHER_STAT_LP_CAP_100HDX:
6179ce7e93cScc *val = Adapter->param_lp_100hdx;
61808057504Sxy break;
61908057504Sxy
62008057504Sxy case ETHER_STAT_LP_CAP_10FDX:
6219ce7e93cScc *val = Adapter->param_lp_10fdx;
62208057504Sxy break;
62308057504Sxy
62408057504Sxy case ETHER_STAT_LP_CAP_10HDX:
6259ce7e93cScc *val = Adapter->param_lp_10hdx;
62608057504Sxy break;
62708057504Sxy
62808057504Sxy case ETHER_STAT_LP_CAP_ASMPAUSE:
6299ce7e93cScc *val = Adapter->param_lp_asym_pause;
63008057504Sxy break;
63108057504Sxy
63208057504Sxy case ETHER_STAT_LP_CAP_PAUSE:
6339ce7e93cScc *val = Adapter->param_lp_pause;
63408057504Sxy break;
63508057504Sxy
63608057504Sxy case ETHER_STAT_LP_CAP_AUTONEG:
6379ce7e93cScc *val = Adapter->param_lp_autoneg;
63808057504Sxy break;
63908057504Sxy
64008057504Sxy case ETHER_STAT_LINK_ASMPAUSE:
6419ce7e93cScc *val = Adapter->param_asym_pause_cap;
64208057504Sxy break;
64308057504Sxy
64408057504Sxy case ETHER_STAT_LINK_PAUSE:
6459ce7e93cScc *val = Adapter->param_pause_cap;
64608057504Sxy break;
64708057504Sxy
64808057504Sxy case ETHER_STAT_LINK_AUTONEG:
6499ce7e93cScc *val = hw->mac.autoneg;
65008057504Sxy break;
65108057504Sxy
65208057504Sxy case ETHER_STAT_LINK_DUPLEX:
65308057504Sxy *val = (Adapter->link_duplex == FULL_DUPLEX) ?
65408057504Sxy LINK_DUPLEX_FULL : LINK_DUPLEX_HALF;
65508057504Sxy break;
65608057504Sxy
6579ce7e93cScc case ETHER_STAT_CAP_100T4:
6589ce7e93cScc *val = Adapter->param_100t4_cap;
6599ce7e93cScc break;
6609ce7e93cScc
6619ce7e93cScc case ETHER_STAT_ADV_CAP_100T4:
6629ce7e93cScc *val = Adapter->param_adv_100t4;
6639ce7e93cScc break;
6649ce7e93cScc
6659ce7e93cScc case ETHER_STAT_LP_CAP_100T4:
6669ce7e93cScc *val = Adapter->param_lp_100t4;
6679ce7e93cScc break;
6689ce7e93cScc
66908057504Sxy default:
67025f2d433Sxy rw_exit(&Adapter->chip_lock);
67108057504Sxy return (ENOTSUP);
67208057504Sxy }
67308057504Sxy
67425f2d433Sxy rw_exit(&Adapter->chip_lock);
67525f2d433Sxy
676ec39b9cfSchangqing li - Sun Microsystems - Beijing China if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK) {
6779b6541b3Sgl ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_UNAFFECTED);
678ec39b9cfSchangqing li - Sun Microsystems - Beijing China return (EIO);
679ec39b9cfSchangqing li - Sun Microsystems - Beijing China }
6809b6541b3Sgl
68108057504Sxy return (0);
68208057504Sxy }
68308057504Sxy
68408057504Sxy /*
68525f2d433Sxy * e1000g_init_stats - initialize kstat data structures
68625f2d433Sxy *
68725f2d433Sxy * This routine will create and initialize the driver private
68825f2d433Sxy * statistics counters.
68908057504Sxy */
69008057504Sxy int
e1000g_init_stats(struct e1000g * Adapter)69125f2d433Sxy e1000g_init_stats(struct e1000g *Adapter)
69208057504Sxy {
69308057504Sxy kstat_t *ksp;
69425f2d433Sxy p_e1000g_stat_t e1000g_ksp;
69508057504Sxy
69608057504Sxy /*
69708057504Sxy * Create and init kstat
69808057504Sxy */
69908057504Sxy ksp = kstat_create(WSNAME, ddi_get_instance(Adapter->dip),
70008057504Sxy "statistics", "net", KSTAT_TYPE_NAMED,
70125f2d433Sxy sizeof (e1000g_stat_t) / sizeof (kstat_named_t), 0);
70208057504Sxy
70308057504Sxy if (ksp == NULL) {
70408057504Sxy e1000g_log(Adapter, CE_WARN,
70508057504Sxy "Could not create kernel statistics\n");
70608057504Sxy return (DDI_FAILURE);
70708057504Sxy }
70808057504Sxy
70908057504Sxy Adapter->e1000g_ksp = ksp; /* Fill in the Adapters ksp */
71008057504Sxy
71125f2d433Sxy e1000g_ksp = (p_e1000g_stat_t)ksp->ks_data;
71208057504Sxy
71308057504Sxy /*
71408057504Sxy * Initialize all the statistics
71508057504Sxy */
71625f2d433Sxy kstat_named_init(&e1000g_ksp->reset_count, "Reset Count",
71708057504Sxy KSTAT_DATA_ULONG);
71808057504Sxy
71908057504Sxy kstat_named_init(&e1000g_ksp->rx_error, "Rx Error",
72008057504Sxy KSTAT_DATA_ULONG);
72108057504Sxy kstat_named_init(&e1000g_ksp->rx_allocb_fail, "Rx Allocb Failure",
72208057504Sxy KSTAT_DATA_ULONG);
72346ebaa55SMiles Xu, Sun Microsystems kstat_named_init(&e1000g_ksp->rx_size_error, "Rx Size Error",
72446ebaa55SMiles Xu, Sun Microsystems KSTAT_DATA_ULONG);
72508057504Sxy
72608057504Sxy kstat_named_init(&e1000g_ksp->tx_no_desc, "Tx No Desc",
72708057504Sxy KSTAT_DATA_ULONG);
72808057504Sxy kstat_named_init(&e1000g_ksp->tx_no_swpkt, "Tx No Buffer",
72908057504Sxy KSTAT_DATA_ULONG);
73025f2d433Sxy kstat_named_init(&e1000g_ksp->tx_send_fail, "Tx Send Failure",
73108057504Sxy KSTAT_DATA_ULONG);
73208057504Sxy kstat_named_init(&e1000g_ksp->tx_over_size, "Tx Pkt Over Size",
73308057504Sxy KSTAT_DATA_ULONG);
73408057504Sxy kstat_named_init(&e1000g_ksp->tx_reschedule, "Tx Reschedule",
73508057504Sxy KSTAT_DATA_ULONG);
73608057504Sxy
73708057504Sxy kstat_named_init(&e1000g_ksp->Mpc, "Recv_Missed_Packets",
73808057504Sxy KSTAT_DATA_ULONG);
73908057504Sxy kstat_named_init(&e1000g_ksp->Symerrs, "Recv_Symbol_Errors",
74008057504Sxy KSTAT_DATA_ULONG);
74108057504Sxy kstat_named_init(&e1000g_ksp->Rlec, "Recv_Length_Errors",
74208057504Sxy KSTAT_DATA_ULONG);
74308057504Sxy kstat_named_init(&e1000g_ksp->Xonrxc, "XONs_Recvd",
74408057504Sxy KSTAT_DATA_ULONG);
74508057504Sxy kstat_named_init(&e1000g_ksp->Xontxc, "XONs_Xmitd",
74608057504Sxy KSTAT_DATA_ULONG);
74708057504Sxy kstat_named_init(&e1000g_ksp->Xoffrxc, "XOFFs_Recvd",
74808057504Sxy KSTAT_DATA_ULONG);
74908057504Sxy kstat_named_init(&e1000g_ksp->Xofftxc, "XOFFs_Xmitd",
75008057504Sxy KSTAT_DATA_ULONG);
75108057504Sxy kstat_named_init(&e1000g_ksp->Fcruc, "Recv_Unsupport_FC_Pkts",
75208057504Sxy KSTAT_DATA_ULONG);
75347b7744cSyy #ifdef E1000G_DEBUG
75408057504Sxy kstat_named_init(&e1000g_ksp->Prc64, "Pkts_Recvd_( 64b)",
75508057504Sxy KSTAT_DATA_ULONG);
75608057504Sxy kstat_named_init(&e1000g_ksp->Prc127, "Pkts_Recvd_( 65- 127b)",
75708057504Sxy KSTAT_DATA_ULONG);
75808057504Sxy kstat_named_init(&e1000g_ksp->Prc255, "Pkts_Recvd_( 127- 255b)",
75908057504Sxy KSTAT_DATA_ULONG);
76008057504Sxy kstat_named_init(&e1000g_ksp->Prc511, "Pkts_Recvd_( 256- 511b)",
76108057504Sxy KSTAT_DATA_ULONG);
76208057504Sxy kstat_named_init(&e1000g_ksp->Prc1023, "Pkts_Recvd_( 511-1023b)",
76308057504Sxy KSTAT_DATA_ULONG);
76408057504Sxy kstat_named_init(&e1000g_ksp->Prc1522, "Pkts_Recvd_(1024-1522b)",
76508057504Sxy KSTAT_DATA_ULONG);
76647b7744cSyy #endif
76708057504Sxy kstat_named_init(&e1000g_ksp->Gprc, "Good_Pkts_Recvd",
76808057504Sxy KSTAT_DATA_ULONG);
76908057504Sxy kstat_named_init(&e1000g_ksp->Gptc, "Good_Pkts_Xmitd",
77008057504Sxy KSTAT_DATA_ULONG);
77108057504Sxy kstat_named_init(&e1000g_ksp->Gorl, "Good_Octets_Recvd_Lo",
77208057504Sxy KSTAT_DATA_ULONG);
77308057504Sxy kstat_named_init(&e1000g_ksp->Gorh, "Good_Octets_Recvd_Hi",
77408057504Sxy KSTAT_DATA_ULONG);
77508057504Sxy kstat_named_init(&e1000g_ksp->Gotl, "Good_Octets_Xmitd_Lo",
77608057504Sxy KSTAT_DATA_ULONG);
77708057504Sxy kstat_named_init(&e1000g_ksp->Goth, "Good_Octets_Xmitd_Hi",
77808057504Sxy KSTAT_DATA_ULONG);
77908057504Sxy kstat_named_init(&e1000g_ksp->Rfc, "Recv_Frag",
78008057504Sxy KSTAT_DATA_ULONG);
78147b7744cSyy #ifdef E1000G_DEBUG
78208057504Sxy kstat_named_init(&e1000g_ksp->Ptc64, "Pkts_Xmitd_( 64b)",
78308057504Sxy KSTAT_DATA_ULONG);
78408057504Sxy kstat_named_init(&e1000g_ksp->Ptc127, "Pkts_Xmitd_( 65- 127b)",
78508057504Sxy KSTAT_DATA_ULONG);
78608057504Sxy kstat_named_init(&e1000g_ksp->Ptc255, "Pkts_Xmitd_( 128- 255b)",
78708057504Sxy KSTAT_DATA_ULONG);
78808057504Sxy kstat_named_init(&e1000g_ksp->Ptc511, "Pkts_Xmitd_( 255- 511b)",
78908057504Sxy KSTAT_DATA_ULONG);
79008057504Sxy kstat_named_init(&e1000g_ksp->Ptc1023, "Pkts_Xmitd_( 512-1023b)",
79108057504Sxy KSTAT_DATA_ULONG);
79208057504Sxy kstat_named_init(&e1000g_ksp->Ptc1522, "Pkts_Xmitd_(1024-1522b)",
79308057504Sxy KSTAT_DATA_ULONG);
79447b7744cSyy #endif
79508057504Sxy kstat_named_init(&e1000g_ksp->Tncrs, "Xmit_with_No_CRS",
79608057504Sxy KSTAT_DATA_ULONG);
79708057504Sxy kstat_named_init(&e1000g_ksp->Tsctc, "Xmit_TCP_Seg_Contexts",
79808057504Sxy KSTAT_DATA_ULONG);
79908057504Sxy kstat_named_init(&e1000g_ksp->Tsctfc, "Xmit_TCP_Seg_Contexts_Fail",
80008057504Sxy KSTAT_DATA_ULONG);
80108057504Sxy
80225f2d433Sxy #ifdef E1000G_DEBUG
80325f2d433Sxy kstat_named_init(&e1000g_ksp->rx_none, "Rx No Data",
80408057504Sxy KSTAT_DATA_ULONG);
80525f2d433Sxy kstat_named_init(&e1000g_ksp->rx_multi_desc, "Rx Span Multi Desc",
80608057504Sxy KSTAT_DATA_ULONG);
80725f2d433Sxy kstat_named_init(&e1000g_ksp->rx_no_freepkt, "Rx Freelist Empty",
80808057504Sxy KSTAT_DATA_ULONG);
80925f2d433Sxy kstat_named_init(&e1000g_ksp->rx_avail_freepkt, "Rx Freelist Avail",
81008057504Sxy KSTAT_DATA_ULONG);
81108057504Sxy
81225f2d433Sxy kstat_named_init(&e1000g_ksp->tx_under_size, "Tx Pkt Under Size",
81308057504Sxy KSTAT_DATA_ULONG);
81425f2d433Sxy kstat_named_init(&e1000g_ksp->tx_exceed_frags, "Tx Exceed Max Frags",
81525f2d433Sxy KSTAT_DATA_ULONG);
81625f2d433Sxy kstat_named_init(&e1000g_ksp->tx_empty_frags, "Tx Empty Frags",
81725f2d433Sxy KSTAT_DATA_ULONG);
81825f2d433Sxy kstat_named_init(&e1000g_ksp->tx_recycle, "Tx Recycle",
81925f2d433Sxy KSTAT_DATA_ULONG);
82025f2d433Sxy kstat_named_init(&e1000g_ksp->tx_recycle_intr, "Tx Recycle Intr",
82125f2d433Sxy KSTAT_DATA_ULONG);
82225f2d433Sxy kstat_named_init(&e1000g_ksp->tx_recycle_retry, "Tx Recycle Retry",
82325f2d433Sxy KSTAT_DATA_ULONG);
82425f2d433Sxy kstat_named_init(&e1000g_ksp->tx_recycle_none, "Tx Recycled None",
82525f2d433Sxy KSTAT_DATA_ULONG);
82625f2d433Sxy kstat_named_init(&e1000g_ksp->tx_copy, "Tx Send Copy",
82725f2d433Sxy KSTAT_DATA_ULONG);
82825f2d433Sxy kstat_named_init(&e1000g_ksp->tx_bind, "Tx Send Bind",
82925f2d433Sxy KSTAT_DATA_ULONG);
83025f2d433Sxy kstat_named_init(&e1000g_ksp->tx_multi_copy, "Tx Copy Multi Frags",
83125f2d433Sxy KSTAT_DATA_ULONG);
83225f2d433Sxy kstat_named_init(&e1000g_ksp->tx_multi_cookie, "Tx Bind Multi Cookies",
83325f2d433Sxy KSTAT_DATA_ULONG);
83425f2d433Sxy kstat_named_init(&e1000g_ksp->tx_lack_desc, "Tx Desc Insufficient",
83508057504Sxy KSTAT_DATA_ULONG);
83625f2d433Sxy #endif
83708057504Sxy
83808057504Sxy /*
83908057504Sxy * Function to provide kernel stat update on demand
84008057504Sxy */
84125f2d433Sxy ksp->ks_update = e1000g_update_stats;
84208057504Sxy
84308057504Sxy /*
84408057504Sxy * Pointer into provider's raw statistics
84508057504Sxy */
84608057504Sxy ksp->ks_private = (void *)Adapter;
84708057504Sxy
84808057504Sxy /*
84908057504Sxy * Add kstat to systems kstat chain
85008057504Sxy */
85108057504Sxy kstat_install(ksp);
85208057504Sxy
85308057504Sxy return (DDI_SUCCESS);
85408057504Sxy }
855caf05df5SMiles Xu, Sun Microsystems
856caf05df5SMiles Xu, Sun Microsystems /*
857caf05df5SMiles Xu, Sun Microsystems * e1000g_read_phy_stat - read certain PHY statistics
858caf05df5SMiles Xu, Sun Microsystems *
859caf05df5SMiles Xu, Sun Microsystems * Certain statistics are read from MAC registers on some silicon types
860caf05df5SMiles Xu, Sun Microsystems * but are read from the PHY on other silicon types. This routine
861caf05df5SMiles Xu, Sun Microsystems * handles that difference as needed.
862caf05df5SMiles Xu, Sun Microsystems */
863caf05df5SMiles Xu, Sun Microsystems static uint32_t
e1000g_read_phy_stat(struct e1000_hw * hw,int reg)864caf05df5SMiles Xu, Sun Microsystems e1000g_read_phy_stat(struct e1000_hw *hw, int reg)
865caf05df5SMiles Xu, Sun Microsystems {
866caf05df5SMiles Xu, Sun Microsystems uint16_t phy_low, phy_high;
867caf05df5SMiles Xu, Sun Microsystems uint32_t val;
868caf05df5SMiles Xu, Sun Microsystems
869caf05df5SMiles Xu, Sun Microsystems /* get statistic from PHY in these cases */
870caf05df5SMiles Xu, Sun Microsystems if ((hw->phy.type == e1000_phy_82578) ||
871caf05df5SMiles Xu, Sun Microsystems (hw->phy.type == e1000_phy_82577)) {
872caf05df5SMiles Xu, Sun Microsystems
873caf05df5SMiles Xu, Sun Microsystems switch (reg) {
874caf05df5SMiles Xu, Sun Microsystems case E1000_SCC:
875caf05df5SMiles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_SCC_UPPER, &phy_high);
876caf05df5SMiles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_SCC_LOWER, &phy_low);
877caf05df5SMiles Xu, Sun Microsystems val = ((uint32_t)phy_high << 16) | (uint32_t)phy_low;
878caf05df5SMiles Xu, Sun Microsystems break;
879caf05df5SMiles Xu, Sun Microsystems
880caf05df5SMiles Xu, Sun Microsystems case E1000_MCC:
881caf05df5SMiles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_MCC_UPPER, &phy_high);
882caf05df5SMiles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_MCC_LOWER, &phy_low);
883caf05df5SMiles Xu, Sun Microsystems val = ((uint32_t)phy_high << 16) | (uint32_t)phy_low;
884caf05df5SMiles Xu, Sun Microsystems break;
885caf05df5SMiles Xu, Sun Microsystems
886caf05df5SMiles Xu, Sun Microsystems case E1000_ECOL:
887caf05df5SMiles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_ECOL_UPPER, &phy_high);
888caf05df5SMiles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_ECOL_LOWER, &phy_low);
889caf05df5SMiles Xu, Sun Microsystems val = ((uint32_t)phy_high << 16) | (uint32_t)phy_low;
890caf05df5SMiles Xu, Sun Microsystems break;
891caf05df5SMiles Xu, Sun Microsystems
892caf05df5SMiles Xu, Sun Microsystems case E1000_COLC:
893caf05df5SMiles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_COLC_UPPER, &phy_high);
894caf05df5SMiles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_COLC_LOWER, &phy_low);
895caf05df5SMiles Xu, Sun Microsystems val = ((uint32_t)phy_high << 16) | (uint32_t)phy_low;
896caf05df5SMiles Xu, Sun Microsystems break;
897caf05df5SMiles Xu, Sun Microsystems
898caf05df5SMiles Xu, Sun Microsystems case E1000_LATECOL:
899caf05df5SMiles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_LATECOL_UPPER,
900caf05df5SMiles Xu, Sun Microsystems &phy_high);
901caf05df5SMiles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_LATECOL_LOWER,
902caf05df5SMiles Xu, Sun Microsystems &phy_low);
903caf05df5SMiles Xu, Sun Microsystems val = ((uint32_t)phy_high << 16) | (uint32_t)phy_low;
904caf05df5SMiles Xu, Sun Microsystems break;
905caf05df5SMiles Xu, Sun Microsystems
906caf05df5SMiles Xu, Sun Microsystems case E1000_DC:
907caf05df5SMiles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_DC_UPPER, &phy_high);
908caf05df5SMiles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_DC_LOWER, &phy_low);
909caf05df5SMiles Xu, Sun Microsystems val = ((uint32_t)phy_high << 16) | (uint32_t)phy_low;
910caf05df5SMiles Xu, Sun Microsystems break;
911caf05df5SMiles Xu, Sun Microsystems
912caf05df5SMiles Xu, Sun Microsystems case E1000_TNCRS:
913caf05df5SMiles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_TNCRS_UPPER,
914caf05df5SMiles Xu, Sun Microsystems &phy_high);
915caf05df5SMiles Xu, Sun Microsystems (void) e1000_read_phy_reg(hw, HV_TNCRS_LOWER,
916caf05df5SMiles Xu, Sun Microsystems &phy_low);
917caf05df5SMiles Xu, Sun Microsystems val = ((uint32_t)phy_high << 16) | (uint32_t)phy_low;
918caf05df5SMiles Xu, Sun Microsystems break;
919caf05df5SMiles Xu, Sun Microsystems
920caf05df5SMiles Xu, Sun Microsystems default:
921caf05df5SMiles Xu, Sun Microsystems break;
922caf05df5SMiles Xu, Sun Microsystems }
923caf05df5SMiles Xu, Sun Microsystems
924caf05df5SMiles Xu, Sun Microsystems /* get statistic from MAC otherwise */
925caf05df5SMiles Xu, Sun Microsystems } else {
926caf05df5SMiles Xu, Sun Microsystems val = E1000_READ_REG(hw, reg);
927caf05df5SMiles Xu, Sun Microsystems }
928caf05df5SMiles Xu, Sun Microsystems
929caf05df5SMiles Xu, Sun Microsystems return (val);
930caf05df5SMiles Xu, Sun Microsystems }
9310dc2366fSVenugopal Iyer
9320dc2366fSVenugopal Iyer /*
9330dc2366fSVenugopal Iyer * Retrieve a value for one of the statistics for a particular rx ring
9340dc2366fSVenugopal Iyer */
9350dc2366fSVenugopal Iyer int
e1000g_rx_ring_stat(mac_ring_driver_t rh,uint_t stat,uint64_t * val)9360dc2366fSVenugopal Iyer e1000g_rx_ring_stat(mac_ring_driver_t rh, uint_t stat, uint64_t *val)
9370dc2366fSVenugopal Iyer {
9380dc2366fSVenugopal Iyer e1000g_rx_ring_t *rx_ring = (e1000g_rx_ring_t *)rh;
9390dc2366fSVenugopal Iyer struct e1000g *Adapter = rx_ring->adapter;
9400dc2366fSVenugopal Iyer struct e1000_hw *hw = &Adapter->shared;
9410dc2366fSVenugopal Iyer uint32_t low_val, high_val;
9420dc2366fSVenugopal Iyer
9430dc2366fSVenugopal Iyer rw_enter(&Adapter->chip_lock, RW_READER);
9440dc2366fSVenugopal Iyer
9450dc2366fSVenugopal Iyer if (Adapter->e1000g_state & E1000G_SUSPENDED) {
9460dc2366fSVenugopal Iyer rw_exit(&Adapter->chip_lock);
9470dc2366fSVenugopal Iyer return (ECANCELED);
9480dc2366fSVenugopal Iyer }
9490dc2366fSVenugopal Iyer
9500dc2366fSVenugopal Iyer switch (stat) {
9510dc2366fSVenugopal Iyer case MAC_STAT_RBYTES:
9520dc2366fSVenugopal Iyer /*
9530dc2366fSVenugopal Iyer * The 64-bit register will reset whenever the upper
9540dc2366fSVenugopal Iyer * 32 bits are read. So we need to read the lower
9550dc2366fSVenugopal Iyer * 32 bits first, then read the upper 32 bits.
9560dc2366fSVenugopal Iyer */
9570dc2366fSVenugopal Iyer low_val = E1000_READ_REG(hw, E1000_TORL);
9580dc2366fSVenugopal Iyer high_val = E1000_READ_REG(hw, E1000_TORH);
95929fd2c16SDavid Höppner Adapter->rbytes +=
96029fd2c16SDavid Höppner (uint64_t)high_val << 32 | (uint64_t)low_val;
96129fd2c16SDavid Höppner *val = Adapter->rbytes;
9620dc2366fSVenugopal Iyer break;
9630dc2366fSVenugopal Iyer
9640dc2366fSVenugopal Iyer case MAC_STAT_IPACKETS:
96529fd2c16SDavid Höppner Adapter->ipackets +=
9660dc2366fSVenugopal Iyer E1000_READ_REG(hw, E1000_TPR);
96729fd2c16SDavid Höppner *val = Adapter->ipackets;
9680dc2366fSVenugopal Iyer break;
9690dc2366fSVenugopal Iyer
9700dc2366fSVenugopal Iyer default:
9710dc2366fSVenugopal Iyer *val = 0;
9720dc2366fSVenugopal Iyer rw_exit(&Adapter->chip_lock);
9730dc2366fSVenugopal Iyer return (ENOTSUP);
9740dc2366fSVenugopal Iyer }
9750dc2366fSVenugopal Iyer
9760dc2366fSVenugopal Iyer rw_exit(&Adapter->chip_lock);
9770dc2366fSVenugopal Iyer
9780dc2366fSVenugopal Iyer if (e1000g_check_acc_handle(Adapter->osdep.reg_handle) != DDI_FM_OK)
9790dc2366fSVenugopal Iyer ddi_fm_service_impact(Adapter->dip, DDI_SERVICE_UNAFFECTED);
9800dc2366fSVenugopal Iyer
9810dc2366fSVenugopal Iyer return (0);
9820dc2366fSVenugopal Iyer }
983